tests/tcg/tricore: Add madd test
[qemu/ar7.git] / tests / tcg / tricore / macros.h
blob0d76fc403a751fe280f0d762acf380d6c9ebee0a
1 /* Helpers */
2 #define LI(reg, val) \
3 mov.u reg, lo:val; \
4 movh DREG_TEMP_LI, up:val; \
5 or reg, reg, DREG_TEMP_LI; \
7 /* Address definitions */
8 #define TESTDEV_ADDR 0xf0000000
9 /* Register definitions */
10 #define DREG_RS1 %d0
11 #define DREG_RS2 %d1
12 #define DREG_RS3 %d4
13 #define DREG_CALC_RESULT %d1
14 #define DREG_CALC_PSW %d2
15 #define DREG_CORRECT_PSW %d3
16 #define DREG_TEMP_LI %d10
17 #define DREG_TEMP %d11
18 #define DREG_TEST_NUM %d14
19 #define DREG_CORRECT_RESULT %d15
21 #define DREG_DEV_ADDR %a15
23 #define EREG_RS1 %e6
24 #define EREG_RS1_LO %d6
25 #define EREG_RS1_HI %d7
26 #define EREG_RS2 %e8
27 #define EREG_RS2_LO %d8
28 #define EREG_RS2_HI %d9
29 #define EREG_CALC_RESULT %e8
30 #define EREG_CALC_RESULT_HI %d9
31 #define EREG_CALC_RESULT_LO %d8
32 #define EREG_CORRECT_RESULT_LO %d0
33 #define EREG_CORRECT_RESULT_HI %d1
35 /* Test case wrappers */
36 #define TEST_CASE(num, testreg, correct, code...) \
37 test_ ## num: \
38 code; \
39 LI(DREG_CORRECT_RESULT, correct) \
40 mov DREG_TEST_NUM, num; \
41 jne testreg, DREG_CORRECT_RESULT, fail \
43 #define TEST_CASE_E(num, correct_lo, correct_hi, code...) \
44 test_ ## num: \
45 code; \
46 mov DREG_TEST_NUM, num; \
47 LI(EREG_CORRECT_RESULT_LO, correct_lo) \
48 jne EREG_CALC_RESULT_LO, EREG_CORRECT_RESULT_LO, fail; \
49 LI(EREG_CORRECT_RESULT_HI, correct_hi) \
50 jne EREG_CALC_RESULT_HI, EREG_CORRECT_RESULT_HI, fail;
52 #define TEST_CASE_PSW(num, testreg, correct, correct_psw, code...) \
53 test_ ## num: \
54 code; \
55 LI(DREG_CORRECT_RESULT, correct) \
56 mov DREG_TEST_NUM, num; \
57 jne testreg, DREG_CORRECT_RESULT, fail; \
58 mfcr DREG_CALC_PSW, $psw; \
59 LI(DREG_CORRECT_PSW, correct_psw) \
60 mov DREG_TEST_NUM, num; \
61 jne DREG_CALC_PSW, DREG_CORRECT_PSW, fail;
63 /* Actual test case type
64 * e.g inst %dX, %dY -> TEST_D_D
65 * inst %dX, %dY, %dZ -> TEST_D_DD
66 * inst %eX, %dY, %dZ -> TEST_E_DD
68 #define TEST_D_D(insn, num, result, rs1) \
69 TEST_CASE(num, DREG_CALC_RESULT, result, \
70 LI(DREG_RS1, rs1); \
71 insn DREG_CALC_RESULT, DREG_RS1; \
74 #define TEST_D_D_PSW(insn, num, result, psw, rs1) \
75 TEST_CASE_PSW(num, DREG_CALC_RESULT, result, psw, \
76 LI(DREG_RS1, rs1); \
77 rstv; \
78 insn DREG_CORRECT_RESULT, DREG_RS1; \
81 #define TEST_D_DD_PSW(insn, num, result, psw, rs1, rs2) \
82 TEST_CASE_PSW(num, DREG_CALC_RESULT, result, psw, \
83 LI(DREG_RS1, rs1); \
84 LI(DREG_RS2, rs2); \
85 rstv; \
86 insn DREG_CALC_RESULT, DREG_RS1, DREG_RS2; \
89 #define TEST_D_DDD_PSW(insn, num, result, psw, rs1, rs2, rs3) \
90 TEST_CASE_PSW(num, DREG_CALC_RESULT, result, psw, \
91 LI(DREG_RS1, rs1); \
92 LI(DREG_RS2, rs2); \
93 LI(DREG_RS3, rs3); \
94 rstv; \
95 insn DREG_CALC_RESULT, DREG_RS1, DREG_RS2, DREG_RS3; \
98 #define TEST_D_DDI_PSW(insn, num, result, psw, rs1, rs2, imm) \
99 TEST_CASE_PSW(num, DREG_CALC_RESULT, result, psw, \
100 LI(DREG_RS1, rs1); \
101 LI(DREG_RS2, rs2); \
102 rstv; \
103 insn DREG_CALC_RESULT, DREG_RS1, DREG_RS2, imm; \
106 #define TEST_E_ED(insn, num, res_hi, res_lo, rs1_hi, rs1_lo, rs2) \
107 TEST_CASE_E(num, res_lo, res_hi, \
108 LI(EREG_RS1_LO, rs1_lo); \
109 LI(EREG_RS1_HI, rs1_hi); \
110 LI(DREG_RS2, rs2); \
111 insn EREG_CALC_RESULT, EREG_RS1, DREG_RS2; \
114 /* Pass/Fail handling part */
115 #define TEST_PASSFAIL \
116 j pass; \
117 fail: \
118 LI(DREG_TEMP, TESTDEV_ADDR) \
119 mov.a DREG_DEV_ADDR, DREG_TEMP; \
120 st.w [DREG_DEV_ADDR], DREG_TEST_NUM;\
121 debug; \
122 j fail; \
123 pass: \
124 LI(DREG_TEMP, TESTDEV_ADDR) \
125 mov.a DREG_DEV_ADDR, DREG_TEMP; \
126 mov DREG_TEST_NUM, 0; \
127 st.w [DREG_DEV_ADDR], DREG_TEST_NUM;\
128 debug; \
129 j pass;