hw/mips/mips_r4k.c

   1 /*
   2  * QEMU/MIPS pseudo-board
   3  *
   4  * emulates a simple machine with ISA-like bus.
   5  * ISA IO space mapped to the 0x14000000 (PHYS) and
   6  * ISA memory at the 0x10000000 (PHYS, 16Mb in size).
   7  * All peripherial devices are attached to this "bus" with
   8  * the standard PC ISA addresses.
   9 */
  10 #include "hw/hw.h"
  11 #include "hw/mips/mips.h"
  12 #include "hw/mips/cpudevs.h"
  13 #include "hw/i386/pc.h"
  14 #include "hw/char/serial.h"
  15 #include "hw/isa/isa.h"
  16 #include "net/net.h"
  17 #include "sysemu/sysemu.h"
  18 #include "hw/boards.h"
  19 #include "hw/block/flash.h"
  20 #include "qemu/log.h"
  21 #include "hw/mips/bios.h"
  22 #include "hw/ide.h"
  23 #include "hw/loader.h"
  24 #include "elf.h"
  25 #include "hw/timer/mc146818rtc.h"
  26 #include "hw/timer/i8254.h"
  27 #include "sysemu/block-backend.h"
  28 #include "exec/address-spaces.h"
  29 #include "sysemu/qtest.h"
  30
  31 #define MAX_IDE_BUS 2
  32
  33 static const int ide_iobase[2] = { 0x1f0, 0x170 };
  34 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
  35 static const int ide_irq[2] = { 14, 15 };
  36
  37 static ISADevice *pit; /* PIT i8254 */
  38
  39 static bool bigendian;
  40
  41 /* i8254 PIT is attached to the IRQ0 at PIC i8259 */
  42
  43 static struct _loaderparams {
  44     int ram_size;
  45     const char *kernel_filename;
  46     const char *kernel_cmdline;
  47     const char *initrd_filename;
  48 } loaderparams;
  49
  50 static void mips_qemu_write (void *opaque, hwaddr addr,
  51                              uint64_t val, unsigned size)
  52 {
  53     if ((addr & 0xffff) == 0 && val == 42)
  54         qemu_system_reset_request ();
  55     else if ((addr & 0xffff) == 4 && val == 42)
  56         qemu_system_shutdown_request ();
  57 }
  58
  59 static uint64_t mips_qemu_read (void *opaque, hwaddr addr,
  60                                 unsigned size)
  61 {
  62     return 0;
  63 }
  64
  65 static const MemoryRegionOps mips_qemu_ops = {
  66     .read = mips_qemu_read,
  67     .write = mips_qemu_write,
  68     .endianness = DEVICE_NATIVE_ENDIAN,
  69 };
  70
  71 typedef struct ResetData {
  72     MIPSCPU *cpu;
  73     uint64_t vector;
  74 } ResetData;
  75
  76 static int64_t load_kernel(void)
  77 {
  78     int64_t entry, kernel_high;
  79     long kernel_size, initrd_size, params_size;
  80     ram_addr_t initrd_offset;
  81     uint32_t *params_buf;
  82     int big_endian;
  83
  84 #ifdef TARGET_WORDS_BIGENDIAN
  85     big_endian = 1;
  86 #else
  87     big_endian = 0;
  88 #endif
  89     kernel_size = load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys,
  90                            NULL, (uint64_t *)&entry, NULL,
  91                            (uint64_t *)&kernel_high, big_endian,
  92                            ELF_MACHINE, 1);
  93     if (kernel_size >= 0) {
  94         if ((entry & ~0x7fffffffULL) == 0x80000000)
  95             entry = (int32_t)entry;
  96     } else {
  97         fprintf(stderr, "qemu: could not load kernel '%s'\n",
  98                 loaderparams.kernel_filename);
  99         exit(1);
 100     }
 101
 102     /* Set SP (needed for some kernels) - normally set by bootloader. */
 103     //~ env->active_tc.gpr[29] = (entry + (kernel_size & 0xfffffffc)) + 0x1000;
 104
 105     /* load initrd */
 106     initrd_size = 0;
 107     initrd_offset = 0;
 108     if (loaderparams.initrd_filename) {
 109         initrd_size = get_image_size (loaderparams.initrd_filename);
 110         if (initrd_size > 0) {
 111             initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK;
 112             if (initrd_offset + initrd_size > ram_size) {
 113                 fprintf(stderr,
 114                         "qemu: memory too small for initial ram disk '%s'\n",
 115                         loaderparams.initrd_filename);
 116                 exit(1);
 117             }
 118             initrd_size = load_image_targphys(loaderparams.initrd_filename,
 119                                               initrd_offset,
 120                                               ram_size - initrd_offset);
 121         }
 122         if (initrd_size == (target_ulong) -1) {
 123             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 124                     loaderparams.initrd_filename);
 125             exit(1);
 126         }
 127     }
 128
 129     /* Store command line.  */
 130     params_size = 264;
 131     params_buf = g_malloc(params_size);
 132
 133     params_buf[0] = tswap32(ram_size);
 134     params_buf[1] = tswap32(0x12345678);
 135
 136     if (initrd_size > 0) {
 137         snprintf((char *)params_buf + 8, 256, "rd_start=0x%" PRIx64 " rd_size=%li %s",
 138                  cpu_mips_phys_to_kseg0(NULL, initrd_offset),
 139                  initrd_size, loaderparams.kernel_cmdline);
 140     } else {
 141         snprintf((char *)params_buf + 8, 256, "%s", loaderparams.kernel_cmdline);
 142     }
 143
 144     rom_add_blob_fixed("params", params_buf, params_size,
 145                        (16 << 20) - 264);
 146
 147     g_free(params_buf);
 148     return entry;
 149 }
 150
 151 static void main_cpu_reset(void *opaque)
 152 {
 153     ResetData *s = (ResetData *)opaque;
 154     CPUMIPSState *env = &s->cpu->env;
 155
 156     cpu_reset(CPU(s->cpu));
 157     env->active_tc.PC = s->vector;
 158 }
 159
 160 static const int sector_len = 32 * 1024;
 161
 162 static
 163 void mips_init(MachineState *machine)
 164 {
 165     ram_addr_t ram_size = machine->ram_size;
 166     const char *cpu_model = machine->cpu_model;
 167     const char *kernel_filename = machine->kernel_filename;
 168     const char *kernel_cmdline = machine->kernel_cmdline;
 169     const char *initrd_filename = machine->initrd_filename;
 170     char *filename;
 171     MemoryRegion *address_space_mem = get_system_memory();
 172     MemoryRegion *ram = g_new(MemoryRegion, 1);
 173     MemoryRegion *bios;
 174     MemoryRegion *iomem = g_new(MemoryRegion, 1);
 175     MemoryRegion *isa_io = g_new(MemoryRegion, 1);
 176     MemoryRegion *isa_mem = g_new(MemoryRegion, 1);
 177     int bios_size;
 178     MIPSCPU *cpu;
 179     CPUMIPSState *env;
 180     ResetData *reset_info;
 181     int i;
 182     qemu_irq *i8259;
 183     ISABus *isa_bus;
 184     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 185     DriveInfo *dinfo;
 186
 187     /* init CPUs */
 188     if (cpu_model == NULL) {
 189 #ifdef TARGET_MIPS64
 190         cpu_model = "R4000";
 191 #else
 192         cpu_model = "24Kf";
 193 #endif
 194     }
 195     cpu = cpu_mips_init(cpu_model);
 196     if (cpu == NULL) {
 197         fprintf(stderr, "Unable to find CPU definition\n");
 198         exit(1);
 199     }
 200     env = &cpu->env;
 201
 202     reset_info = g_malloc0(sizeof(ResetData));
 203     reset_info->cpu = cpu;
 204     reset_info->vector = env->active_tc.PC;
 205     qemu_register_reset(main_cpu_reset, reset_info);
 206
 207     /* allocate RAM */
 208     if (ram_size > (256 << 20)) {
 209         fprintf(stderr,
 210                 "qemu: Too much memory for this machine: %d MB, maximum 256 MB\n",
 211                 ((unsigned int)ram_size / (1 << 20)));
 212         exit(1);
 213     }
 214     memory_region_allocate_system_memory(ram, NULL, "mips_r4k.ram", ram_size);
 215
 216     memory_region_add_subregion(address_space_mem, 0, ram);
 217
 218     memory_region_init_io(iomem, NULL, &mips_qemu_ops, NULL, "mips-qemu", 0x10000);
 219     memory_region_add_subregion(address_space_mem, 0x1fbf0000, iomem);
 220
 221     /* Try to load a BIOS image. If this fails, we continue regardless,
 222        but initialize the hardware ourselves. When a kernel gets
 223        preloaded we also initialize the hardware, since the BIOS wasn't
 224        run. */
 225     if (bios_name == NULL)
 226         bios_name = BIOS_FILENAME;
 227     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 228     if (filename) {
 229         bios_size = get_image_size(filename);
 230     } else {
 231         bios_size = -1;
 232     }
 233     g_assert(current_cpu->bigendian == bigendian);
 234     if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
 235         bios = g_new(MemoryRegion, 1);
 236         memory_region_init_ram(bios, NULL, "mips_r4k.bios", BIOS_SIZE,
 237                                &error_fatal);
 238         vmstate_register_ram_global(bios);
 239         memory_region_set_readonly(bios, true);
 240         memory_region_add_subregion(get_system_memory(), 0x1fc00000, bios);
 241
 242         load_image_targphys(filename, 0x1fc00000, BIOS_SIZE);
 243     } else if ((dinfo = drive_get(IF_PFLASH, 0, 0)) != NULL) {
 244         uint32_t mips_rom = 0x00400000;
 245         if (!pflash_cfi01_register(0x1fc00000, NULL, "mips_r4k.bios", mips_rom,
 246                                    blk_by_legacy_dinfo(dinfo),
 247                                    sector_len, mips_rom / sector_len,
 248                                    4, 0, 0, 0, 0, bigendian)) {
 249             fprintf(stderr, "qemu: Error registering flash memory.\n");
 250         }
 251     } else if (!qtest_enabled()) {
 252         /* not fatal */
 253         fprintf(stderr, "qemu: Warning, could not load MIPS bios '%s'\n",
 254                 bios_name);
 255     }
 256     g_free(filename);
 257
 258     if (kernel_filename) {
 259         loaderparams.ram_size = ram_size;
 260         loaderparams.kernel_filename = kernel_filename;
 261         loaderparams.kernel_cmdline = kernel_cmdline;
 262         loaderparams.initrd_filename = initrd_filename;
 263         reset_info->vector = load_kernel();
 264     }
 265
 266     /* Init CPU internal devices */
 267     cpu_mips_irq_init_cpu(env);
 268     cpu_mips_clock_init(env);
 269
 270     /* ISA bus: IO space at 0x14000000, mem space at 0x10000000 */
 271     memory_region_init_alias(isa_io, NULL, "isa-io",
 272                              get_system_io(), 0, 0x00010000);
 273     memory_region_init(isa_mem, NULL, "isa-mem", 0x01000000);
 274     memory_region_add_subregion(get_system_memory(), 0x14000000, isa_io);
 275     memory_region_add_subregion(get_system_memory(), 0x10000000, isa_mem);
 276     isa_bus = isa_bus_new(NULL, isa_mem, get_system_io());
 277
 278     /* The PIC is attached to the MIPS CPU INT0 pin */
 279     i8259 = i8259_init(isa_bus, env->irq[2]);
 280     isa_bus_irqs(isa_bus, i8259);
 281
 282     rtc_init(isa_bus, 2000, NULL);
 283
 284     pit = pit_init(isa_bus, 0x40, 0, NULL);
 285
 286     serial_hds_isa_init(isa_bus, MAX_SERIAL_PORTS);
 287
 288     isa_vga_init(isa_bus);
 289
 290     if (nd_table[0].used)
 291         isa_ne2000_init(isa_bus, 0x300, 9, &nd_table[0]);
 292
 293     ide_drive_get(hd, ARRAY_SIZE(hd));
 294     for(i = 0; i < MAX_IDE_BUS; i++)
 295         isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], ide_irq[i],
 296                      hd[MAX_IDE_DEVS * i],
 297                      hd[MAX_IDE_DEVS * i + 1]);
 298
 299     isa_create_simple(isa_bus, "i8042");
 300 }
 301
 302 static
 303 void mips_r4k_init(MachineState *machine)
 304 {
 305     /* Run MIPS system in big endian mode. */
 306     bigendian = true;
 307     mips_init(machine);
 308 }
 309
 310 static
 311 void mipsel_r4k_init(MachineState *machine)
 312 {
 313     /* Run MIPS system in little endian mode. */
 314     bigendian = false;
 315     mips_init(machine);
 316 }
 317
 318 static QEMUMachine mips_machine = {
 319     .name = "mips",
 320     .desc = "MIPS r4k platform",
 321     .init = mips_r4k_init,
 322 };
 323
 324 static QEMUMachine mipsel_machine = {
 325     .name = "mipsel",
 326     .desc = "MIPS r4k platform (little endian)",
 327     .init = mipsel_r4k_init,
 328 };
 329
 330 static void mips_machine_init(void)
 331 {
 332     qemu_register_machine(&mips_machine);
 333     qemu_register_machine(&mipsel_machine);
 334 }
 335
 336 machine_init(mips_machine_init);