hw/arm/syborg_timer.c

   1 /*
   2  * Syborg Interval Timer.
   3  *
   4  * Copyright (c) 2008 CodeSourcery
   5  * Copyright (c) 2010, 2013 Stefan Weil
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy
   8  * of this software and associated documentation files (the "Software"), to deal
   9  * in the Software without restriction, including without limitation the rights
  10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11  * copies of the Software, and to permit persons to whom the Software is
  12  * furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included in
  15  * all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23  * THE SOFTWARE.
  24  */
  25
  26 #include "hw/sysbus.h"
  27 #include "qemu/timer.h"
  28 #include "syborg.h"
  29 #include "ptimer.h"             /* ptimer_state */
  30
  31 //#define DEBUG_SYBORG_TIMER
  32
  33 #ifdef DEBUG_SYBORG_TIMER
  34 #define DPRINTF(fmt, ...) \
  35 do { printf("syborg_timer: " fmt , ##args); } while (0)
  36 #define BADF(fmt, ...) \
  37 do { fprintf(stderr, "syborg_timer: error: " fmt , ## __VA_ARGS__); \
  38     exit(1);} while (0)
  39 #else
  40 #define DPRINTF(fmt, ...) do {} while(0)
  41 #define BADF(fmt, ...) \
  42 do { fprintf(stderr, "syborg_timer: error: " fmt , ## __VA_ARGS__);} while (0)
  43 #endif
  44
  45 enum {
  46     TIMER_ID          = 0,
  47     TIMER_RUNNING     = 1,
  48     TIMER_ONESHOT     = 2,
  49     TIMER_LIMIT       = 3,
  50     TIMER_VALUE       = 4,
  51     TIMER_INT_ENABLE  = 5,
  52     TIMER_INT_STATUS  = 6,
  53     TIMER_FREQ        = 7
  54 };
  55
  56 typedef struct {
  57     SysBusDevice busdev;
  58     MemoryRegion iomem;
  59     ptimer_state *timer;
  60     int running;
  61     int oneshot;
  62     uint32_t limit;
  63     uint32_t freq;
  64     uint32_t int_level;
  65     uint32_t int_enabled;
  66     qemu_irq irq;
  67 } SyborgTimerState;
  68
  69 static void syborg_timer_update(SyborgTimerState *s)
  70 {
  71     /* Update interrupt.  */
  72     if (s->int_level && s->int_enabled) {
  73         qemu_irq_raise(s->irq);
  74     } else {
  75         qemu_irq_lower(s->irq);
  76     }
  77 }
  78
  79 static void syborg_timer_tick(void *opaque)
  80 {
  81     SyborgTimerState *s = (SyborgTimerState *)opaque;
  82     //DPRINTF("Timer Tick\n");
  83     s->int_level = 1;
  84     if (s->oneshot)
  85         s->running = 0;
  86     syborg_timer_update(s);
  87 }
  88
  89 static uint64_t syborg_timer_read(void *opaque, hwaddr offset,
  90                                   unsigned size)
  91 {
  92     SyborgTimerState *s = (SyborgTimerState *)opaque;
  93
  94     DPRINTF("Reg read %d\n", (int)offset);
  95     offset &= 0xfff;
  96     switch (offset >> 2) {
  97     case TIMER_ID:
  98         return SYBORG_ID_TIMER;
  99     case TIMER_RUNNING:
 100         return s->running;
 101     case TIMER_ONESHOT:
 102         return s->oneshot;
 103     case TIMER_LIMIT:
 104         return s->limit;
 105     case TIMER_VALUE:
 106         return ptimer_get_count(s->timer);
 107     case TIMER_INT_ENABLE:
 108         return s->int_enabled;
 109     case TIMER_INT_STATUS:
 110         return s->int_level;
 111     case TIMER_FREQ:
 112         return s->freq;
 113     default:
 114         cpu_abort(cpu_single_env, "syborg_timer_read: Bad offset %x\n",
 115                   (int)offset);
 116         return 0;
 117     }
 118 }
 119
 120 static void syborg_timer_write(void *opaque, hwaddr offset,
 121                                uint64_t value, unsigned size)
 122 {
 123     SyborgTimerState *s = (SyborgTimerState *)opaque;
 124
 125     DPRINTF("Reg write %d\n", (int)offset);
 126     offset &= 0xfff;
 127     switch (offset >> 2) {
 128     case TIMER_RUNNING:
 129         if (value == s->running)
 130             break;
 131         s->running = value;
 132         if (value) {
 133             ptimer_run(s->timer, s->oneshot);
 134         } else {
 135             ptimer_stop(s->timer);
 136         }
 137         break;
 138     case TIMER_ONESHOT:
 139         if (s->running) {
 140             ptimer_stop(s->timer);
 141         }
 142         s->oneshot = value;
 143         if (s->running) {
 144             ptimer_run(s->timer, s->oneshot);
 145         }
 146         break;
 147     case TIMER_LIMIT:
 148         s->limit = value;
 149         ptimer_set_limit(s->timer, value, 1);
 150         break;
 151     case TIMER_VALUE:
 152         ptimer_set_count(s->timer, value);
 153         break;
 154     case TIMER_INT_ENABLE:
 155         s->int_enabled = value;
 156         syborg_timer_update(s);
 157         break;
 158     case TIMER_INT_STATUS:
 159         s->int_level &= ~value;
 160         syborg_timer_update(s);
 161         break;
 162     default:
 163         cpu_abort(cpu_single_env, "syborg_timer_write: Bad offset %x\n",
 164                   (int)offset);
 165         break;
 166     }
 167 }
 168
 169 static const MemoryRegionOps syborg_timer_ops = {
 170     .read = syborg_timer_read,
 171     .write = syborg_timer_write,
 172     .endianness = DEVICE_NATIVE_ENDIAN,
 173 };
 174
 175 static const VMStateDescription vmstate_syborg_timer = {
 176     .name = "syborg_timer",
 177     .version_id = 1,
 178     .minimum_version_id = 1,
 179     .minimum_version_id_old = 1,
 180     .fields      = (VMStateField[]) {
 181         VMSTATE_INT32(running, SyborgTimerState),
 182         VMSTATE_INT32(oneshot, SyborgTimerState),
 183         VMSTATE_UINT32(limit, SyborgTimerState),
 184         VMSTATE_UINT32(int_level, SyborgTimerState),
 185         VMSTATE_UINT32(int_enabled, SyborgTimerState),
 186         VMSTATE_PTIMER(timer, SyborgTimerState),
 187         VMSTATE_END_OF_LIST()
 188     }
 189 };
 190
 191 static int syborg_timer_init(SysBusDevice *sbd)
 192 {
 193     DeviceState *dev = DEVICE(sbd);
 194     SyborgTimerState *s = SYBORG_TIMER(dev);
 195     QEMUBH *bh;
 196
 197     if (s->freq == 0) {
 198         fprintf(stderr, "syborg_timer: Zero/unset frequency\n");
 199         exit(1);
 200     }
 201     sysbus_init_irq(dev, &s->irq);
 202     memory_region_init_io(&s->iomem, &syborg_timer_ops, s, "timer", 0x1000);
 203     sysbus_init_mmio(sbd, &s->iomem);
 204
 205     bh = qemu_bh_new(syborg_timer_tick, s);
 206     s->timer = ptimer_init(bh);
 207     ptimer_set_freq(s->timer, s->freq);
 208     vmstate_register(&dev->qdev, -1, &vmstate_syborg_timer, s);
 209     return 0;
 210 }
 211
 212 static Property syborg_timer_properties[] = {
 213     DEFINE_PROP_UINT32("frequency",SyborgTimerState, freq, 0),
 214     DEFINE_PROP_END_OF_LIST()
 215 };
 216
 217 static void syborg_timer_class_init(ObjectClass *klass, void *data)
 218 {
 219     DeviceClass *dc = DEVICE_CLASS(klass);
 220     SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
 221     dc->props = syborg_timer_properties;
 222     k->init = syborg_timer_init;
 223 }
 224
 225 static const TypeInfo syborg_timer_info = {
 226     .name  = "syborg,timer",
 227     .parent = TYPE_SYS_BUS_DEVICE,
 228     .instance_size = sizeof(SyborgTimerState),
 229     .class_init = syborg_timer_class_init
 230 };
 231
 232 static void syborg_timer_register_types(void)
 233 {
 234     type_register_static(&syborg_timer_info);
 235 }
 236
 237 type_init(syborg_timer_register_types)