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Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-pull-request' into...
[qemu/ar7.git] / target / i386 / ops_sse.h
blobec1ec745d093914c92983befcde1ca3c609f6b69
1 /*
2 * MMX/3DNow!/SSE/SSE2/SSE3/SSSE3/SSE4/PNI support
3 *
4 * Copyright (c) 2005 Fabrice Bellard
5 * Copyright (c) 2008 Intel Corporation <andrew.zaborowski@intel.com>
6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
11 *
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 */
20
21 #include "crypto/aes.h"
22
23 #if SHIFT == 0
24 #define Reg MMXReg
25 #define XMM_ONLY(...)
26 #define B(n) MMX_B(n)
27 #define W(n) MMX_W(n)
28 #define L(n) MMX_L(n)
29 #define Q(n) MMX_Q(n)
30 #define SUFFIX _mmx
31 #else
32 #define Reg ZMMReg
33 #define XMM_ONLY(...) __VA_ARGS__
34 #define B(n) ZMM_B(n)
35 #define W(n) ZMM_W(n)
36 #define L(n) ZMM_L(n)
37 #define Q(n) ZMM_Q(n)
38 #define SUFFIX _xmm
39 #endif
40
41 void glue(helper_psrlw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
42 {
43 int shift;
44
45 if (s->Q(0) > 15) {
46 d->Q(0) = 0;
47 #if SHIFT == 1
48 d->Q(1) = 0;
49 #endif
50 } else {
51 shift = s->B(0);
52 d->W(0) >>= shift;
53 d->W(1) >>= shift;
54 d->W(2) >>= shift;
55 d->W(3) >>= shift;
56 #if SHIFT == 1
57 d->W(4) >>= shift;
58 d->W(5) >>= shift;
59 d->W(6) >>= shift;
60 d->W(7) >>= shift;
61 #endif
62 }
63 }
64
65 void glue(helper_psraw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
66 {
67 int shift;
68
69 if (s->Q(0) > 15) {
70 shift = 15;
71 } else {
72 shift = s->B(0);
73 }
74 d->W(0) = (int16_t)d->W(0) >> shift;
75 d->W(1) = (int16_t)d->W(1) >> shift;
76 d->W(2) = (int16_t)d->W(2) >> shift;
77 d->W(3) = (int16_t)d->W(3) >> shift;
78 #if SHIFT == 1
79 d->W(4) = (int16_t)d->W(4) >> shift;
80 d->W(5) = (int16_t)d->W(5) >> shift;
81 d->W(6) = (int16_t)d->W(6) >> shift;
82 d->W(7) = (int16_t)d->W(7) >> shift;
83 #endif
84 }
85
86 void glue(helper_psllw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
87 {
88 int shift;
89
90 if (s->Q(0) > 15) {
91 d->Q(0) = 0;
92 #if SHIFT == 1
93 d->Q(1) = 0;
94 #endif
95 } else {
96 shift = s->B(0);
97 d->W(0) <<= shift;
98 d->W(1) <<= shift;
99 d->W(2) <<= shift;
100 d->W(3) <<= shift;
101 #if SHIFT == 1
102 d->W(4) <<= shift;
103 d->W(5) <<= shift;
104 d->W(6) <<= shift;
105 d->W(7) <<= shift;
106 #endif
107 }
108 }
109
110 void glue(helper_psrld, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
111 {
112 int shift;
113
114 if (s->Q(0) > 31) {
115 d->Q(0) = 0;
116 #if SHIFT == 1
117 d->Q(1) = 0;
118 #endif
119 } else {
120 shift = s->B(0);
121 d->L(0) >>= shift;
122 d->L(1) >>= shift;
123 #if SHIFT == 1
124 d->L(2) >>= shift;
125 d->L(3) >>= shift;
126 #endif
127 }
128 }
129
130 void glue(helper_psrad, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
131 {
132 int shift;
133
134 if (s->Q(0) > 31) {
135 shift = 31;
136 } else {
137 shift = s->B(0);
138 }
139 d->L(0) = (int32_t)d->L(0) >> shift;
140 d->L(1) = (int32_t)d->L(1) >> shift;
141 #if SHIFT == 1
142 d->L(2) = (int32_t)d->L(2) >> shift;
143 d->L(3) = (int32_t)d->L(3) >> shift;
144 #endif
145 }
146
147 void glue(helper_pslld, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
148 {
149 int shift;
150
151 if (s->Q(0) > 31) {
152 d->Q(0) = 0;
153 #if SHIFT == 1
154 d->Q(1) = 0;
155 #endif
156 } else {
157 shift = s->B(0);
158 d->L(0) <<= shift;
159 d->L(1) <<= shift;
160 #if SHIFT == 1
161 d->L(2) <<= shift;
162 d->L(3) <<= shift;
163 #endif
164 }
165 }
166
167 void glue(helper_psrlq, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
168 {
169 int shift;
170
171 if (s->Q(0) > 63) {
172 d->Q(0) = 0;
173 #if SHIFT == 1
174 d->Q(1) = 0;
175 #endif
176 } else {
177 shift = s->B(0);
178 d->Q(0) >>= shift;
179 #if SHIFT == 1
180 d->Q(1) >>= shift;
181 #endif
182 }
183 }
184
185 void glue(helper_psllq, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
186 {
187 int shift;
188
189 if (s->Q(0) > 63) {
190 d->Q(0) = 0;
191 #if SHIFT == 1
192 d->Q(1) = 0;
193 #endif
194 } else {
195 shift = s->B(0);
196 d->Q(0) <<= shift;
197 #if SHIFT == 1
198 d->Q(1) <<= shift;
199 #endif
200 }
201 }
202
203 #if SHIFT == 1
204 void glue(helper_psrldq, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
205 {
206 int shift, i;
207
208 shift = s->L(0);
209 if (shift > 16) {
210 shift = 16;
211 }
212 for (i = 0; i < 16 - shift; i++) {
213 d->B(i) = d->B(i + shift);
214 }
215 for (i = 16 - shift; i < 16; i++) {
216 d->B(i) = 0;
217 }
218 }
219
220 void glue(helper_pslldq, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
221 {
222 int shift, i;
223
224 shift = s->L(0);
225 if (shift > 16) {
226 shift = 16;
227 }
228 for (i = 15; i >= shift; i--) {
229 d->B(i) = d->B(i - shift);
230 }
231 for (i = 0; i < shift; i++) {
232 d->B(i) = 0;
233 }
234 }
235 #endif
236
237 #define SSE_HELPER_B(name, F) \
238 void glue(name, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) \
239 { \
240 d->B(0) = F(d->B(0), s->B(0)); \
241 d->B(1) = F(d->B(1), s->B(1)); \
242 d->B(2) = F(d->B(2), s->B(2)); \
243 d->B(3) = F(d->B(3), s->B(3)); \
244 d->B(4) = F(d->B(4), s->B(4)); \
245 d->B(5) = F(d->B(5), s->B(5)); \
246 d->B(6) = F(d->B(6), s->B(6)); \
247 d->B(7) = F(d->B(7), s->B(7)); \
248 XMM_ONLY( \
249 d->B(8) = F(d->B(8), s->B(8)); \
250 d->B(9) = F(d->B(9), s->B(9)); \
251 d->B(10) = F(d->B(10), s->B(10)); \
252 d->B(11) = F(d->B(11), s->B(11)); \
253 d->B(12) = F(d->B(12), s->B(12)); \
254 d->B(13) = F(d->B(13), s->B(13)); \
255 d->B(14) = F(d->B(14), s->B(14)); \
256 d->B(15) = F(d->B(15), s->B(15)); \
257 ) \
258 }
259
260 #define SSE_HELPER_W(name, F) \
261 void glue(name, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) \
262 { \
263 d->W(0) = F(d->W(0), s->W(0)); \
264 d->W(1) = F(d->W(1), s->W(1)); \
265 d->W(2) = F(d->W(2), s->W(2)); \
266 d->W(3) = F(d->W(3), s->W(3)); \
267 XMM_ONLY( \
268 d->W(4) = F(d->W(4), s->W(4)); \
269 d->W(5) = F(d->W(5), s->W(5)); \
270 d->W(6) = F(d->W(6), s->W(6)); \
271 d->W(7) = F(d->W(7), s->W(7)); \
272 ) \
273 }
274
275 #define SSE_HELPER_L(name, F) \
276 void glue(name, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) \
277 { \
278 d->L(0) = F(d->L(0), s->L(0)); \
279 d->L(1) = F(d->L(1), s->L(1)); \
280 XMM_ONLY( \
281 d->L(2) = F(d->L(2), s->L(2)); \
282 d->L(3) = F(d->L(3), s->L(3)); \
283 ) \
284 }
285
286 #define SSE_HELPER_Q(name, F) \
287 void glue(name, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) \
288 { \
289 d->Q(0) = F(d->Q(0), s->Q(0)); \
290 XMM_ONLY( \
291 d->Q(1) = F(d->Q(1), s->Q(1)); \
292 ) \
293 }
294
295 #if SHIFT == 0
296 static inline int satub(int x)
297 {
298 if (x < 0) {
299 return 0;
300 } else if (x > 255) {
301 return 255;
302 } else {
303 return x;
304 }
305 }
306
307 static inline int satuw(int x)
308 {
309 if (x < 0) {
310 return 0;
311 } else if (x > 65535) {
312 return 65535;
313 } else {
314 return x;
315 }
316 }
317
318 static inline int satsb(int x)
319 {
320 if (x < -128) {
321 return -128;
322 } else if (x > 127) {
323 return 127;
324 } else {
325 return x;
326 }
327 }
328
329 static inline int satsw(int x)
330 {
331 if (x < -32768) {
332 return -32768;
333 } else if (x > 32767) {
334 return 32767;
335 } else {
336 return x;
337 }
338 }
339
340 #define FADD(a, b) ((a) + (b))
341 #define FADDUB(a, b) satub((a) + (b))
342 #define FADDUW(a, b) satuw((a) + (b))
343 #define FADDSB(a, b) satsb((int8_t)(a) + (int8_t)(b))
344 #define FADDSW(a, b) satsw((int16_t)(a) + (int16_t)(b))
345
346 #define FSUB(a, b) ((a) - (b))
347 #define FSUBUB(a, b) satub((a) - (b))
348 #define FSUBUW(a, b) satuw((a) - (b))
349 #define FSUBSB(a, b) satsb((int8_t)(a) - (int8_t)(b))
350 #define FSUBSW(a, b) satsw((int16_t)(a) - (int16_t)(b))
351 #define FMINUB(a, b) ((a) < (b)) ? (a) : (b)
352 #define FMINSW(a, b) ((int16_t)(a) < (int16_t)(b)) ? (a) : (b)
353 #define FMAXUB(a, b) ((a) > (b)) ? (a) : (b)
354 #define FMAXSW(a, b) ((int16_t)(a) > (int16_t)(b)) ? (a) : (b)
355
356 #define FAND(a, b) ((a) & (b))
357 #define FANDN(a, b) ((~(a)) & (b))
358 #define FOR(a, b) ((a) | (b))
359 #define FXOR(a, b) ((a) ^ (b))
360
361 #define FCMPGTB(a, b) ((int8_t)(a) > (int8_t)(b) ? -1 : 0)
362 #define FCMPGTW(a, b) ((int16_t)(a) > (int16_t)(b) ? -1 : 0)
363 #define FCMPGTL(a, b) ((int32_t)(a) > (int32_t)(b) ? -1 : 0)
364 #define FCMPEQ(a, b) ((a) == (b) ? -1 : 0)
365
366 #define FMULLW(a, b) ((a) * (b))
367 #define FMULHRW(a, b) (((int16_t)(a) * (int16_t)(b) + 0x8000) >> 16)
368 #define FMULHUW(a, b) ((a) * (b) >> 16)
369 #define FMULHW(a, b) ((int16_t)(a) * (int16_t)(b) >> 16)
370
371 #define FAVG(a, b) (((a) + (b) + 1) >> 1)
372 #endif
373
374 SSE_HELPER_B(helper_paddb, FADD)
375 SSE_HELPER_W(helper_paddw, FADD)
376 SSE_HELPER_L(helper_paddl, FADD)
377 SSE_HELPER_Q(helper_paddq, FADD)
378
379 SSE_HELPER_B(helper_psubb, FSUB)
380 SSE_HELPER_W(helper_psubw, FSUB)
381 SSE_HELPER_L(helper_psubl, FSUB)
382 SSE_HELPER_Q(helper_psubq, FSUB)
383
384 SSE_HELPER_B(helper_paddusb, FADDUB)
385 SSE_HELPER_B(helper_paddsb, FADDSB)
386 SSE_HELPER_B(helper_psubusb, FSUBUB)
387 SSE_HELPER_B(helper_psubsb, FSUBSB)
388
389 SSE_HELPER_W(helper_paddusw, FADDUW)
390 SSE_HELPER_W(helper_paddsw, FADDSW)
391 SSE_HELPER_W(helper_psubusw, FSUBUW)
392 SSE_HELPER_W(helper_psubsw, FSUBSW)
393
394 SSE_HELPER_B(helper_pminub, FMINUB)
395 SSE_HELPER_B(helper_pmaxub, FMAXUB)
396
397 SSE_HELPER_W(helper_pminsw, FMINSW)
398 SSE_HELPER_W(helper_pmaxsw, FMAXSW)
399
400 SSE_HELPER_Q(helper_pand, FAND)
401 SSE_HELPER_Q(helper_pandn, FANDN)
402 SSE_HELPER_Q(helper_por, FOR)
403 SSE_HELPER_Q(helper_pxor, FXOR)
404
405 SSE_HELPER_B(helper_pcmpgtb, FCMPGTB)
406 SSE_HELPER_W(helper_pcmpgtw, FCMPGTW)
407 SSE_HELPER_L(helper_pcmpgtl, FCMPGTL)
408
409 SSE_HELPER_B(helper_pcmpeqb, FCMPEQ)
410 SSE_HELPER_W(helper_pcmpeqw, FCMPEQ)
411 SSE_HELPER_L(helper_pcmpeql, FCMPEQ)
412
413 SSE_HELPER_W(helper_pmullw, FMULLW)
414 #if SHIFT == 0
415 SSE_HELPER_W(helper_pmulhrw, FMULHRW)
416 #endif
417 SSE_HELPER_W(helper_pmulhuw, FMULHUW)
418 SSE_HELPER_W(helper_pmulhw, FMULHW)
419
420 SSE_HELPER_B(helper_pavgb, FAVG)
421 SSE_HELPER_W(helper_pavgw, FAVG)
422
423 void glue(helper_pmuludq, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
424 {
425 d->Q(0) = (uint64_t)s->L(0) * (uint64_t)d->L(0);
426 #if SHIFT == 1
427 d->Q(1) = (uint64_t)s->L(2) * (uint64_t)d->L(2);
428 #endif
429 }
430
431 void glue(helper_pmaddwd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
432 {
433 int i;
434
435 for (i = 0; i < (2 << SHIFT); i++) {
436 d->L(i) = (int16_t)s->W(2 * i) * (int16_t)d->W(2 * i) +
437 (int16_t)s->W(2 * i + 1) * (int16_t)d->W(2 * i + 1);
438 }
439 }
440
441 #if SHIFT == 0
442 static inline int abs1(int a)
443 {
444 if (a < 0) {
445 return -a;
446 } else {
447 return a;
448 }
449 }
450 #endif
451 void glue(helper_psadbw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
452 {
453 unsigned int val;
454
455 val = 0;
456 val += abs1(d->B(0) - s->B(0));
457 val += abs1(d->B(1) - s->B(1));
458 val += abs1(d->B(2) - s->B(2));
459 val += abs1(d->B(3) - s->B(3));
460 val += abs1(d->B(4) - s->B(4));
461 val += abs1(d->B(5) - s->B(5));
462 val += abs1(d->B(6) - s->B(6));
463 val += abs1(d->B(7) - s->B(7));
464 d->Q(0) = val;
465 #if SHIFT == 1
466 val = 0;
467 val += abs1(d->B(8) - s->B(8));
468 val += abs1(d->B(9) - s->B(9));
469 val += abs1(d->B(10) - s->B(10));
470 val += abs1(d->B(11) - s->B(11));
471 val += abs1(d->B(12) - s->B(12));
472 val += abs1(d->B(13) - s->B(13));
473 val += abs1(d->B(14) - s->B(14));
474 val += abs1(d->B(15) - s->B(15));
475 d->Q(1) = val;
476 #endif
477 }
478
479 void glue(helper_maskmov, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
480 target_ulong a0)
481 {
482 int i;
483
484 for (i = 0; i < (8 << SHIFT); i++) {
485 if (s->B(i) & 0x80) {
486 cpu_stb_data_ra(env, a0 + i, d->B(i), GETPC());
487 }
488 }
489 }
490
491 void glue(helper_movl_mm_T0, SUFFIX)(Reg *d, uint32_t val)
492 {
493 d->L(0) = val;
494 d->L(1) = 0;
495 #if SHIFT == 1
496 d->Q(1) = 0;
497 #endif
498 }
499
500 #ifdef TARGET_X86_64
501 void glue(helper_movq_mm_T0, SUFFIX)(Reg *d, uint64_t val)
502 {
503 d->Q(0) = val;
504 #if SHIFT == 1
505 d->Q(1) = 0;
506 #endif
507 }
508 #endif
509
510 #if SHIFT == 0
511 void glue(helper_pshufw, SUFFIX)(Reg *d, Reg *s, int order)
512 {
513 Reg r;
514
515 r.W(0) = s->W(order & 3);
516 r.W(1) = s->W((order >> 2) & 3);
517 r.W(2) = s->W((order >> 4) & 3);
518 r.W(3) = s->W((order >> 6) & 3);
519 *d = r;
520 }
521 #else
522 void helper_shufps(Reg *d, Reg *s, int order)
523 {
524 Reg r;
525
526 r.L(0) = d->L(order & 3);
527 r.L(1) = d->L((order >> 2) & 3);
528 r.L(2) = s->L((order >> 4) & 3);
529 r.L(3) = s->L((order >> 6) & 3);
530 *d = r;
531 }
532
533 void helper_shufpd(Reg *d, Reg *s, int order)
534 {
535 Reg r;
536
537 r.Q(0) = d->Q(order & 1);
538 r.Q(1) = s->Q((order >> 1) & 1);
539 *d = r;
540 }
541
542 void glue(helper_pshufd, SUFFIX)(Reg *d, Reg *s, int order)
543 {
544 Reg r;
545
546 r.L(0) = s->L(order & 3);
547 r.L(1) = s->L((order >> 2) & 3);
548 r.L(2) = s->L((order >> 4) & 3);
549 r.L(3) = s->L((order >> 6) & 3);
550 *d = r;
551 }
552
553 void glue(helper_pshuflw, SUFFIX)(Reg *d, Reg *s, int order)
554 {
555 Reg r;
556
557 r.W(0) = s->W(order & 3);
558 r.W(1) = s->W((order >> 2) & 3);
559 r.W(2) = s->W((order >> 4) & 3);
560 r.W(3) = s->W((order >> 6) & 3);
561 r.Q(1) = s->Q(1);
562 *d = r;
563 }
564
565 void glue(helper_pshufhw, SUFFIX)(Reg *d, Reg *s, int order)
566 {
567 Reg r;
568
569 r.Q(0) = s->Q(0);
570 r.W(4) = s->W(4 + (order & 3));
571 r.W(5) = s->W(4 + ((order >> 2) & 3));
572 r.W(6) = s->W(4 + ((order >> 4) & 3));
573 r.W(7) = s->W(4 + ((order >> 6) & 3));
574 *d = r;
575 }
576 #endif
577
578 #if SHIFT == 1
579 /* FPU ops */
580 /* XXX: not accurate */
581
582 #define SSE_HELPER_S(name, F) \
583 void helper_ ## name ## ps(CPUX86State *env, Reg *d, Reg *s) \
584 { \
585 d->ZMM_S(0) = F(32, d->ZMM_S(0), s->ZMM_S(0)); \
586 d->ZMM_S(1) = F(32, d->ZMM_S(1), s->ZMM_S(1)); \
587 d->ZMM_S(2) = F(32, d->ZMM_S(2), s->ZMM_S(2)); \
588 d->ZMM_S(3) = F(32, d->ZMM_S(3), s->ZMM_S(3)); \
589 } \
590 \
591 void helper_ ## name ## ss(CPUX86State *env, Reg *d, Reg *s) \
592 { \
593 d->ZMM_S(0) = F(32, d->ZMM_S(0), s->ZMM_S(0)); \
594 } \
595 \
596 void helper_ ## name ## pd(CPUX86State *env, Reg *d, Reg *s) \
597 { \
598 d->ZMM_D(0) = F(64, d->ZMM_D(0), s->ZMM_D(0)); \
599 d->ZMM_D(1) = F(64, d->ZMM_D(1), s->ZMM_D(1)); \
600 } \
601 \
602 void helper_ ## name ## sd(CPUX86State *env, Reg *d, Reg *s) \
603 { \
604 d->ZMM_D(0) = F(64, d->ZMM_D(0), s->ZMM_D(0)); \
605 }
606
607 #define FPU_ADD(size, a, b) float ## size ## _add(a, b, &env->sse_status)
608 #define FPU_SUB(size, a, b) float ## size ## _sub(a, b, &env->sse_status)
609 #define FPU_MUL(size, a, b) float ## size ## _mul(a, b, &env->sse_status)
610 #define FPU_DIV(size, a, b) float ## size ## _div(a, b, &env->sse_status)
611 #define FPU_SQRT(size, a, b) float ## size ## _sqrt(b, &env->sse_status)
612
613 /* Note that the choice of comparison op here is important to get the
614 * special cases right: for min and max Intel specifies that (-0,0),
615 * (NaN, anything) and (anything, NaN) return the second argument.
616 */
617 #define FPU_MIN(size, a, b) \
618 (float ## size ## _lt(a, b, &env->sse_status) ? (a) : (b))
619 #define FPU_MAX(size, a, b) \
620 (float ## size ## _lt(b, a, &env->sse_status) ? (a) : (b))
621
622 SSE_HELPER_S(add, FPU_ADD)
623 SSE_HELPER_S(sub, FPU_SUB)
624 SSE_HELPER_S(mul, FPU_MUL)
625 SSE_HELPER_S(div, FPU_DIV)
626 SSE_HELPER_S(min, FPU_MIN)
627 SSE_HELPER_S(max, FPU_MAX)
628 SSE_HELPER_S(sqrt, FPU_SQRT)
629
630
631 /* float to float conversions */
632 void helper_cvtps2pd(CPUX86State *env, Reg *d, Reg *s)
633 {
634 float32 s0, s1;
635
636 s0 = s->ZMM_S(0);
637 s1 = s->ZMM_S(1);
638 d->ZMM_D(0) = float32_to_float64(s0, &env->sse_status);
639 d->ZMM_D(1) = float32_to_float64(s1, &env->sse_status);
640 }
641
642 void helper_cvtpd2ps(CPUX86State *env, Reg *d, Reg *s)
643 {
644 d->ZMM_S(0) = float64_to_float32(s->ZMM_D(0), &env->sse_status);
645 d->ZMM_S(1) = float64_to_float32(s->ZMM_D(1), &env->sse_status);
646 d->Q(1) = 0;
647 }
648
649 void helper_cvtss2sd(CPUX86State *env, Reg *d, Reg *s)
650 {
651 d->ZMM_D(0) = float32_to_float64(s->ZMM_S(0), &env->sse_status);
652 }
653
654 void helper_cvtsd2ss(CPUX86State *env, Reg *d, Reg *s)
655 {
656 d->ZMM_S(0) = float64_to_float32(s->ZMM_D(0), &env->sse_status);
657 }
658
659 /* integer to float */
660 void helper_cvtdq2ps(CPUX86State *env, Reg *d, Reg *s)
661 {
662 d->ZMM_S(0) = int32_to_float32(s->ZMM_L(0), &env->sse_status);
663 d->ZMM_S(1) = int32_to_float32(s->ZMM_L(1), &env->sse_status);
664 d->ZMM_S(2) = int32_to_float32(s->ZMM_L(2), &env->sse_status);
665 d->ZMM_S(3) = int32_to_float32(s->ZMM_L(3), &env->sse_status);
666 }
667
668 void helper_cvtdq2pd(CPUX86State *env, Reg *d, Reg *s)
669 {
670 int32_t l0, l1;
671
672 l0 = (int32_t)s->ZMM_L(0);
673 l1 = (int32_t)s->ZMM_L(1);
674 d->ZMM_D(0) = int32_to_float64(l0, &env->sse_status);
675 d->ZMM_D(1) = int32_to_float64(l1, &env->sse_status);
676 }
677
678 void helper_cvtpi2ps(CPUX86State *env, ZMMReg *d, MMXReg *s)
679 {
680 d->ZMM_S(0) = int32_to_float32(s->MMX_L(0), &env->sse_status);
681 d->ZMM_S(1) = int32_to_float32(s->MMX_L(1), &env->sse_status);
682 }
683
684 void helper_cvtpi2pd(CPUX86State *env, ZMMReg *d, MMXReg *s)
685 {
686 d->ZMM_D(0) = int32_to_float64(s->MMX_L(0), &env->sse_status);
687 d->ZMM_D(1) = int32_to_float64(s->MMX_L(1), &env->sse_status);
688 }
689
690 void helper_cvtsi2ss(CPUX86State *env, ZMMReg *d, uint32_t val)
691 {
692 d->ZMM_S(0) = int32_to_float32(val, &env->sse_status);
693 }
694
695 void helper_cvtsi2sd(CPUX86State *env, ZMMReg *d, uint32_t val)
696 {
697 d->ZMM_D(0) = int32_to_float64(val, &env->sse_status);
698 }
699
700 #ifdef TARGET_X86_64
701 void helper_cvtsq2ss(CPUX86State *env, ZMMReg *d, uint64_t val)
702 {
703 d->ZMM_S(0) = int64_to_float32(val, &env->sse_status);
704 }
705
706 void helper_cvtsq2sd(CPUX86State *env, ZMMReg *d, uint64_t val)
707 {
708 d->ZMM_D(0) = int64_to_float64(val, &env->sse_status);
709 }
710 #endif
711
712 /* float to integer */
713
714 /*
715 * x86 mandates that we return the indefinite integer value for the result
716 * of any float-to-integer conversion that raises the 'invalid' exception.
717 * Wrap the softfloat functions to get this behaviour.
718 */
719 #define WRAP_FLOATCONV(RETTYPE, FN, FLOATTYPE, INDEFVALUE) \
720 static inline RETTYPE x86_##FN(FLOATTYPE a, float_status *s) \
721 { \
722 int oldflags, newflags; \
723 RETTYPE r; \
724 \
725 oldflags = get_float_exception_flags(s); \
726 set_float_exception_flags(0, s); \
727 r = FN(a, s); \
728 newflags = get_float_exception_flags(s); \
729 if (newflags & float_flag_invalid) { \
730 r = INDEFVALUE; \
731 } \
732 set_float_exception_flags(newflags | oldflags, s); \
733 return r; \
734 }
735
736 WRAP_FLOATCONV(int32_t, float32_to_int32, float32, INT32_MIN)
737 WRAP_FLOATCONV(int32_t, float32_to_int32_round_to_zero, float32, INT32_MIN)
738 WRAP_FLOATCONV(int32_t, float64_to_int32, float64, INT32_MIN)
739 WRAP_FLOATCONV(int32_t, float64_to_int32_round_to_zero, float64, INT32_MIN)
740 WRAP_FLOATCONV(int64_t, float32_to_int64, float32, INT64_MIN)
741 WRAP_FLOATCONV(int64_t, float32_to_int64_round_to_zero, float32, INT64_MIN)
742 WRAP_FLOATCONV(int64_t, float64_to_int64, float64, INT64_MIN)
743 WRAP_FLOATCONV(int64_t, float64_to_int64_round_to_zero, float64, INT64_MIN)
744
745 void helper_cvtps2dq(CPUX86State *env, ZMMReg *d, ZMMReg *s)
746 {
747 d->ZMM_L(0) = x86_float32_to_int32(s->ZMM_S(0), &env->sse_status);
748 d->ZMM_L(1) = x86_float32_to_int32(s->ZMM_S(1), &env->sse_status);
749 d->ZMM_L(2) = x86_float32_to_int32(s->ZMM_S(2), &env->sse_status);
750 d->ZMM_L(3) = x86_float32_to_int32(s->ZMM_S(3), &env->sse_status);
751 }
752
753 void helper_cvtpd2dq(CPUX86State *env, ZMMReg *d, ZMMReg *s)
754 {
755 d->ZMM_L(0) = x86_float64_to_int32(s->ZMM_D(0), &env->sse_status);
756 d->ZMM_L(1) = x86_float64_to_int32(s->ZMM_D(1), &env->sse_status);
757 d->ZMM_Q(1) = 0;
758 }
759
760 void helper_cvtps2pi(CPUX86State *env, MMXReg *d, ZMMReg *s)
761 {
762 d->MMX_L(0) = x86_float32_to_int32(s->ZMM_S(0), &env->sse_status);
763 d->MMX_L(1) = x86_float32_to_int32(s->ZMM_S(1), &env->sse_status);
764 }
765
766 void helper_cvtpd2pi(CPUX86State *env, MMXReg *d, ZMMReg *s)
767 {
768 d->MMX_L(0) = x86_float64_to_int32(s->ZMM_D(0), &env->sse_status);
769 d->MMX_L(1) = x86_float64_to_int32(s->ZMM_D(1), &env->sse_status);
770 }
771
772 int32_t helper_cvtss2si(CPUX86State *env, ZMMReg *s)
773 {
774 return x86_float32_to_int32(s->ZMM_S(0), &env->sse_status);
775 }
776
777 int32_t helper_cvtsd2si(CPUX86State *env, ZMMReg *s)
778 {
779 return x86_float64_to_int32(s->ZMM_D(0), &env->sse_status);
780 }
781
782 #ifdef TARGET_X86_64
783 int64_t helper_cvtss2sq(CPUX86State *env, ZMMReg *s)
784 {
785 return x86_float32_to_int64(s->ZMM_S(0), &env->sse_status);
786 }
787
788 int64_t helper_cvtsd2sq(CPUX86State *env, ZMMReg *s)
789 {
790 return x86_float64_to_int64(s->ZMM_D(0), &env->sse_status);
791 }
792 #endif
793
794 /* float to integer truncated */
795 void helper_cvttps2dq(CPUX86State *env, ZMMReg *d, ZMMReg *s)
796 {
797 d->ZMM_L(0) = x86_float32_to_int32_round_to_zero(s->ZMM_S(0), &env->sse_status);
798 d->ZMM_L(1) = x86_float32_to_int32_round_to_zero(s->ZMM_S(1), &env->sse_status);
799 d->ZMM_L(2) = x86_float32_to_int32_round_to_zero(s->ZMM_S(2), &env->sse_status);
800 d->ZMM_L(3) = x86_float32_to_int32_round_to_zero(s->ZMM_S(3), &env->sse_status);
801 }
802
803 void helper_cvttpd2dq(CPUX86State *env, ZMMReg *d, ZMMReg *s)
804 {
805 d->ZMM_L(0) = x86_float64_to_int32_round_to_zero(s->ZMM_D(0), &env->sse_status);
806 d->ZMM_L(1) = x86_float64_to_int32_round_to_zero(s->ZMM_D(1), &env->sse_status);
807 d->ZMM_Q(1) = 0;
808 }
809
810 void helper_cvttps2pi(CPUX86State *env, MMXReg *d, ZMMReg *s)
811 {
812 d->MMX_L(0) = x86_float32_to_int32_round_to_zero(s->ZMM_S(0), &env->sse_status);
813 d->MMX_L(1) = x86_float32_to_int32_round_to_zero(s->ZMM_S(1), &env->sse_status);
814 }
815
816 void helper_cvttpd2pi(CPUX86State *env, MMXReg *d, ZMMReg *s)
817 {
818 d->MMX_L(0) = x86_float64_to_int32_round_to_zero(s->ZMM_D(0), &env->sse_status);
819 d->MMX_L(1) = x86_float64_to_int32_round_to_zero(s->ZMM_D(1), &env->sse_status);
820 }
821
822 int32_t helper_cvttss2si(CPUX86State *env, ZMMReg *s)
823 {
824 return x86_float32_to_int32_round_to_zero(s->ZMM_S(0), &env->sse_status);
825 }
826
827 int32_t helper_cvttsd2si(CPUX86State *env, ZMMReg *s)
828 {
829 return x86_float64_to_int32_round_to_zero(s->ZMM_D(0), &env->sse_status);
830 }
831
832 #ifdef TARGET_X86_64
833 int64_t helper_cvttss2sq(CPUX86State *env, ZMMReg *s)
834 {
835 return x86_float32_to_int64_round_to_zero(s->ZMM_S(0), &env->sse_status);
836 }
837
838 int64_t helper_cvttsd2sq(CPUX86State *env, ZMMReg *s)
839 {
840 return x86_float64_to_int64_round_to_zero(s->ZMM_D(0), &env->sse_status);
841 }
842 #endif
843
844 void helper_rsqrtps(CPUX86State *env, ZMMReg *d, ZMMReg *s)
845 {
846 d->ZMM_S(0) = float32_div(float32_one,
847 float32_sqrt(s->ZMM_S(0), &env->sse_status),
848 &env->sse_status);
849 d->ZMM_S(1) = float32_div(float32_one,
850 float32_sqrt(s->ZMM_S(1), &env->sse_status),
851 &env->sse_status);
852 d->ZMM_S(2) = float32_div(float32_one,
853 float32_sqrt(s->ZMM_S(2), &env->sse_status),
854 &env->sse_status);
855 d->ZMM_S(3) = float32_div(float32_one,
856 float32_sqrt(s->ZMM_S(3), &env->sse_status),
857 &env->sse_status);
858 }
859
860 void helper_rsqrtss(CPUX86State *env, ZMMReg *d, ZMMReg *s)
861 {
862 d->ZMM_S(0) = float32_div(float32_one,
863 float32_sqrt(s->ZMM_S(0), &env->sse_status),
864 &env->sse_status);
865 }
866
867 void helper_rcpps(CPUX86State *env, ZMMReg *d, ZMMReg *s)
868 {
869 d->ZMM_S(0) = float32_div(float32_one, s->ZMM_S(0), &env->sse_status);
870 d->ZMM_S(1) = float32_div(float32_one, s->ZMM_S(1), &env->sse_status);
871 d->ZMM_S(2) = float32_div(float32_one, s->ZMM_S(2), &env->sse_status);
872 d->ZMM_S(3) = float32_div(float32_one, s->ZMM_S(3), &env->sse_status);
873 }
874
875 void helper_rcpss(CPUX86State *env, ZMMReg *d, ZMMReg *s)
876 {
877 d->ZMM_S(0) = float32_div(float32_one, s->ZMM_S(0), &env->sse_status);
878 }
879
880 static inline uint64_t helper_extrq(uint64_t src, int shift, int len)
881 {
882 uint64_t mask;
883
884 if (len == 0) {
885 mask = ~0LL;
886 } else {
887 mask = (1ULL << len) - 1;
888 }
889 return (src >> shift) & mask;
890 }
891
892 void helper_extrq_r(CPUX86State *env, ZMMReg *d, ZMMReg *s)
893 {
894 d->ZMM_Q(0) = helper_extrq(d->ZMM_Q(0), s->ZMM_B(1), s->ZMM_B(0));
895 }
896
897 void helper_extrq_i(CPUX86State *env, ZMMReg *d, int index, int length)
898 {
899 d->ZMM_Q(0) = helper_extrq(d->ZMM_Q(0), index, length);
900 }
901
902 static inline uint64_t helper_insertq(uint64_t src, int shift, int len)
903 {
904 uint64_t mask;
905
906 if (len == 0) {
907 mask = ~0ULL;
908 } else {
909 mask = (1ULL << len) - 1;
910 }
911 return (src & ~(mask << shift)) | ((src & mask) << shift);
912 }
913
914 void helper_insertq_r(CPUX86State *env, ZMMReg *d, ZMMReg *s)
915 {
916 d->ZMM_Q(0) = helper_insertq(s->ZMM_Q(0), s->ZMM_B(9), s->ZMM_B(8));
917 }
918
919 void helper_insertq_i(CPUX86State *env, ZMMReg *d, int index, int length)
920 {
921 d->ZMM_Q(0) = helper_insertq(d->ZMM_Q(0), index, length);
922 }
923
924 void helper_haddps(CPUX86State *env, ZMMReg *d, ZMMReg *s)
925 {
926 ZMMReg r;
927
928 r.ZMM_S(0) = float32_add(d->ZMM_S(0), d->ZMM_S(1), &env->sse_status);
929 r.ZMM_S(1) = float32_add(d->ZMM_S(2), d->ZMM_S(3), &env->sse_status);
930 r.ZMM_S(2) = float32_add(s->ZMM_S(0), s->ZMM_S(1), &env->sse_status);
931 r.ZMM_S(3) = float32_add(s->ZMM_S(2), s->ZMM_S(3), &env->sse_status);
932 *d = r;
933 }
934
935 void helper_haddpd(CPUX86State *env, ZMMReg *d, ZMMReg *s)
936 {
937 ZMMReg r;
938
939 r.ZMM_D(0) = float64_add(d->ZMM_D(0), d->ZMM_D(1), &env->sse_status);
940 r.ZMM_D(1) = float64_add(s->ZMM_D(0), s->ZMM_D(1), &env->sse_status);
941 *d = r;
942 }
943
944 void helper_hsubps(CPUX86State *env, ZMMReg *d, ZMMReg *s)
945 {
946 ZMMReg r;
947
948 r.ZMM_S(0) = float32_sub(d->ZMM_S(0), d->ZMM_S(1), &env->sse_status);
949 r.ZMM_S(1) = float32_sub(d->ZMM_S(2), d->ZMM_S(3), &env->sse_status);
950 r.ZMM_S(2) = float32_sub(s->ZMM_S(0), s->ZMM_S(1), &env->sse_status);
951 r.ZMM_S(3) = float32_sub(s->ZMM_S(2), s->ZMM_S(3), &env->sse_status);
952 *d = r;
953 }
954
955 void helper_hsubpd(CPUX86State *env, ZMMReg *d, ZMMReg *s)
956 {
957 ZMMReg r;
958
959 r.ZMM_D(0) = float64_sub(d->ZMM_D(0), d->ZMM_D(1), &env->sse_status);
960 r.ZMM_D(1) = float64_sub(s->ZMM_D(0), s->ZMM_D(1), &env->sse_status);
961 *d = r;
962 }
963
964 void helper_addsubps(CPUX86State *env, ZMMReg *d, ZMMReg *s)
965 {
966 d->ZMM_S(0) = float32_sub(d->ZMM_S(0), s->ZMM_S(0), &env->sse_status);
967 d->ZMM_S(1) = float32_add(d->ZMM_S(1), s->ZMM_S(1), &env->sse_status);
968 d->ZMM_S(2) = float32_sub(d->ZMM_S(2), s->ZMM_S(2), &env->sse_status);
969 d->ZMM_S(3) = float32_add(d->ZMM_S(3), s->ZMM_S(3), &env->sse_status);
970 }
971
972 void helper_addsubpd(CPUX86State *env, ZMMReg *d, ZMMReg *s)
973 {
974 d->ZMM_D(0) = float64_sub(d->ZMM_D(0), s->ZMM_D(0), &env->sse_status);
975 d->ZMM_D(1) = float64_add(d->ZMM_D(1), s->ZMM_D(1), &env->sse_status);
976 }
977
978 /* XXX: unordered */
979 #define SSE_HELPER_CMP(name, F) \
980 void helper_ ## name ## ps(CPUX86State *env, Reg *d, Reg *s) \
981 { \
982 d->ZMM_L(0) = F(32, d->ZMM_S(0), s->ZMM_S(0)); \
983 d->ZMM_L(1) = F(32, d->ZMM_S(1), s->ZMM_S(1)); \
984 d->ZMM_L(2) = F(32, d->ZMM_S(2), s->ZMM_S(2)); \
985 d->ZMM_L(3) = F(32, d->ZMM_S(3), s->ZMM_S(3)); \
986 } \
987 \
988 void helper_ ## name ## ss(CPUX86State *env, Reg *d, Reg *s) \
989 { \
990 d->ZMM_L(0) = F(32, d->ZMM_S(0), s->ZMM_S(0)); \
991 } \
992 \
993 void helper_ ## name ## pd(CPUX86State *env, Reg *d, Reg *s) \
994 { \
995 d->ZMM_Q(0) = F(64, d->ZMM_D(0), s->ZMM_D(0)); \
996 d->ZMM_Q(1) = F(64, d->ZMM_D(1), s->ZMM_D(1)); \
997 } \
998 \
999 void helper_ ## name ## sd(CPUX86State *env, Reg *d, Reg *s) \
1000 { \
1001 d->ZMM_Q(0) = F(64, d->ZMM_D(0), s->ZMM_D(0)); \
1002 }
1003
1004 #define FPU_CMPEQ(size, a, b) \
1005 (float ## size ## _eq_quiet(a, b, &env->sse_status) ? -1 : 0)
1006 #define FPU_CMPLT(size, a, b) \
1007 (float ## size ## _lt(a, b, &env->sse_status) ? -1 : 0)
1008 #define FPU_CMPLE(size, a, b) \
1009 (float ## size ## _le(a, b, &env->sse_status) ? -1 : 0)
1010 #define FPU_CMPUNORD(size, a, b) \
1011 (float ## size ## _unordered_quiet(a, b, &env->sse_status) ? -1 : 0)
1012 #define FPU_CMPNEQ(size, a, b) \
1013 (float ## size ## _eq_quiet(a, b, &env->sse_status) ? 0 : -1)
1014 #define FPU_CMPNLT(size, a, b) \
1015 (float ## size ## _lt(a, b, &env->sse_status) ? 0 : -1)
1016 #define FPU_CMPNLE(size, a, b) \
1017 (float ## size ## _le(a, b, &env->sse_status) ? 0 : -1)
1018 #define FPU_CMPORD(size, a, b) \
1019 (float ## size ## _unordered_quiet(a, b, &env->sse_status) ? 0 : -1)
1020
1021 SSE_HELPER_CMP(cmpeq, FPU_CMPEQ)
1022 SSE_HELPER_CMP(cmplt, FPU_CMPLT)
1023 SSE_HELPER_CMP(cmple, FPU_CMPLE)
1024 SSE_HELPER_CMP(cmpunord, FPU_CMPUNORD)
1025 SSE_HELPER_CMP(cmpneq, FPU_CMPNEQ)
1026 SSE_HELPER_CMP(cmpnlt, FPU_CMPNLT)
1027 SSE_HELPER_CMP(cmpnle, FPU_CMPNLE)
1028 SSE_HELPER_CMP(cmpord, FPU_CMPORD)
1029
1030 static const int comis_eflags[4] = {CC_C, CC_Z, 0, CC_Z | CC_P | CC_C};
1031
1032 void helper_ucomiss(CPUX86State *env, Reg *d, Reg *s)
1033 {
1034 int ret;
1035 float32 s0, s1;
1036
1037 s0 = d->ZMM_S(0);
1038 s1 = s->ZMM_S(0);
1039 ret = float32_compare_quiet(s0, s1, &env->sse_status);
1040 CC_SRC = comis_eflags[ret + 1];
1041 }
1042
1043 void helper_comiss(CPUX86State *env, Reg *d, Reg *s)
1044 {
1045 int ret;
1046 float32 s0, s1;
1047
1048 s0 = d->ZMM_S(0);
1049 s1 = s->ZMM_S(0);
1050 ret = float32_compare(s0, s1, &env->sse_status);
1051 CC_SRC = comis_eflags[ret + 1];
1052 }
1053
1054 void helper_ucomisd(CPUX86State *env, Reg *d, Reg *s)
1055 {
1056 int ret;
1057 float64 d0, d1;
1058
1059 d0 = d->ZMM_D(0);
1060 d1 = s->ZMM_D(0);
1061 ret = float64_compare_quiet(d0, d1, &env->sse_status);
1062 CC_SRC = comis_eflags[ret + 1];
1063 }
1064
1065 void helper_comisd(CPUX86State *env, Reg *d, Reg *s)
1066 {
1067 int ret;
1068 float64 d0, d1;
1069
1070 d0 = d->ZMM_D(0);
1071 d1 = s->ZMM_D(0);
1072 ret = float64_compare(d0, d1, &env->sse_status);
1073 CC_SRC = comis_eflags[ret + 1];
1074 }
1075
1076 uint32_t helper_movmskps(CPUX86State *env, Reg *s)
1077 {
1078 int b0, b1, b2, b3;
1079
1080 b0 = s->ZMM_L(0) >> 31;
1081 b1 = s->ZMM_L(1) >> 31;
1082 b2 = s->ZMM_L(2) >> 31;
1083 b3 = s->ZMM_L(3) >> 31;
1084 return b0 | (b1 << 1) | (b2 << 2) | (b3 << 3);
1085 }
1086
1087 uint32_t helper_movmskpd(CPUX86State *env, Reg *s)
1088 {
1089 int b0, b1;
1090
1091 b0 = s->ZMM_L(1) >> 31;
1092 b1 = s->ZMM_L(3) >> 31;
1093 return b0 | (b1 << 1);
1094 }
1095
1096 #endif
1097
1098 uint32_t glue(helper_pmovmskb, SUFFIX)(CPUX86State *env, Reg *s)
1099 {
1100 uint32_t val;
1101
1102 val = 0;
1103 val |= (s->B(0) >> 7);
1104 val |= (s->B(1) >> 6) & 0x02;
1105 val |= (s->B(2) >> 5) & 0x04;
1106 val |= (s->B(3) >> 4) & 0x08;
1107 val |= (s->B(4) >> 3) & 0x10;
1108 val |= (s->B(5) >> 2) & 0x20;
1109 val |= (s->B(6) >> 1) & 0x40;
1110 val |= (s->B(7)) & 0x80;
1111 #if SHIFT == 1
1112 val |= (s->B(8) << 1) & 0x0100;
1113 val |= (s->B(9) << 2) & 0x0200;
1114 val |= (s->B(10) << 3) & 0x0400;
1115 val |= (s->B(11) << 4) & 0x0800;
1116 val |= (s->B(12) << 5) & 0x1000;
1117 val |= (s->B(13) << 6) & 0x2000;
1118 val |= (s->B(14) << 7) & 0x4000;
1119 val |= (s->B(15) << 8) & 0x8000;
1120 #endif
1121 return val;
1122 }
1123
1124 void glue(helper_packsswb, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
1125 {
1126 Reg r;
1127
1128 r.B(0) = satsb((int16_t)d->W(0));
1129 r.B(1) = satsb((int16_t)d->W(1));
1130 r.B(2) = satsb((int16_t)d->W(2));
1131 r.B(3) = satsb((int16_t)d->W(3));
1132 #if SHIFT == 1
1133 r.B(4) = satsb((int16_t)d->W(4));
1134 r.B(5) = satsb((int16_t)d->W(5));
1135 r.B(6) = satsb((int16_t)d->W(6));
1136 r.B(7) = satsb((int16_t)d->W(7));
1137 #endif
1138 r.B((4 << SHIFT) + 0) = satsb((int16_t)s->W(0));
1139 r.B((4 << SHIFT) + 1) = satsb((int16_t)s->W(1));
1140 r.B((4 << SHIFT) + 2) = satsb((int16_t)s->W(2));
1141 r.B((4 << SHIFT) + 3) = satsb((int16_t)s->W(3));
1142 #if SHIFT == 1
1143 r.B(12) = satsb((int16_t)s->W(4));
1144 r.B(13) = satsb((int16_t)s->W(5));
1145 r.B(14) = satsb((int16_t)s->W(6));
1146 r.B(15) = satsb((int16_t)s->W(7));
1147 #endif
1148 *d = r;
1149 }
1150
1151 void glue(helper_packuswb, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
1152 {
1153 Reg r;
1154
1155 r.B(0) = satub((int16_t)d->W(0));
1156 r.B(1) = satub((int16_t)d->W(1));
1157 r.B(2) = satub((int16_t)d->W(2));
1158 r.B(3) = satub((int16_t)d->W(3));
1159 #if SHIFT == 1
1160 r.B(4) = satub((int16_t)d->W(4));
1161 r.B(5) = satub((int16_t)d->W(5));
1162 r.B(6) = satub((int16_t)d->W(6));
1163 r.B(7) = satub((int16_t)d->W(7));
1164 #endif
1165 r.B((4 << SHIFT) + 0) = satub((int16_t)s->W(0));
1166 r.B((4 << SHIFT) + 1) = satub((int16_t)s->W(1));
1167 r.B((4 << SHIFT) + 2) = satub((int16_t)s->W(2));
1168 r.B((4 << SHIFT) + 3) = satub((int16_t)s->W(3));
1169 #if SHIFT == 1
1170 r.B(12) = satub((int16_t)s->W(4));
1171 r.B(13) = satub((int16_t)s->W(5));
1172 r.B(14) = satub((int16_t)s->W(6));
1173 r.B(15) = satub((int16_t)s->W(7));
1174 #endif
1175 *d = r;
1176 }
1177
1178 void glue(helper_packssdw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
1179 {
1180 Reg r;
1181
1182 r.W(0) = satsw(d->L(0));
1183 r.W(1) = satsw(d->L(1));
1184 #if SHIFT == 1
1185 r.W(2) = satsw(d->L(2));
1186 r.W(3) = satsw(d->L(3));
1187 #endif
1188 r.W((2 << SHIFT) + 0) = satsw(s->L(0));
1189 r.W((2 << SHIFT) + 1) = satsw(s->L(1));
1190 #if SHIFT == 1
1191 r.W(6) = satsw(s->L(2));
1192 r.W(7) = satsw(s->L(3));
1193 #endif
1194 *d = r;
1195 }
1196
1197 #define UNPCK_OP(base_name, base) \
1198 \
1199 void glue(helper_punpck ## base_name ## bw, SUFFIX)(CPUX86State *env,\
1200 Reg *d, Reg *s) \
1201 { \
1202 Reg r; \
1203 \
1204 r.B(0) = d->B((base << (SHIFT + 2)) + 0); \
1205 r.B(1) = s->B((base << (SHIFT + 2)) + 0); \
1206 r.B(2) = d->B((base << (SHIFT + 2)) + 1); \
1207 r.B(3) = s->B((base << (SHIFT + 2)) + 1); \
1208 r.B(4) = d->B((base << (SHIFT + 2)) + 2); \
1209 r.B(5) = s->B((base << (SHIFT + 2)) + 2); \
1210 r.B(6) = d->B((base << (SHIFT + 2)) + 3); \
1211 r.B(7) = s->B((base << (SHIFT + 2)) + 3); \
1212 XMM_ONLY( \
1213 r.B(8) = d->B((base << (SHIFT + 2)) + 4); \
1214 r.B(9) = s->B((base << (SHIFT + 2)) + 4); \
1215 r.B(10) = d->B((base << (SHIFT + 2)) + 5); \
1216 r.B(11) = s->B((base << (SHIFT + 2)) + 5); \
1217 r.B(12) = d->B((base << (SHIFT + 2)) + 6); \
1218 r.B(13) = s->B((base << (SHIFT + 2)) + 6); \
1219 r.B(14) = d->B((base << (SHIFT + 2)) + 7); \
1220 r.B(15) = s->B((base << (SHIFT + 2)) + 7); \
1221 ) \
1222 *d = r; \
1223 } \
1224 \
1225 void glue(helper_punpck ## base_name ## wd, SUFFIX)(CPUX86State *env,\
1226 Reg *d, Reg *s) \
1227 { \
1228 Reg r; \
1229 \
1230 r.W(0) = d->W((base << (SHIFT + 1)) + 0); \
1231 r.W(1) = s->W((base << (SHIFT + 1)) + 0); \
1232 r.W(2) = d->W((base << (SHIFT + 1)) + 1); \
1233 r.W(3) = s->W((base << (SHIFT + 1)) + 1); \
1234 XMM_ONLY( \
1235 r.W(4) = d->W((base << (SHIFT + 1)) + 2); \
1236 r.W(5) = s->W((base << (SHIFT + 1)) + 2); \
1237 r.W(6) = d->W((base << (SHIFT + 1)) + 3); \
1238 r.W(7) = s->W((base << (SHIFT + 1)) + 3); \
1239 ) \
1240 *d = r; \
1241 } \
1242 \
1243 void glue(helper_punpck ## base_name ## dq, SUFFIX)(CPUX86State *env,\
1244 Reg *d, Reg *s) \
1245 { \
1246 Reg r; \
1247 \
1248 r.L(0) = d->L((base << SHIFT) + 0); \
1249 r.L(1) = s->L((base << SHIFT) + 0); \
1250 XMM_ONLY( \
1251 r.L(2) = d->L((base << SHIFT) + 1); \
1252 r.L(3) = s->L((base << SHIFT) + 1); \
1253 ) \
1254 *d = r; \
1255 } \
1256 \
1257 XMM_ONLY( \
1258 void glue(helper_punpck ## base_name ## qdq, SUFFIX)(CPUX86State \
1259 *env, \
1260 Reg *d, \
1261 Reg *s) \
1262 { \
1263 Reg r; \
1264 \
1265 r.Q(0) = d->Q(base); \
1266 r.Q(1) = s->Q(base); \
1267 *d = r; \
1268 } \
1269 )
1270
1271 UNPCK_OP(l, 0)
1272 UNPCK_OP(h, 1)
1273
1274 /* 3DNow! float ops */
1275 #if SHIFT == 0
1276 void helper_pi2fd(CPUX86State *env, MMXReg *d, MMXReg *s)
1277 {
1278 d->MMX_S(0) = int32_to_float32(s->MMX_L(0), &env->mmx_status);
1279 d->MMX_S(1) = int32_to_float32(s->MMX_L(1), &env->mmx_status);
1280 }
1281
1282 void helper_pi2fw(CPUX86State *env, MMXReg *d, MMXReg *s)
1283 {
1284 d->MMX_S(0) = int32_to_float32((int16_t)s->MMX_W(0), &env->mmx_status);
1285 d->MMX_S(1) = int32_to_float32((int16_t)s->MMX_W(2), &env->mmx_status);
1286 }
1287
1288 void helper_pf2id(CPUX86State *env, MMXReg *d, MMXReg *s)
1289 {
1290 d->MMX_L(0) = float32_to_int32_round_to_zero(s->MMX_S(0), &env->mmx_status);
1291 d->MMX_L(1) = float32_to_int32_round_to_zero(s->MMX_S(1), &env->mmx_status);
1292 }
1293
1294 void helper_pf2iw(CPUX86State *env, MMXReg *d, MMXReg *s)
1295 {
1296 d->MMX_L(0) = satsw(float32_to_int32_round_to_zero(s->MMX_S(0),
1297 &env->mmx_status));
1298 d->MMX_L(1) = satsw(float32_to_int32_round_to_zero(s->MMX_S(1),
1299 &env->mmx_status));
1300 }
1301
1302 void helper_pfacc(CPUX86State *env, MMXReg *d, MMXReg *s)
1303 {
1304 MMXReg r;
1305
1306 r.MMX_S(0) = float32_add(d->MMX_S(0), d->MMX_S(1), &env->mmx_status);
1307 r.MMX_S(1) = float32_add(s->MMX_S(0), s->MMX_S(1), &env->mmx_status);
1308 *d = r;
1309 }
1310
1311 void helper_pfadd(CPUX86State *env, MMXReg *d, MMXReg *s)
1312 {
1313 d->MMX_S(0) = float32_add(d->MMX_S(0), s->MMX_S(0), &env->mmx_status);
1314 d->MMX_S(1) = float32_add(d->MMX_S(1), s->MMX_S(1), &env->mmx_status);
1315 }
1316
1317 void helper_pfcmpeq(CPUX86State *env, MMXReg *d, MMXReg *s)
1318 {
1319 d->MMX_L(0) = float32_eq_quiet(d->MMX_S(0), s->MMX_S(0),
1320 &env->mmx_status) ? -1 : 0;
1321 d->MMX_L(1) = float32_eq_quiet(d->MMX_S(1), s->MMX_S(1),
1322 &env->mmx_status) ? -1 : 0;
1323 }
1324
1325 void helper_pfcmpge(CPUX86State *env, MMXReg *d, MMXReg *s)
1326 {
1327 d->MMX_L(0) = float32_le(s->MMX_S(0), d->MMX_S(0),
1328 &env->mmx_status) ? -1 : 0;
1329 d->MMX_L(1) = float32_le(s->MMX_S(1), d->MMX_S(1),
1330 &env->mmx_status) ? -1 : 0;
1331 }
1332
1333 void helper_pfcmpgt(CPUX86State *env, MMXReg *d, MMXReg *s)
1334 {
1335 d->MMX_L(0) = float32_lt(s->MMX_S(0), d->MMX_S(0),
1336 &env->mmx_status) ? -1 : 0;
1337 d->MMX_L(1) = float32_lt(s->MMX_S(1), d->MMX_S(1),
1338 &env->mmx_status) ? -1 : 0;
1339 }
1340
1341 void helper_pfmax(CPUX86State *env, MMXReg *d, MMXReg *s)
1342 {
1343 if (float32_lt(d->MMX_S(0), s->MMX_S(0), &env->mmx_status)) {
1344 d->MMX_S(0) = s->MMX_S(0);
1345 }
1346 if (float32_lt(d->MMX_S(1), s->MMX_S(1), &env->mmx_status)) {
1347 d->MMX_S(1) = s->MMX_S(1);
1348 }
1349 }
1350
1351 void helper_pfmin(CPUX86State *env, MMXReg *d, MMXReg *s)
1352 {
1353 if (float32_lt(s->MMX_S(0), d->MMX_S(0), &env->mmx_status)) {
1354 d->MMX_S(0) = s->MMX_S(0);
1355 }
1356 if (float32_lt(s->MMX_S(1), d->MMX_S(1), &env->mmx_status)) {
1357 d->MMX_S(1) = s->MMX_S(1);
1358 }
1359 }
1360
1361 void helper_pfmul(CPUX86State *env, MMXReg *d, MMXReg *s)
1362 {
1363 d->MMX_S(0) = float32_mul(d->MMX_S(0), s->MMX_S(0), &env->mmx_status);
1364 d->MMX_S(1) = float32_mul(d->MMX_S(1), s->MMX_S(1), &env->mmx_status);
1365 }
1366
1367 void helper_pfnacc(CPUX86State *env, MMXReg *d, MMXReg *s)
1368 {
1369 MMXReg r;
1370
1371 r.MMX_S(0) = float32_sub(d->MMX_S(0), d->MMX_S(1), &env->mmx_status);
1372 r.MMX_S(1) = float32_sub(s->MMX_S(0), s->MMX_S(1), &env->mmx_status);
1373 *d = r;
1374 }
1375
1376 void helper_pfpnacc(CPUX86State *env, MMXReg *d, MMXReg *s)
1377 {
1378 MMXReg r;
1379
1380 r.MMX_S(0) = float32_sub(d->MMX_S(0), d->MMX_S(1), &env->mmx_status);
1381 r.MMX_S(1) = float32_add(s->MMX_S(0), s->MMX_S(1), &env->mmx_status);
1382 *d = r;
1383 }
1384
1385 void helper_pfrcp(CPUX86State *env, MMXReg *d, MMXReg *s)
1386 {
1387 d->MMX_S(0) = float32_div(float32_one, s->MMX_S(0), &env->mmx_status);
1388 d->MMX_S(1) = d->MMX_S(0);
1389 }
1390
1391 void helper_pfrsqrt(CPUX86State *env, MMXReg *d, MMXReg *s)
1392 {
1393 d->MMX_L(1) = s->MMX_L(0) & 0x7fffffff;
1394 d->MMX_S(1) = float32_div(float32_one,
1395 float32_sqrt(d->MMX_S(1), &env->mmx_status),
1396 &env->mmx_status);
1397 d->MMX_L(1) |= s->MMX_L(0) & 0x80000000;
1398 d->MMX_L(0) = d->MMX_L(1);
1399 }
1400
1401 void helper_pfsub(CPUX86State *env, MMXReg *d, MMXReg *s)
1402 {
1403 d->MMX_S(0) = float32_sub(d->MMX_S(0), s->MMX_S(0), &env->mmx_status);
1404 d->MMX_S(1) = float32_sub(d->MMX_S(1), s->MMX_S(1), &env->mmx_status);
1405 }
1406
1407 void helper_pfsubr(CPUX86State *env, MMXReg *d, MMXReg *s)
1408 {
1409 d->MMX_S(0) = float32_sub(s->MMX_S(0), d->MMX_S(0), &env->mmx_status);
1410 d->MMX_S(1) = float32_sub(s->MMX_S(1), d->MMX_S(1), &env->mmx_status);
1411 }
1412
1413 void helper_pswapd(CPUX86State *env, MMXReg *d, MMXReg *s)
1414 {
1415 MMXReg r;
1416
1417 r.MMX_L(0) = s->MMX_L(1);
1418 r.MMX_L(1) = s->MMX_L(0);
1419 *d = r;
1420 }
1421 #endif
1422
1423 /* SSSE3 op helpers */
1424 void glue(helper_pshufb, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
1425 {
1426 int i;
1427 Reg r;
1428
1429 for (i = 0; i < (8 << SHIFT); i++) {
1430 r.B(i) = (s->B(i) & 0x80) ? 0 : (d->B(s->B(i) & ((8 << SHIFT) - 1)));
1431 }
1432
1433 *d = r;
1434 }
1435
1436 void glue(helper_phaddw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
1437 {
1438 d->W(0) = (int16_t)d->W(0) + (int16_t)d->W(1);
1439 d->W(1) = (int16_t)d->W(2) + (int16_t)d->W(3);
1440 XMM_ONLY(d->W(2) = (int16_t)d->W(4) + (int16_t)d->W(5));
1441 XMM_ONLY(d->W(3) = (int16_t)d->W(6) + (int16_t)d->W(7));
1442 d->W((2 << SHIFT) + 0) = (int16_t)s->W(0) + (int16_t)s->W(1);
1443 d->W((2 << SHIFT) + 1) = (int16_t)s->W(2) + (int16_t)s->W(3);
1444 XMM_ONLY(d->W(6) = (int16_t)s->W(4) + (int16_t)s->W(5));
1445 XMM_ONLY(d->W(7) = (int16_t)s->W(6) + (int16_t)s->W(7));
1446 }
1447
1448 void glue(helper_phaddd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
1449 {
1450 d->L(0) = (int32_t)d->L(0) + (int32_t)d->L(1);
1451 XMM_ONLY(d->L(1) = (int32_t)d->L(2) + (int32_t)d->L(3));
1452 d->L((1 << SHIFT) + 0) = (int32_t)s->L(0) + (int32_t)s->L(1);
1453 XMM_ONLY(d->L(3) = (int32_t)s->L(2) + (int32_t)s->L(3));
1454 }
1455
1456 void glue(helper_phaddsw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
1457 {
1458 d->W(0) = satsw((int16_t)d->W(0) + (int16_t)d->W(1));
1459 d->W(1) = satsw((int16_t)d->W(2) + (int16_t)d->W(3));
1460 XMM_ONLY(d->W(2) = satsw((int16_t)d->W(4) + (int16_t)d->W(5)));
1461 XMM_ONLY(d->W(3) = satsw((int16_t)d->W(6) + (int16_t)d->W(7)));
1462 d->W((2 << SHIFT) + 0) = satsw((int16_t)s->W(0) + (int16_t)s->W(1));
1463 d->W((2 << SHIFT) + 1) = satsw((int16_t)s->W(2) + (int16_t)s->W(3));
1464 XMM_ONLY(d->W(6) = satsw((int16_t)s->W(4) + (int16_t)s->W(5)));
1465 XMM_ONLY(d->W(7) = satsw((int16_t)s->W(6) + (int16_t)s->W(7)));
1466 }
1467
1468 void glue(helper_pmaddubsw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
1469 {
1470 d->W(0) = satsw((int8_t)s->B(0) * (uint8_t)d->B(0) +
1471 (int8_t)s->B(1) * (uint8_t)d->B(1));
1472 d->W(1) = satsw((int8_t)s->B(2) * (uint8_t)d->B(2) +
1473 (int8_t)s->B(3) * (uint8_t)d->B(3));
1474 d->W(2) = satsw((int8_t)s->B(4) * (uint8_t)d->B(4) +
1475 (int8_t)s->B(5) * (uint8_t)d->B(5));
1476 d->W(3) = satsw((int8_t)s->B(6) * (uint8_t)d->B(6) +
1477 (int8_t)s->B(7) * (uint8_t)d->B(7));
1478 #if SHIFT == 1
1479 d->W(4) = satsw((int8_t)s->B(8) * (uint8_t)d->B(8) +
1480 (int8_t)s->B(9) * (uint8_t)d->B(9));
1481 d->W(5) = satsw((int8_t)s->B(10) * (uint8_t)d->B(10) +
1482 (int8_t)s->B(11) * (uint8_t)d->B(11));
1483 d->W(6) = satsw((int8_t)s->B(12) * (uint8_t)d->B(12) +
1484 (int8_t)s->B(13) * (uint8_t)d->B(13));
1485 d->W(7) = satsw((int8_t)s->B(14) * (uint8_t)d->B(14) +
1486 (int8_t)s->B(15) * (uint8_t)d->B(15));
1487 #endif
1488 }
1489
1490 void glue(helper_phsubw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
1491 {
1492 d->W(0) = (int16_t)d->W(0) - (int16_t)d->W(1);
1493 d->W(1) = (int16_t)d->W(2) - (int16_t)d->W(3);
1494 XMM_ONLY(d->W(2) = (int16_t)d->W(4) - (int16_t)d->W(5));
1495 XMM_ONLY(d->W(3) = (int16_t)d->W(6) - (int16_t)d->W(7));
1496 d->W((2 << SHIFT) + 0) = (int16_t)s->W(0) - (int16_t)s->W(1);
1497 d->W((2 << SHIFT) + 1) = (int16_t)s->W(2) - (int16_t)s->W(3);
1498 XMM_ONLY(d->W(6) = (int16_t)s->W(4) - (int16_t)s->W(5));
1499 XMM_ONLY(d->W(7) = (int16_t)s->W(6) - (int16_t)s->W(7));
1500 }
1501
1502 void glue(helper_phsubd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
1503 {
1504 d->L(0) = (int32_t)d->L(0) - (int32_t)d->L(1);
1505 XMM_ONLY(d->L(1) = (int32_t)d->L(2) - (int32_t)d->L(3));
1506 d->L((1 << SHIFT) + 0) = (int32_t)s->L(0) - (int32_t)s->L(1);
1507 XMM_ONLY(d->L(3) = (int32_t)s->L(2) - (int32_t)s->L(3));
1508 }
1509
1510 void glue(helper_phsubsw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
1511 {
1512 d->W(0) = satsw((int16_t)d->W(0) - (int16_t)d->W(1));
1513 d->W(1) = satsw((int16_t)d->W(2) - (int16_t)d->W(3));
1514 XMM_ONLY(d->W(2) = satsw((int16_t)d->W(4) - (int16_t)d->W(5)));
1515 XMM_ONLY(d->W(3) = satsw((int16_t)d->W(6) - (int16_t)d->W(7)));
1516 d->W((2 << SHIFT) + 0) = satsw((int16_t)s->W(0) - (int16_t)s->W(1));
1517 d->W((2 << SHIFT) + 1) = satsw((int16_t)s->W(2) - (int16_t)s->W(3));
1518 XMM_ONLY(d->W(6) = satsw((int16_t)s->W(4) - (int16_t)s->W(5)));
1519 XMM_ONLY(d->W(7) = satsw((int16_t)s->W(6) - (int16_t)s->W(7)));
1520 }
1521
1522 #define FABSB(_, x) (x > INT8_MAX ? -(int8_t)x : x)
1523 #define FABSW(_, x) (x > INT16_MAX ? -(int16_t)x : x)
1524 #define FABSL(_, x) (x > INT32_MAX ? -(int32_t)x : x)
1525 SSE_HELPER_B(helper_pabsb, FABSB)
1526 SSE_HELPER_W(helper_pabsw, FABSW)
1527 SSE_HELPER_L(helper_pabsd, FABSL)
1528
1529 #define FMULHRSW(d, s) (((int16_t) d * (int16_t)s + 0x4000) >> 15)
1530 SSE_HELPER_W(helper_pmulhrsw, FMULHRSW)
1531
1532 #define FSIGNB(d, s) (s <= INT8_MAX ? s ? d : 0 : -(int8_t)d)
1533 #define FSIGNW(d, s) (s <= INT16_MAX ? s ? d : 0 : -(int16_t)d)
1534 #define FSIGNL(d, s) (s <= INT32_MAX ? s ? d : 0 : -(int32_t)d)
1535 SSE_HELPER_B(helper_psignb, FSIGNB)
1536 SSE_HELPER_W(helper_psignw, FSIGNW)
1537 SSE_HELPER_L(helper_psignd, FSIGNL)
1538
1539 void glue(helper_palignr, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
1540 int32_t shift)
1541 {
1542 Reg r;
1543
1544 /* XXX could be checked during translation */
1545 if (shift >= (16 << SHIFT)) {
1546 r.Q(0) = 0;
1547 XMM_ONLY(r.Q(1) = 0);
1548 } else {
1549 shift <<= 3;
1550 #define SHR(v, i) (i < 64 && i > -64 ? i > 0 ? v >> (i) : (v << -(i)) : 0)
1551 #if SHIFT == 0
1552 r.Q(0) = SHR(s->Q(0), shift - 0) |
1553 SHR(d->Q(0), shift - 64);
1554 #else
1555 r.Q(0) = SHR(s->Q(0), shift - 0) |
1556 SHR(s->Q(1), shift - 64) |
1557 SHR(d->Q(0), shift - 128) |
1558 SHR(d->Q(1), shift - 192);
1559 r.Q(1) = SHR(s->Q(0), shift + 64) |
1560 SHR(s->Q(1), shift - 0) |
1561 SHR(d->Q(0), shift - 64) |
1562 SHR(d->Q(1), shift - 128);
1563 #endif
1564 #undef SHR
1565 }
1566
1567 *d = r;
1568 }
1569
1570 #define XMM0 (env->xmm_regs[0])
1571
1572 #if SHIFT == 1
1573 #define SSE_HELPER_V(name, elem, num, F) \
1574 void glue(name, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) \
1575 { \
1576 d->elem(0) = F(d->elem(0), s->elem(0), XMM0.elem(0)); \
1577 d->elem(1) = F(d->elem(1), s->elem(1), XMM0.elem(1)); \
1578 if (num > 2) { \
1579 d->elem(2) = F(d->elem(2), s->elem(2), XMM0.elem(2)); \
1580 d->elem(3) = F(d->elem(3), s->elem(3), XMM0.elem(3)); \
1581 if (num > 4) { \
1582 d->elem(4) = F(d->elem(4), s->elem(4), XMM0.elem(4)); \
1583 d->elem(5) = F(d->elem(5), s->elem(5), XMM0.elem(5)); \
1584 d->elem(6) = F(d->elem(6), s->elem(6), XMM0.elem(6)); \
1585 d->elem(7) = F(d->elem(7), s->elem(7), XMM0.elem(7)); \
1586 if (num > 8) { \
1587 d->elem(8) = F(d->elem(8), s->elem(8), XMM0.elem(8)); \
1588 d->elem(9) = F(d->elem(9), s->elem(9), XMM0.elem(9)); \
1589 d->elem(10) = F(d->elem(10), s->elem(10), XMM0.elem(10)); \
1590 d->elem(11) = F(d->elem(11), s->elem(11), XMM0.elem(11)); \
1591 d->elem(12) = F(d->elem(12), s->elem(12), XMM0.elem(12)); \
1592 d->elem(13) = F(d->elem(13), s->elem(13), XMM0.elem(13)); \
1593 d->elem(14) = F(d->elem(14), s->elem(14), XMM0.elem(14)); \
1594 d->elem(15) = F(d->elem(15), s->elem(15), XMM0.elem(15)); \
1595 } \
1596 } \
1597 } \
1598 }
1599
1600 #define SSE_HELPER_I(name, elem, num, F) \
1601 void glue(name, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, uint32_t imm) \
1602 { \
1603 d->elem(0) = F(d->elem(0), s->elem(0), ((imm >> 0) & 1)); \
1604 d->elem(1) = F(d->elem(1), s->elem(1), ((imm >> 1) & 1)); \
1605 if (num > 2) { \
1606 d->elem(2) = F(d->elem(2), s->elem(2), ((imm >> 2) & 1)); \
1607 d->elem(3) = F(d->elem(3), s->elem(3), ((imm >> 3) & 1)); \
1608 if (num > 4) { \
1609 d->elem(4) = F(d->elem(4), s->elem(4), ((imm >> 4) & 1)); \
1610 d->elem(5) = F(d->elem(5), s->elem(5), ((imm >> 5) & 1)); \
1611 d->elem(6) = F(d->elem(6), s->elem(6), ((imm >> 6) & 1)); \
1612 d->elem(7) = F(d->elem(7), s->elem(7), ((imm >> 7) & 1)); \
1613 if (num > 8) { \
1614 d->elem(8) = F(d->elem(8), s->elem(8), ((imm >> 8) & 1)); \
1615 d->elem(9) = F(d->elem(9), s->elem(9), ((imm >> 9) & 1)); \
1616 d->elem(10) = F(d->elem(10), s->elem(10), \
1617 ((imm >> 10) & 1)); \
1618 d->elem(11) = F(d->elem(11), s->elem(11), \
1619 ((imm >> 11) & 1)); \
1620 d->elem(12) = F(d->elem(12), s->elem(12), \
1621 ((imm >> 12) & 1)); \
1622 d->elem(13) = F(d->elem(13), s->elem(13), \
1623 ((imm >> 13) & 1)); \
1624 d->elem(14) = F(d->elem(14), s->elem(14), \
1625 ((imm >> 14) & 1)); \
1626 d->elem(15) = F(d->elem(15), s->elem(15), \
1627 ((imm >> 15) & 1)); \
1628 } \
1629 } \
1630 } \
1631 }
1632
1633 /* SSE4.1 op helpers */
1634 #define FBLENDVB(d, s, m) ((m & 0x80) ? s : d)
1635 #define FBLENDVPS(d, s, m) ((m & 0x80000000) ? s : d)
1636 #define FBLENDVPD(d, s, m) ((m & 0x8000000000000000LL) ? s : d)
1637 SSE_HELPER_V(helper_pblendvb, B, 16, FBLENDVB)
1638 SSE_HELPER_V(helper_blendvps, L, 4, FBLENDVPS)
1639 SSE_HELPER_V(helper_blendvpd, Q, 2, FBLENDVPD)
1640
1641 void glue(helper_ptest, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
1642 {
1643 uint64_t zf = (s->Q(0) & d->Q(0)) | (s->Q(1) & d->Q(1));
1644 uint64_t cf = (s->Q(0) & ~d->Q(0)) | (s->Q(1) & ~d->Q(1));
1645
1646 CC_SRC = (zf ? 0 : CC_Z) | (cf ? 0 : CC_C);
1647 }
1648
1649 #define SSE_HELPER_F(name, elem, num, F) \
1650 void glue(name, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) \
1651 { \
1652 if (num > 2) { \
1653 if (num > 4) { \
1654 d->elem(7) = F(7); \
1655 d->elem(6) = F(6); \
1656 d->elem(5) = F(5); \
1657 d->elem(4) = F(4); \
1658 } \
1659 d->elem(3) = F(3); \
1660 d->elem(2) = F(2); \
1661 } \
1662 d->elem(1) = F(1); \
1663 d->elem(0) = F(0); \
1664 }
1665
1666 SSE_HELPER_F(helper_pmovsxbw, W, 8, (int8_t) s->B)
1667 SSE_HELPER_F(helper_pmovsxbd, L, 4, (int8_t) s->B)
1668 SSE_HELPER_F(helper_pmovsxbq, Q, 2, (int8_t) s->B)
1669 SSE_HELPER_F(helper_pmovsxwd, L, 4, (int16_t) s->W)
1670 SSE_HELPER_F(helper_pmovsxwq, Q, 2, (int16_t) s->W)
1671 SSE_HELPER_F(helper_pmovsxdq, Q, 2, (int32_t) s->L)
1672 SSE_HELPER_F(helper_pmovzxbw, W, 8, s->B)
1673 SSE_HELPER_F(helper_pmovzxbd, L, 4, s->B)
1674 SSE_HELPER_F(helper_pmovzxbq, Q, 2, s->B)
1675 SSE_HELPER_F(helper_pmovzxwd, L, 4, s->W)
1676 SSE_HELPER_F(helper_pmovzxwq, Q, 2, s->W)
1677 SSE_HELPER_F(helper_pmovzxdq, Q, 2, s->L)
1678
1679 void glue(helper_pmuldq, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
1680 {
1681 d->Q(0) = (int64_t)(int32_t) d->L(0) * (int32_t) s->L(0);
1682 d->Q(1) = (int64_t)(int32_t) d->L(2) * (int32_t) s->L(2);
1683 }
1684
1685 #define FCMPEQQ(d, s) (d == s ? -1 : 0)
1686 SSE_HELPER_Q(helper_pcmpeqq, FCMPEQQ)
1687
1688 void glue(helper_packusdw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
1689 {
1690 Reg r;
1691
1692 r.W(0) = satuw((int32_t) d->L(0));
1693 r.W(1) = satuw((int32_t) d->L(1));
1694 r.W(2) = satuw((int32_t) d->L(2));
1695 r.W(3) = satuw((int32_t) d->L(3));
1696 r.W(4) = satuw((int32_t) s->L(0));
1697 r.W(5) = satuw((int32_t) s->L(1));
1698 r.W(6) = satuw((int32_t) s->L(2));
1699 r.W(7) = satuw((int32_t) s->L(3));
1700 *d = r;
1701 }
1702
1703 #define FMINSB(d, s) MIN((int8_t)d, (int8_t)s)
1704 #define FMINSD(d, s) MIN((int32_t)d, (int32_t)s)
1705 #define FMAXSB(d, s) MAX((int8_t)d, (int8_t)s)
1706 #define FMAXSD(d, s) MAX((int32_t)d, (int32_t)s)
1707 SSE_HELPER_B(helper_pminsb, FMINSB)
1708 SSE_HELPER_L(helper_pminsd, FMINSD)
1709 SSE_HELPER_W(helper_pminuw, MIN)
1710 SSE_HELPER_L(helper_pminud, MIN)
1711 SSE_HELPER_B(helper_pmaxsb, FMAXSB)
1712 SSE_HELPER_L(helper_pmaxsd, FMAXSD)
1713 SSE_HELPER_W(helper_pmaxuw, MAX)
1714 SSE_HELPER_L(helper_pmaxud, MAX)
1715
1716 #define FMULLD(d, s) ((int32_t)d * (int32_t)s)
1717 SSE_HELPER_L(helper_pmulld, FMULLD)
1718
1719 void glue(helper_phminposuw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
1720 {
1721 int idx = 0;
1722
1723 if (s->W(1) < s->W(idx)) {
1724 idx = 1;
1725 }
1726 if (s->W(2) < s->W(idx)) {
1727 idx = 2;
1728 }
1729 if (s->W(3) < s->W(idx)) {
1730 idx = 3;
1731 }
1732 if (s->W(4) < s->W(idx)) {
1733 idx = 4;
1734 }
1735 if (s->W(5) < s->W(idx)) {
1736 idx = 5;
1737 }
1738 if (s->W(6) < s->W(idx)) {
1739 idx = 6;
1740 }
1741 if (s->W(7) < s->W(idx)) {
1742 idx = 7;
1743 }
1744
1745 d->W(0) = s->W(idx);
1746 d->W(1) = idx;
1747 d->L(1) = 0;
1748 d->Q(1) = 0;
1749 }
1750
1751 void glue(helper_roundps, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
1752 uint32_t mode)
1753 {
1754 signed char prev_rounding_mode;
1755
1756 prev_rounding_mode = env->sse_status.float_rounding_mode;
1757 if (!(mode & (1 << 2))) {
1758 switch (mode & 3) {
1759 case 0:
1760 set_float_rounding_mode(float_round_nearest_even, &env->sse_status);
1761 break;
1762 case 1:
1763 set_float_rounding_mode(float_round_down, &env->sse_status);
1764 break;
1765 case 2:
1766 set_float_rounding_mode(float_round_up, &env->sse_status);
1767 break;
1768 case 3:
1769 set_float_rounding_mode(float_round_to_zero, &env->sse_status);
1770 break;
1771 }
1772 }
1773
1774 d->ZMM_S(0) = float32_round_to_int(s->ZMM_S(0), &env->sse_status);
1775 d->ZMM_S(1) = float32_round_to_int(s->ZMM_S(1), &env->sse_status);
1776 d->ZMM_S(2) = float32_round_to_int(s->ZMM_S(2), &env->sse_status);
1777 d->ZMM_S(3) = float32_round_to_int(s->ZMM_S(3), &env->sse_status);
1778
1779 #if 0 /* TODO */
1780 if (mode & (1 << 3)) {
1781 set_float_exception_flags(get_float_exception_flags(&env->sse_status) &
1782 ~float_flag_inexact,
1783 &env->sse_status);
1784 }
1785 #endif
1786 env->sse_status.float_rounding_mode = prev_rounding_mode;
1787 }
1788
1789 void glue(helper_roundpd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
1790 uint32_t mode)
1791 {
1792 signed char prev_rounding_mode;
1793
1794 prev_rounding_mode = env->sse_status.float_rounding_mode;
1795 if (!(mode & (1 << 2))) {
1796 switch (mode & 3) {
1797 case 0:
1798 set_float_rounding_mode(float_round_nearest_even, &env->sse_status);
1799 break;
1800 case 1:
1801 set_float_rounding_mode(float_round_down, &env->sse_status);
1802 break;
1803 case 2:
1804 set_float_rounding_mode(float_round_up, &env->sse_status);
1805 break;
1806 case 3:
1807 set_float_rounding_mode(float_round_to_zero, &env->sse_status);
1808 break;
1809 }
1810 }
1811
1812 d->ZMM_D(0) = float64_round_to_int(s->ZMM_D(0), &env->sse_status);
1813 d->ZMM_D(1) = float64_round_to_int(s->ZMM_D(1), &env->sse_status);
1814
1815 #if 0 /* TODO */
1816 if (mode & (1 << 3)) {
1817 set_float_exception_flags(get_float_exception_flags(&env->sse_status) &
1818 ~float_flag_inexact,
1819 &env->sse_status);
1820 }
1821 #endif
1822 env->sse_status.float_rounding_mode = prev_rounding_mode;
1823 }
1824
1825 void glue(helper_roundss, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
1826 uint32_t mode)
1827 {
1828 signed char prev_rounding_mode;
1829
1830 prev_rounding_mode = env->sse_status.float_rounding_mode;
1831 if (!(mode & (1 << 2))) {
1832 switch (mode & 3) {
1833 case 0:
1834 set_float_rounding_mode(float_round_nearest_even, &env->sse_status);
1835 break;
1836 case 1:
1837 set_float_rounding_mode(float_round_down, &env->sse_status);
1838 break;
1839 case 2:
1840 set_float_rounding_mode(float_round_up, &env->sse_status);
1841 break;
1842 case 3:
1843 set_float_rounding_mode(float_round_to_zero, &env->sse_status);
1844 break;
1845 }
1846 }
1847
1848 d->ZMM_S(0) = float32_round_to_int(s->ZMM_S(0), &env->sse_status);
1849
1850 #if 0 /* TODO */
1851 if (mode & (1 << 3)) {
1852 set_float_exception_flags(get_float_exception_flags(&env->sse_status) &
1853 ~float_flag_inexact,
1854 &env->sse_status);
1855 }
1856 #endif
1857 env->sse_status.float_rounding_mode = prev_rounding_mode;
1858 }
1859
1860 void glue(helper_roundsd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
1861 uint32_t mode)
1862 {
1863 signed char prev_rounding_mode;
1864
1865 prev_rounding_mode = env->sse_status.float_rounding_mode;
1866 if (!(mode & (1 << 2))) {
1867 switch (mode & 3) {
1868 case 0:
1869 set_float_rounding_mode(float_round_nearest_even, &env->sse_status);
1870 break;
1871 case 1:
1872 set_float_rounding_mode(float_round_down, &env->sse_status);
1873 break;
1874 case 2:
1875 set_float_rounding_mode(float_round_up, &env->sse_status);
1876 break;
1877 case 3:
1878 set_float_rounding_mode(float_round_to_zero, &env->sse_status);
1879 break;
1880 }
1881 }
1882
1883 d->ZMM_D(0) = float64_round_to_int(s->ZMM_D(0), &env->sse_status);
1884
1885 #if 0 /* TODO */
1886 if (mode & (1 << 3)) {
1887 set_float_exception_flags(get_float_exception_flags(&env->sse_status) &
1888 ~float_flag_inexact,
1889 &env->sse_status);
1890 }
1891 #endif
1892 env->sse_status.float_rounding_mode = prev_rounding_mode;
1893 }
1894
1895 #define FBLENDP(d, s, m) (m ? s : d)
1896 SSE_HELPER_I(helper_blendps, L, 4, FBLENDP)
1897 SSE_HELPER_I(helper_blendpd, Q, 2, FBLENDP)
1898 SSE_HELPER_I(helper_pblendw, W, 8, FBLENDP)
1899
1900 void glue(helper_dpps, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, uint32_t mask)
1901 {
1902 float32 iresult = float32_zero;
1903
1904 if (mask & (1 << 4)) {
1905 iresult = float32_add(iresult,
1906 float32_mul(d->ZMM_S(0), s->ZMM_S(0),
1907 &env->sse_status),
1908 &env->sse_status);
1909 }
1910 if (mask & (1 << 5)) {
1911 iresult = float32_add(iresult,
1912 float32_mul(d->ZMM_S(1), s->ZMM_S(1),
1913 &env->sse_status),
1914 &env->sse_status);
1915 }
1916 if (mask & (1 << 6)) {
1917 iresult = float32_add(iresult,
1918 float32_mul(d->ZMM_S(2), s->ZMM_S(2),
1919 &env->sse_status),
1920 &env->sse_status);
1921 }
1922 if (mask & (1 << 7)) {
1923 iresult = float32_add(iresult,
1924 float32_mul(d->ZMM_S(3), s->ZMM_S(3),
1925 &env->sse_status),
1926 &env->sse_status);
1927 }
1928 d->ZMM_S(0) = (mask & (1 << 0)) ? iresult : float32_zero;
1929 d->ZMM_S(1) = (mask & (1 << 1)) ? iresult : float32_zero;
1930 d->ZMM_S(2) = (mask & (1 << 2)) ? iresult : float32_zero;
1931 d->ZMM_S(3) = (mask & (1 << 3)) ? iresult : float32_zero;
1932 }
1933
1934 void glue(helper_dppd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, uint32_t mask)
1935 {
1936 float64 iresult = float64_zero;
1937
1938 if (mask & (1 << 4)) {
1939 iresult = float64_add(iresult,
1940 float64_mul(d->ZMM_D(0), s->ZMM_D(0),
1941 &env->sse_status),
1942 &env->sse_status);
1943 }
1944 if (mask & (1 << 5)) {
1945 iresult = float64_add(iresult,
1946 float64_mul(d->ZMM_D(1), s->ZMM_D(1),
1947 &env->sse_status),
1948 &env->sse_status);
1949 }
1950 d->ZMM_D(0) = (mask & (1 << 0)) ? iresult : float64_zero;
1951 d->ZMM_D(1) = (mask & (1 << 1)) ? iresult : float64_zero;
1952 }
1953
1954 void glue(helper_mpsadbw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
1955 uint32_t offset)
1956 {
1957 int s0 = (offset & 3) << 2;
1958 int d0 = (offset & 4) << 0;
1959 int i;
1960 Reg r;
1961
1962 for (i = 0; i < 8; i++, d0++) {
1963 r.W(i) = 0;
1964 r.W(i) += abs1(d->B(d0 + 0) - s->B(s0 + 0));
1965 r.W(i) += abs1(d->B(d0 + 1) - s->B(s0 + 1));
1966 r.W(i) += abs1(d->B(d0 + 2) - s->B(s0 + 2));
1967 r.W(i) += abs1(d->B(d0 + 3) - s->B(s0 + 3));
1968 }
1969
1970 *d = r;
1971 }
1972
1973 /* SSE4.2 op helpers */
1974 #define FCMPGTQ(d, s) ((int64_t)d > (int64_t)s ? -1 : 0)
1975 SSE_HELPER_Q(helper_pcmpgtq, FCMPGTQ)
1976
1977 static inline int pcmp_elen(CPUX86State *env, int reg, uint32_t ctrl)
1978 {
1979 int val;
1980
1981 /* Presence of REX.W is indicated by a bit higher than 7 set */
1982 if (ctrl >> 8) {
1983 val = abs1((int64_t)env->regs[reg]);
1984 } else {
1985 val = abs1((int32_t)env->regs[reg]);
1986 }
1987
1988 if (ctrl & 1) {
1989 if (val > 8) {
1990 return 8;
1991 }
1992 } else {
1993 if (val > 16) {
1994 return 16;
1995 }
1996 }
1997 return val;
1998 }
1999
2000 static inline int pcmp_ilen(Reg *r, uint8_t ctrl)
2001 {
2002 int val = 0;
2003
2004 if (ctrl & 1) {
2005 while (val < 8 && r->W(val)) {
2006 val++;
2007 }
2008 } else {
2009 while (val < 16 && r->B(val)) {
2010 val++;
2011 }
2012 }
2013
2014 return val;
2015 }
2016
2017 static inline int pcmp_val(Reg *r, uint8_t ctrl, int i)
2018 {
2019 switch ((ctrl >> 0) & 3) {
2020 case 0:
2021 return r->B(i);
2022 case 1:
2023 return r->W(i);
2024 case 2:
2025 return (int8_t)r->B(i);
2026 case 3:
2027 default:
2028 return (int16_t)r->W(i);
2029 }
2030 }
2031
2032 static inline unsigned pcmpxstrx(CPUX86State *env, Reg *d, Reg *s,
2033 int8_t ctrl, int valids, int validd)
2034 {
2035 unsigned int res = 0;
2036 int v;
2037 int j, i;
2038 int upper = (ctrl & 1) ? 7 : 15;
2039
2040 valids--;
2041 validd--;
2042
2043 CC_SRC = (valids < upper ? CC_Z : 0) | (validd < upper ? CC_S : 0);
2044
2045 switch ((ctrl >> 2) & 3) {
2046 case 0:
2047 for (j = valids; j >= 0; j--) {
2048 res <<= 1;
2049 v = pcmp_val(s, ctrl, j);
2050 for (i = validd; i >= 0; i--) {
2051 res |= (v == pcmp_val(d, ctrl, i));
2052 }
2053 }
2054 break;
2055 case 1:
2056 for (j = valids; j >= 0; j--) {
2057 res <<= 1;
2058 v = pcmp_val(s, ctrl, j);
2059 for (i = ((validd - 1) | 1); i >= 0; i -= 2) {
2060 res |= (pcmp_val(d, ctrl, i - 0) >= v &&
2061 pcmp_val(d, ctrl, i - 1) <= v);
2062 }
2063 }
2064 break;
2065 case 2:
2066 res = (1 << (upper - MAX(valids, validd))) - 1;
2067 res <<= MAX(valids, validd) - MIN(valids, validd);
2068 for (i = MIN(valids, validd); i >= 0; i--) {
2069 res <<= 1;
2070 v = pcmp_val(s, ctrl, i);
2071 res |= (v == pcmp_val(d, ctrl, i));
2072 }
2073 break;
2074 case 3:
2075 if (validd == -1) {
2076 res = (2 << upper) - 1;
2077 break;
2078 }
2079 for (j = valids - validd; j >= 0; j--) {
2080 res <<= 1;
2081 v = 1;
2082 for (i = validd; i >= 0; i--) {
2083 v &= (pcmp_val(s, ctrl, i + j) == pcmp_val(d, ctrl, i));
2084 }
2085 res |= v;
2086 }
2087 break;
2088 }
2089
2090 switch ((ctrl >> 4) & 3) {
2091 case 1:
2092 res ^= (2 << upper) - 1;
2093 break;
2094 case 3:
2095 res ^= (1 << (valids + 1)) - 1;
2096 break;
2097 }
2098
2099 if (res) {
2100 CC_SRC |= CC_C;
2101 }
2102 if (res & 1) {
2103 CC_SRC |= CC_O;
2104 }
2105
2106 return res;
2107 }
2108
2109 void glue(helper_pcmpestri, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
2110 uint32_t ctrl)
2111 {
2112 unsigned int res = pcmpxstrx(env, d, s, ctrl,
2113 pcmp_elen(env, R_EDX, ctrl),
2114 pcmp_elen(env, R_EAX, ctrl));
2115
2116 if (res) {
2117 env->regs[R_ECX] = (ctrl & (1 << 6)) ? 31 - clz32(res) : ctz32(res);
2118 } else {
2119 env->regs[R_ECX] = 16 >> (ctrl & (1 << 0));
2120 }
2121 }
2122
2123 void glue(helper_pcmpestrm, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
2124 uint32_t ctrl)
2125 {
2126 int i;
2127 unsigned int res = pcmpxstrx(env, d, s, ctrl,
2128 pcmp_elen(env, R_EDX, ctrl),
2129 pcmp_elen(env, R_EAX, ctrl));
2130
2131 if ((ctrl >> 6) & 1) {
2132 if (ctrl & 1) {
2133 for (i = 0; i < 8; i++, res >>= 1) {
2134 env->xmm_regs[0].W(i) = (res & 1) ? ~0 : 0;
2135 }
2136 } else {
2137 for (i = 0; i < 16; i++, res >>= 1) {
2138 env->xmm_regs[0].B(i) = (res & 1) ? ~0 : 0;
2139 }
2140 }
2141 } else {
2142 env->xmm_regs[0].Q(1) = 0;
2143 env->xmm_regs[0].Q(0) = res;
2144 }
2145 }
2146
2147 void glue(helper_pcmpistri, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
2148 uint32_t ctrl)
2149 {
2150 unsigned int res = pcmpxstrx(env, d, s, ctrl,
2151 pcmp_ilen(s, ctrl),
2152 pcmp_ilen(d, ctrl));
2153
2154 if (res) {
2155 env->regs[R_ECX] = (ctrl & (1 << 6)) ? 31 - clz32(res) : ctz32(res);
2156 } else {
2157 env->regs[R_ECX] = 16 >> (ctrl & (1 << 0));
2158 }
2159 }
2160
2161 void glue(helper_pcmpistrm, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
2162 uint32_t ctrl)
2163 {
2164 int i;
2165 unsigned int res = pcmpxstrx(env, d, s, ctrl,
2166 pcmp_ilen(s, ctrl),
2167 pcmp_ilen(d, ctrl));
2168
2169 if ((ctrl >> 6) & 1) {
2170 if (ctrl & 1) {
2171 for (i = 0; i < 8; i++, res >>= 1) {
2172 env->xmm_regs[0].W(i) = (res & 1) ? ~0 : 0;
2173 }
2174 } else {
2175 for (i = 0; i < 16; i++, res >>= 1) {
2176 env->xmm_regs[0].B(i) = (res & 1) ? ~0 : 0;
2177 }
2178 }
2179 } else {
2180 env->xmm_regs[0].Q(1) = 0;
2181 env->xmm_regs[0].Q(0) = res;
2182 }
2183 }
2184
2185 #define CRCPOLY 0x1edc6f41
2186 #define CRCPOLY_BITREV 0x82f63b78
2187 target_ulong helper_crc32(uint32_t crc1, target_ulong msg, uint32_t len)
2188 {
2189 target_ulong crc = (msg & ((target_ulong) -1 >>
2190 (TARGET_LONG_BITS - len))) ^ crc1;
2191
2192 while (len--) {
2193 crc = (crc >> 1) ^ ((crc & 1) ? CRCPOLY_BITREV : 0);
2194 }
2195
2196 return crc;
2197 }
2198
2199 void glue(helper_pclmulqdq, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
2200 uint32_t ctrl)
2201 {
2202 uint64_t ah, al, b, resh, resl;
2203
2204 ah = 0;
2205 al = d->Q((ctrl & 1) != 0);
2206 b = s->Q((ctrl & 16) != 0);
2207 resh = resl = 0;
2208
2209 while (b) {
2210 if (b & 1) {
2211 resl ^= al;
2212 resh ^= ah;
2213 }
2214 ah = (ah << 1) | (al >> 63);
2215 al <<= 1;
2216 b >>= 1;
2217 }
2218
2219 d->Q(0) = resl;
2220 d->Q(1) = resh;
2221 }
2222
2223 void glue(helper_aesdec, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
2224 {
2225 int i;
2226 Reg st = *d;
2227 Reg rk = *s;
2228
2229 for (i = 0 ; i < 4 ; i++) {
2230 d->L(i) = rk.L(i) ^ bswap32(AES_Td0[st.B(AES_ishifts[4*i+0])] ^
2231 AES_Td1[st.B(AES_ishifts[4*i+1])] ^
2232 AES_Td2[st.B(AES_ishifts[4*i+2])] ^
2233 AES_Td3[st.B(AES_ishifts[4*i+3])]);
2234 }
2235 }
2236
2237 void glue(helper_aesdeclast, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
2238 {
2239 int i;
2240 Reg st = *d;
2241 Reg rk = *s;
2242
2243 for (i = 0; i < 16; i++) {
2244 d->B(i) = rk.B(i) ^ (AES_isbox[st.B(AES_ishifts[i])]);
2245 }
2246 }
2247
2248 void glue(helper_aesenc, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
2249 {
2250 int i;
2251 Reg st = *d;
2252 Reg rk = *s;
2253
2254 for (i = 0 ; i < 4 ; i++) {
2255 d->L(i) = rk.L(i) ^ bswap32(AES_Te0[st.B(AES_shifts[4*i+0])] ^
2256 AES_Te1[st.B(AES_shifts[4*i+1])] ^
2257 AES_Te2[st.B(AES_shifts[4*i+2])] ^
2258 AES_Te3[st.B(AES_shifts[4*i+3])]);
2259 }
2260 }
2261
2262 void glue(helper_aesenclast, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
2263 {
2264 int i;
2265 Reg st = *d;
2266 Reg rk = *s;
2267
2268 for (i = 0; i < 16; i++) {
2269 d->B(i) = rk.B(i) ^ (AES_sbox[st.B(AES_shifts[i])]);
2270 }
2271
2272 }
2273
2274 void glue(helper_aesimc, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
2275 {
2276 int i;
2277 Reg tmp = *s;
2278
2279 for (i = 0 ; i < 4 ; i++) {
2280 d->L(i) = bswap32(AES_imc[tmp.B(4*i+0)][0] ^
2281 AES_imc[tmp.B(4*i+1)][1] ^
2282 AES_imc[tmp.B(4*i+2)][2] ^
2283 AES_imc[tmp.B(4*i+3)][3]);
2284 }
2285 }
2286
2287 void glue(helper_aeskeygenassist, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
2288 uint32_t ctrl)
2289 {
2290 int i;
2291 Reg tmp = *s;
2292
2293 for (i = 0 ; i < 4 ; i++) {
2294 d->B(i) = AES_sbox[tmp.B(i + 4)];
2295 d->B(i + 8) = AES_sbox[tmp.B(i + 12)];
2296 }
2297 d->L(1) = (d->L(0) << 24 | d->L(0) >> 8) ^ ctrl;
2298 d->L(3) = (d->L(2) << 24 | d->L(2) >> 8) ^ ctrl;
2299 }
2300 #endif
2301
2302 #undef SHIFT
2303 #undef XMM_ONLY
2304 #undef Reg
2305 #undef B
2306 #undef W
2307 #undef L
2308 #undef Q
2309 #undef SUFFIX
AR7 emulation for QEMU