trace: add trace event iterator APIs
[qemu/ar7.git] / hw / s390x / s390-pci-bus.c
blobb7f8bca1fd029da728ddab9db889a9725b67e599
1 /*
2 * s390 PCI BUS
4 * Copyright 2014 IBM Corp.
5 * Author(s): Frank Blaschka <frank.blaschka@de.ibm.com>
6 * Hong Bo Li <lihbbj@cn.ibm.com>
7 * Yi Min Zhao <zyimin@cn.ibm.com>
9 * This work is licensed under the terms of the GNU GPL, version 2 or (at
10 * your option) any later version. See the COPYING file in the top-level
11 * directory.
14 #include "qemu/osdep.h"
15 #include "qapi/error.h"
16 #include "qapi/visitor.h"
17 #include "qemu-common.h"
18 #include "cpu.h"
19 #include "s390-pci-bus.h"
20 #include "s390-pci-inst.h"
21 #include "hw/pci/pci_bus.h"
22 #include "hw/pci/msi.h"
23 #include "qemu/error-report.h"
25 /* #define DEBUG_S390PCI_BUS */
26 #ifdef DEBUG_S390PCI_BUS
27 #define DPRINTF(fmt, ...) \
28 do { fprintf(stderr, "S390pci-bus: " fmt, ## __VA_ARGS__); } while (0)
29 #else
30 #define DPRINTF(fmt, ...) \
31 do { } while (0)
32 #endif
34 static S390pciState *s390_get_phb(void)
36 static S390pciState *phb;
38 if (!phb) {
39 phb = S390_PCI_HOST_BRIDGE(
40 object_resolve_path(TYPE_S390_PCI_HOST_BRIDGE, NULL));
41 assert(phb != NULL);
44 return phb;
47 int chsc_sei_nt2_get_event(void *res)
49 ChscSeiNt2Res *nt2_res = (ChscSeiNt2Res *)res;
50 PciCcdfAvail *accdf;
51 PciCcdfErr *eccdf;
52 int rc = 1;
53 SeiContainer *sei_cont;
54 S390pciState *s = s390_get_phb();
56 sei_cont = QTAILQ_FIRST(&s->pending_sei);
57 if (sei_cont) {
58 QTAILQ_REMOVE(&s->pending_sei, sei_cont, link);
59 nt2_res->nt = 2;
60 nt2_res->cc = sei_cont->cc;
61 nt2_res->length = cpu_to_be16(sizeof(ChscSeiNt2Res));
62 switch (sei_cont->cc) {
63 case 1: /* error event */
64 eccdf = (PciCcdfErr *)nt2_res->ccdf;
65 eccdf->fid = cpu_to_be32(sei_cont->fid);
66 eccdf->fh = cpu_to_be32(sei_cont->fh);
67 eccdf->e = cpu_to_be32(sei_cont->e);
68 eccdf->faddr = cpu_to_be64(sei_cont->faddr);
69 eccdf->pec = cpu_to_be16(sei_cont->pec);
70 break;
71 case 2: /* availability event */
72 accdf = (PciCcdfAvail *)nt2_res->ccdf;
73 accdf->fid = cpu_to_be32(sei_cont->fid);
74 accdf->fh = cpu_to_be32(sei_cont->fh);
75 accdf->pec = cpu_to_be16(sei_cont->pec);
76 break;
77 default:
78 abort();
80 g_free(sei_cont);
81 rc = 0;
84 return rc;
87 int chsc_sei_nt2_have_event(void)
89 S390pciState *s = s390_get_phb();
91 return !QTAILQ_EMPTY(&s->pending_sei);
94 S390PCIBusDevice *s390_pci_find_next_avail_dev(S390PCIBusDevice *pbdev)
96 int idx = 0;
97 S390PCIBusDevice *dev = NULL;
98 S390pciState *s = s390_get_phb();
100 if (pbdev) {
101 idx = (pbdev->fh & FH_MASK_INDEX) + 1;
104 for (; idx < PCI_SLOT_MAX; idx++) {
105 dev = s->pbdev[idx];
106 if (dev && dev->state != ZPCI_FS_RESERVED) {
107 return dev;
111 return NULL;
114 S390PCIBusDevice *s390_pci_find_dev_by_fid(uint32_t fid)
116 S390PCIBusDevice *pbdev;
117 int i;
118 S390pciState *s = s390_get_phb();
120 for (i = 0; i < PCI_SLOT_MAX; i++) {
121 pbdev = s->pbdev[i];
122 if (pbdev && pbdev->fid == fid) {
123 return pbdev;
127 return NULL;
130 void s390_pci_sclp_configure(SCCB *sccb)
132 PciCfgSccb *psccb = (PciCfgSccb *)sccb;
133 S390PCIBusDevice *pbdev = s390_pci_find_dev_by_fid(be32_to_cpu(psccb->aid));
134 uint16_t rc;
136 if (be16_to_cpu(sccb->h.length) < 16) {
137 rc = SCLP_RC_INSUFFICIENT_SCCB_LENGTH;
138 goto out;
141 if (!pbdev) {
142 DPRINTF("sclp config no dev found\n");
143 rc = SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED;
144 goto out;
147 switch (pbdev->state) {
148 case ZPCI_FS_RESERVED:
149 rc = SCLP_RC_ADAPTER_IN_RESERVED_STATE;
150 break;
151 case ZPCI_FS_STANDBY:
152 pbdev->state = ZPCI_FS_DISABLED;
153 rc = SCLP_RC_NORMAL_COMPLETION;
154 break;
155 default:
156 rc = SCLP_RC_NO_ACTION_REQUIRED;
158 out:
159 psccb->header.response_code = cpu_to_be16(rc);
162 void s390_pci_sclp_deconfigure(SCCB *sccb)
164 PciCfgSccb *psccb = (PciCfgSccb *)sccb;
165 S390PCIBusDevice *pbdev = s390_pci_find_dev_by_fid(be32_to_cpu(psccb->aid));
166 uint16_t rc;
168 if (be16_to_cpu(sccb->h.length) < 16) {
169 rc = SCLP_RC_INSUFFICIENT_SCCB_LENGTH;
170 goto out;
173 if (!pbdev) {
174 DPRINTF("sclp deconfig no dev found\n");
175 rc = SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED;
176 goto out;
179 switch (pbdev->state) {
180 case ZPCI_FS_RESERVED:
181 rc = SCLP_RC_ADAPTER_IN_RESERVED_STATE;
182 break;
183 case ZPCI_FS_STANDBY:
184 rc = SCLP_RC_NO_ACTION_REQUIRED;
185 break;
186 default:
187 if (pbdev->summary_ind) {
188 pci_dereg_irqs(pbdev);
190 if (pbdev->iommu_enabled) {
191 pci_dereg_ioat(pbdev);
193 pbdev->state = ZPCI_FS_STANDBY;
194 rc = SCLP_RC_NORMAL_COMPLETION;
196 if (pbdev->release_timer) {
197 qdev_unplug(DEVICE(pbdev->pdev), NULL);
200 out:
201 psccb->header.response_code = cpu_to_be16(rc);
204 static S390PCIBusDevice *s390_pci_find_dev_by_uid(uint16_t uid)
206 int i;
207 S390PCIBusDevice *pbdev;
208 S390pciState *s = s390_get_phb();
210 for (i = 0; i < PCI_SLOT_MAX; i++) {
211 pbdev = s->pbdev[i];
212 if (!pbdev) {
213 continue;
216 if (pbdev->uid == uid) {
217 return pbdev;
221 return NULL;
224 static S390PCIBusDevice *s390_pci_find_dev_by_target(const char *target)
226 int i;
227 S390PCIBusDevice *pbdev;
228 S390pciState *s = s390_get_phb();
230 if (!target) {
231 return NULL;
234 for (i = 0; i < PCI_SLOT_MAX; i++) {
235 pbdev = s->pbdev[i];
236 if (!pbdev) {
237 continue;
240 if (!strcmp(pbdev->target, target)) {
241 return pbdev;
245 return NULL;
248 S390PCIBusDevice *s390_pci_find_dev_by_idx(uint32_t idx)
250 S390pciState *s = s390_get_phb();
252 return s->pbdev[idx & FH_MASK_INDEX];
255 S390PCIBusDevice *s390_pci_find_dev_by_fh(uint32_t fh)
257 S390pciState *s = s390_get_phb();
258 S390PCIBusDevice *pbdev;
260 pbdev = s->pbdev[fh & FH_MASK_INDEX];
261 if (pbdev && pbdev->fh == fh) {
262 return pbdev;
265 return NULL;
268 static void s390_pci_generate_event(uint8_t cc, uint16_t pec, uint32_t fh,
269 uint32_t fid, uint64_t faddr, uint32_t e)
271 SeiContainer *sei_cont;
272 S390pciState *s = s390_get_phb();
274 sei_cont = g_malloc0(sizeof(SeiContainer));
275 sei_cont->fh = fh;
276 sei_cont->fid = fid;
277 sei_cont->cc = cc;
278 sei_cont->pec = pec;
279 sei_cont->faddr = faddr;
280 sei_cont->e = e;
282 QTAILQ_INSERT_TAIL(&s->pending_sei, sei_cont, link);
283 css_generate_css_crws(0);
286 static void s390_pci_generate_plug_event(uint16_t pec, uint32_t fh,
287 uint32_t fid)
289 s390_pci_generate_event(2, pec, fh, fid, 0, 0);
292 void s390_pci_generate_error_event(uint16_t pec, uint32_t fh, uint32_t fid,
293 uint64_t faddr, uint32_t e)
295 s390_pci_generate_event(1, pec, fh, fid, faddr, e);
298 static void s390_pci_set_irq(void *opaque, int irq, int level)
300 /* nothing to do */
303 static int s390_pci_map_irq(PCIDevice *pci_dev, int irq_num)
305 /* nothing to do */
306 return 0;
309 static uint64_t s390_pci_get_table_origin(uint64_t iota)
311 return iota & ~ZPCI_IOTA_RTTO_FLAG;
314 static unsigned int calc_rtx(dma_addr_t ptr)
316 return ((unsigned long) ptr >> ZPCI_RT_SHIFT) & ZPCI_INDEX_MASK;
319 static unsigned int calc_sx(dma_addr_t ptr)
321 return ((unsigned long) ptr >> ZPCI_ST_SHIFT) & ZPCI_INDEX_MASK;
324 static unsigned int calc_px(dma_addr_t ptr)
326 return ((unsigned long) ptr >> PAGE_SHIFT) & ZPCI_PT_MASK;
329 static uint64_t get_rt_sto(uint64_t entry)
331 return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_RTX)
332 ? (entry & ZPCI_RTE_ADDR_MASK)
333 : 0;
336 static uint64_t get_st_pto(uint64_t entry)
338 return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_SX)
339 ? (entry & ZPCI_STE_ADDR_MASK)
340 : 0;
343 static uint64_t s390_guest_io_table_walk(uint64_t guest_iota,
344 uint64_t guest_dma_address)
346 uint64_t sto_a, pto_a, px_a;
347 uint64_t sto, pto, pte;
348 uint32_t rtx, sx, px;
350 rtx = calc_rtx(guest_dma_address);
351 sx = calc_sx(guest_dma_address);
352 px = calc_px(guest_dma_address);
354 sto_a = guest_iota + rtx * sizeof(uint64_t);
355 sto = address_space_ldq(&address_space_memory, sto_a,
356 MEMTXATTRS_UNSPECIFIED, NULL);
357 sto = get_rt_sto(sto);
358 if (!sto) {
359 pte = 0;
360 goto out;
363 pto_a = sto + sx * sizeof(uint64_t);
364 pto = address_space_ldq(&address_space_memory, pto_a,
365 MEMTXATTRS_UNSPECIFIED, NULL);
366 pto = get_st_pto(pto);
367 if (!pto) {
368 pte = 0;
369 goto out;
372 px_a = pto + px * sizeof(uint64_t);
373 pte = address_space_ldq(&address_space_memory, px_a,
374 MEMTXATTRS_UNSPECIFIED, NULL);
376 out:
377 return pte;
380 static IOMMUTLBEntry s390_translate_iommu(MemoryRegion *iommu, hwaddr addr,
381 bool is_write)
383 uint64_t pte;
384 uint32_t flags;
385 S390PCIBusDevice *pbdev = container_of(iommu, S390PCIBusDevice, iommu_mr);
386 IOMMUTLBEntry ret = {
387 .target_as = &address_space_memory,
388 .iova = 0,
389 .translated_addr = 0,
390 .addr_mask = ~(hwaddr)0,
391 .perm = IOMMU_NONE,
394 switch (pbdev->state) {
395 case ZPCI_FS_ENABLED:
396 case ZPCI_FS_BLOCKED:
397 if (!pbdev->iommu_enabled) {
398 return ret;
400 break;
401 default:
402 return ret;
405 DPRINTF("iommu trans addr 0x%" PRIx64 "\n", addr);
407 if (addr < pbdev->pba || addr > pbdev->pal) {
408 return ret;
411 pte = s390_guest_io_table_walk(s390_pci_get_table_origin(pbdev->g_iota),
412 addr);
413 if (!pte) {
414 return ret;
417 flags = pte & ZPCI_PTE_FLAG_MASK;
418 ret.iova = addr;
419 ret.translated_addr = pte & ZPCI_PTE_ADDR_MASK;
420 ret.addr_mask = 0xfff;
422 if (flags & ZPCI_PTE_INVALID) {
423 ret.perm = IOMMU_NONE;
424 } else {
425 ret.perm = IOMMU_RW;
428 return ret;
431 static const MemoryRegionIOMMUOps s390_iommu_ops = {
432 .translate = s390_translate_iommu,
435 static AddressSpace *s390_pci_dma_iommu(PCIBus *bus, void *opaque, int devfn)
437 S390pciState *s = opaque;
439 return &s->iommu[PCI_SLOT(devfn)]->as;
442 static uint8_t set_ind_atomic(uint64_t ind_loc, uint8_t to_be_set)
444 uint8_t ind_old, ind_new;
445 hwaddr len = 1;
446 uint8_t *ind_addr;
448 ind_addr = cpu_physical_memory_map(ind_loc, &len, 1);
449 if (!ind_addr) {
450 s390_pci_generate_error_event(ERR_EVENT_AIRERR, 0, 0, 0, 0);
451 return -1;
453 do {
454 ind_old = *ind_addr;
455 ind_new = ind_old | to_be_set;
456 } while (atomic_cmpxchg(ind_addr, ind_old, ind_new) != ind_old);
457 cpu_physical_memory_unmap(ind_addr, len, 1, len);
459 return ind_old;
462 static void s390_msi_ctrl_write(void *opaque, hwaddr addr, uint64_t data,
463 unsigned int size)
465 S390PCIBusDevice *pbdev = opaque;
466 uint32_t io_int_word;
467 uint32_t idx = data >> ZPCI_MSI_VEC_BITS;
468 uint32_t vec = data & ZPCI_MSI_VEC_MASK;
469 uint64_t ind_bit;
470 uint32_t sum_bit;
471 uint32_t e = 0;
473 DPRINTF("write_msix data 0x%" PRIx64 " idx %d vec 0x%x\n", data, idx, vec);
475 if (!pbdev) {
476 e |= (vec << ERR_EVENT_MVN_OFFSET);
477 s390_pci_generate_error_event(ERR_EVENT_NOMSI, idx, 0, addr, e);
478 return;
481 if (pbdev->state != ZPCI_FS_ENABLED) {
482 return;
485 ind_bit = pbdev->routes.adapter.ind_offset;
486 sum_bit = pbdev->routes.adapter.summary_offset;
488 set_ind_atomic(pbdev->routes.adapter.ind_addr + (ind_bit + vec) / 8,
489 0x80 >> ((ind_bit + vec) % 8));
490 if (!set_ind_atomic(pbdev->routes.adapter.summary_addr + sum_bit / 8,
491 0x80 >> (sum_bit % 8))) {
492 io_int_word = (pbdev->isc << 27) | IO_INT_WORD_AI;
493 s390_io_interrupt(0, 0, 0, io_int_word);
497 static uint64_t s390_msi_ctrl_read(void *opaque, hwaddr addr, unsigned size)
499 return 0xffffffff;
502 static const MemoryRegionOps s390_msi_ctrl_ops = {
503 .write = s390_msi_ctrl_write,
504 .read = s390_msi_ctrl_read,
505 .endianness = DEVICE_LITTLE_ENDIAN,
508 void s390_pci_iommu_enable(S390PCIBusDevice *pbdev)
510 memory_region_init_iommu(&pbdev->iommu_mr, OBJECT(&pbdev->iommu->mr),
511 &s390_iommu_ops, "iommu-s390", pbdev->pal + 1);
512 memory_region_add_subregion(&pbdev->iommu->mr, 0, &pbdev->iommu_mr);
513 pbdev->iommu_enabled = true;
516 void s390_pci_iommu_disable(S390PCIBusDevice *pbdev)
518 memory_region_del_subregion(&pbdev->iommu->mr, &pbdev->iommu_mr);
519 object_unparent(OBJECT(&pbdev->iommu_mr));
520 pbdev->iommu_enabled = false;
523 static void s390_pcihost_init_as(S390pciState *s)
525 int i;
526 S390PCIIOMMU *iommu;
528 for (i = 0; i < PCI_SLOT_MAX; i++) {
529 iommu = g_malloc0(sizeof(S390PCIIOMMU));
530 memory_region_init(&iommu->mr, OBJECT(s),
531 "iommu-root-s390", UINT64_MAX);
532 address_space_init(&iommu->as, &iommu->mr, "iommu-pci");
534 s->iommu[i] = iommu;
538 static int s390_pcihost_init(SysBusDevice *dev)
540 PCIBus *b;
541 BusState *bus;
542 PCIHostState *phb = PCI_HOST_BRIDGE(dev);
543 S390pciState *s = S390_PCI_HOST_BRIDGE(dev);
545 DPRINTF("host_init\n");
547 b = pci_register_bus(DEVICE(dev), NULL,
548 s390_pci_set_irq, s390_pci_map_irq, NULL,
549 get_system_memory(), get_system_io(), 0, 64,
550 TYPE_PCI_BUS);
551 s390_pcihost_init_as(s);
552 pci_setup_iommu(b, s390_pci_dma_iommu, s);
554 bus = BUS(b);
555 qbus_set_hotplug_handler(bus, DEVICE(dev), NULL);
556 phb->bus = b;
558 s->bus = S390_PCI_BUS(qbus_create(TYPE_S390_PCI_BUS, DEVICE(s), NULL));
559 qbus_set_hotplug_handler(BUS(s->bus), DEVICE(s), NULL);
561 QTAILQ_INIT(&s->pending_sei);
562 return 0;
565 static int s390_pci_setup_msix(S390PCIBusDevice *pbdev)
567 uint8_t pos;
568 uint16_t ctrl;
569 uint32_t table, pba;
571 pos = pci_find_capability(pbdev->pdev, PCI_CAP_ID_MSIX);
572 if (!pos) {
573 pbdev->msix.available = false;
574 return 0;
577 ctrl = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_FLAGS,
578 pci_config_size(pbdev->pdev), sizeof(ctrl));
579 table = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_TABLE,
580 pci_config_size(pbdev->pdev), sizeof(table));
581 pba = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_PBA,
582 pci_config_size(pbdev->pdev), sizeof(pba));
584 pbdev->msix.table_bar = table & PCI_MSIX_FLAGS_BIRMASK;
585 pbdev->msix.table_offset = table & ~PCI_MSIX_FLAGS_BIRMASK;
586 pbdev->msix.pba_bar = pba & PCI_MSIX_FLAGS_BIRMASK;
587 pbdev->msix.pba_offset = pba & ~PCI_MSIX_FLAGS_BIRMASK;
588 pbdev->msix.entries = (ctrl & PCI_MSIX_FLAGS_QSIZE) + 1;
589 pbdev->msix.available = true;
590 return 0;
593 static void s390_pci_msix_init(S390PCIBusDevice *pbdev)
595 char *name;
597 name = g_strdup_printf("msix-s390-%04x", pbdev->uid);
599 memory_region_init_io(&pbdev->msix_notify_mr, OBJECT(pbdev),
600 &s390_msi_ctrl_ops, pbdev, name, PAGE_SIZE);
601 memory_region_add_subregion(&pbdev->iommu->mr, ZPCI_MSI_ADDR,
602 &pbdev->msix_notify_mr);
604 g_free(name);
607 static void s390_pci_msix_free(S390PCIBusDevice *pbdev)
609 memory_region_del_subregion(&pbdev->iommu->mr, &pbdev->msix_notify_mr);
610 object_unparent(OBJECT(&pbdev->msix_notify_mr));
613 static S390PCIBusDevice *s390_pci_device_new(const char *target)
615 DeviceState *dev = NULL;
616 S390pciState *s = s390_get_phb();
618 dev = qdev_try_create(BUS(s->bus), TYPE_S390_PCI_DEVICE);
619 if (!dev) {
620 return NULL;
623 qdev_prop_set_string(dev, "target", target);
624 qdev_init_nofail(dev);
626 return S390_PCI_DEVICE(dev);
629 static void s390_pcihost_hot_plug(HotplugHandler *hotplug_dev,
630 DeviceState *dev, Error **errp)
632 PCIDevice *pdev = NULL;
633 S390PCIBusDevice *pbdev = NULL;
634 S390pciState *s = s390_get_phb();
636 if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
637 pdev = PCI_DEVICE(dev);
639 if (!dev->id) {
640 /* In the case the PCI device does not define an id */
641 /* we generate one based on the PCI address */
642 dev->id = g_strdup_printf("auto_%02x:%02x.%01x",
643 pci_bus_num(pdev->bus),
644 PCI_SLOT(pdev->devfn),
645 PCI_FUNC(pdev->devfn));
648 pbdev = s390_pci_find_dev_by_target(dev->id);
649 if (!pbdev) {
650 pbdev = s390_pci_device_new(dev->id);
651 if (!pbdev) {
652 error_setg(errp, "create zpci device failed");
653 return;
657 if (object_dynamic_cast(OBJECT(dev), "vfio-pci")) {
658 pbdev->fh |= FH_SHM_VFIO;
659 } else {
660 pbdev->fh |= FH_SHM_EMUL;
663 pbdev->pdev = pdev;
664 pbdev->iommu = s->iommu[PCI_SLOT(pdev->devfn)];
665 pbdev->state = ZPCI_FS_STANDBY;
667 s390_pci_msix_init(pbdev);
668 s390_pci_setup_msix(pbdev);
670 if (dev->hotplugged) {
671 s390_pci_generate_plug_event(HP_EVENT_RESERVED_TO_STANDBY,
672 pbdev->fh, pbdev->fid);
674 } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) {
675 int idx;
677 pbdev = S390_PCI_DEVICE(dev);
678 for (idx = 0; idx < PCI_SLOT_MAX; idx++) {
679 if (!s->pbdev[idx]) {
680 s->pbdev[idx] = pbdev;
681 pbdev->fh = idx;
682 return;
686 error_setg(errp, "no slot for plugging zpci device");
690 static void s390_pcihost_timer_cb(void *opaque)
692 S390PCIBusDevice *pbdev = opaque;
694 if (pbdev->summary_ind) {
695 pci_dereg_irqs(pbdev);
697 if (pbdev->iommu_enabled) {
698 pci_dereg_ioat(pbdev);
701 pbdev->state = ZPCI_FS_STANDBY;
702 s390_pci_generate_plug_event(HP_EVENT_CONFIGURED_TO_STBRES,
703 pbdev->fh, pbdev->fid);
704 qdev_unplug(DEVICE(pbdev), NULL);
707 static void s390_pcihost_hot_unplug(HotplugHandler *hotplug_dev,
708 DeviceState *dev, Error **errp)
710 int i;
711 PCIDevice *pci_dev = NULL;
712 S390PCIBusDevice *pbdev = NULL;
713 S390pciState *s = s390_get_phb();
715 if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
716 pci_dev = PCI_DEVICE(dev);
718 for (i = 0 ; i < PCI_SLOT_MAX; i++) {
719 if (s->pbdev[i] && s->pbdev[i]->pdev == pci_dev) {
720 pbdev = s->pbdev[i];
721 break;
724 assert(pbdev != NULL);
725 } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) {
726 pbdev = S390_PCI_DEVICE(dev);
727 pci_dev = pbdev->pdev;
730 switch (pbdev->state) {
731 case ZPCI_FS_RESERVED:
732 goto out;
733 case ZPCI_FS_STANDBY:
734 break;
735 default:
736 s390_pci_generate_plug_event(HP_EVENT_DECONFIGURE_REQUEST,
737 pbdev->fh, pbdev->fid);
738 pbdev->release_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL,
739 s390_pcihost_timer_cb,
740 pbdev);
741 timer_mod(pbdev->release_timer,
742 qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + HOT_UNPLUG_TIMEOUT);
743 return;
746 if (pbdev->release_timer && timer_pending(pbdev->release_timer)) {
747 timer_del(pbdev->release_timer);
748 timer_free(pbdev->release_timer);
749 pbdev->release_timer = NULL;
752 s390_pci_generate_plug_event(HP_EVENT_STANDBY_TO_RESERVED,
753 pbdev->fh, pbdev->fid);
754 object_unparent(OBJECT(pci_dev));
755 s390_pci_msix_free(pbdev);
756 pbdev->pdev = NULL;
757 pbdev->state = ZPCI_FS_RESERVED;
758 out:
759 pbdev->fid = 0;
760 s->pbdev[pbdev->fh & FH_MASK_INDEX] = NULL;
761 object_unparent(OBJECT(pbdev));
764 static void s390_pcihost_class_init(ObjectClass *klass, void *data)
766 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
767 DeviceClass *dc = DEVICE_CLASS(klass);
768 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass);
770 dc->cannot_instantiate_with_device_add_yet = true;
771 k->init = s390_pcihost_init;
772 hc->plug = s390_pcihost_hot_plug;
773 hc->unplug = s390_pcihost_hot_unplug;
774 msi_nonbroken = true;
777 static const TypeInfo s390_pcihost_info = {
778 .name = TYPE_S390_PCI_HOST_BRIDGE,
779 .parent = TYPE_PCI_HOST_BRIDGE,
780 .instance_size = sizeof(S390pciState),
781 .class_init = s390_pcihost_class_init,
782 .interfaces = (InterfaceInfo[]) {
783 { TYPE_HOTPLUG_HANDLER },
788 static const TypeInfo s390_pcibus_info = {
789 .name = TYPE_S390_PCI_BUS,
790 .parent = TYPE_BUS,
791 .instance_size = sizeof(S390PCIBus),
794 static uint16_t s390_pci_generate_uid(void)
796 uint16_t uid = 0;
798 do {
799 uid++;
800 if (!s390_pci_find_dev_by_uid(uid)) {
801 return uid;
803 } while (uid < ZPCI_MAX_UID);
805 return UID_UNDEFINED;
808 static uint32_t s390_pci_generate_fid(Error **errp)
810 uint32_t fid = 0;
812 while (fid <= ZPCI_MAX_FID) {
813 if (!s390_pci_find_dev_by_fid(fid)) {
814 return fid;
817 if (fid == ZPCI_MAX_FID) {
818 break;
821 fid++;
824 error_setg(errp, "no free fid could be found");
825 return 0;
828 static void s390_pci_device_realize(DeviceState *dev, Error **errp)
830 S390PCIBusDevice *zpci = S390_PCI_DEVICE(dev);
832 if (!zpci->target) {
833 error_setg(errp, "target must be defined");
834 return;
837 if (s390_pci_find_dev_by_target(zpci->target)) {
838 error_setg(errp, "target %s already has an associated zpci device",
839 zpci->target);
840 return;
843 if (zpci->uid == UID_UNDEFINED) {
844 zpci->uid = s390_pci_generate_uid();
845 if (!zpci->uid) {
846 error_setg(errp, "no free uid could be found");
847 return;
849 } else if (s390_pci_find_dev_by_uid(zpci->uid)) {
850 error_setg(errp, "uid %u already in use", zpci->uid);
851 return;
854 if (!zpci->fid_defined) {
855 Error *local_error = NULL;
857 zpci->fid = s390_pci_generate_fid(&local_error);
858 if (local_error) {
859 error_propagate(errp, local_error);
860 return;
862 } else if (s390_pci_find_dev_by_fid(zpci->fid)) {
863 error_setg(errp, "fid %u already in use", zpci->fid);
864 return;
867 zpci->state = ZPCI_FS_RESERVED;
870 static void s390_pci_device_reset(DeviceState *dev)
872 S390PCIBusDevice *pbdev = S390_PCI_DEVICE(dev);
874 switch (pbdev->state) {
875 case ZPCI_FS_RESERVED:
876 return;
877 case ZPCI_FS_STANDBY:
878 break;
879 default:
880 pbdev->fh &= ~FH_MASK_ENABLE;
881 pbdev->state = ZPCI_FS_DISABLED;
882 break;
885 if (pbdev->summary_ind) {
886 pci_dereg_irqs(pbdev);
888 if (pbdev->iommu_enabled) {
889 pci_dereg_ioat(pbdev);
892 pbdev->fmb_addr = 0;
895 static void s390_pci_get_fid(Object *obj, Visitor *v, const char *name,
896 void *opaque, Error **errp)
898 Property *prop = opaque;
899 uint32_t *ptr = qdev_get_prop_ptr(DEVICE(obj), prop);
901 visit_type_uint32(v, name, ptr, errp);
904 static void s390_pci_set_fid(Object *obj, Visitor *v, const char *name,
905 void *opaque, Error **errp)
907 DeviceState *dev = DEVICE(obj);
908 S390PCIBusDevice *zpci = S390_PCI_DEVICE(obj);
909 Property *prop = opaque;
910 uint32_t *ptr = qdev_get_prop_ptr(dev, prop);
912 if (dev->realized) {
913 qdev_prop_set_after_realize(dev, name, errp);
914 return;
917 visit_type_uint32(v, name, ptr, errp);
918 zpci->fid_defined = true;
921 static PropertyInfo s390_pci_fid_propinfo = {
922 .name = "zpci_fid",
923 .get = s390_pci_get_fid,
924 .set = s390_pci_set_fid,
927 #define DEFINE_PROP_S390_PCI_FID(_n, _s, _f) \
928 DEFINE_PROP(_n, _s, _f, s390_pci_fid_propinfo, uint32_t)
930 static Property s390_pci_device_properties[] = {
931 DEFINE_PROP_UINT16("uid", S390PCIBusDevice, uid, UID_UNDEFINED),
932 DEFINE_PROP_S390_PCI_FID("fid", S390PCIBusDevice, fid),
933 DEFINE_PROP_STRING("target", S390PCIBusDevice, target),
934 DEFINE_PROP_END_OF_LIST(),
937 static void s390_pci_device_class_init(ObjectClass *klass, void *data)
939 DeviceClass *dc = DEVICE_CLASS(klass);
941 dc->desc = "zpci device";
942 dc->reset = s390_pci_device_reset;
943 dc->bus_type = TYPE_S390_PCI_BUS;
944 dc->realize = s390_pci_device_realize;
945 dc->props = s390_pci_device_properties;
948 static const TypeInfo s390_pci_device_info = {
949 .name = TYPE_S390_PCI_DEVICE,
950 .parent = TYPE_DEVICE,
951 .instance_size = sizeof(S390PCIBusDevice),
952 .class_init = s390_pci_device_class_init,
955 static void s390_pci_register_types(void)
957 type_register_static(&s390_pcihost_info);
958 type_register_static(&s390_pcibus_info);
959 type_register_static(&s390_pci_device_info);
962 type_init(s390_pci_register_types)