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meson: Merge trace_events_subdirs array
[qemu/ar7.git] / target / mips / msa_helper.c
blob1298a1917ce4dfa88e67bc88b81b9fcd444c85d5
1 /*
2 * MIPS SIMD Architecture Module Instruction emulation helpers for QEMU.
3 *
4 * Copyright (c) 2014 Imagination Technologies
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18 */
19
20 #include "qemu/osdep.h"
21 #include "cpu.h"
22 #include "internal.h"
23 #include "exec/exec-all.h"
24 #include "exec/helper-proto.h"
25 #include "exec/memop.h"
26 #include "fpu/softfloat.h"
27 #include "fpu_helper.h"
28
29 /* Data format min and max values */
30 #define DF_BITS(df) (1 << ((df) + 3))
31
32 #define DF_MAX_INT(df) (int64_t)((1LL << (DF_BITS(df) - 1)) - 1)
33 #define M_MAX_INT(m) (int64_t)((1LL << ((m) - 1)) - 1)
34
35 #define DF_MIN_INT(df) (int64_t)(-(1LL << (DF_BITS(df) - 1)))
36 #define M_MIN_INT(m) (int64_t)(-(1LL << ((m) - 1)))
37
38 #define DF_MAX_UINT(df) (uint64_t)(-1ULL >> (64 - DF_BITS(df)))
39 #define M_MAX_UINT(m) (uint64_t)(-1ULL >> (64 - (m)))
40
41 #define UNSIGNED(x, df) ((x) & DF_MAX_UINT(df))
42 #define SIGNED(x, df) \
43 ((((int64_t)x) << (64 - DF_BITS(df))) >> (64 - DF_BITS(df)))
44
45 /* Element-by-element access macros */
46 #define DF_ELEMENTS(df) (MSA_WRLEN / DF_BITS(df))
47
48
49
50 /*
51 * Bit Count
52 * ---------
53 *
54 * +---------------+----------------------------------------------------------+
55 * | NLOC.B | Vector Leading Ones Count (byte) |
56 * | NLOC.H | Vector Leading Ones Count (halfword) |
57 * | NLOC.W | Vector Leading Ones Count (word) |
58 * | NLOC.D | Vector Leading Ones Count (doubleword) |
59 * | NLZC.B | Vector Leading Zeros Count (byte) |
60 * | NLZC.H | Vector Leading Zeros Count (halfword) |
61 * | NLZC.W | Vector Leading Zeros Count (word) |
62 * | NLZC.D | Vector Leading Zeros Count (doubleword) |
63 * | PCNT.B | Vector Population Count (byte) |
64 * | PCNT.H | Vector Population Count (halfword) |
65 * | PCNT.W | Vector Population Count (word) |
66 * | PCNT.D | Vector Population Count (doubleword) |
67 * +---------------+----------------------------------------------------------+
68 */
69
70 static inline int64_t msa_nlzc_df(uint32_t df, int64_t arg)
71 {
72 uint64_t x, y;
73 int n, c;
74
75 x = UNSIGNED(arg, df);
76 n = DF_BITS(df);
77 c = DF_BITS(df) / 2;
78
79 do {
80 y = x >> c;
81 if (y != 0) {
82 n = n - c;
83 x = y;
84 }
85 c = c >> 1;
86 } while (c != 0);
87
88 return n - x;
89 }
90
91 static inline int64_t msa_nloc_df(uint32_t df, int64_t arg)
92 {
93 return msa_nlzc_df(df, UNSIGNED((~arg), df));
94 }
95
96 void helper_msa_nloc_b(CPUMIPSState *env, uint32_t wd, uint32_t ws)
97 {
98 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
99 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
100
101 pwd->b[0] = msa_nloc_df(DF_BYTE, pws->b[0]);
102 pwd->b[1] = msa_nloc_df(DF_BYTE, pws->b[1]);
103 pwd->b[2] = msa_nloc_df(DF_BYTE, pws->b[2]);
104 pwd->b[3] = msa_nloc_df(DF_BYTE, pws->b[3]);
105 pwd->b[4] = msa_nloc_df(DF_BYTE, pws->b[4]);
106 pwd->b[5] = msa_nloc_df(DF_BYTE, pws->b[5]);
107 pwd->b[6] = msa_nloc_df(DF_BYTE, pws->b[6]);
108 pwd->b[7] = msa_nloc_df(DF_BYTE, pws->b[7]);
109 pwd->b[8] = msa_nloc_df(DF_BYTE, pws->b[8]);
110 pwd->b[9] = msa_nloc_df(DF_BYTE, pws->b[9]);
111 pwd->b[10] = msa_nloc_df(DF_BYTE, pws->b[10]);
112 pwd->b[11] = msa_nloc_df(DF_BYTE, pws->b[11]);
113 pwd->b[12] = msa_nloc_df(DF_BYTE, pws->b[12]);
114 pwd->b[13] = msa_nloc_df(DF_BYTE, pws->b[13]);
115 pwd->b[14] = msa_nloc_df(DF_BYTE, pws->b[14]);
116 pwd->b[15] = msa_nloc_df(DF_BYTE, pws->b[15]);
117 }
118
119 void helper_msa_nloc_h(CPUMIPSState *env, uint32_t wd, uint32_t ws)
120 {
121 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
122 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
123
124 pwd->h[0] = msa_nloc_df(DF_HALF, pws->h[0]);
125 pwd->h[1] = msa_nloc_df(DF_HALF, pws->h[1]);
126 pwd->h[2] = msa_nloc_df(DF_HALF, pws->h[2]);
127 pwd->h[3] = msa_nloc_df(DF_HALF, pws->h[3]);
128 pwd->h[4] = msa_nloc_df(DF_HALF, pws->h[4]);
129 pwd->h[5] = msa_nloc_df(DF_HALF, pws->h[5]);
130 pwd->h[6] = msa_nloc_df(DF_HALF, pws->h[6]);
131 pwd->h[7] = msa_nloc_df(DF_HALF, pws->h[7]);
132 }
133
134 void helper_msa_nloc_w(CPUMIPSState *env, uint32_t wd, uint32_t ws)
135 {
136 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
137 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
138
139 pwd->w[0] = msa_nloc_df(DF_WORD, pws->w[0]);
140 pwd->w[1] = msa_nloc_df(DF_WORD, pws->w[1]);
141 pwd->w[2] = msa_nloc_df(DF_WORD, pws->w[2]);
142 pwd->w[3] = msa_nloc_df(DF_WORD, pws->w[3]);
143 }
144
145 void helper_msa_nloc_d(CPUMIPSState *env, uint32_t wd, uint32_t ws)
146 {
147 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
148 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
149
150 pwd->d[0] = msa_nloc_df(DF_DOUBLE, pws->d[0]);
151 pwd->d[1] = msa_nloc_df(DF_DOUBLE, pws->d[1]);
152 }
153
154 void helper_msa_nlzc_b(CPUMIPSState *env, uint32_t wd, uint32_t ws)
155 {
156 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
157 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
158
159 pwd->b[0] = msa_nlzc_df(DF_BYTE, pws->b[0]);
160 pwd->b[1] = msa_nlzc_df(DF_BYTE, pws->b[1]);
161 pwd->b[2] = msa_nlzc_df(DF_BYTE, pws->b[2]);
162 pwd->b[3] = msa_nlzc_df(DF_BYTE, pws->b[3]);
163 pwd->b[4] = msa_nlzc_df(DF_BYTE, pws->b[4]);
164 pwd->b[5] = msa_nlzc_df(DF_BYTE, pws->b[5]);
165 pwd->b[6] = msa_nlzc_df(DF_BYTE, pws->b[6]);
166 pwd->b[7] = msa_nlzc_df(DF_BYTE, pws->b[7]);
167 pwd->b[8] = msa_nlzc_df(DF_BYTE, pws->b[8]);
168 pwd->b[9] = msa_nlzc_df(DF_BYTE, pws->b[9]);
169 pwd->b[10] = msa_nlzc_df(DF_BYTE, pws->b[10]);
170 pwd->b[11] = msa_nlzc_df(DF_BYTE, pws->b[11]);
171 pwd->b[12] = msa_nlzc_df(DF_BYTE, pws->b[12]);
172 pwd->b[13] = msa_nlzc_df(DF_BYTE, pws->b[13]);
173 pwd->b[14] = msa_nlzc_df(DF_BYTE, pws->b[14]);
174 pwd->b[15] = msa_nlzc_df(DF_BYTE, pws->b[15]);
175 }
176
177 void helper_msa_nlzc_h(CPUMIPSState *env, uint32_t wd, uint32_t ws)
178 {
179 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
180 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
181
182 pwd->h[0] = msa_nlzc_df(DF_HALF, pws->h[0]);
183 pwd->h[1] = msa_nlzc_df(DF_HALF, pws->h[1]);
184 pwd->h[2] = msa_nlzc_df(DF_HALF, pws->h[2]);
185 pwd->h[3] = msa_nlzc_df(DF_HALF, pws->h[3]);
186 pwd->h[4] = msa_nlzc_df(DF_HALF, pws->h[4]);
187 pwd->h[5] = msa_nlzc_df(DF_HALF, pws->h[5]);
188 pwd->h[6] = msa_nlzc_df(DF_HALF, pws->h[6]);
189 pwd->h[7] = msa_nlzc_df(DF_HALF, pws->h[7]);
190 }
191
192 void helper_msa_nlzc_w(CPUMIPSState *env, uint32_t wd, uint32_t ws)
193 {
194 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
195 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
196
197 pwd->w[0] = msa_nlzc_df(DF_WORD, pws->w[0]);
198 pwd->w[1] = msa_nlzc_df(DF_WORD, pws->w[1]);
199 pwd->w[2] = msa_nlzc_df(DF_WORD, pws->w[2]);
200 pwd->w[3] = msa_nlzc_df(DF_WORD, pws->w[3]);
201 }
202
203 void helper_msa_nlzc_d(CPUMIPSState *env, uint32_t wd, uint32_t ws)
204 {
205 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
206 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
207
208 pwd->d[0] = msa_nlzc_df(DF_DOUBLE, pws->d[0]);
209 pwd->d[1] = msa_nlzc_df(DF_DOUBLE, pws->d[1]);
210 }
211
212 static inline int64_t msa_pcnt_df(uint32_t df, int64_t arg)
213 {
214 uint64_t x;
215
216 x = UNSIGNED(arg, df);
217
218 x = (x & 0x5555555555555555ULL) + ((x >> 1) & 0x5555555555555555ULL);
219 x = (x & 0x3333333333333333ULL) + ((x >> 2) & 0x3333333333333333ULL);
220 x = (x & 0x0F0F0F0F0F0F0F0FULL) + ((x >> 4) & 0x0F0F0F0F0F0F0F0FULL);
221 x = (x & 0x00FF00FF00FF00FFULL) + ((x >> 8) & 0x00FF00FF00FF00FFULL);
222 x = (x & 0x0000FFFF0000FFFFULL) + ((x >> 16) & 0x0000FFFF0000FFFFULL);
223 x = (x & 0x00000000FFFFFFFFULL) + ((x >> 32));
224
225 return x;
226 }
227
228 void helper_msa_pcnt_b(CPUMIPSState *env, uint32_t wd, uint32_t ws)
229 {
230 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
231 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
232
233 pwd->b[0] = msa_pcnt_df(DF_BYTE, pws->b[0]);
234 pwd->b[1] = msa_pcnt_df(DF_BYTE, pws->b[1]);
235 pwd->b[2] = msa_pcnt_df(DF_BYTE, pws->b[2]);
236 pwd->b[3] = msa_pcnt_df(DF_BYTE, pws->b[3]);
237 pwd->b[4] = msa_pcnt_df(DF_BYTE, pws->b[4]);
238 pwd->b[5] = msa_pcnt_df(DF_BYTE, pws->b[5]);
239 pwd->b[6] = msa_pcnt_df(DF_BYTE, pws->b[6]);
240 pwd->b[7] = msa_pcnt_df(DF_BYTE, pws->b[7]);
241 pwd->b[8] = msa_pcnt_df(DF_BYTE, pws->b[8]);
242 pwd->b[9] = msa_pcnt_df(DF_BYTE, pws->b[9]);
243 pwd->b[10] = msa_pcnt_df(DF_BYTE, pws->b[10]);
244 pwd->b[11] = msa_pcnt_df(DF_BYTE, pws->b[11]);
245 pwd->b[12] = msa_pcnt_df(DF_BYTE, pws->b[12]);
246 pwd->b[13] = msa_pcnt_df(DF_BYTE, pws->b[13]);
247 pwd->b[14] = msa_pcnt_df(DF_BYTE, pws->b[14]);
248 pwd->b[15] = msa_pcnt_df(DF_BYTE, pws->b[15]);
249 }
250
251 void helper_msa_pcnt_h(CPUMIPSState *env, uint32_t wd, uint32_t ws)
252 {
253 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
254 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
255
256 pwd->h[0] = msa_pcnt_df(DF_HALF, pws->h[0]);
257 pwd->h[1] = msa_pcnt_df(DF_HALF, pws->h[1]);
258 pwd->h[2] = msa_pcnt_df(DF_HALF, pws->h[2]);
259 pwd->h[3] = msa_pcnt_df(DF_HALF, pws->h[3]);
260 pwd->h[4] = msa_pcnt_df(DF_HALF, pws->h[4]);
261 pwd->h[5] = msa_pcnt_df(DF_HALF, pws->h[5]);
262 pwd->h[6] = msa_pcnt_df(DF_HALF, pws->h[6]);
263 pwd->h[7] = msa_pcnt_df(DF_HALF, pws->h[7]);
264 }
265
266 void helper_msa_pcnt_w(CPUMIPSState *env, uint32_t wd, uint32_t ws)
267 {
268 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
269 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
270
271 pwd->w[0] = msa_pcnt_df(DF_WORD, pws->w[0]);
272 pwd->w[1] = msa_pcnt_df(DF_WORD, pws->w[1]);
273 pwd->w[2] = msa_pcnt_df(DF_WORD, pws->w[2]);
274 pwd->w[3] = msa_pcnt_df(DF_WORD, pws->w[3]);
275 }
276
277 void helper_msa_pcnt_d(CPUMIPSState *env, uint32_t wd, uint32_t ws)
278 {
279 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
280 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
281
282 pwd->d[0] = msa_pcnt_df(DF_DOUBLE, pws->d[0]);
283 pwd->d[1] = msa_pcnt_df(DF_DOUBLE, pws->d[1]);
284 }
285
286
287 /*
288 * Bit Move
289 * --------
290 *
291 * +---------------+----------------------------------------------------------+
292 * | BINSL.B | Vector Bit Insert Left (byte) |
293 * | BINSL.H | Vector Bit Insert Left (halfword) |
294 * | BINSL.W | Vector Bit Insert Left (word) |
295 * | BINSL.D | Vector Bit Insert Left (doubleword) |
296 * | BINSR.B | Vector Bit Insert Right (byte) |
297 * | BINSR.H | Vector Bit Insert Right (halfword) |
298 * | BINSR.W | Vector Bit Insert Right (word) |
299 * | BINSR.D | Vector Bit Insert Right (doubleword) |
300 * | BMNZ.V | Vector Bit Move If Not Zero |
301 * | BMZ.V | Vector Bit Move If Zero |
302 * | BSEL.V | Vector Bit Select |
303 * +---------------+----------------------------------------------------------+
304 */
305
306 /* Data format bit position and unsigned values */
307 #define BIT_POSITION(x, df) ((uint64_t)(x) % DF_BITS(df))
308
309 static inline int64_t msa_binsl_df(uint32_t df,
310 int64_t dest, int64_t arg1, int64_t arg2)
311 {
312 uint64_t u_arg1 = UNSIGNED(arg1, df);
313 uint64_t u_dest = UNSIGNED(dest, df);
314 int32_t sh_d = BIT_POSITION(arg2, df) + 1;
315 int32_t sh_a = DF_BITS(df) - sh_d;
316 if (sh_d == DF_BITS(df)) {
317 return u_arg1;
318 } else {
319 return UNSIGNED(UNSIGNED(u_dest << sh_d, df) >> sh_d, df) |
320 UNSIGNED(UNSIGNED(u_arg1 >> sh_a, df) << sh_a, df);
321 }
322 }
323
324 void helper_msa_binsl_b(CPUMIPSState *env,
325 uint32_t wd, uint32_t ws, uint32_t wt)
326 {
327 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
328 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
329 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
330
331 pwd->b[0] = msa_binsl_df(DF_BYTE, pwd->b[0], pws->b[0], pwt->b[0]);
332 pwd->b[1] = msa_binsl_df(DF_BYTE, pwd->b[1], pws->b[1], pwt->b[1]);
333 pwd->b[2] = msa_binsl_df(DF_BYTE, pwd->b[2], pws->b[2], pwt->b[2]);
334 pwd->b[3] = msa_binsl_df(DF_BYTE, pwd->b[3], pws->b[3], pwt->b[3]);
335 pwd->b[4] = msa_binsl_df(DF_BYTE, pwd->b[4], pws->b[4], pwt->b[4]);
336 pwd->b[5] = msa_binsl_df(DF_BYTE, pwd->b[5], pws->b[5], pwt->b[5]);
337 pwd->b[6] = msa_binsl_df(DF_BYTE, pwd->b[6], pws->b[6], pwt->b[6]);
338 pwd->b[7] = msa_binsl_df(DF_BYTE, pwd->b[7], pws->b[7], pwt->b[7]);
339 pwd->b[8] = msa_binsl_df(DF_BYTE, pwd->b[8], pws->b[8], pwt->b[8]);
340 pwd->b[9] = msa_binsl_df(DF_BYTE, pwd->b[9], pws->b[9], pwt->b[9]);
341 pwd->b[10] = msa_binsl_df(DF_BYTE, pwd->b[10], pws->b[10], pwt->b[10]);
342 pwd->b[11] = msa_binsl_df(DF_BYTE, pwd->b[11], pws->b[11], pwt->b[11]);
343 pwd->b[12] = msa_binsl_df(DF_BYTE, pwd->b[12], pws->b[12], pwt->b[12]);
344 pwd->b[13] = msa_binsl_df(DF_BYTE, pwd->b[13], pws->b[13], pwt->b[13]);
345 pwd->b[14] = msa_binsl_df(DF_BYTE, pwd->b[14], pws->b[14], pwt->b[14]);
346 pwd->b[15] = msa_binsl_df(DF_BYTE, pwd->b[15], pws->b[15], pwt->b[15]);
347 }
348
349 void helper_msa_binsl_h(CPUMIPSState *env,
350 uint32_t wd, uint32_t ws, uint32_t wt)
351 {
352 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
353 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
354 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
355
356 pwd->h[0] = msa_binsl_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
357 pwd->h[1] = msa_binsl_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
358 pwd->h[2] = msa_binsl_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
359 pwd->h[3] = msa_binsl_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
360 pwd->h[4] = msa_binsl_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
361 pwd->h[5] = msa_binsl_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
362 pwd->h[6] = msa_binsl_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
363 pwd->h[7] = msa_binsl_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
364 }
365
366 void helper_msa_binsl_w(CPUMIPSState *env,
367 uint32_t wd, uint32_t ws, uint32_t wt)
368 {
369 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
370 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
371 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
372
373 pwd->w[0] = msa_binsl_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
374 pwd->w[1] = msa_binsl_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
375 pwd->w[2] = msa_binsl_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
376 pwd->w[3] = msa_binsl_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
377 }
378
379 void helper_msa_binsl_d(CPUMIPSState *env,
380 uint32_t wd, uint32_t ws, uint32_t wt)
381 {
382 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
383 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
384 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
385
386 pwd->d[0] = msa_binsl_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
387 pwd->d[1] = msa_binsl_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
388 }
389
390 static inline int64_t msa_binsr_df(uint32_t df,
391 int64_t dest, int64_t arg1, int64_t arg2)
392 {
393 uint64_t u_arg1 = UNSIGNED(arg1, df);
394 uint64_t u_dest = UNSIGNED(dest, df);
395 int32_t sh_d = BIT_POSITION(arg2, df) + 1;
396 int32_t sh_a = DF_BITS(df) - sh_d;
397 if (sh_d == DF_BITS(df)) {
398 return u_arg1;
399 } else {
400 return UNSIGNED(UNSIGNED(u_dest >> sh_d, df) << sh_d, df) |
401 UNSIGNED(UNSIGNED(u_arg1 << sh_a, df) >> sh_a, df);
402 }
403 }
404
405 void helper_msa_binsr_b(CPUMIPSState *env,
406 uint32_t wd, uint32_t ws, uint32_t wt)
407 {
408 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
409 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
410 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
411
412 pwd->b[0] = msa_binsr_df(DF_BYTE, pwd->b[0], pws->b[0], pwt->b[0]);
413 pwd->b[1] = msa_binsr_df(DF_BYTE, pwd->b[1], pws->b[1], pwt->b[1]);
414 pwd->b[2] = msa_binsr_df(DF_BYTE, pwd->b[2], pws->b[2], pwt->b[2]);
415 pwd->b[3] = msa_binsr_df(DF_BYTE, pwd->b[3], pws->b[3], pwt->b[3]);
416 pwd->b[4] = msa_binsr_df(DF_BYTE, pwd->b[4], pws->b[4], pwt->b[4]);
417 pwd->b[5] = msa_binsr_df(DF_BYTE, pwd->b[5], pws->b[5], pwt->b[5]);
418 pwd->b[6] = msa_binsr_df(DF_BYTE, pwd->b[6], pws->b[6], pwt->b[6]);
419 pwd->b[7] = msa_binsr_df(DF_BYTE, pwd->b[7], pws->b[7], pwt->b[7]);
420 pwd->b[8] = msa_binsr_df(DF_BYTE, pwd->b[8], pws->b[8], pwt->b[8]);
421 pwd->b[9] = msa_binsr_df(DF_BYTE, pwd->b[9], pws->b[9], pwt->b[9]);
422 pwd->b[10] = msa_binsr_df(DF_BYTE, pwd->b[10], pws->b[10], pwt->b[10]);
423 pwd->b[11] = msa_binsr_df(DF_BYTE, pwd->b[11], pws->b[11], pwt->b[11]);
424 pwd->b[12] = msa_binsr_df(DF_BYTE, pwd->b[12], pws->b[12], pwt->b[12]);
425 pwd->b[13] = msa_binsr_df(DF_BYTE, pwd->b[13], pws->b[13], pwt->b[13]);
426 pwd->b[14] = msa_binsr_df(DF_BYTE, pwd->b[14], pws->b[14], pwt->b[14]);
427 pwd->b[15] = msa_binsr_df(DF_BYTE, pwd->b[15], pws->b[15], pwt->b[15]);
428 }
429
430 void helper_msa_binsr_h(CPUMIPSState *env,
431 uint32_t wd, uint32_t ws, uint32_t wt)
432 {
433 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
434 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
435 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
436
437 pwd->h[0] = msa_binsr_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
438 pwd->h[1] = msa_binsr_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
439 pwd->h[2] = msa_binsr_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
440 pwd->h[3] = msa_binsr_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
441 pwd->h[4] = msa_binsr_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
442 pwd->h[5] = msa_binsr_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
443 pwd->h[6] = msa_binsr_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
444 pwd->h[7] = msa_binsr_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
445 }
446
447 void helper_msa_binsr_w(CPUMIPSState *env,
448 uint32_t wd, uint32_t ws, uint32_t wt)
449 {
450 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
451 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
452 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
453
454 pwd->w[0] = msa_binsr_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
455 pwd->w[1] = msa_binsr_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
456 pwd->w[2] = msa_binsr_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
457 pwd->w[3] = msa_binsr_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
458 }
459
460 void helper_msa_binsr_d(CPUMIPSState *env,
461 uint32_t wd, uint32_t ws, uint32_t wt)
462 {
463 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
464 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
465 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
466
467 pwd->d[0] = msa_binsr_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
468 pwd->d[1] = msa_binsr_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
469 }
470
471 void helper_msa_bmnz_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
472 {
473 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
474 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
475 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
476
477 pwd->d[0] = UNSIGNED( \
478 ((pwd->d[0] & (~pwt->d[0])) | (pws->d[0] & pwt->d[0])), DF_DOUBLE);
479 pwd->d[1] = UNSIGNED( \
480 ((pwd->d[1] & (~pwt->d[1])) | (pws->d[1] & pwt->d[1])), DF_DOUBLE);
481 }
482
483 void helper_msa_bmz_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
484 {
485 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
486 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
487 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
488
489 pwd->d[0] = UNSIGNED( \
490 ((pwd->d[0] & pwt->d[0]) | (pws->d[0] & (~pwt->d[0]))), DF_DOUBLE);
491 pwd->d[1] = UNSIGNED( \
492 ((pwd->d[1] & pwt->d[1]) | (pws->d[1] & (~pwt->d[1]))), DF_DOUBLE);
493 }
494
495 void helper_msa_bsel_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
496 {
497 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
498 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
499 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
500
501 pwd->d[0] = UNSIGNED( \
502 (pws->d[0] & (~pwd->d[0])) | (pwt->d[0] & pwd->d[0]), DF_DOUBLE);
503 pwd->d[1] = UNSIGNED( \
504 (pws->d[1] & (~pwd->d[1])) | (pwt->d[1] & pwd->d[1]), DF_DOUBLE);
505 }
506
507
508 /*
509 * Bit Set
510 * -------
511 *
512 * +---------------+----------------------------------------------------------+
513 * | BCLR.B | Vector Bit Clear (byte) |
514 * | BCLR.H | Vector Bit Clear (halfword) |
515 * | BCLR.W | Vector Bit Clear (word) |
516 * | BCLR.D | Vector Bit Clear (doubleword) |
517 * | BNEG.B | Vector Bit Negate (byte) |
518 * | BNEG.H | Vector Bit Negate (halfword) |
519 * | BNEG.W | Vector Bit Negate (word) |
520 * | BNEG.D | Vector Bit Negate (doubleword) |
521 * | BSET.B | Vector Bit Set (byte) |
522 * | BSET.H | Vector Bit Set (halfword) |
523 * | BSET.W | Vector Bit Set (word) |
524 * | BSET.D | Vector Bit Set (doubleword) |
525 * +---------------+----------------------------------------------------------+
526 */
527
528 static inline int64_t msa_bclr_df(uint32_t df, int64_t arg1, int64_t arg2)
529 {
530 int32_t b_arg2 = BIT_POSITION(arg2, df);
531 return UNSIGNED(arg1 & (~(1LL << b_arg2)), df);
532 }
533
534 void helper_msa_bclr_b(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
535 {
536 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
537 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
538 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
539
540 pwd->b[0] = msa_bclr_df(DF_BYTE, pws->b[0], pwt->b[0]);
541 pwd->b[1] = msa_bclr_df(DF_BYTE, pws->b[1], pwt->b[1]);
542 pwd->b[2] = msa_bclr_df(DF_BYTE, pws->b[2], pwt->b[2]);
543 pwd->b[3] = msa_bclr_df(DF_BYTE, pws->b[3], pwt->b[3]);
544 pwd->b[4] = msa_bclr_df(DF_BYTE, pws->b[4], pwt->b[4]);
545 pwd->b[5] = msa_bclr_df(DF_BYTE, pws->b[5], pwt->b[5]);
546 pwd->b[6] = msa_bclr_df(DF_BYTE, pws->b[6], pwt->b[6]);
547 pwd->b[7] = msa_bclr_df(DF_BYTE, pws->b[7], pwt->b[7]);
548 pwd->b[8] = msa_bclr_df(DF_BYTE, pws->b[8], pwt->b[8]);
549 pwd->b[9] = msa_bclr_df(DF_BYTE, pws->b[9], pwt->b[9]);
550 pwd->b[10] = msa_bclr_df(DF_BYTE, pws->b[10], pwt->b[10]);
551 pwd->b[11] = msa_bclr_df(DF_BYTE, pws->b[11], pwt->b[11]);
552 pwd->b[12] = msa_bclr_df(DF_BYTE, pws->b[12], pwt->b[12]);
553 pwd->b[13] = msa_bclr_df(DF_BYTE, pws->b[13], pwt->b[13]);
554 pwd->b[14] = msa_bclr_df(DF_BYTE, pws->b[14], pwt->b[14]);
555 pwd->b[15] = msa_bclr_df(DF_BYTE, pws->b[15], pwt->b[15]);
556 }
557
558 void helper_msa_bclr_h(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
559 {
560 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
561 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
562 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
563
564 pwd->h[0] = msa_bclr_df(DF_HALF, pws->h[0], pwt->h[0]);
565 pwd->h[1] = msa_bclr_df(DF_HALF, pws->h[1], pwt->h[1]);
566 pwd->h[2] = msa_bclr_df(DF_HALF, pws->h[2], pwt->h[2]);
567 pwd->h[3] = msa_bclr_df(DF_HALF, pws->h[3], pwt->h[3]);
568 pwd->h[4] = msa_bclr_df(DF_HALF, pws->h[4], pwt->h[4]);
569 pwd->h[5] = msa_bclr_df(DF_HALF, pws->h[5], pwt->h[5]);
570 pwd->h[6] = msa_bclr_df(DF_HALF, pws->h[6], pwt->h[6]);
571 pwd->h[7] = msa_bclr_df(DF_HALF, pws->h[7], pwt->h[7]);
572 }
573
574 void helper_msa_bclr_w(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
575 {
576 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
577 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
578 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
579
580 pwd->w[0] = msa_bclr_df(DF_WORD, pws->w[0], pwt->w[0]);
581 pwd->w[1] = msa_bclr_df(DF_WORD, pws->w[1], pwt->w[1]);
582 pwd->w[2] = msa_bclr_df(DF_WORD, pws->w[2], pwt->w[2]);
583 pwd->w[3] = msa_bclr_df(DF_WORD, pws->w[3], pwt->w[3]);
584 }
585
586 void helper_msa_bclr_d(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
587 {
588 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
589 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
590 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
591
592 pwd->d[0] = msa_bclr_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
593 pwd->d[1] = msa_bclr_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
594 }
595
596 static inline int64_t msa_bneg_df(uint32_t df, int64_t arg1, int64_t arg2)
597 {
598 int32_t b_arg2 = BIT_POSITION(arg2, df);
599 return UNSIGNED(arg1 ^ (1LL << b_arg2), df);
600 }
601
602 void helper_msa_bneg_b(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
603 {
604 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
605 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
606 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
607
608 pwd->b[0] = msa_bneg_df(DF_BYTE, pws->b[0], pwt->b[0]);
609 pwd->b[1] = msa_bneg_df(DF_BYTE, pws->b[1], pwt->b[1]);
610 pwd->b[2] = msa_bneg_df(DF_BYTE, pws->b[2], pwt->b[2]);
611 pwd->b[3] = msa_bneg_df(DF_BYTE, pws->b[3], pwt->b[3]);
612 pwd->b[4] = msa_bneg_df(DF_BYTE, pws->b[4], pwt->b[4]);
613 pwd->b[5] = msa_bneg_df(DF_BYTE, pws->b[5], pwt->b[5]);
614 pwd->b[6] = msa_bneg_df(DF_BYTE, pws->b[6], pwt->b[6]);
615 pwd->b[7] = msa_bneg_df(DF_BYTE, pws->b[7], pwt->b[7]);
616 pwd->b[8] = msa_bneg_df(DF_BYTE, pws->b[8], pwt->b[8]);
617 pwd->b[9] = msa_bneg_df(DF_BYTE, pws->b[9], pwt->b[9]);
618 pwd->b[10] = msa_bneg_df(DF_BYTE, pws->b[10], pwt->b[10]);
619 pwd->b[11] = msa_bneg_df(DF_BYTE, pws->b[11], pwt->b[11]);
620 pwd->b[12] = msa_bneg_df(DF_BYTE, pws->b[12], pwt->b[12]);
621 pwd->b[13] = msa_bneg_df(DF_BYTE, pws->b[13], pwt->b[13]);
622 pwd->b[14] = msa_bneg_df(DF_BYTE, pws->b[14], pwt->b[14]);
623 pwd->b[15] = msa_bneg_df(DF_BYTE, pws->b[15], pwt->b[15]);
624 }
625
626 void helper_msa_bneg_h(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
627 {
628 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
629 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
630 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
631
632 pwd->h[0] = msa_bneg_df(DF_HALF, pws->h[0], pwt->h[0]);
633 pwd->h[1] = msa_bneg_df(DF_HALF, pws->h[1], pwt->h[1]);
634 pwd->h[2] = msa_bneg_df(DF_HALF, pws->h[2], pwt->h[2]);
635 pwd->h[3] = msa_bneg_df(DF_HALF, pws->h[3], pwt->h[3]);
636 pwd->h[4] = msa_bneg_df(DF_HALF, pws->h[4], pwt->h[4]);
637 pwd->h[5] = msa_bneg_df(DF_HALF, pws->h[5], pwt->h[5]);
638 pwd->h[6] = msa_bneg_df(DF_HALF, pws->h[6], pwt->h[6]);
639 pwd->h[7] = msa_bneg_df(DF_HALF, pws->h[7], pwt->h[7]);
640 }
641
642 void helper_msa_bneg_w(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
643 {
644 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
645 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
646 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
647
648 pwd->w[0] = msa_bneg_df(DF_WORD, pws->w[0], pwt->w[0]);
649 pwd->w[1] = msa_bneg_df(DF_WORD, pws->w[1], pwt->w[1]);
650 pwd->w[2] = msa_bneg_df(DF_WORD, pws->w[2], pwt->w[2]);
651 pwd->w[3] = msa_bneg_df(DF_WORD, pws->w[3], pwt->w[3]);
652 }
653
654 void helper_msa_bneg_d(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
655 {
656 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
657 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
658 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
659
660 pwd->d[0] = msa_bneg_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
661 pwd->d[1] = msa_bneg_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
662 }
663
664 static inline int64_t msa_bset_df(uint32_t df, int64_t arg1,
665 int64_t arg2)
666 {
667 int32_t b_arg2 = BIT_POSITION(arg2, df);
668 return UNSIGNED(arg1 | (1LL << b_arg2), df);
669 }
670
671 void helper_msa_bset_b(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
672 {
673 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
674 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
675 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
676
677 pwd->b[0] = msa_bset_df(DF_BYTE, pws->b[0], pwt->b[0]);
678 pwd->b[1] = msa_bset_df(DF_BYTE, pws->b[1], pwt->b[1]);
679 pwd->b[2] = msa_bset_df(DF_BYTE, pws->b[2], pwt->b[2]);
680 pwd->b[3] = msa_bset_df(DF_BYTE, pws->b[3], pwt->b[3]);
681 pwd->b[4] = msa_bset_df(DF_BYTE, pws->b[4], pwt->b[4]);
682 pwd->b[5] = msa_bset_df(DF_BYTE, pws->b[5], pwt->b[5]);
683 pwd->b[6] = msa_bset_df(DF_BYTE, pws->b[6], pwt->b[6]);
684 pwd->b[7] = msa_bset_df(DF_BYTE, pws->b[7], pwt->b[7]);
685 pwd->b[8] = msa_bset_df(DF_BYTE, pws->b[8], pwt->b[8]);
686 pwd->b[9] = msa_bset_df(DF_BYTE, pws->b[9], pwt->b[9]);
687 pwd->b[10] = msa_bset_df(DF_BYTE, pws->b[10], pwt->b[10]);
688 pwd->b[11] = msa_bset_df(DF_BYTE, pws->b[11], pwt->b[11]);
689 pwd->b[12] = msa_bset_df(DF_BYTE, pws->b[12], pwt->b[12]);
690 pwd->b[13] = msa_bset_df(DF_BYTE, pws->b[13], pwt->b[13]);
691 pwd->b[14] = msa_bset_df(DF_BYTE, pws->b[14], pwt->b[14]);
692 pwd->b[15] = msa_bset_df(DF_BYTE, pws->b[15], pwt->b[15]);
693 }
694
695 void helper_msa_bset_h(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
696 {
697 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
698 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
699 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
700
701 pwd->h[0] = msa_bset_df(DF_HALF, pws->h[0], pwt->h[0]);
702 pwd->h[1] = msa_bset_df(DF_HALF, pws->h[1], pwt->h[1]);
703 pwd->h[2] = msa_bset_df(DF_HALF, pws->h[2], pwt->h[2]);
704 pwd->h[3] = msa_bset_df(DF_HALF, pws->h[3], pwt->h[3]);
705 pwd->h[4] = msa_bset_df(DF_HALF, pws->h[4], pwt->h[4]);
706 pwd->h[5] = msa_bset_df(DF_HALF, pws->h[5], pwt->h[5]);
707 pwd->h[6] = msa_bset_df(DF_HALF, pws->h[6], pwt->h[6]);
708 pwd->h[7] = msa_bset_df(DF_HALF, pws->h[7], pwt->h[7]);
709 }
710
711 void helper_msa_bset_w(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
712 {
713 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
714 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
715 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
716
717 pwd->w[0] = msa_bset_df(DF_WORD, pws->w[0], pwt->w[0]);
718 pwd->w[1] = msa_bset_df(DF_WORD, pws->w[1], pwt->w[1]);
719 pwd->w[2] = msa_bset_df(DF_WORD, pws->w[2], pwt->w[2]);
720 pwd->w[3] = msa_bset_df(DF_WORD, pws->w[3], pwt->w[3]);
721 }
722
723 void helper_msa_bset_d(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
724 {
725 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
726 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
727 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
728
729 pwd->d[0] = msa_bset_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
730 pwd->d[1] = msa_bset_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
731 }
732
733
734 /*
735 * Fixed Multiply
736 * --------------
737 *
738 * +---------------+----------------------------------------------------------+
739 * | MADD_Q.H | Vector Fixed-Point Multiply and Add (halfword) |
740 * | MADD_Q.W | Vector Fixed-Point Multiply and Add (word) |
741 * | MADDR_Q.H | Vector Fixed-Point Multiply and Add Rounded (halfword) |
742 * | MADDR_Q.W | Vector Fixed-Point Multiply and Add Rounded (word) |
743 * | MSUB_Q.H | Vector Fixed-Point Multiply and Subtr. (halfword) |
744 * | MSUB_Q.W | Vector Fixed-Point Multiply and Subtr. (word) |
745 * | MSUBR_Q.H | Vector Fixed-Point Multiply and Subtr. Rounded (halfword)|
746 * | MSUBR_Q.W | Vector Fixed-Point Multiply and Subtr. Rounded (word) |
747 * | MUL_Q.H | Vector Fixed-Point Multiply (halfword) |
748 * | MUL_Q.W | Vector Fixed-Point Multiply (word) |
749 * | MULR_Q.H | Vector Fixed-Point Multiply Rounded (halfword) |
750 * | MULR_Q.W | Vector Fixed-Point Multiply Rounded (word) |
751 * +---------------+----------------------------------------------------------+
752 */
753
754 /* TODO: insert Fixed Multiply group helpers here */
755
756
757 /*
758 * Float Max Min
759 * -------------
760 *
761 * +---------------+----------------------------------------------------------+
762 * | FMAX_A.W | Vector Floating-Point Maximum (Absolute) (word) |
763 * | FMAX_A.D | Vector Floating-Point Maximum (Absolute) (doubleword) |
764 * | FMAX.W | Vector Floating-Point Maximum (word) |
765 * | FMAX.D | Vector Floating-Point Maximum (doubleword) |
766 * | FMIN_A.W | Vector Floating-Point Minimum (Absolute) (word) |
767 * | FMIN_A.D | Vector Floating-Point Minimum (Absolute) (doubleword) |
768 * | FMIN.W | Vector Floating-Point Minimum (word) |
769 * | FMIN.D | Vector Floating-Point Minimum (doubleword) |
770 * +---------------+----------------------------------------------------------+
771 */
772
773 /* TODO: insert Float Max Min group helpers here */
774
775
776 /*
777 * Int Add
778 * -------
779 *
780 * +---------------+----------------------------------------------------------+
781 * | ADD_A.B | Vector Add Absolute Values (byte) |
782 * | ADD_A.H | Vector Add Absolute Values (halfword) |
783 * | ADD_A.W | Vector Add Absolute Values (word) |
784 * | ADD_A.D | Vector Add Absolute Values (doubleword) |
785 * | ADDS_A.B | Vector Signed Saturated Add (of Absolute) (byte) |
786 * | ADDS_A.H | Vector Signed Saturated Add (of Absolute) (halfword) |
787 * | ADDS_A.W | Vector Signed Saturated Add (of Absolute) (word) |
788 * | ADDS_A.D | Vector Signed Saturated Add (of Absolute) (doubleword) |
789 * | ADDS_S.B | Vector Signed Saturated Add (of Signed) (byte) |
790 * | ADDS_S.H | Vector Signed Saturated Add (of Signed) (halfword) |
791 * | ADDS_S.W | Vector Signed Saturated Add (of Signed) (word) |
792 * | ADDS_S.D | Vector Signed Saturated Add (of Signed) (doubleword) |
793 * | ADDS_U.B | Vector Unsigned Saturated Add (of Unsigned) (byte) |
794 * | ADDS_U.H | Vector Unsigned Saturated Add (of Unsigned) (halfword) |
795 * | ADDS_U.W | Vector Unsigned Saturated Add (of Unsigned) (word) |
796 * | ADDS_U.D | Vector Unsigned Saturated Add (of Unsigned) (doubleword) |
797 * | ADDV.B | Vector Add (byte) |
798 * | ADDV.H | Vector Add (halfword) |
799 * | ADDV.W | Vector Add (word) |
800 * | ADDV.D | Vector Add (doubleword) |
801 * | HADD_S.H | Vector Signed Horizontal Add (halfword) |
802 * | HADD_S.W | Vector Signed Horizontal Add (word) |
803 * | HADD_S.D | Vector Signed Horizontal Add (doubleword) |
804 * | HADD_U.H | Vector Unigned Horizontal Add (halfword) |
805 * | HADD_U.W | Vector Unigned Horizontal Add (word) |
806 * | HADD_U.D | Vector Unigned Horizontal Add (doubleword) |
807 * +---------------+----------------------------------------------------------+
808 */
809
810
811 static inline int64_t msa_add_a_df(uint32_t df, int64_t arg1, int64_t arg2)
812 {
813 uint64_t abs_arg1 = arg1 >= 0 ? arg1 : -arg1;
814 uint64_t abs_arg2 = arg2 >= 0 ? arg2 : -arg2;
815 return abs_arg1 + abs_arg2;
816 }
817
818 void helper_msa_add_a_b(CPUMIPSState *env,
819 uint32_t wd, uint32_t ws, uint32_t wt)
820 {
821 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
822 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
823 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
824
825 pwd->b[0] = msa_add_a_df(DF_BYTE, pws->b[0], pwt->b[0]);
826 pwd->b[1] = msa_add_a_df(DF_BYTE, pws->b[1], pwt->b[1]);
827 pwd->b[2] = msa_add_a_df(DF_BYTE, pws->b[2], pwt->b[2]);
828 pwd->b[3] = msa_add_a_df(DF_BYTE, pws->b[3], pwt->b[3]);
829 pwd->b[4] = msa_add_a_df(DF_BYTE, pws->b[4], pwt->b[4]);
830 pwd->b[5] = msa_add_a_df(DF_BYTE, pws->b[5], pwt->b[5]);
831 pwd->b[6] = msa_add_a_df(DF_BYTE, pws->b[6], pwt->b[6]);
832 pwd->b[7] = msa_add_a_df(DF_BYTE, pws->b[7], pwt->b[7]);
833 pwd->b[8] = msa_add_a_df(DF_BYTE, pws->b[8], pwt->b[8]);
834 pwd->b[9] = msa_add_a_df(DF_BYTE, pws->b[9], pwt->b[9]);
835 pwd->b[10] = msa_add_a_df(DF_BYTE, pws->b[10], pwt->b[10]);
836 pwd->b[11] = msa_add_a_df(DF_BYTE, pws->b[11], pwt->b[11]);
837 pwd->b[12] = msa_add_a_df(DF_BYTE, pws->b[12], pwt->b[12]);
838 pwd->b[13] = msa_add_a_df(DF_BYTE, pws->b[13], pwt->b[13]);
839 pwd->b[14] = msa_add_a_df(DF_BYTE, pws->b[14], pwt->b[14]);
840 pwd->b[15] = msa_add_a_df(DF_BYTE, pws->b[15], pwt->b[15]);
841 }
842
843 void helper_msa_add_a_h(CPUMIPSState *env,
844 uint32_t wd, uint32_t ws, uint32_t wt)
845 {
846 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
847 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
848 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
849
850 pwd->h[0] = msa_add_a_df(DF_HALF, pws->h[0], pwt->h[0]);
851 pwd->h[1] = msa_add_a_df(DF_HALF, pws->h[1], pwt->h[1]);
852 pwd->h[2] = msa_add_a_df(DF_HALF, pws->h[2], pwt->h[2]);
853 pwd->h[3] = msa_add_a_df(DF_HALF, pws->h[3], pwt->h[3]);
854 pwd->h[4] = msa_add_a_df(DF_HALF, pws->h[4], pwt->h[4]);
855 pwd->h[5] = msa_add_a_df(DF_HALF, pws->h[5], pwt->h[5]);
856 pwd->h[6] = msa_add_a_df(DF_HALF, pws->h[6], pwt->h[6]);
857 pwd->h[7] = msa_add_a_df(DF_HALF, pws->h[7], pwt->h[7]);
858 }
859
860 void helper_msa_add_a_w(CPUMIPSState *env,
861 uint32_t wd, uint32_t ws, uint32_t wt)
862 {
863 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
864 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
865 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
866
867 pwd->w[0] = msa_add_a_df(DF_WORD, pws->w[0], pwt->w[0]);
868 pwd->w[1] = msa_add_a_df(DF_WORD, pws->w[1], pwt->w[1]);
869 pwd->w[2] = msa_add_a_df(DF_WORD, pws->w[2], pwt->w[2]);
870 pwd->w[3] = msa_add_a_df(DF_WORD, pws->w[3], pwt->w[3]);
871 }
872
873 void helper_msa_add_a_d(CPUMIPSState *env,
874 uint32_t wd, uint32_t ws, uint32_t wt)
875 {
876 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
877 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
878 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
879
880 pwd->d[0] = msa_add_a_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
881 pwd->d[1] = msa_add_a_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
882 }
883
884
885 static inline int64_t msa_adds_a_df(uint32_t df, int64_t arg1, int64_t arg2)
886 {
887 uint64_t max_int = (uint64_t)DF_MAX_INT(df);
888 uint64_t abs_arg1 = arg1 >= 0 ? arg1 : -arg1;
889 uint64_t abs_arg2 = arg2 >= 0 ? arg2 : -arg2;
890 if (abs_arg1 > max_int || abs_arg2 > max_int) {
891 return (int64_t)max_int;
892 } else {
893 return (abs_arg1 < max_int - abs_arg2) ? abs_arg1 + abs_arg2 : max_int;
894 }
895 }
896
897 void helper_msa_adds_a_b(CPUMIPSState *env,
898 uint32_t wd, uint32_t ws, uint32_t wt)
899 {
900 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
901 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
902 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
903
904 pwd->b[0] = msa_adds_a_df(DF_BYTE, pws->b[0], pwt->b[0]);
905 pwd->b[1] = msa_adds_a_df(DF_BYTE, pws->b[1], pwt->b[1]);
906 pwd->b[2] = msa_adds_a_df(DF_BYTE, pws->b[2], pwt->b[2]);
907 pwd->b[3] = msa_adds_a_df(DF_BYTE, pws->b[3], pwt->b[3]);
908 pwd->b[4] = msa_adds_a_df(DF_BYTE, pws->b[4], pwt->b[4]);
909 pwd->b[5] = msa_adds_a_df(DF_BYTE, pws->b[5], pwt->b[5]);
910 pwd->b[6] = msa_adds_a_df(DF_BYTE, pws->b[6], pwt->b[6]);
911 pwd->b[7] = msa_adds_a_df(DF_BYTE, pws->b[7], pwt->b[7]);
912 pwd->b[8] = msa_adds_a_df(DF_BYTE, pws->b[8], pwt->b[8]);
913 pwd->b[9] = msa_adds_a_df(DF_BYTE, pws->b[9], pwt->b[9]);
914 pwd->b[10] = msa_adds_a_df(DF_BYTE, pws->b[10], pwt->b[10]);
915 pwd->b[11] = msa_adds_a_df(DF_BYTE, pws->b[11], pwt->b[11]);
916 pwd->b[12] = msa_adds_a_df(DF_BYTE, pws->b[12], pwt->b[12]);
917 pwd->b[13] = msa_adds_a_df(DF_BYTE, pws->b[13], pwt->b[13]);
918 pwd->b[14] = msa_adds_a_df(DF_BYTE, pws->b[14], pwt->b[14]);
919 pwd->b[15] = msa_adds_a_df(DF_BYTE, pws->b[15], pwt->b[15]);
920 }
921
922 void helper_msa_adds_a_h(CPUMIPSState *env,
923 uint32_t wd, uint32_t ws, uint32_t wt)
924 {
925 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
926 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
927 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
928
929 pwd->h[0] = msa_adds_a_df(DF_HALF, pws->h[0], pwt->h[0]);
930 pwd->h[1] = msa_adds_a_df(DF_HALF, pws->h[1], pwt->h[1]);
931 pwd->h[2] = msa_adds_a_df(DF_HALF, pws->h[2], pwt->h[2]);
932 pwd->h[3] = msa_adds_a_df(DF_HALF, pws->h[3], pwt->h[3]);
933 pwd->h[4] = msa_adds_a_df(DF_HALF, pws->h[4], pwt->h[4]);
934 pwd->h[5] = msa_adds_a_df(DF_HALF, pws->h[5], pwt->h[5]);
935 pwd->h[6] = msa_adds_a_df(DF_HALF, pws->h[6], pwt->h[6]);
936 pwd->h[7] = msa_adds_a_df(DF_HALF, pws->h[7], pwt->h[7]);
937 }
938
939 void helper_msa_adds_a_w(CPUMIPSState *env,
940 uint32_t wd, uint32_t ws, uint32_t wt)
941 {
942 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
943 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
944 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
945
946 pwd->w[0] = msa_adds_a_df(DF_WORD, pws->w[0], pwt->w[0]);
947 pwd->w[1] = msa_adds_a_df(DF_WORD, pws->w[1], pwt->w[1]);
948 pwd->w[2] = msa_adds_a_df(DF_WORD, pws->w[2], pwt->w[2]);
949 pwd->w[3] = msa_adds_a_df(DF_WORD, pws->w[3], pwt->w[3]);
950 }
951
952 void helper_msa_adds_a_d(CPUMIPSState *env,
953 uint32_t wd, uint32_t ws, uint32_t wt)
954 {
955 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
956 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
957 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
958
959 pwd->d[0] = msa_adds_a_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
960 pwd->d[1] = msa_adds_a_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
961 }
962
963
964 static inline int64_t msa_adds_s_df(uint32_t df, int64_t arg1, int64_t arg2)
965 {
966 int64_t max_int = DF_MAX_INT(df);
967 int64_t min_int = DF_MIN_INT(df);
968 if (arg1 < 0) {
969 return (min_int - arg1 < arg2) ? arg1 + arg2 : min_int;
970 } else {
971 return (arg2 < max_int - arg1) ? arg1 + arg2 : max_int;
972 }
973 }
974
975 void helper_msa_adds_s_b(CPUMIPSState *env,
976 uint32_t wd, uint32_t ws, uint32_t wt)
977 {
978 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
979 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
980 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
981
982 pwd->b[0] = msa_adds_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
983 pwd->b[1] = msa_adds_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
984 pwd->b[2] = msa_adds_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
985 pwd->b[3] = msa_adds_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
986 pwd->b[4] = msa_adds_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
987 pwd->b[5] = msa_adds_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
988 pwd->b[6] = msa_adds_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
989 pwd->b[7] = msa_adds_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
990 pwd->b[8] = msa_adds_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
991 pwd->b[9] = msa_adds_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
992 pwd->b[10] = msa_adds_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
993 pwd->b[11] = msa_adds_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
994 pwd->b[12] = msa_adds_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
995 pwd->b[13] = msa_adds_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
996 pwd->b[14] = msa_adds_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
997 pwd->b[15] = msa_adds_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
998 }
999
1000 void helper_msa_adds_s_h(CPUMIPSState *env,
1001 uint32_t wd, uint32_t ws, uint32_t wt)
1002 {
1003 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1004 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1005 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1006
1007 pwd->h[0] = msa_adds_s_df(DF_HALF, pws->h[0], pwt->h[0]);
1008 pwd->h[1] = msa_adds_s_df(DF_HALF, pws->h[1], pwt->h[1]);
1009 pwd->h[2] = msa_adds_s_df(DF_HALF, pws->h[2], pwt->h[2]);
1010 pwd->h[3] = msa_adds_s_df(DF_HALF, pws->h[3], pwt->h[3]);
1011 pwd->h[4] = msa_adds_s_df(DF_HALF, pws->h[4], pwt->h[4]);
1012 pwd->h[5] = msa_adds_s_df(DF_HALF, pws->h[5], pwt->h[5]);
1013 pwd->h[6] = msa_adds_s_df(DF_HALF, pws->h[6], pwt->h[6]);
1014 pwd->h[7] = msa_adds_s_df(DF_HALF, pws->h[7], pwt->h[7]);
1015 }
1016
1017 void helper_msa_adds_s_w(CPUMIPSState *env,
1018 uint32_t wd, uint32_t ws, uint32_t wt)
1019 {
1020 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1021 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1022 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1023
1024 pwd->w[0] = msa_adds_s_df(DF_WORD, pws->w[0], pwt->w[0]);
1025 pwd->w[1] = msa_adds_s_df(DF_WORD, pws->w[1], pwt->w[1]);
1026 pwd->w[2] = msa_adds_s_df(DF_WORD, pws->w[2], pwt->w[2]);
1027 pwd->w[3] = msa_adds_s_df(DF_WORD, pws->w[3], pwt->w[3]);
1028 }
1029
1030 void helper_msa_adds_s_d(CPUMIPSState *env,
1031 uint32_t wd, uint32_t ws, uint32_t wt)
1032 {
1033 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1034 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1035 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1036
1037 pwd->d[0] = msa_adds_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1038 pwd->d[1] = msa_adds_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1039 }
1040
1041
1042 static inline uint64_t msa_adds_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
1043 {
1044 uint64_t max_uint = DF_MAX_UINT(df);
1045 uint64_t u_arg1 = UNSIGNED(arg1, df);
1046 uint64_t u_arg2 = UNSIGNED(arg2, df);
1047 return (u_arg1 < max_uint - u_arg2) ? u_arg1 + u_arg2 : max_uint;
1048 }
1049
1050 void helper_msa_adds_u_b(CPUMIPSState *env,
1051 uint32_t wd, uint32_t ws, uint32_t wt)
1052 {
1053 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1054 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1055 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1056
1057 pwd->b[0] = msa_adds_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
1058 pwd->b[1] = msa_adds_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
1059 pwd->b[2] = msa_adds_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
1060 pwd->b[3] = msa_adds_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
1061 pwd->b[4] = msa_adds_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
1062 pwd->b[5] = msa_adds_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
1063 pwd->b[6] = msa_adds_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
1064 pwd->b[7] = msa_adds_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
1065 pwd->b[8] = msa_adds_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
1066 pwd->b[9] = msa_adds_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
1067 pwd->b[10] = msa_adds_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
1068 pwd->b[11] = msa_adds_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
1069 pwd->b[12] = msa_adds_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
1070 pwd->b[13] = msa_adds_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
1071 pwd->b[14] = msa_adds_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
1072 pwd->b[15] = msa_adds_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
1073 }
1074
1075 void helper_msa_adds_u_h(CPUMIPSState *env,
1076 uint32_t wd, uint32_t ws, uint32_t wt)
1077 {
1078 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1079 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1080 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1081
1082 pwd->h[0] = msa_adds_u_df(DF_HALF, pws->h[0], pwt->h[0]);
1083 pwd->h[1] = msa_adds_u_df(DF_HALF, pws->h[1], pwt->h[1]);
1084 pwd->h[2] = msa_adds_u_df(DF_HALF, pws->h[2], pwt->h[2]);
1085 pwd->h[3] = msa_adds_u_df(DF_HALF, pws->h[3], pwt->h[3]);
1086 pwd->h[4] = msa_adds_u_df(DF_HALF, pws->h[4], pwt->h[4]);
1087 pwd->h[5] = msa_adds_u_df(DF_HALF, pws->h[5], pwt->h[5]);
1088 pwd->h[6] = msa_adds_u_df(DF_HALF, pws->h[6], pwt->h[6]);
1089 pwd->h[7] = msa_adds_u_df(DF_HALF, pws->h[7], pwt->h[7]);
1090 }
1091
1092 void helper_msa_adds_u_w(CPUMIPSState *env,
1093 uint32_t wd, uint32_t ws, uint32_t wt)
1094 {
1095 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1096 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1097 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1098
1099 pwd->w[0] = msa_adds_u_df(DF_WORD, pws->w[0], pwt->w[0]);
1100 pwd->w[1] = msa_adds_u_df(DF_WORD, pws->w[1], pwt->w[1]);
1101 pwd->w[2] = msa_adds_u_df(DF_WORD, pws->w[2], pwt->w[2]);
1102 pwd->w[3] = msa_adds_u_df(DF_WORD, pws->w[3], pwt->w[3]);
1103 }
1104
1105 void helper_msa_adds_u_d(CPUMIPSState *env,
1106 uint32_t wd, uint32_t ws, uint32_t wt)
1107 {
1108 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1109 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1110 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1111
1112 pwd->d[0] = msa_adds_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1113 pwd->d[1] = msa_adds_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1114 }
1115
1116
1117 static inline int64_t msa_addv_df(uint32_t df, int64_t arg1, int64_t arg2)
1118 {
1119 return arg1 + arg2;
1120 }
1121
1122 void helper_msa_addv_b(CPUMIPSState *env,
1123 uint32_t wd, uint32_t ws, uint32_t wt)
1124 {
1125 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1126 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1127 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1128
1129 pwd->b[0] = msa_addv_df(DF_BYTE, pws->b[0], pwt->b[0]);
1130 pwd->b[1] = msa_addv_df(DF_BYTE, pws->b[1], pwt->b[1]);
1131 pwd->b[2] = msa_addv_df(DF_BYTE, pws->b[2], pwt->b[2]);
1132 pwd->b[3] = msa_addv_df(DF_BYTE, pws->b[3], pwt->b[3]);
1133 pwd->b[4] = msa_addv_df(DF_BYTE, pws->b[4], pwt->b[4]);
1134 pwd->b[5] = msa_addv_df(DF_BYTE, pws->b[5], pwt->b[5]);
1135 pwd->b[6] = msa_addv_df(DF_BYTE, pws->b[6], pwt->b[6]);
1136 pwd->b[7] = msa_addv_df(DF_BYTE, pws->b[7], pwt->b[7]);
1137 pwd->b[8] = msa_addv_df(DF_BYTE, pws->b[8], pwt->b[8]);
1138 pwd->b[9] = msa_addv_df(DF_BYTE, pws->b[9], pwt->b[9]);
1139 pwd->b[10] = msa_addv_df(DF_BYTE, pws->b[10], pwt->b[10]);
1140 pwd->b[11] = msa_addv_df(DF_BYTE, pws->b[11], pwt->b[11]);
1141 pwd->b[12] = msa_addv_df(DF_BYTE, pws->b[12], pwt->b[12]);
1142 pwd->b[13] = msa_addv_df(DF_BYTE, pws->b[13], pwt->b[13]);
1143 pwd->b[14] = msa_addv_df(DF_BYTE, pws->b[14], pwt->b[14]);
1144 pwd->b[15] = msa_addv_df(DF_BYTE, pws->b[15], pwt->b[15]);
1145 }
1146
1147 void helper_msa_addv_h(CPUMIPSState *env,
1148 uint32_t wd, uint32_t ws, uint32_t wt)
1149 {
1150 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1151 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1152 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1153
1154 pwd->h[0] = msa_addv_df(DF_HALF, pws->h[0], pwt->h[0]);
1155 pwd->h[1] = msa_addv_df(DF_HALF, pws->h[1], pwt->h[1]);
1156 pwd->h[2] = msa_addv_df(DF_HALF, pws->h[2], pwt->h[2]);
1157 pwd->h[3] = msa_addv_df(DF_HALF, pws->h[3], pwt->h[3]);
1158 pwd->h[4] = msa_addv_df(DF_HALF, pws->h[4], pwt->h[4]);
1159 pwd->h[5] = msa_addv_df(DF_HALF, pws->h[5], pwt->h[5]);
1160 pwd->h[6] = msa_addv_df(DF_HALF, pws->h[6], pwt->h[6]);
1161 pwd->h[7] = msa_addv_df(DF_HALF, pws->h[7], pwt->h[7]);
1162 }
1163
1164 void helper_msa_addv_w(CPUMIPSState *env,
1165 uint32_t wd, uint32_t ws, uint32_t wt)
1166 {
1167 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1168 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1169 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1170
1171 pwd->w[0] = msa_addv_df(DF_WORD, pws->w[0], pwt->w[0]);
1172 pwd->w[1] = msa_addv_df(DF_WORD, pws->w[1], pwt->w[1]);
1173 pwd->w[2] = msa_addv_df(DF_WORD, pws->w[2], pwt->w[2]);
1174 pwd->w[3] = msa_addv_df(DF_WORD, pws->w[3], pwt->w[3]);
1175 }
1176
1177 void helper_msa_addv_d(CPUMIPSState *env,
1178 uint32_t wd, uint32_t ws, uint32_t wt)
1179 {
1180 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1181 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1182 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1183
1184 pwd->d[0] = msa_addv_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1185 pwd->d[1] = msa_addv_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1186 }
1187
1188
1189 #define SIGNED_EVEN(a, df) \
1190 ((((int64_t)(a)) << (64 - DF_BITS(df) / 2)) >> (64 - DF_BITS(df) / 2))
1191
1192 #define UNSIGNED_EVEN(a, df) \
1193 ((((uint64_t)(a)) << (64 - DF_BITS(df) / 2)) >> (64 - DF_BITS(df) / 2))
1194
1195 #define SIGNED_ODD(a, df) \
1196 ((((int64_t)(a)) << (64 - DF_BITS(df))) >> (64 - DF_BITS(df) / 2))
1197
1198 #define UNSIGNED_ODD(a, df) \
1199 ((((uint64_t)(a)) << (64 - DF_BITS(df))) >> (64 - DF_BITS(df) / 2))
1200
1201
1202 static inline int64_t msa_hadd_s_df(uint32_t df, int64_t arg1, int64_t arg2)
1203 {
1204 return SIGNED_ODD(arg1, df) + SIGNED_EVEN(arg2, df);
1205 }
1206
1207 void helper_msa_hadd_s_h(CPUMIPSState *env,
1208 uint32_t wd, uint32_t ws, uint32_t wt)
1209 {
1210 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1211 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1212 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1213
1214 pwd->h[0] = msa_hadd_s_df(DF_HALF, pws->h[0], pwt->h[0]);
1215 pwd->h[1] = msa_hadd_s_df(DF_HALF, pws->h[1], pwt->h[1]);
1216 pwd->h[2] = msa_hadd_s_df(DF_HALF, pws->h[2], pwt->h[2]);
1217 pwd->h[3] = msa_hadd_s_df(DF_HALF, pws->h[3], pwt->h[3]);
1218 pwd->h[4] = msa_hadd_s_df(DF_HALF, pws->h[4], pwt->h[4]);
1219 pwd->h[5] = msa_hadd_s_df(DF_HALF, pws->h[5], pwt->h[5]);
1220 pwd->h[6] = msa_hadd_s_df(DF_HALF, pws->h[6], pwt->h[6]);
1221 pwd->h[7] = msa_hadd_s_df(DF_HALF, pws->h[7], pwt->h[7]);
1222 }
1223
1224 void helper_msa_hadd_s_w(CPUMIPSState *env,
1225 uint32_t wd, uint32_t ws, uint32_t wt)
1226 {
1227 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1228 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1229 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1230
1231 pwd->w[0] = msa_hadd_s_df(DF_WORD, pws->w[0], pwt->w[0]);
1232 pwd->w[1] = msa_hadd_s_df(DF_WORD, pws->w[1], pwt->w[1]);
1233 pwd->w[2] = msa_hadd_s_df(DF_WORD, pws->w[2], pwt->w[2]);
1234 pwd->w[3] = msa_hadd_s_df(DF_WORD, pws->w[3], pwt->w[3]);
1235 }
1236
1237 void helper_msa_hadd_s_d(CPUMIPSState *env,
1238 uint32_t wd, uint32_t ws, uint32_t wt)
1239 {
1240 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1241 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1242 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1243
1244 pwd->d[0] = msa_hadd_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1245 pwd->d[1] = msa_hadd_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1246 }
1247
1248
1249 static inline int64_t msa_hadd_u_df(uint32_t df, int64_t arg1, int64_t arg2)
1250 {
1251 return UNSIGNED_ODD(arg1, df) + UNSIGNED_EVEN(arg2, df);
1252 }
1253
1254 void helper_msa_hadd_u_h(CPUMIPSState *env,
1255 uint32_t wd, uint32_t ws, uint32_t wt)
1256 {
1257 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1258 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1259 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1260
1261 pwd->h[0] = msa_hadd_u_df(DF_HALF, pws->h[0], pwt->h[0]);
1262 pwd->h[1] = msa_hadd_u_df(DF_HALF, pws->h[1], pwt->h[1]);
1263 pwd->h[2] = msa_hadd_u_df(DF_HALF, pws->h[2], pwt->h[2]);
1264 pwd->h[3] = msa_hadd_u_df(DF_HALF, pws->h[3], pwt->h[3]);
1265 pwd->h[4] = msa_hadd_u_df(DF_HALF, pws->h[4], pwt->h[4]);
1266 pwd->h[5] = msa_hadd_u_df(DF_HALF, pws->h[5], pwt->h[5]);
1267 pwd->h[6] = msa_hadd_u_df(DF_HALF, pws->h[6], pwt->h[6]);
1268 pwd->h[7] = msa_hadd_u_df(DF_HALF, pws->h[7], pwt->h[7]);
1269 }
1270
1271 void helper_msa_hadd_u_w(CPUMIPSState *env,
1272 uint32_t wd, uint32_t ws, uint32_t wt)
1273 {
1274 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1275 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1276 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1277
1278 pwd->w[0] = msa_hadd_u_df(DF_WORD, pws->w[0], pwt->w[0]);
1279 pwd->w[1] = msa_hadd_u_df(DF_WORD, pws->w[1], pwt->w[1]);
1280 pwd->w[2] = msa_hadd_u_df(DF_WORD, pws->w[2], pwt->w[2]);
1281 pwd->w[3] = msa_hadd_u_df(DF_WORD, pws->w[3], pwt->w[3]);
1282 }
1283
1284 void helper_msa_hadd_u_d(CPUMIPSState *env,
1285 uint32_t wd, uint32_t ws, uint32_t wt)
1286 {
1287 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1288 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1289 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1290
1291 pwd->d[0] = msa_hadd_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1292 pwd->d[1] = msa_hadd_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1293 }
1294
1295
1296 /*
1297 * Int Average
1298 * -----------
1299 *
1300 * +---------------+----------------------------------------------------------+
1301 * | AVE_S.B | Vector Signed Average (byte) |
1302 * | AVE_S.H | Vector Signed Average (halfword) |
1303 * | AVE_S.W | Vector Signed Average (word) |
1304 * | AVE_S.D | Vector Signed Average (doubleword) |
1305 * | AVE_U.B | Vector Unsigned Average (byte) |
1306 * | AVE_U.H | Vector Unsigned Average (halfword) |
1307 * | AVE_U.W | Vector Unsigned Average (word) |
1308 * | AVE_U.D | Vector Unsigned Average (doubleword) |
1309 * | AVER_S.B | Vector Signed Average Rounded (byte) |
1310 * | AVER_S.H | Vector Signed Average Rounded (halfword) |
1311 * | AVER_S.W | Vector Signed Average Rounded (word) |
1312 * | AVER_S.D | Vector Signed Average Rounded (doubleword) |
1313 * | AVER_U.B | Vector Unsigned Average Rounded (byte) |
1314 * | AVER_U.H | Vector Unsigned Average Rounded (halfword) |
1315 * | AVER_U.W | Vector Unsigned Average Rounded (word) |
1316 * | AVER_U.D | Vector Unsigned Average Rounded (doubleword) |
1317 * +---------------+----------------------------------------------------------+
1318 */
1319
1320 static inline int64_t msa_ave_s_df(uint32_t df, int64_t arg1, int64_t arg2)
1321 {
1322 /* signed shift */
1323 return (arg1 >> 1) + (arg2 >> 1) + (arg1 & arg2 & 1);
1324 }
1325
1326 void helper_msa_ave_s_b(CPUMIPSState *env,
1327 uint32_t wd, uint32_t ws, uint32_t wt)
1328 {
1329 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1330 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1331 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1332
1333 pwd->b[0] = msa_ave_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
1334 pwd->b[1] = msa_ave_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
1335 pwd->b[2] = msa_ave_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
1336 pwd->b[3] = msa_ave_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
1337 pwd->b[4] = msa_ave_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
1338 pwd->b[5] = msa_ave_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
1339 pwd->b[6] = msa_ave_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
1340 pwd->b[7] = msa_ave_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
1341 pwd->b[8] = msa_ave_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
1342 pwd->b[9] = msa_ave_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
1343 pwd->b[10] = msa_ave_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
1344 pwd->b[11] = msa_ave_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
1345 pwd->b[12] = msa_ave_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
1346 pwd->b[13] = msa_ave_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
1347 pwd->b[14] = msa_ave_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
1348 pwd->b[15] = msa_ave_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
1349 }
1350
1351 void helper_msa_ave_s_h(CPUMIPSState *env,
1352 uint32_t wd, uint32_t ws, uint32_t wt)
1353 {
1354 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1355 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1356 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1357
1358 pwd->h[0] = msa_ave_s_df(DF_HALF, pws->h[0], pwt->h[0]);
1359 pwd->h[1] = msa_ave_s_df(DF_HALF, pws->h[1], pwt->h[1]);
1360 pwd->h[2] = msa_ave_s_df(DF_HALF, pws->h[2], pwt->h[2]);
1361 pwd->h[3] = msa_ave_s_df(DF_HALF, pws->h[3], pwt->h[3]);
1362 pwd->h[4] = msa_ave_s_df(DF_HALF, pws->h[4], pwt->h[4]);
1363 pwd->h[5] = msa_ave_s_df(DF_HALF, pws->h[5], pwt->h[5]);
1364 pwd->h[6] = msa_ave_s_df(DF_HALF, pws->h[6], pwt->h[6]);
1365 pwd->h[7] = msa_ave_s_df(DF_HALF, pws->h[7], pwt->h[7]);
1366 }
1367
1368 void helper_msa_ave_s_w(CPUMIPSState *env,
1369 uint32_t wd, uint32_t ws, uint32_t wt)
1370 {
1371 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1372 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1373 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1374
1375 pwd->w[0] = msa_ave_s_df(DF_WORD, pws->w[0], pwt->w[0]);
1376 pwd->w[1] = msa_ave_s_df(DF_WORD, pws->w[1], pwt->w[1]);
1377 pwd->w[2] = msa_ave_s_df(DF_WORD, pws->w[2], pwt->w[2]);
1378 pwd->w[3] = msa_ave_s_df(DF_WORD, pws->w[3], pwt->w[3]);
1379 }
1380
1381 void helper_msa_ave_s_d(CPUMIPSState *env,
1382 uint32_t wd, uint32_t ws, uint32_t wt)
1383 {
1384 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1385 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1386 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1387
1388 pwd->d[0] = msa_ave_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1389 pwd->d[1] = msa_ave_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1390 }
1391
1392 static inline uint64_t msa_ave_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
1393 {
1394 uint64_t u_arg1 = UNSIGNED(arg1, df);
1395 uint64_t u_arg2 = UNSIGNED(arg2, df);
1396 /* unsigned shift */
1397 return (u_arg1 >> 1) + (u_arg2 >> 1) + (u_arg1 & u_arg2 & 1);
1398 }
1399
1400 void helper_msa_ave_u_b(CPUMIPSState *env,
1401 uint32_t wd, uint32_t ws, uint32_t wt)
1402 {
1403 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1404 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1405 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1406
1407 pwd->b[0] = msa_ave_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
1408 pwd->b[1] = msa_ave_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
1409 pwd->b[2] = msa_ave_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
1410 pwd->b[3] = msa_ave_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
1411 pwd->b[4] = msa_ave_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
1412 pwd->b[5] = msa_ave_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
1413 pwd->b[6] = msa_ave_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
1414 pwd->b[7] = msa_ave_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
1415 pwd->b[8] = msa_ave_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
1416 pwd->b[9] = msa_ave_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
1417 pwd->b[10] = msa_ave_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
1418 pwd->b[11] = msa_ave_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
1419 pwd->b[12] = msa_ave_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
1420 pwd->b[13] = msa_ave_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
1421 pwd->b[14] = msa_ave_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
1422 pwd->b[15] = msa_ave_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
1423 }
1424
1425 void helper_msa_ave_u_h(CPUMIPSState *env,
1426 uint32_t wd, uint32_t ws, uint32_t wt)
1427 {
1428 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1429 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1430 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1431
1432 pwd->h[0] = msa_ave_u_df(DF_HALF, pws->h[0], pwt->h[0]);
1433 pwd->h[1] = msa_ave_u_df(DF_HALF, pws->h[1], pwt->h[1]);
1434 pwd->h[2] = msa_ave_u_df(DF_HALF, pws->h[2], pwt->h[2]);
1435 pwd->h[3] = msa_ave_u_df(DF_HALF, pws->h[3], pwt->h[3]);
1436 pwd->h[4] = msa_ave_u_df(DF_HALF, pws->h[4], pwt->h[4]);
1437 pwd->h[5] = msa_ave_u_df(DF_HALF, pws->h[5], pwt->h[5]);
1438 pwd->h[6] = msa_ave_u_df(DF_HALF, pws->h[6], pwt->h[6]);
1439 pwd->h[7] = msa_ave_u_df(DF_HALF, pws->h[7], pwt->h[7]);
1440 }
1441
1442 void helper_msa_ave_u_w(CPUMIPSState *env,
1443 uint32_t wd, uint32_t ws, uint32_t wt)
1444 {
1445 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1446 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1447 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1448
1449 pwd->w[0] = msa_ave_u_df(DF_WORD, pws->w[0], pwt->w[0]);
1450 pwd->w[1] = msa_ave_u_df(DF_WORD, pws->w[1], pwt->w[1]);
1451 pwd->w[2] = msa_ave_u_df(DF_WORD, pws->w[2], pwt->w[2]);
1452 pwd->w[3] = msa_ave_u_df(DF_WORD, pws->w[3], pwt->w[3]);
1453 }
1454
1455 void helper_msa_ave_u_d(CPUMIPSState *env,
1456 uint32_t wd, uint32_t ws, uint32_t wt)
1457 {
1458 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1459 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1460 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1461
1462 pwd->d[0] = msa_ave_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1463 pwd->d[1] = msa_ave_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1464 }
1465
1466 static inline int64_t msa_aver_s_df(uint32_t df, int64_t arg1, int64_t arg2)
1467 {
1468 /* signed shift */
1469 return (arg1 >> 1) + (arg2 >> 1) + ((arg1 | arg2) & 1);
1470 }
1471
1472 void helper_msa_aver_s_b(CPUMIPSState *env,
1473 uint32_t wd, uint32_t ws, uint32_t wt)
1474 {
1475 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1476 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1477 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1478
1479 pwd->b[0] = msa_aver_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
1480 pwd->b[1] = msa_aver_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
1481 pwd->b[2] = msa_aver_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
1482 pwd->b[3] = msa_aver_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
1483 pwd->b[4] = msa_aver_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
1484 pwd->b[5] = msa_aver_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
1485 pwd->b[6] = msa_aver_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
1486 pwd->b[7] = msa_aver_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
1487 pwd->b[8] = msa_aver_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
1488 pwd->b[9] = msa_aver_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
1489 pwd->b[10] = msa_aver_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
1490 pwd->b[11] = msa_aver_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
1491 pwd->b[12] = msa_aver_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
1492 pwd->b[13] = msa_aver_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
1493 pwd->b[14] = msa_aver_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
1494 pwd->b[15] = msa_aver_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
1495 }
1496
1497 void helper_msa_aver_s_h(CPUMIPSState *env,
1498 uint32_t wd, uint32_t ws, uint32_t wt)
1499 {
1500 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1501 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1502 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1503
1504 pwd->h[0] = msa_aver_s_df(DF_HALF, pws->h[0], pwt->h[0]);
1505 pwd->h[1] = msa_aver_s_df(DF_HALF, pws->h[1], pwt->h[1]);
1506 pwd->h[2] = msa_aver_s_df(DF_HALF, pws->h[2], pwt->h[2]);
1507 pwd->h[3] = msa_aver_s_df(DF_HALF, pws->h[3], pwt->h[3]);
1508 pwd->h[4] = msa_aver_s_df(DF_HALF, pws->h[4], pwt->h[4]);
1509 pwd->h[5] = msa_aver_s_df(DF_HALF, pws->h[5], pwt->h[5]);
1510 pwd->h[6] = msa_aver_s_df(DF_HALF, pws->h[6], pwt->h[6]);
1511 pwd->h[7] = msa_aver_s_df(DF_HALF, pws->h[7], pwt->h[7]);
1512 }
1513
1514 void helper_msa_aver_s_w(CPUMIPSState *env,
1515 uint32_t wd, uint32_t ws, uint32_t wt)
1516 {
1517 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1518 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1519 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1520
1521 pwd->w[0] = msa_aver_s_df(DF_WORD, pws->w[0], pwt->w[0]);
1522 pwd->w[1] = msa_aver_s_df(DF_WORD, pws->w[1], pwt->w[1]);
1523 pwd->w[2] = msa_aver_s_df(DF_WORD, pws->w[2], pwt->w[2]);
1524 pwd->w[3] = msa_aver_s_df(DF_WORD, pws->w[3], pwt->w[3]);
1525 }
1526
1527 void helper_msa_aver_s_d(CPUMIPSState *env,
1528 uint32_t wd, uint32_t ws, uint32_t wt)
1529 {
1530 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1531 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1532 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1533
1534 pwd->d[0] = msa_aver_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1535 pwd->d[1] = msa_aver_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1536 }
1537
1538 static inline uint64_t msa_aver_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
1539 {
1540 uint64_t u_arg1 = UNSIGNED(arg1, df);
1541 uint64_t u_arg2 = UNSIGNED(arg2, df);
1542 /* unsigned shift */
1543 return (u_arg1 >> 1) + (u_arg2 >> 1) + ((u_arg1 | u_arg2) & 1);
1544 }
1545
1546 void helper_msa_aver_u_b(CPUMIPSState *env,
1547 uint32_t wd, uint32_t ws, uint32_t wt)
1548 {
1549 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1550 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1551 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1552
1553 pwd->b[0] = msa_aver_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
1554 pwd->b[1] = msa_aver_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
1555 pwd->b[2] = msa_aver_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
1556 pwd->b[3] = msa_aver_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
1557 pwd->b[4] = msa_aver_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
1558 pwd->b[5] = msa_aver_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
1559 pwd->b[6] = msa_aver_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
1560 pwd->b[7] = msa_aver_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
1561 pwd->b[8] = msa_aver_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
1562 pwd->b[9] = msa_aver_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
1563 pwd->b[10] = msa_aver_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
1564 pwd->b[11] = msa_aver_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
1565 pwd->b[12] = msa_aver_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
1566 pwd->b[13] = msa_aver_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
1567 pwd->b[14] = msa_aver_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
1568 pwd->b[15] = msa_aver_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
1569 }
1570
1571 void helper_msa_aver_u_h(CPUMIPSState *env,
1572 uint32_t wd, uint32_t ws, uint32_t wt)
1573 {
1574 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1575 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1576 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1577
1578 pwd->h[0] = msa_aver_u_df(DF_HALF, pws->h[0], pwt->h[0]);
1579 pwd->h[1] = msa_aver_u_df(DF_HALF, pws->h[1], pwt->h[1]);
1580 pwd->h[2] = msa_aver_u_df(DF_HALF, pws->h[2], pwt->h[2]);
1581 pwd->h[3] = msa_aver_u_df(DF_HALF, pws->h[3], pwt->h[3]);
1582 pwd->h[4] = msa_aver_u_df(DF_HALF, pws->h[4], pwt->h[4]);
1583 pwd->h[5] = msa_aver_u_df(DF_HALF, pws->h[5], pwt->h[5]);
1584 pwd->h[6] = msa_aver_u_df(DF_HALF, pws->h[6], pwt->h[6]);
1585 pwd->h[7] = msa_aver_u_df(DF_HALF, pws->h[7], pwt->h[7]);
1586 }
1587
1588 void helper_msa_aver_u_w(CPUMIPSState *env,
1589 uint32_t wd, uint32_t ws, uint32_t wt)
1590 {
1591 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1592 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1593 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1594
1595 pwd->w[0] = msa_aver_u_df(DF_WORD, pws->w[0], pwt->w[0]);
1596 pwd->w[1] = msa_aver_u_df(DF_WORD, pws->w[1], pwt->w[1]);
1597 pwd->w[2] = msa_aver_u_df(DF_WORD, pws->w[2], pwt->w[2]);
1598 pwd->w[3] = msa_aver_u_df(DF_WORD, pws->w[3], pwt->w[3]);
1599 }
1600
1601 void helper_msa_aver_u_d(CPUMIPSState *env,
1602 uint32_t wd, uint32_t ws, uint32_t wt)
1603 {
1604 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1605 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1606 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1607
1608 pwd->d[0] = msa_aver_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1609 pwd->d[1] = msa_aver_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1610 }
1611
1612
1613 /*
1614 * Int Compare
1615 * -----------
1616 *
1617 * +---------------+----------------------------------------------------------+
1618 * | CEQ.B | Vector Compare Equal (byte) |
1619 * | CEQ.H | Vector Compare Equal (halfword) |
1620 * | CEQ.W | Vector Compare Equal (word) |
1621 * | CEQ.D | Vector Compare Equal (doubleword) |
1622 * | CLE_S.B | Vector Compare Signed Less Than or Equal (byte) |
1623 * | CLE_S.H | Vector Compare Signed Less Than or Equal (halfword) |
1624 * | CLE_S.W | Vector Compare Signed Less Than or Equal (word) |
1625 * | CLE_S.D | Vector Compare Signed Less Than or Equal (doubleword) |
1626 * | CLE_U.B | Vector Compare Unsigned Less Than or Equal (byte) |
1627 * | CLE_U.H | Vector Compare Unsigned Less Than or Equal (halfword) |
1628 * | CLE_U.W | Vector Compare Unsigned Less Than or Equal (word) |
1629 * | CLE_U.D | Vector Compare Unsigned Less Than or Equal (doubleword) |
1630 * | CLT_S.B | Vector Compare Signed Less Than (byte) |
1631 * | CLT_S.H | Vector Compare Signed Less Than (halfword) |
1632 * | CLT_S.W | Vector Compare Signed Less Than (word) |
1633 * | CLT_S.D | Vector Compare Signed Less Than (doubleword) |
1634 * | CLT_U.B | Vector Compare Unsigned Less Than (byte) |
1635 * | CLT_U.H | Vector Compare Unsigned Less Than (halfword) |
1636 * | CLT_U.W | Vector Compare Unsigned Less Than (word) |
1637 * | CLT_U.D | Vector Compare Unsigned Less Than (doubleword) |
1638 * +---------------+----------------------------------------------------------+
1639 */
1640
1641 static inline int64_t msa_ceq_df(uint32_t df, int64_t arg1, int64_t arg2)
1642 {
1643 return arg1 == arg2 ? -1 : 0;
1644 }
1645
1646 static inline int8_t msa_ceq_b(int8_t arg1, int8_t arg2)
1647 {
1648 return arg1 == arg2 ? -1 : 0;
1649 }
1650
1651 void helper_msa_ceq_b(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
1652 {
1653 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1654 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1655 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1656
1657 pwd->b[0] = msa_ceq_b(pws->b[0], pwt->b[0]);
1658 pwd->b[1] = msa_ceq_b(pws->b[1], pwt->b[1]);
1659 pwd->b[2] = msa_ceq_b(pws->b[2], pwt->b[2]);
1660 pwd->b[3] = msa_ceq_b(pws->b[3], pwt->b[3]);
1661 pwd->b[4] = msa_ceq_b(pws->b[4], pwt->b[4]);
1662 pwd->b[5] = msa_ceq_b(pws->b[5], pwt->b[5]);
1663 pwd->b[6] = msa_ceq_b(pws->b[6], pwt->b[6]);
1664 pwd->b[7] = msa_ceq_b(pws->b[7], pwt->b[7]);
1665 pwd->b[8] = msa_ceq_b(pws->b[8], pwt->b[8]);
1666 pwd->b[9] = msa_ceq_b(pws->b[9], pwt->b[9]);
1667 pwd->b[10] = msa_ceq_b(pws->b[10], pwt->b[10]);
1668 pwd->b[11] = msa_ceq_b(pws->b[11], pwt->b[11]);
1669 pwd->b[12] = msa_ceq_b(pws->b[12], pwt->b[12]);
1670 pwd->b[13] = msa_ceq_b(pws->b[13], pwt->b[13]);
1671 pwd->b[14] = msa_ceq_b(pws->b[14], pwt->b[14]);
1672 pwd->b[15] = msa_ceq_b(pws->b[15], pwt->b[15]);
1673 }
1674
1675 static inline int16_t msa_ceq_h(int16_t arg1, int16_t arg2)
1676 {
1677 return arg1 == arg2 ? -1 : 0;
1678 }
1679
1680 void helper_msa_ceq_h(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
1681 {
1682 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1683 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1684 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1685
1686 pwd->h[0] = msa_ceq_h(pws->h[0], pwt->h[0]);
1687 pwd->h[1] = msa_ceq_h(pws->h[1], pwt->h[1]);
1688 pwd->h[2] = msa_ceq_h(pws->h[2], pwt->h[2]);
1689 pwd->h[3] = msa_ceq_h(pws->h[3], pwt->h[3]);
1690 pwd->h[4] = msa_ceq_h(pws->h[4], pwt->h[4]);
1691 pwd->h[5] = msa_ceq_h(pws->h[5], pwt->h[5]);
1692 pwd->h[6] = msa_ceq_h(pws->h[6], pwt->h[6]);
1693 pwd->h[7] = msa_ceq_h(pws->h[7], pwt->h[7]);
1694 }
1695
1696 static inline int32_t msa_ceq_w(int32_t arg1, int32_t arg2)
1697 {
1698 return arg1 == arg2 ? -1 : 0;
1699 }
1700
1701 void helper_msa_ceq_w(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
1702 {
1703 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1704 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1705 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1706
1707 pwd->w[0] = msa_ceq_w(pws->w[0], pwt->w[0]);
1708 pwd->w[1] = msa_ceq_w(pws->w[1], pwt->w[1]);
1709 pwd->w[2] = msa_ceq_w(pws->w[2], pwt->w[2]);
1710 pwd->w[3] = msa_ceq_w(pws->w[3], pwt->w[3]);
1711 }
1712
1713 static inline int64_t msa_ceq_d(int64_t arg1, int64_t arg2)
1714 {
1715 return arg1 == arg2 ? -1 : 0;
1716 }
1717
1718 void helper_msa_ceq_d(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
1719 {
1720 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1721 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1722 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1723
1724 pwd->d[0] = msa_ceq_d(pws->d[0], pwt->d[0]);
1725 pwd->d[1] = msa_ceq_d(pws->d[1], pwt->d[1]);
1726 }
1727
1728 static inline int64_t msa_cle_s_df(uint32_t df, int64_t arg1, int64_t arg2)
1729 {
1730 return arg1 <= arg2 ? -1 : 0;
1731 }
1732
1733 void helper_msa_cle_s_b(CPUMIPSState *env,
1734 uint32_t wd, uint32_t ws, uint32_t wt)
1735 {
1736 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1737 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1738 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1739
1740 pwd->b[0] = msa_cle_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
1741 pwd->b[1] = msa_cle_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
1742 pwd->b[2] = msa_cle_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
1743 pwd->b[3] = msa_cle_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
1744 pwd->b[4] = msa_cle_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
1745 pwd->b[5] = msa_cle_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
1746 pwd->b[6] = msa_cle_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
1747 pwd->b[7] = msa_cle_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
1748 pwd->b[8] = msa_cle_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
1749 pwd->b[9] = msa_cle_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
1750 pwd->b[10] = msa_cle_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
1751 pwd->b[11] = msa_cle_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
1752 pwd->b[12] = msa_cle_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
1753 pwd->b[13] = msa_cle_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
1754 pwd->b[14] = msa_cle_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
1755 pwd->b[15] = msa_cle_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
1756 }
1757
1758 void helper_msa_cle_s_h(CPUMIPSState *env,
1759 uint32_t wd, uint32_t ws, uint32_t wt)
1760 {
1761 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1762 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1763 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1764
1765 pwd->h[0] = msa_cle_s_df(DF_HALF, pws->h[0], pwt->h[0]);
1766 pwd->h[1] = msa_cle_s_df(DF_HALF, pws->h[1], pwt->h[1]);
1767 pwd->h[2] = msa_cle_s_df(DF_HALF, pws->h[2], pwt->h[2]);
1768 pwd->h[3] = msa_cle_s_df(DF_HALF, pws->h[3], pwt->h[3]);
1769 pwd->h[4] = msa_cle_s_df(DF_HALF, pws->h[4], pwt->h[4]);
1770 pwd->h[5] = msa_cle_s_df(DF_HALF, pws->h[5], pwt->h[5]);
1771 pwd->h[6] = msa_cle_s_df(DF_HALF, pws->h[6], pwt->h[6]);
1772 pwd->h[7] = msa_cle_s_df(DF_HALF, pws->h[7], pwt->h[7]);
1773 }
1774
1775 void helper_msa_cle_s_w(CPUMIPSState *env,
1776 uint32_t wd, uint32_t ws, uint32_t wt)
1777 {
1778 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1779 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1780 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1781
1782 pwd->w[0] = msa_cle_s_df(DF_WORD, pws->w[0], pwt->w[0]);
1783 pwd->w[1] = msa_cle_s_df(DF_WORD, pws->w[1], pwt->w[1]);
1784 pwd->w[2] = msa_cle_s_df(DF_WORD, pws->w[2], pwt->w[2]);
1785 pwd->w[3] = msa_cle_s_df(DF_WORD, pws->w[3], pwt->w[3]);
1786 }
1787
1788 void helper_msa_cle_s_d(CPUMIPSState *env,
1789 uint32_t wd, uint32_t ws, uint32_t wt)
1790 {
1791 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1792 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1793 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1794
1795 pwd->d[0] = msa_cle_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1796 pwd->d[1] = msa_cle_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1797 }
1798
1799 static inline int64_t msa_cle_u_df(uint32_t df, int64_t arg1, int64_t arg2)
1800 {
1801 uint64_t u_arg1 = UNSIGNED(arg1, df);
1802 uint64_t u_arg2 = UNSIGNED(arg2, df);
1803 return u_arg1 <= u_arg2 ? -1 : 0;
1804 }
1805
1806 void helper_msa_cle_u_b(CPUMIPSState *env,
1807 uint32_t wd, uint32_t ws, uint32_t wt)
1808 {
1809 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1810 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1811 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1812
1813 pwd->b[0] = msa_cle_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
1814 pwd->b[1] = msa_cle_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
1815 pwd->b[2] = msa_cle_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
1816 pwd->b[3] = msa_cle_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
1817 pwd->b[4] = msa_cle_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
1818 pwd->b[5] = msa_cle_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
1819 pwd->b[6] = msa_cle_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
1820 pwd->b[7] = msa_cle_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
1821 pwd->b[8] = msa_cle_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
1822 pwd->b[9] = msa_cle_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
1823 pwd->b[10] = msa_cle_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
1824 pwd->b[11] = msa_cle_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
1825 pwd->b[12] = msa_cle_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
1826 pwd->b[13] = msa_cle_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
1827 pwd->b[14] = msa_cle_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
1828 pwd->b[15] = msa_cle_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
1829 }
1830
1831 void helper_msa_cle_u_h(CPUMIPSState *env,
1832 uint32_t wd, uint32_t ws, uint32_t wt)
1833 {
1834 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1835 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1836 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1837
1838 pwd->h[0] = msa_cle_u_df(DF_HALF, pws->h[0], pwt->h[0]);
1839 pwd->h[1] = msa_cle_u_df(DF_HALF, pws->h[1], pwt->h[1]);
1840 pwd->h[2] = msa_cle_u_df(DF_HALF, pws->h[2], pwt->h[2]);
1841 pwd->h[3] = msa_cle_u_df(DF_HALF, pws->h[3], pwt->h[3]);
1842 pwd->h[4] = msa_cle_u_df(DF_HALF, pws->h[4], pwt->h[4]);
1843 pwd->h[5] = msa_cle_u_df(DF_HALF, pws->h[5], pwt->h[5]);
1844 pwd->h[6] = msa_cle_u_df(DF_HALF, pws->h[6], pwt->h[6]);
1845 pwd->h[7] = msa_cle_u_df(DF_HALF, pws->h[7], pwt->h[7]);
1846 }
1847
1848 void helper_msa_cle_u_w(CPUMIPSState *env,
1849 uint32_t wd, uint32_t ws, uint32_t wt)
1850 {
1851 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1852 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1853 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1854
1855 pwd->w[0] = msa_cle_u_df(DF_WORD, pws->w[0], pwt->w[0]);
1856 pwd->w[1] = msa_cle_u_df(DF_WORD, pws->w[1], pwt->w[1]);
1857 pwd->w[2] = msa_cle_u_df(DF_WORD, pws->w[2], pwt->w[2]);
1858 pwd->w[3] = msa_cle_u_df(DF_WORD, pws->w[3], pwt->w[3]);
1859 }
1860
1861 void helper_msa_cle_u_d(CPUMIPSState *env,
1862 uint32_t wd, uint32_t ws, uint32_t wt)
1863 {
1864 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1865 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1866 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1867
1868 pwd->d[0] = msa_cle_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1869 pwd->d[1] = msa_cle_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1870 }
1871
1872 static inline int64_t msa_clt_s_df(uint32_t df, int64_t arg1, int64_t arg2)
1873 {
1874 return arg1 < arg2 ? -1 : 0;
1875 }
1876
1877 static inline int8_t msa_clt_s_b(int8_t arg1, int8_t arg2)
1878 {
1879 return arg1 < arg2 ? -1 : 0;
1880 }
1881
1882 void helper_msa_clt_s_b(CPUMIPSState *env,
1883 uint32_t wd, uint32_t ws, uint32_t wt)
1884 {
1885 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1886 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1887 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1888
1889 pwd->b[0] = msa_clt_s_b(pws->b[0], pwt->b[0]);
1890 pwd->b[1] = msa_clt_s_b(pws->b[1], pwt->b[1]);
1891 pwd->b[2] = msa_clt_s_b(pws->b[2], pwt->b[2]);
1892 pwd->b[3] = msa_clt_s_b(pws->b[3], pwt->b[3]);
1893 pwd->b[4] = msa_clt_s_b(pws->b[4], pwt->b[4]);
1894 pwd->b[5] = msa_clt_s_b(pws->b[5], pwt->b[5]);
1895 pwd->b[6] = msa_clt_s_b(pws->b[6], pwt->b[6]);
1896 pwd->b[7] = msa_clt_s_b(pws->b[7], pwt->b[7]);
1897 pwd->b[8] = msa_clt_s_b(pws->b[8], pwt->b[8]);
1898 pwd->b[9] = msa_clt_s_b(pws->b[9], pwt->b[9]);
1899 pwd->b[10] = msa_clt_s_b(pws->b[10], pwt->b[10]);
1900 pwd->b[11] = msa_clt_s_b(pws->b[11], pwt->b[11]);
1901 pwd->b[12] = msa_clt_s_b(pws->b[12], pwt->b[12]);
1902 pwd->b[13] = msa_clt_s_b(pws->b[13], pwt->b[13]);
1903 pwd->b[14] = msa_clt_s_b(pws->b[14], pwt->b[14]);
1904 pwd->b[15] = msa_clt_s_b(pws->b[15], pwt->b[15]);
1905 }
1906
1907 static inline int16_t msa_clt_s_h(int16_t arg1, int16_t arg2)
1908 {
1909 return arg1 < arg2 ? -1 : 0;
1910 }
1911
1912 void helper_msa_clt_s_h(CPUMIPSState *env,
1913 uint32_t wd, uint32_t ws, uint32_t wt)
1914 {
1915 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1916 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1917 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1918
1919 pwd->h[0] = msa_clt_s_h(pws->h[0], pwt->h[0]);
1920 pwd->h[1] = msa_clt_s_h(pws->h[1], pwt->h[1]);
1921 pwd->h[2] = msa_clt_s_h(pws->h[2], pwt->h[2]);
1922 pwd->h[3] = msa_clt_s_h(pws->h[3], pwt->h[3]);
1923 pwd->h[4] = msa_clt_s_h(pws->h[4], pwt->h[4]);
1924 pwd->h[5] = msa_clt_s_h(pws->h[5], pwt->h[5]);
1925 pwd->h[6] = msa_clt_s_h(pws->h[6], pwt->h[6]);
1926 pwd->h[7] = msa_clt_s_h(pws->h[7], pwt->h[7]);
1927 }
1928
1929 static inline int32_t msa_clt_s_w(int32_t arg1, int32_t arg2)
1930 {
1931 return arg1 < arg2 ? -1 : 0;
1932 }
1933
1934 void helper_msa_clt_s_w(CPUMIPSState *env,
1935 uint32_t wd, uint32_t ws, uint32_t wt)
1936 {
1937 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1938 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1939 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1940
1941 pwd->w[0] = msa_clt_s_w(pws->w[0], pwt->w[0]);
1942 pwd->w[1] = msa_clt_s_w(pws->w[1], pwt->w[1]);
1943 pwd->w[2] = msa_clt_s_w(pws->w[2], pwt->w[2]);
1944 pwd->w[3] = msa_clt_s_w(pws->w[3], pwt->w[3]);
1945 }
1946
1947 static inline int64_t msa_clt_s_d(int64_t arg1, int64_t arg2)
1948 {
1949 return arg1 < arg2 ? -1 : 0;
1950 }
1951
1952 void helper_msa_clt_s_d(CPUMIPSState *env,
1953 uint32_t wd, uint32_t ws, uint32_t wt)
1954 {
1955 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1956 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1957 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1958
1959 pwd->d[0] = msa_clt_s_d(pws->d[0], pwt->d[0]);
1960 pwd->d[1] = msa_clt_s_d(pws->d[1], pwt->d[1]);
1961 }
1962
1963 static inline int64_t msa_clt_u_df(uint32_t df, int64_t arg1, int64_t arg2)
1964 {
1965 uint64_t u_arg1 = UNSIGNED(arg1, df);
1966 uint64_t u_arg2 = UNSIGNED(arg2, df);
1967 return u_arg1 < u_arg2 ? -1 : 0;
1968 }
1969
1970 void helper_msa_clt_u_b(CPUMIPSState *env,
1971 uint32_t wd, uint32_t ws, uint32_t wt)
1972 {
1973 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1974 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1975 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1976
1977 pwd->b[0] = msa_clt_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
1978 pwd->b[1] = msa_clt_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
1979 pwd->b[2] = msa_clt_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
1980 pwd->b[3] = msa_clt_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
1981 pwd->b[4] = msa_clt_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
1982 pwd->b[5] = msa_clt_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
1983 pwd->b[6] = msa_clt_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
1984 pwd->b[7] = msa_clt_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
1985 pwd->b[8] = msa_clt_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
1986 pwd->b[9] = msa_clt_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
1987 pwd->b[10] = msa_clt_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
1988 pwd->b[11] = msa_clt_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
1989 pwd->b[12] = msa_clt_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
1990 pwd->b[13] = msa_clt_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
1991 pwd->b[14] = msa_clt_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
1992 pwd->b[15] = msa_clt_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
1993 }
1994
1995 void helper_msa_clt_u_h(CPUMIPSState *env,
1996 uint32_t wd, uint32_t ws, uint32_t wt)
1997 {
1998 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1999 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2000 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2001
2002 pwd->h[0] = msa_clt_u_df(DF_HALF, pws->h[0], pwt->h[0]);
2003 pwd->h[1] = msa_clt_u_df(DF_HALF, pws->h[1], pwt->h[1]);
2004 pwd->h[2] = msa_clt_u_df(DF_HALF, pws->h[2], pwt->h[2]);
2005 pwd->h[3] = msa_clt_u_df(DF_HALF, pws->h[3], pwt->h[3]);
2006 pwd->h[4] = msa_clt_u_df(DF_HALF, pws->h[4], pwt->h[4]);
2007 pwd->h[5] = msa_clt_u_df(DF_HALF, pws->h[5], pwt->h[5]);
2008 pwd->h[6] = msa_clt_u_df(DF_HALF, pws->h[6], pwt->h[6]);
2009 pwd->h[7] = msa_clt_u_df(DF_HALF, pws->h[7], pwt->h[7]);
2010 }
2011
2012 void helper_msa_clt_u_w(CPUMIPSState *env,
2013 uint32_t wd, uint32_t ws, uint32_t wt)
2014 {
2015 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2016 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2017 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2018
2019 pwd->w[0] = msa_clt_u_df(DF_WORD, pws->w[0], pwt->w[0]);
2020 pwd->w[1] = msa_clt_u_df(DF_WORD, pws->w[1], pwt->w[1]);
2021 pwd->w[2] = msa_clt_u_df(DF_WORD, pws->w[2], pwt->w[2]);
2022 pwd->w[3] = msa_clt_u_df(DF_WORD, pws->w[3], pwt->w[3]);
2023 }
2024
2025 void helper_msa_clt_u_d(CPUMIPSState *env,
2026 uint32_t wd, uint32_t ws, uint32_t wt)
2027 {
2028 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2029 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2030 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2031
2032 pwd->d[0] = msa_clt_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2033 pwd->d[1] = msa_clt_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2034 }
2035
2036
2037 /*
2038 * Int Divide
2039 * ----------
2040 *
2041 * +---------------+----------------------------------------------------------+
2042 * | DIV_S.B | Vector Signed Divide (byte) |
2043 * | DIV_S.H | Vector Signed Divide (halfword) |
2044 * | DIV_S.W | Vector Signed Divide (word) |
2045 * | DIV_S.D | Vector Signed Divide (doubleword) |
2046 * | DIV_U.B | Vector Unsigned Divide (byte) |
2047 * | DIV_U.H | Vector Unsigned Divide (halfword) |
2048 * | DIV_U.W | Vector Unsigned Divide (word) |
2049 * | DIV_U.D | Vector Unsigned Divide (doubleword) |
2050 * +---------------+----------------------------------------------------------+
2051 */
2052
2053
2054 static inline int64_t msa_div_s_df(uint32_t df, int64_t arg1, int64_t arg2)
2055 {
2056 if (arg1 == DF_MIN_INT(df) && arg2 == -1) {
2057 return DF_MIN_INT(df);
2058 }
2059 return arg2 ? arg1 / arg2
2060 : arg1 >= 0 ? -1 : 1;
2061 }
2062
2063 void helper_msa_div_s_b(CPUMIPSState *env,
2064 uint32_t wd, uint32_t ws, uint32_t wt)
2065 {
2066 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2067 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2068 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2069
2070 pwd->b[0] = msa_div_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
2071 pwd->b[1] = msa_div_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
2072 pwd->b[2] = msa_div_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
2073 pwd->b[3] = msa_div_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
2074 pwd->b[4] = msa_div_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
2075 pwd->b[5] = msa_div_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
2076 pwd->b[6] = msa_div_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
2077 pwd->b[7] = msa_div_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
2078 pwd->b[8] = msa_div_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
2079 pwd->b[9] = msa_div_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
2080 pwd->b[10] = msa_div_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
2081 pwd->b[11] = msa_div_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
2082 pwd->b[12] = msa_div_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
2083 pwd->b[13] = msa_div_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
2084 pwd->b[14] = msa_div_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
2085 pwd->b[15] = msa_div_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
2086 }
2087
2088 void helper_msa_div_s_h(CPUMIPSState *env,
2089 uint32_t wd, uint32_t ws, uint32_t wt)
2090 {
2091 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2092 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2093 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2094
2095 pwd->h[0] = msa_div_s_df(DF_HALF, pws->h[0], pwt->h[0]);
2096 pwd->h[1] = msa_div_s_df(DF_HALF, pws->h[1], pwt->h[1]);
2097 pwd->h[2] = msa_div_s_df(DF_HALF, pws->h[2], pwt->h[2]);
2098 pwd->h[3] = msa_div_s_df(DF_HALF, pws->h[3], pwt->h[3]);
2099 pwd->h[4] = msa_div_s_df(DF_HALF, pws->h[4], pwt->h[4]);
2100 pwd->h[5] = msa_div_s_df(DF_HALF, pws->h[5], pwt->h[5]);
2101 pwd->h[6] = msa_div_s_df(DF_HALF, pws->h[6], pwt->h[6]);
2102 pwd->h[7] = msa_div_s_df(DF_HALF, pws->h[7], pwt->h[7]);
2103 }
2104
2105 void helper_msa_div_s_w(CPUMIPSState *env,
2106 uint32_t wd, uint32_t ws, uint32_t wt)
2107 {
2108 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2109 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2110 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2111
2112 pwd->w[0] = msa_div_s_df(DF_WORD, pws->w[0], pwt->w[0]);
2113 pwd->w[1] = msa_div_s_df(DF_WORD, pws->w[1], pwt->w[1]);
2114 pwd->w[2] = msa_div_s_df(DF_WORD, pws->w[2], pwt->w[2]);
2115 pwd->w[3] = msa_div_s_df(DF_WORD, pws->w[3], pwt->w[3]);
2116 }
2117
2118 void helper_msa_div_s_d(CPUMIPSState *env,
2119 uint32_t wd, uint32_t ws, uint32_t wt)
2120 {
2121 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2122 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2123 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2124
2125 pwd->d[0] = msa_div_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2126 pwd->d[1] = msa_div_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2127 }
2128
2129 static inline int64_t msa_div_u_df(uint32_t df, int64_t arg1, int64_t arg2)
2130 {
2131 uint64_t u_arg1 = UNSIGNED(arg1, df);
2132 uint64_t u_arg2 = UNSIGNED(arg2, df);
2133 return arg2 ? u_arg1 / u_arg2 : -1;
2134 }
2135
2136 void helper_msa_div_u_b(CPUMIPSState *env,
2137 uint32_t wd, uint32_t ws, uint32_t wt)
2138 {
2139 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2140 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2141 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2142
2143 pwd->b[0] = msa_div_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
2144 pwd->b[1] = msa_div_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
2145 pwd->b[2] = msa_div_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
2146 pwd->b[3] = msa_div_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
2147 pwd->b[4] = msa_div_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
2148 pwd->b[5] = msa_div_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
2149 pwd->b[6] = msa_div_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
2150 pwd->b[7] = msa_div_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
2151 pwd->b[8] = msa_div_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
2152 pwd->b[9] = msa_div_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
2153 pwd->b[10] = msa_div_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
2154 pwd->b[11] = msa_div_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
2155 pwd->b[12] = msa_div_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
2156 pwd->b[13] = msa_div_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
2157 pwd->b[14] = msa_div_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
2158 pwd->b[15] = msa_div_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
2159 }
2160
2161 void helper_msa_div_u_h(CPUMIPSState *env,
2162 uint32_t wd, uint32_t ws, uint32_t wt)
2163 {
2164 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2165 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2166 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2167
2168 pwd->h[0] = msa_div_u_df(DF_HALF, pws->h[0], pwt->h[0]);
2169 pwd->h[1] = msa_div_u_df(DF_HALF, pws->h[1], pwt->h[1]);
2170 pwd->h[2] = msa_div_u_df(DF_HALF, pws->h[2], pwt->h[2]);
2171 pwd->h[3] = msa_div_u_df(DF_HALF, pws->h[3], pwt->h[3]);
2172 pwd->h[4] = msa_div_u_df(DF_HALF, pws->h[4], pwt->h[4]);
2173 pwd->h[5] = msa_div_u_df(DF_HALF, pws->h[5], pwt->h[5]);
2174 pwd->h[6] = msa_div_u_df(DF_HALF, pws->h[6], pwt->h[6]);
2175 pwd->h[7] = msa_div_u_df(DF_HALF, pws->h[7], pwt->h[7]);
2176 }
2177
2178 void helper_msa_div_u_w(CPUMIPSState *env,
2179 uint32_t wd, uint32_t ws, uint32_t wt)
2180 {
2181 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2182 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2183 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2184
2185 pwd->w[0] = msa_div_u_df(DF_WORD, pws->w[0], pwt->w[0]);
2186 pwd->w[1] = msa_div_u_df(DF_WORD, pws->w[1], pwt->w[1]);
2187 pwd->w[2] = msa_div_u_df(DF_WORD, pws->w[2], pwt->w[2]);
2188 pwd->w[3] = msa_div_u_df(DF_WORD, pws->w[3], pwt->w[3]);
2189 }
2190
2191 void helper_msa_div_u_d(CPUMIPSState *env,
2192 uint32_t wd, uint32_t ws, uint32_t wt)
2193 {
2194 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2195 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2196 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2197
2198 pwd->d[0] = msa_div_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2199 pwd->d[1] = msa_div_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2200 }
2201
2202
2203 /*
2204 * Int Dot Product
2205 * ---------------
2206 *
2207 * +---------------+----------------------------------------------------------+
2208 * | DOTP_S.H | Vector Signed Dot Product (halfword) |
2209 * | DOTP_S.W | Vector Signed Dot Product (word) |
2210 * | DOTP_S.D | Vector Signed Dot Product (doubleword) |
2211 * | DOTP_U.H | Vector Unsigned Dot Product (halfword) |
2212 * | DOTP_U.W | Vector Unsigned Dot Product (word) |
2213 * | DOTP_U.D | Vector Unsigned Dot Product (doubleword) |
2214 * | DPADD_S.H | Vector Signed Dot Product (halfword) |
2215 * | DPADD_S.W | Vector Signed Dot Product (word) |
2216 * | DPADD_S.D | Vector Signed Dot Product (doubleword) |
2217 * | DPADD_U.H | Vector Unsigned Dot Product (halfword) |
2218 * | DPADD_U.W | Vector Unsigned Dot Product (word) |
2219 * | DPADD_U.D | Vector Unsigned Dot Product (doubleword) |
2220 * | DPSUB_S.H | Vector Signed Dot Product (halfword) |
2221 * | DPSUB_S.W | Vector Signed Dot Product (word) |
2222 * | DPSUB_S.D | Vector Signed Dot Product (doubleword) |
2223 * | DPSUB_U.H | Vector Unsigned Dot Product (halfword) |
2224 * | DPSUB_U.W | Vector Unsigned Dot Product (word) |
2225 * | DPSUB_U.D | Vector Unsigned Dot Product (doubleword) |
2226 * +---------------+----------------------------------------------------------+
2227 */
2228
2229 #define SIGNED_EXTRACT(e, o, a, df) \
2230 do { \
2231 e = SIGNED_EVEN(a, df); \
2232 o = SIGNED_ODD(a, df); \
2233 } while (0)
2234
2235 #define UNSIGNED_EXTRACT(e, o, a, df) \
2236 do { \
2237 e = UNSIGNED_EVEN(a, df); \
2238 o = UNSIGNED_ODD(a, df); \
2239 } while (0)
2240
2241
2242 static inline int64_t msa_dotp_s_df(uint32_t df, int64_t arg1, int64_t arg2)
2243 {
2244 int64_t even_arg1;
2245 int64_t even_arg2;
2246 int64_t odd_arg1;
2247 int64_t odd_arg2;
2248 SIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
2249 SIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
2250 return (even_arg1 * even_arg2) + (odd_arg1 * odd_arg2);
2251 }
2252
2253 void helper_msa_dotp_s_h(CPUMIPSState *env,
2254 uint32_t wd, uint32_t ws, uint32_t wt)
2255 {
2256 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2257 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2258 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2259
2260 pwd->h[0] = msa_dotp_s_df(DF_HALF, pws->h[0], pwt->h[0]);
2261 pwd->h[1] = msa_dotp_s_df(DF_HALF, pws->h[1], pwt->h[1]);
2262 pwd->h[2] = msa_dotp_s_df(DF_HALF, pws->h[2], pwt->h[2]);
2263 pwd->h[3] = msa_dotp_s_df(DF_HALF, pws->h[3], pwt->h[3]);
2264 pwd->h[4] = msa_dotp_s_df(DF_HALF, pws->h[4], pwt->h[4]);
2265 pwd->h[5] = msa_dotp_s_df(DF_HALF, pws->h[5], pwt->h[5]);
2266 pwd->h[6] = msa_dotp_s_df(DF_HALF, pws->h[6], pwt->h[6]);
2267 pwd->h[7] = msa_dotp_s_df(DF_HALF, pws->h[7], pwt->h[7]);
2268 }
2269
2270 void helper_msa_dotp_s_w(CPUMIPSState *env,
2271 uint32_t wd, uint32_t ws, uint32_t wt)
2272 {
2273 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2274 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2275 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2276
2277 pwd->w[0] = msa_dotp_s_df(DF_WORD, pws->w[0], pwt->w[0]);
2278 pwd->w[1] = msa_dotp_s_df(DF_WORD, pws->w[1], pwt->w[1]);
2279 pwd->w[2] = msa_dotp_s_df(DF_WORD, pws->w[2], pwt->w[2]);
2280 pwd->w[3] = msa_dotp_s_df(DF_WORD, pws->w[3], pwt->w[3]);
2281 }
2282
2283 void helper_msa_dotp_s_d(CPUMIPSState *env,
2284 uint32_t wd, uint32_t ws, uint32_t wt)
2285 {
2286 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2287 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2288 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2289
2290 pwd->d[0] = msa_dotp_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2291 pwd->d[1] = msa_dotp_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2292 }
2293
2294
2295 static inline int64_t msa_dotp_u_df(uint32_t df, int64_t arg1, int64_t arg2)
2296 {
2297 int64_t even_arg1;
2298 int64_t even_arg2;
2299 int64_t odd_arg1;
2300 int64_t odd_arg2;
2301 UNSIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
2302 UNSIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
2303 return (even_arg1 * even_arg2) + (odd_arg1 * odd_arg2);
2304 }
2305
2306 void helper_msa_dotp_u_h(CPUMIPSState *env,
2307 uint32_t wd, uint32_t ws, uint32_t wt)
2308 {
2309 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2310 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2311 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2312
2313 pwd->h[0] = msa_dotp_u_df(DF_HALF, pws->h[0], pwt->h[0]);
2314 pwd->h[1] = msa_dotp_u_df(DF_HALF, pws->h[1], pwt->h[1]);
2315 pwd->h[2] = msa_dotp_u_df(DF_HALF, pws->h[2], pwt->h[2]);
2316 pwd->h[3] = msa_dotp_u_df(DF_HALF, pws->h[3], pwt->h[3]);
2317 pwd->h[4] = msa_dotp_u_df(DF_HALF, pws->h[4], pwt->h[4]);
2318 pwd->h[5] = msa_dotp_u_df(DF_HALF, pws->h[5], pwt->h[5]);
2319 pwd->h[6] = msa_dotp_u_df(DF_HALF, pws->h[6], pwt->h[6]);
2320 pwd->h[7] = msa_dotp_u_df(DF_HALF, pws->h[7], pwt->h[7]);
2321 }
2322
2323 void helper_msa_dotp_u_w(CPUMIPSState *env,
2324 uint32_t wd, uint32_t ws, uint32_t wt)
2325 {
2326 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2327 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2328 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2329
2330 pwd->w[0] = msa_dotp_u_df(DF_WORD, pws->w[0], pwt->w[0]);
2331 pwd->w[1] = msa_dotp_u_df(DF_WORD, pws->w[1], pwt->w[1]);
2332 pwd->w[2] = msa_dotp_u_df(DF_WORD, pws->w[2], pwt->w[2]);
2333 pwd->w[3] = msa_dotp_u_df(DF_WORD, pws->w[3], pwt->w[3]);
2334 }
2335
2336 void helper_msa_dotp_u_d(CPUMIPSState *env,
2337 uint32_t wd, uint32_t ws, uint32_t wt)
2338 {
2339 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2340 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2341 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2342
2343 pwd->d[0] = msa_dotp_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2344 pwd->d[1] = msa_dotp_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2345 }
2346
2347
2348 static inline int64_t msa_dpadd_s_df(uint32_t df, int64_t dest, int64_t arg1,
2349 int64_t arg2)
2350 {
2351 int64_t even_arg1;
2352 int64_t even_arg2;
2353 int64_t odd_arg1;
2354 int64_t odd_arg2;
2355 SIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
2356 SIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
2357 return dest + (even_arg1 * even_arg2) + (odd_arg1 * odd_arg2);
2358 }
2359
2360 void helper_msa_dpadd_s_h(CPUMIPSState *env,
2361 uint32_t wd, uint32_t ws, uint32_t wt)
2362 {
2363 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2364 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2365 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2366
2367 pwd->h[0] = msa_dpadd_s_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
2368 pwd->h[1] = msa_dpadd_s_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
2369 pwd->h[2] = msa_dpadd_s_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
2370 pwd->h[3] = msa_dpadd_s_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
2371 pwd->h[4] = msa_dpadd_s_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
2372 pwd->h[5] = msa_dpadd_s_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
2373 pwd->h[6] = msa_dpadd_s_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
2374 pwd->h[7] = msa_dpadd_s_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
2375 }
2376
2377 void helper_msa_dpadd_s_w(CPUMIPSState *env,
2378 uint32_t wd, uint32_t ws, uint32_t wt)
2379 {
2380 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2381 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2382 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2383
2384 pwd->w[0] = msa_dpadd_s_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
2385 pwd->w[1] = msa_dpadd_s_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
2386 pwd->w[2] = msa_dpadd_s_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
2387 pwd->w[3] = msa_dpadd_s_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
2388 }
2389
2390 void helper_msa_dpadd_s_d(CPUMIPSState *env,
2391 uint32_t wd, uint32_t ws, uint32_t wt)
2392 {
2393 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2394 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2395 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2396
2397 pwd->d[0] = msa_dpadd_s_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
2398 pwd->d[1] = msa_dpadd_s_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
2399 }
2400
2401
2402 static inline int64_t msa_dpadd_u_df(uint32_t df, int64_t dest, int64_t arg1,
2403 int64_t arg2)
2404 {
2405 int64_t even_arg1;
2406 int64_t even_arg2;
2407 int64_t odd_arg1;
2408 int64_t odd_arg2;
2409 UNSIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
2410 UNSIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
2411 return dest + (even_arg1 * even_arg2) + (odd_arg1 * odd_arg2);
2412 }
2413
2414 void helper_msa_dpadd_u_h(CPUMIPSState *env,
2415 uint32_t wd, uint32_t ws, uint32_t wt)
2416 {
2417 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2418 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2419 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2420
2421 pwd->h[0] = msa_dpadd_u_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
2422 pwd->h[1] = msa_dpadd_u_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
2423 pwd->h[2] = msa_dpadd_u_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
2424 pwd->h[3] = msa_dpadd_u_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
2425 pwd->h[4] = msa_dpadd_u_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
2426 pwd->h[5] = msa_dpadd_u_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
2427 pwd->h[6] = msa_dpadd_u_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
2428 pwd->h[7] = msa_dpadd_u_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
2429 }
2430
2431 void helper_msa_dpadd_u_w(CPUMIPSState *env,
2432 uint32_t wd, uint32_t ws, uint32_t wt)
2433 {
2434 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2435 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2436 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2437
2438 pwd->w[0] = msa_dpadd_u_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
2439 pwd->w[1] = msa_dpadd_u_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
2440 pwd->w[2] = msa_dpadd_u_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
2441 pwd->w[3] = msa_dpadd_u_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
2442 }
2443
2444 void helper_msa_dpadd_u_d(CPUMIPSState *env,
2445 uint32_t wd, uint32_t ws, uint32_t wt)
2446 {
2447 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2448 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2449 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2450
2451 pwd->d[0] = msa_dpadd_u_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
2452 pwd->d[1] = msa_dpadd_u_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
2453 }
2454
2455
2456 static inline int64_t msa_dpsub_s_df(uint32_t df, int64_t dest, int64_t arg1,
2457 int64_t arg2)
2458 {
2459 int64_t even_arg1;
2460 int64_t even_arg2;
2461 int64_t odd_arg1;
2462 int64_t odd_arg2;
2463 SIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
2464 SIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
2465 return dest - ((even_arg1 * even_arg2) + (odd_arg1 * odd_arg2));
2466 }
2467
2468 void helper_msa_dpsub_s_h(CPUMIPSState *env,
2469 uint32_t wd, uint32_t ws, uint32_t wt)
2470 {
2471 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2472 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2473 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2474
2475 pwd->h[0] = msa_dpsub_s_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
2476 pwd->h[1] = msa_dpsub_s_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
2477 pwd->h[2] = msa_dpsub_s_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
2478 pwd->h[3] = msa_dpsub_s_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
2479 pwd->h[4] = msa_dpsub_s_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
2480 pwd->h[5] = msa_dpsub_s_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
2481 pwd->h[6] = msa_dpsub_s_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
2482 pwd->h[7] = msa_dpsub_s_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
2483 }
2484
2485 void helper_msa_dpsub_s_w(CPUMIPSState *env,
2486 uint32_t wd, uint32_t ws, uint32_t wt)
2487 {
2488 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2489 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2490 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2491
2492 pwd->w[0] = msa_dpsub_s_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
2493 pwd->w[1] = msa_dpsub_s_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
2494 pwd->w[2] = msa_dpsub_s_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
2495 pwd->w[3] = msa_dpsub_s_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
2496 }
2497
2498 void helper_msa_dpsub_s_d(CPUMIPSState *env,
2499 uint32_t wd, uint32_t ws, uint32_t wt)
2500 {
2501 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2502 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2503 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2504
2505 pwd->d[0] = msa_dpsub_s_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
2506 pwd->d[1] = msa_dpsub_s_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
2507 }
2508
2509
2510 static inline int64_t msa_dpsub_u_df(uint32_t df, int64_t dest, int64_t arg1,
2511 int64_t arg2)
2512 {
2513 int64_t even_arg1;
2514 int64_t even_arg2;
2515 int64_t odd_arg1;
2516 int64_t odd_arg2;
2517 UNSIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
2518 UNSIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
2519 return dest - ((even_arg1 * even_arg2) + (odd_arg1 * odd_arg2));
2520 }
2521
2522 void helper_msa_dpsub_u_h(CPUMIPSState *env,
2523 uint32_t wd, uint32_t ws, uint32_t wt)
2524 {
2525 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2526 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2527 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2528
2529 pwd->h[0] = msa_dpsub_u_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
2530 pwd->h[1] = msa_dpsub_u_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
2531 pwd->h[2] = msa_dpsub_u_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
2532 pwd->h[3] = msa_dpsub_u_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
2533 pwd->h[4] = msa_dpsub_u_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
2534 pwd->h[5] = msa_dpsub_u_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
2535 pwd->h[6] = msa_dpsub_u_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
2536 pwd->h[7] = msa_dpsub_u_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
2537 }
2538
2539 void helper_msa_dpsub_u_w(CPUMIPSState *env,
2540 uint32_t wd, uint32_t ws, uint32_t wt)
2541 {
2542 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2543 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2544 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2545
2546 pwd->w[0] = msa_dpsub_u_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
2547 pwd->w[1] = msa_dpsub_u_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
2548 pwd->w[2] = msa_dpsub_u_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
2549 pwd->w[3] = msa_dpsub_u_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
2550 }
2551
2552 void helper_msa_dpsub_u_d(CPUMIPSState *env,
2553 uint32_t wd, uint32_t ws, uint32_t wt)
2554 {
2555 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2556 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2557 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2558
2559 pwd->d[0] = msa_dpsub_u_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
2560 pwd->d[1] = msa_dpsub_u_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
2561 }
2562
2563
2564 /*
2565 * Int Max Min
2566 * -----------
2567 *
2568 * +---------------+----------------------------------------------------------+
2569 * | MAX_A.B | Vector Maximum Based on Absolute Value (byte) |
2570 * | MAX_A.H | Vector Maximum Based on Absolute Value (halfword) |
2571 * | MAX_A.W | Vector Maximum Based on Absolute Value (word) |
2572 * | MAX_A.D | Vector Maximum Based on Absolute Value (doubleword) |
2573 * | MAX_S.B | Vector Signed Maximum (byte) |
2574 * | MAX_S.H | Vector Signed Maximum (halfword) |
2575 * | MAX_S.W | Vector Signed Maximum (word) |
2576 * | MAX_S.D | Vector Signed Maximum (doubleword) |
2577 * | MAX_U.B | Vector Unsigned Maximum (byte) |
2578 * | MAX_U.H | Vector Unsigned Maximum (halfword) |
2579 * | MAX_U.W | Vector Unsigned Maximum (word) |
2580 * | MAX_U.D | Vector Unsigned Maximum (doubleword) |
2581 * | MIN_A.B | Vector Minimum Based on Absolute Value (byte) |
2582 * | MIN_A.H | Vector Minimum Based on Absolute Value (halfword) |
2583 * | MIN_A.W | Vector Minimum Based on Absolute Value (word) |
2584 * | MIN_A.D | Vector Minimum Based on Absolute Value (doubleword) |
2585 * | MIN_S.B | Vector Signed Minimum (byte) |
2586 * | MIN_S.H | Vector Signed Minimum (halfword) |
2587 * | MIN_S.W | Vector Signed Minimum (word) |
2588 * | MIN_S.D | Vector Signed Minimum (doubleword) |
2589 * | MIN_U.B | Vector Unsigned Minimum (byte) |
2590 * | MIN_U.H | Vector Unsigned Minimum (halfword) |
2591 * | MIN_U.W | Vector Unsigned Minimum (word) |
2592 * | MIN_U.D | Vector Unsigned Minimum (doubleword) |
2593 * +---------------+----------------------------------------------------------+
2594 */
2595
2596 static inline int64_t msa_max_a_df(uint32_t df, int64_t arg1, int64_t arg2)
2597 {
2598 uint64_t abs_arg1 = arg1 >= 0 ? arg1 : -arg1;
2599 uint64_t abs_arg2 = arg2 >= 0 ? arg2 : -arg2;
2600 return abs_arg1 > abs_arg2 ? arg1 : arg2;
2601 }
2602
2603 void helper_msa_max_a_b(CPUMIPSState *env,
2604 uint32_t wd, uint32_t ws, uint32_t wt)
2605 {
2606 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2607 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2608 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2609
2610 pwd->b[0] = msa_max_a_df(DF_BYTE, pws->b[0], pwt->b[0]);
2611 pwd->b[1] = msa_max_a_df(DF_BYTE, pws->b[1], pwt->b[1]);
2612 pwd->b[2] = msa_max_a_df(DF_BYTE, pws->b[2], pwt->b[2]);
2613 pwd->b[3] = msa_max_a_df(DF_BYTE, pws->b[3], pwt->b[3]);
2614 pwd->b[4] = msa_max_a_df(DF_BYTE, pws->b[4], pwt->b[4]);
2615 pwd->b[5] = msa_max_a_df(DF_BYTE, pws->b[5], pwt->b[5]);
2616 pwd->b[6] = msa_max_a_df(DF_BYTE, pws->b[6], pwt->b[6]);
2617 pwd->b[7] = msa_max_a_df(DF_BYTE, pws->b[7], pwt->b[7]);
2618 pwd->b[8] = msa_max_a_df(DF_BYTE, pws->b[8], pwt->b[8]);
2619 pwd->b[9] = msa_max_a_df(DF_BYTE, pws->b[9], pwt->b[9]);
2620 pwd->b[10] = msa_max_a_df(DF_BYTE, pws->b[10], pwt->b[10]);
2621 pwd->b[11] = msa_max_a_df(DF_BYTE, pws->b[11], pwt->b[11]);
2622 pwd->b[12] = msa_max_a_df(DF_BYTE, pws->b[12], pwt->b[12]);
2623 pwd->b[13] = msa_max_a_df(DF_BYTE, pws->b[13], pwt->b[13]);
2624 pwd->b[14] = msa_max_a_df(DF_BYTE, pws->b[14], pwt->b[14]);
2625 pwd->b[15] = msa_max_a_df(DF_BYTE, pws->b[15], pwt->b[15]);
2626 }
2627
2628 void helper_msa_max_a_h(CPUMIPSState *env,
2629 uint32_t wd, uint32_t ws, uint32_t wt)
2630 {
2631 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2632 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2633 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2634
2635 pwd->h[0] = msa_max_a_df(DF_HALF, pws->h[0], pwt->h[0]);
2636 pwd->h[1] = msa_max_a_df(DF_HALF, pws->h[1], pwt->h[1]);
2637 pwd->h[2] = msa_max_a_df(DF_HALF, pws->h[2], pwt->h[2]);
2638 pwd->h[3] = msa_max_a_df(DF_HALF, pws->h[3], pwt->h[3]);
2639 pwd->h[4] = msa_max_a_df(DF_HALF, pws->h[4], pwt->h[4]);
2640 pwd->h[5] = msa_max_a_df(DF_HALF, pws->h[5], pwt->h[5]);
2641 pwd->h[6] = msa_max_a_df(DF_HALF, pws->h[6], pwt->h[6]);
2642 pwd->h[7] = msa_max_a_df(DF_HALF, pws->h[7], pwt->h[7]);
2643 }
2644
2645 void helper_msa_max_a_w(CPUMIPSState *env,
2646 uint32_t wd, uint32_t ws, uint32_t wt)
2647 {
2648 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2649 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2650 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2651
2652 pwd->w[0] = msa_max_a_df(DF_WORD, pws->w[0], pwt->w[0]);
2653 pwd->w[1] = msa_max_a_df(DF_WORD, pws->w[1], pwt->w[1]);
2654 pwd->w[2] = msa_max_a_df(DF_WORD, pws->w[2], pwt->w[2]);
2655 pwd->w[3] = msa_max_a_df(DF_WORD, pws->w[3], pwt->w[3]);
2656 }
2657
2658 void helper_msa_max_a_d(CPUMIPSState *env,
2659 uint32_t wd, uint32_t ws, uint32_t wt)
2660 {
2661 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2662 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2663 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2664
2665 pwd->d[0] = msa_max_a_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2666 pwd->d[1] = msa_max_a_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2667 }
2668
2669
2670 static inline int64_t msa_max_s_df(uint32_t df, int64_t arg1, int64_t arg2)
2671 {
2672 return arg1 > arg2 ? arg1 : arg2;
2673 }
2674
2675 void helper_msa_max_s_b(CPUMIPSState *env,
2676 uint32_t wd, uint32_t ws, uint32_t wt)
2677 {
2678 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2679 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2680 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2681
2682 pwd->b[0] = msa_max_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
2683 pwd->b[1] = msa_max_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
2684 pwd->b[2] = msa_max_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
2685 pwd->b[3] = msa_max_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
2686 pwd->b[4] = msa_max_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
2687 pwd->b[5] = msa_max_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
2688 pwd->b[6] = msa_max_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
2689 pwd->b[7] = msa_max_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
2690 pwd->b[8] = msa_max_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
2691 pwd->b[9] = msa_max_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
2692 pwd->b[10] = msa_max_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
2693 pwd->b[11] = msa_max_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
2694 pwd->b[12] = msa_max_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
2695 pwd->b[13] = msa_max_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
2696 pwd->b[14] = msa_max_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
2697 pwd->b[15] = msa_max_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
2698 }
2699
2700 void helper_msa_max_s_h(CPUMIPSState *env,
2701 uint32_t wd, uint32_t ws, uint32_t wt)
2702 {
2703 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2704 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2705 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2706
2707 pwd->h[0] = msa_max_s_df(DF_HALF, pws->h[0], pwt->h[0]);
2708 pwd->h[1] = msa_max_s_df(DF_HALF, pws->h[1], pwt->h[1]);
2709 pwd->h[2] = msa_max_s_df(DF_HALF, pws->h[2], pwt->h[2]);
2710 pwd->h[3] = msa_max_s_df(DF_HALF, pws->h[3], pwt->h[3]);
2711 pwd->h[4] = msa_max_s_df(DF_HALF, pws->h[4], pwt->h[4]);
2712 pwd->h[5] = msa_max_s_df(DF_HALF, pws->h[5], pwt->h[5]);
2713 pwd->h[6] = msa_max_s_df(DF_HALF, pws->h[6], pwt->h[6]);
2714 pwd->h[7] = msa_max_s_df(DF_HALF, pws->h[7], pwt->h[7]);
2715 }
2716
2717 void helper_msa_max_s_w(CPUMIPSState *env,
2718 uint32_t wd, uint32_t ws, uint32_t wt)
2719 {
2720 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2721 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2722 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2723
2724 pwd->w[0] = msa_max_s_df(DF_WORD, pws->w[0], pwt->w[0]);
2725 pwd->w[1] = msa_max_s_df(DF_WORD, pws->w[1], pwt->w[1]);
2726 pwd->w[2] = msa_max_s_df(DF_WORD, pws->w[2], pwt->w[2]);
2727 pwd->w[3] = msa_max_s_df(DF_WORD, pws->w[3], pwt->w[3]);
2728 }
2729
2730 void helper_msa_max_s_d(CPUMIPSState *env,
2731 uint32_t wd, uint32_t ws, uint32_t wt)
2732 {
2733 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2734 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2735 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2736
2737 pwd->d[0] = msa_max_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2738 pwd->d[1] = msa_max_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2739 }
2740
2741
2742 static inline int64_t msa_max_u_df(uint32_t df, int64_t arg1, int64_t arg2)
2743 {
2744 uint64_t u_arg1 = UNSIGNED(arg1, df);
2745 uint64_t u_arg2 = UNSIGNED(arg2, df);
2746 return u_arg1 > u_arg2 ? arg1 : arg2;
2747 }
2748
2749 void helper_msa_max_u_b(CPUMIPSState *env,
2750 uint32_t wd, uint32_t ws, uint32_t wt)
2751 {
2752 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2753 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2754 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2755
2756 pwd->b[0] = msa_max_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
2757 pwd->b[1] = msa_max_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
2758 pwd->b[2] = msa_max_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
2759 pwd->b[3] = msa_max_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
2760 pwd->b[4] = msa_max_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
2761 pwd->b[5] = msa_max_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
2762 pwd->b[6] = msa_max_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
2763 pwd->b[7] = msa_max_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
2764 pwd->b[8] = msa_max_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
2765 pwd->b[9] = msa_max_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
2766 pwd->b[10] = msa_max_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
2767 pwd->b[11] = msa_max_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
2768 pwd->b[12] = msa_max_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
2769 pwd->b[13] = msa_max_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
2770 pwd->b[14] = msa_max_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
2771 pwd->b[15] = msa_max_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
2772 }
2773
2774 void helper_msa_max_u_h(CPUMIPSState *env,
2775 uint32_t wd, uint32_t ws, uint32_t wt)
2776 {
2777 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2778 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2779 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2780
2781 pwd->h[0] = msa_max_u_df(DF_HALF, pws->h[0], pwt->h[0]);
2782 pwd->h[1] = msa_max_u_df(DF_HALF, pws->h[1], pwt->h[1]);
2783 pwd->h[2] = msa_max_u_df(DF_HALF, pws->h[2], pwt->h[2]);
2784 pwd->h[3] = msa_max_u_df(DF_HALF, pws->h[3], pwt->h[3]);
2785 pwd->h[4] = msa_max_u_df(DF_HALF, pws->h[4], pwt->h[4]);
2786 pwd->h[5] = msa_max_u_df(DF_HALF, pws->h[5], pwt->h[5]);
2787 pwd->h[6] = msa_max_u_df(DF_HALF, pws->h[6], pwt->h[6]);
2788 pwd->h[7] = msa_max_u_df(DF_HALF, pws->h[7], pwt->h[7]);
2789 }
2790
2791 void helper_msa_max_u_w(CPUMIPSState *env,
2792 uint32_t wd, uint32_t ws, uint32_t wt)
2793 {
2794 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2795 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2796 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2797
2798 pwd->w[0] = msa_max_u_df(DF_WORD, pws->w[0], pwt->w[0]);
2799 pwd->w[1] = msa_max_u_df(DF_WORD, pws->w[1], pwt->w[1]);
2800 pwd->w[2] = msa_max_u_df(DF_WORD, pws->w[2], pwt->w[2]);
2801 pwd->w[3] = msa_max_u_df(DF_WORD, pws->w[3], pwt->w[3]);
2802 }
2803
2804 void helper_msa_max_u_d(CPUMIPSState *env,
2805 uint32_t wd, uint32_t ws, uint32_t wt)
2806 {
2807 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2808 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2809 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2810
2811 pwd->d[0] = msa_max_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2812 pwd->d[1] = msa_max_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2813 }
2814
2815
2816 static inline int64_t msa_min_a_df(uint32_t df, int64_t arg1, int64_t arg2)
2817 {
2818 uint64_t abs_arg1 = arg1 >= 0 ? arg1 : -arg1;
2819 uint64_t abs_arg2 = arg2 >= 0 ? arg2 : -arg2;
2820 return abs_arg1 < abs_arg2 ? arg1 : arg2;
2821 }
2822
2823 void helper_msa_min_a_b(CPUMIPSState *env,
2824 uint32_t wd, uint32_t ws, uint32_t wt)
2825 {
2826 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2827 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2828 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2829
2830 pwd->b[0] = msa_min_a_df(DF_BYTE, pws->b[0], pwt->b[0]);
2831 pwd->b[1] = msa_min_a_df(DF_BYTE, pws->b[1], pwt->b[1]);
2832 pwd->b[2] = msa_min_a_df(DF_BYTE, pws->b[2], pwt->b[2]);
2833 pwd->b[3] = msa_min_a_df(DF_BYTE, pws->b[3], pwt->b[3]);
2834 pwd->b[4] = msa_min_a_df(DF_BYTE, pws->b[4], pwt->b[4]);
2835 pwd->b[5] = msa_min_a_df(DF_BYTE, pws->b[5], pwt->b[5]);
2836 pwd->b[6] = msa_min_a_df(DF_BYTE, pws->b[6], pwt->b[6]);
2837 pwd->b[7] = msa_min_a_df(DF_BYTE, pws->b[7], pwt->b[7]);
2838 pwd->b[8] = msa_min_a_df(DF_BYTE, pws->b[8], pwt->b[8]);
2839 pwd->b[9] = msa_min_a_df(DF_BYTE, pws->b[9], pwt->b[9]);
2840 pwd->b[10] = msa_min_a_df(DF_BYTE, pws->b[10], pwt->b[10]);
2841 pwd->b[11] = msa_min_a_df(DF_BYTE, pws->b[11], pwt->b[11]);
2842 pwd->b[12] = msa_min_a_df(DF_BYTE, pws->b[12], pwt->b[12]);
2843 pwd->b[13] = msa_min_a_df(DF_BYTE, pws->b[13], pwt->b[13]);
2844 pwd->b[14] = msa_min_a_df(DF_BYTE, pws->b[14], pwt->b[14]);
2845 pwd->b[15] = msa_min_a_df(DF_BYTE, pws->b[15], pwt->b[15]);
2846 }
2847
2848 void helper_msa_min_a_h(CPUMIPSState *env,
2849 uint32_t wd, uint32_t ws, uint32_t wt)
2850 {
2851 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2852 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2853 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2854
2855 pwd->h[0] = msa_min_a_df(DF_HALF, pws->h[0], pwt->h[0]);
2856 pwd->h[1] = msa_min_a_df(DF_HALF, pws->h[1], pwt->h[1]);
2857 pwd->h[2] = msa_min_a_df(DF_HALF, pws->h[2], pwt->h[2]);
2858 pwd->h[3] = msa_min_a_df(DF_HALF, pws->h[3], pwt->h[3]);
2859 pwd->h[4] = msa_min_a_df(DF_HALF, pws->h[4], pwt->h[4]);
2860 pwd->h[5] = msa_min_a_df(DF_HALF, pws->h[5], pwt->h[5]);
2861 pwd->h[6] = msa_min_a_df(DF_HALF, pws->h[6], pwt->h[6]);
2862 pwd->h[7] = msa_min_a_df(DF_HALF, pws->h[7], pwt->h[7]);
2863 }
2864
2865 void helper_msa_min_a_w(CPUMIPSState *env,
2866 uint32_t wd, uint32_t ws, uint32_t wt)
2867 {
2868 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2869 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2870 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2871
2872 pwd->w[0] = msa_min_a_df(DF_WORD, pws->w[0], pwt->w[0]);
2873 pwd->w[1] = msa_min_a_df(DF_WORD, pws->w[1], pwt->w[1]);
2874 pwd->w[2] = msa_min_a_df(DF_WORD, pws->w[2], pwt->w[2]);
2875 pwd->w[3] = msa_min_a_df(DF_WORD, pws->w[3], pwt->w[3]);
2876 }
2877
2878 void helper_msa_min_a_d(CPUMIPSState *env,
2879 uint32_t wd, uint32_t ws, uint32_t wt)
2880 {
2881 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2882 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2883 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2884
2885 pwd->d[0] = msa_min_a_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2886 pwd->d[1] = msa_min_a_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2887 }
2888
2889
2890 static inline int64_t msa_min_s_df(uint32_t df, int64_t arg1, int64_t arg2)
2891 {
2892 return arg1 < arg2 ? arg1 : arg2;
2893 }
2894
2895 void helper_msa_min_s_b(CPUMIPSState *env,
2896 uint32_t wd, uint32_t ws, uint32_t wt)
2897 {
2898 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2899 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2900 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2901
2902 pwd->b[0] = msa_min_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
2903 pwd->b[1] = msa_min_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
2904 pwd->b[2] = msa_min_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
2905 pwd->b[3] = msa_min_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
2906 pwd->b[4] = msa_min_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
2907 pwd->b[5] = msa_min_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
2908 pwd->b[6] = msa_min_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
2909 pwd->b[7] = msa_min_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
2910 pwd->b[8] = msa_min_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
2911 pwd->b[9] = msa_min_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
2912 pwd->b[10] = msa_min_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
2913 pwd->b[11] = msa_min_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
2914 pwd->b[12] = msa_min_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
2915 pwd->b[13] = msa_min_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
2916 pwd->b[14] = msa_min_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
2917 pwd->b[15] = msa_min_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
2918 }
2919
2920 void helper_msa_min_s_h(CPUMIPSState *env,
2921 uint32_t wd, uint32_t ws, uint32_t wt)
2922 {
2923 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2924 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2925 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2926
2927 pwd->h[0] = msa_min_s_df(DF_HALF, pws->h[0], pwt->h[0]);
2928 pwd->h[1] = msa_min_s_df(DF_HALF, pws->h[1], pwt->h[1]);
2929 pwd->h[2] = msa_min_s_df(DF_HALF, pws->h[2], pwt->h[2]);
2930 pwd->h[3] = msa_min_s_df(DF_HALF, pws->h[3], pwt->h[3]);
2931 pwd->h[4] = msa_min_s_df(DF_HALF, pws->h[4], pwt->h[4]);
2932 pwd->h[5] = msa_min_s_df(DF_HALF, pws->h[5], pwt->h[5]);
2933 pwd->h[6] = msa_min_s_df(DF_HALF, pws->h[6], pwt->h[6]);
2934 pwd->h[7] = msa_min_s_df(DF_HALF, pws->h[7], pwt->h[7]);
2935 }
2936
2937 void helper_msa_min_s_w(CPUMIPSState *env,
2938 uint32_t wd, uint32_t ws, uint32_t wt)
2939 {
2940 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2941 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2942 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2943
2944 pwd->w[0] = msa_min_s_df(DF_WORD, pws->w[0], pwt->w[0]);
2945 pwd->w[1] = msa_min_s_df(DF_WORD, pws->w[1], pwt->w[1]);
2946 pwd->w[2] = msa_min_s_df(DF_WORD, pws->w[2], pwt->w[2]);
2947 pwd->w[3] = msa_min_s_df(DF_WORD, pws->w[3], pwt->w[3]);
2948 }
2949
2950 void helper_msa_min_s_d(CPUMIPSState *env,
2951 uint32_t wd, uint32_t ws, uint32_t wt)
2952 {
2953 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2954 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2955 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2956
2957 pwd->d[0] = msa_min_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2958 pwd->d[1] = msa_min_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2959 }
2960
2961
2962 static inline int64_t msa_min_u_df(uint32_t df, int64_t arg1, int64_t arg2)
2963 {
2964 uint64_t u_arg1 = UNSIGNED(arg1, df);
2965 uint64_t u_arg2 = UNSIGNED(arg2, df);
2966 return u_arg1 < u_arg2 ? arg1 : arg2;
2967 }
2968
2969 void helper_msa_min_u_b(CPUMIPSState *env,
2970 uint32_t wd, uint32_t ws, uint32_t wt)
2971 {
2972 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2973 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2974 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2975
2976 pwd->b[0] = msa_min_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
2977 pwd->b[1] = msa_min_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
2978 pwd->b[2] = msa_min_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
2979 pwd->b[3] = msa_min_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
2980 pwd->b[4] = msa_min_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
2981 pwd->b[5] = msa_min_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
2982 pwd->b[6] = msa_min_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
2983 pwd->b[7] = msa_min_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
2984 pwd->b[8] = msa_min_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
2985 pwd->b[9] = msa_min_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
2986 pwd->b[10] = msa_min_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
2987 pwd->b[11] = msa_min_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
2988 pwd->b[12] = msa_min_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
2989 pwd->b[13] = msa_min_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
2990 pwd->b[14] = msa_min_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
2991 pwd->b[15] = msa_min_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
2992 }
2993
2994 void helper_msa_min_u_h(CPUMIPSState *env,
2995 uint32_t wd, uint32_t ws, uint32_t wt)
2996 {
2997 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2998 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2999 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3000
3001 pwd->h[0] = msa_min_u_df(DF_HALF, pws->h[0], pwt->h[0]);
3002 pwd->h[1] = msa_min_u_df(DF_HALF, pws->h[1], pwt->h[1]);
3003 pwd->h[2] = msa_min_u_df(DF_HALF, pws->h[2], pwt->h[2]);
3004 pwd->h[3] = msa_min_u_df(DF_HALF, pws->h[3], pwt->h[3]);
3005 pwd->h[4] = msa_min_u_df(DF_HALF, pws->h[4], pwt->h[4]);
3006 pwd->h[5] = msa_min_u_df(DF_HALF, pws->h[5], pwt->h[5]);
3007 pwd->h[6] = msa_min_u_df(DF_HALF, pws->h[6], pwt->h[6]);
3008 pwd->h[7] = msa_min_u_df(DF_HALF, pws->h[7], pwt->h[7]);
3009 }
3010
3011 void helper_msa_min_u_w(CPUMIPSState *env,
3012 uint32_t wd, uint32_t ws, uint32_t wt)
3013 {
3014 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3015 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3016 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3017
3018 pwd->w[0] = msa_min_u_df(DF_WORD, pws->w[0], pwt->w[0]);
3019 pwd->w[1] = msa_min_u_df(DF_WORD, pws->w[1], pwt->w[1]);
3020 pwd->w[2] = msa_min_u_df(DF_WORD, pws->w[2], pwt->w[2]);
3021 pwd->w[3] = msa_min_u_df(DF_WORD, pws->w[3], pwt->w[3]);
3022 }
3023
3024 void helper_msa_min_u_d(CPUMIPSState *env,
3025 uint32_t wd, uint32_t ws, uint32_t wt)
3026 {
3027 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3028 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3029 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3030
3031 pwd->d[0] = msa_min_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3032 pwd->d[1] = msa_min_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3033 }
3034
3035
3036 /*
3037 * Int Modulo
3038 * ----------
3039 *
3040 * +---------------+----------------------------------------------------------+
3041 * | MOD_S.B | Vector Signed Modulo (byte) |
3042 * | MOD_S.H | Vector Signed Modulo (halfword) |
3043 * | MOD_S.W | Vector Signed Modulo (word) |
3044 * | MOD_S.D | Vector Signed Modulo (doubleword) |
3045 * | MOD_U.B | Vector Unsigned Modulo (byte) |
3046 * | MOD_U.H | Vector Unsigned Modulo (halfword) |
3047 * | MOD_U.W | Vector Unsigned Modulo (word) |
3048 * | MOD_U.D | Vector Unsigned Modulo (doubleword) |
3049 * +---------------+----------------------------------------------------------+
3050 */
3051
3052 static inline int64_t msa_mod_s_df(uint32_t df, int64_t arg1, int64_t arg2)
3053 {
3054 if (arg1 == DF_MIN_INT(df) && arg2 == -1) {
3055 return 0;
3056 }
3057 return arg2 ? arg1 % arg2 : arg1;
3058 }
3059
3060 void helper_msa_mod_s_b(CPUMIPSState *env,
3061 uint32_t wd, uint32_t ws, uint32_t wt)
3062 {
3063 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3064 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3065 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3066
3067 pwd->b[0] = msa_mod_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
3068 pwd->b[1] = msa_mod_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
3069 pwd->b[2] = msa_mod_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
3070 pwd->b[3] = msa_mod_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
3071 pwd->b[4] = msa_mod_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
3072 pwd->b[5] = msa_mod_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
3073 pwd->b[6] = msa_mod_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
3074 pwd->b[7] = msa_mod_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
3075 pwd->b[8] = msa_mod_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
3076 pwd->b[9] = msa_mod_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
3077 pwd->b[10] = msa_mod_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
3078 pwd->b[11] = msa_mod_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
3079 pwd->b[12] = msa_mod_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
3080 pwd->b[13] = msa_mod_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
3081 pwd->b[14] = msa_mod_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
3082 pwd->b[15] = msa_mod_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
3083 }
3084
3085 void helper_msa_mod_s_h(CPUMIPSState *env,
3086 uint32_t wd, uint32_t ws, uint32_t wt)
3087 {
3088 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3089 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3090 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3091
3092 pwd->h[0] = msa_mod_s_df(DF_HALF, pws->h[0], pwt->h[0]);
3093 pwd->h[1] = msa_mod_s_df(DF_HALF, pws->h[1], pwt->h[1]);
3094 pwd->h[2] = msa_mod_s_df(DF_HALF, pws->h[2], pwt->h[2]);
3095 pwd->h[3] = msa_mod_s_df(DF_HALF, pws->h[3], pwt->h[3]);
3096 pwd->h[4] = msa_mod_s_df(DF_HALF, pws->h[4], pwt->h[4]);
3097 pwd->h[5] = msa_mod_s_df(DF_HALF, pws->h[5], pwt->h[5]);
3098 pwd->h[6] = msa_mod_s_df(DF_HALF, pws->h[6], pwt->h[6]);
3099 pwd->h[7] = msa_mod_s_df(DF_HALF, pws->h[7], pwt->h[7]);
3100 }
3101
3102 void helper_msa_mod_s_w(CPUMIPSState *env,
3103 uint32_t wd, uint32_t ws, uint32_t wt)
3104 {
3105 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3106 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3107 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3108
3109 pwd->w[0] = msa_mod_s_df(DF_WORD, pws->w[0], pwt->w[0]);
3110 pwd->w[1] = msa_mod_s_df(DF_WORD, pws->w[1], pwt->w[1]);
3111 pwd->w[2] = msa_mod_s_df(DF_WORD, pws->w[2], pwt->w[2]);
3112 pwd->w[3] = msa_mod_s_df(DF_WORD, pws->w[3], pwt->w[3]);
3113 }
3114
3115 void helper_msa_mod_s_d(CPUMIPSState *env,
3116 uint32_t wd, uint32_t ws, uint32_t wt)
3117 {
3118 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3119 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3120 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3121
3122 pwd->d[0] = msa_mod_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3123 pwd->d[1] = msa_mod_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3124 }
3125
3126 static inline int64_t msa_mod_u_df(uint32_t df, int64_t arg1, int64_t arg2)
3127 {
3128 uint64_t u_arg1 = UNSIGNED(arg1, df);
3129 uint64_t u_arg2 = UNSIGNED(arg2, df);
3130 return u_arg2 ? u_arg1 % u_arg2 : u_arg1;
3131 }
3132
3133 void helper_msa_mod_u_b(CPUMIPSState *env,
3134 uint32_t wd, uint32_t ws, uint32_t wt)
3135 {
3136 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3137 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3138 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3139
3140 pwd->b[0] = msa_mod_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
3141 pwd->b[1] = msa_mod_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
3142 pwd->b[2] = msa_mod_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
3143 pwd->b[3] = msa_mod_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
3144 pwd->b[4] = msa_mod_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
3145 pwd->b[5] = msa_mod_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
3146 pwd->b[6] = msa_mod_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
3147 pwd->b[7] = msa_mod_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
3148 pwd->b[8] = msa_mod_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
3149 pwd->b[9] = msa_mod_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
3150 pwd->b[10] = msa_mod_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
3151 pwd->b[11] = msa_mod_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
3152 pwd->b[12] = msa_mod_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
3153 pwd->b[13] = msa_mod_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
3154 pwd->b[14] = msa_mod_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
3155 pwd->b[15] = msa_mod_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
3156 }
3157
3158 void helper_msa_mod_u_h(CPUMIPSState *env,
3159 uint32_t wd, uint32_t ws, uint32_t wt)
3160 {
3161 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3162 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3163 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3164
3165 pwd->h[0] = msa_mod_u_df(DF_HALF, pws->h[0], pwt->h[0]);
3166 pwd->h[1] = msa_mod_u_df(DF_HALF, pws->h[1], pwt->h[1]);
3167 pwd->h[2] = msa_mod_u_df(DF_HALF, pws->h[2], pwt->h[2]);
3168 pwd->h[3] = msa_mod_u_df(DF_HALF, pws->h[3], pwt->h[3]);
3169 pwd->h[4] = msa_mod_u_df(DF_HALF, pws->h[4], pwt->h[4]);
3170 pwd->h[5] = msa_mod_u_df(DF_HALF, pws->h[5], pwt->h[5]);
3171 pwd->h[6] = msa_mod_u_df(DF_HALF, pws->h[6], pwt->h[6]);
3172 pwd->h[7] = msa_mod_u_df(DF_HALF, pws->h[7], pwt->h[7]);
3173 }
3174
3175 void helper_msa_mod_u_w(CPUMIPSState *env,
3176 uint32_t wd, uint32_t ws, uint32_t wt)
3177 {
3178 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3179 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3180 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3181
3182 pwd->w[0] = msa_mod_u_df(DF_WORD, pws->w[0], pwt->w[0]);
3183 pwd->w[1] = msa_mod_u_df(DF_WORD, pws->w[1], pwt->w[1]);
3184 pwd->w[2] = msa_mod_u_df(DF_WORD, pws->w[2], pwt->w[2]);
3185 pwd->w[3] = msa_mod_u_df(DF_WORD, pws->w[3], pwt->w[3]);
3186 }
3187
3188 void helper_msa_mod_u_d(CPUMIPSState *env,
3189 uint32_t wd, uint32_t ws, uint32_t wt)
3190 {
3191 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3192 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3193 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3194
3195 pwd->d[0] = msa_mod_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3196 pwd->d[1] = msa_mod_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3197 }
3198
3199
3200 /*
3201 * Int Multiply
3202 * ------------
3203 *
3204 * +---------------+----------------------------------------------------------+
3205 * | MADDV.B | Vector Multiply and Add (byte) |
3206 * | MADDV.H | Vector Multiply and Add (halfword) |
3207 * | MADDV.W | Vector Multiply and Add (word) |
3208 * | MADDV.D | Vector Multiply and Add (doubleword) |
3209 * | MSUBV.B | Vector Multiply and Subtract (byte) |
3210 * | MSUBV.H | Vector Multiply and Subtract (halfword) |
3211 * | MSUBV.W | Vector Multiply and Subtract (word) |
3212 * | MSUBV.D | Vector Multiply and Subtract (doubleword) |
3213 * | MULV.B | Vector Multiply (byte) |
3214 * | MULV.H | Vector Multiply (halfword) |
3215 * | MULV.W | Vector Multiply (word) |
3216 * | MULV.D | Vector Multiply (doubleword) |
3217 * +---------------+----------------------------------------------------------+
3218 */
3219
3220 static inline int64_t msa_maddv_df(uint32_t df, int64_t dest, int64_t arg1,
3221 int64_t arg2)
3222 {
3223 return dest + arg1 * arg2;
3224 }
3225
3226 void helper_msa_maddv_b(CPUMIPSState *env,
3227 uint32_t wd, uint32_t ws, uint32_t wt)
3228 {
3229 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3230 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3231 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3232
3233 pwd->b[0] = msa_maddv_df(DF_BYTE, pwt->b[0], pws->b[0], pwt->b[0]);
3234 pwd->b[1] = msa_maddv_df(DF_BYTE, pwt->b[1], pws->b[1], pwt->b[1]);
3235 pwd->b[2] = msa_maddv_df(DF_BYTE, pwt->b[2], pws->b[2], pwt->b[2]);
3236 pwd->b[3] = msa_maddv_df(DF_BYTE, pwt->b[3], pws->b[3], pwt->b[3]);
3237 pwd->b[4] = msa_maddv_df(DF_BYTE, pwt->b[4], pws->b[4], pwt->b[4]);
3238 pwd->b[5] = msa_maddv_df(DF_BYTE, pwt->b[5], pws->b[5], pwt->b[5]);
3239 pwd->b[6] = msa_maddv_df(DF_BYTE, pwt->b[6], pws->b[6], pwt->b[6]);
3240 pwd->b[7] = msa_maddv_df(DF_BYTE, pwt->b[7], pws->b[7], pwt->b[7]);
3241 pwd->b[8] = msa_maddv_df(DF_BYTE, pwt->b[8], pws->b[8], pwt->b[8]);
3242 pwd->b[9] = msa_maddv_df(DF_BYTE, pwt->b[9], pws->b[9], pwt->b[9]);
3243 pwd->b[10] = msa_maddv_df(DF_BYTE, pwt->b[10], pws->b[10], pwt->b[10]);
3244 pwd->b[11] = msa_maddv_df(DF_BYTE, pwt->b[11], pws->b[11], pwt->b[11]);
3245 pwd->b[12] = msa_maddv_df(DF_BYTE, pwt->b[12], pws->b[12], pwt->b[12]);
3246 pwd->b[13] = msa_maddv_df(DF_BYTE, pwt->b[13], pws->b[13], pwt->b[13]);
3247 pwd->b[14] = msa_maddv_df(DF_BYTE, pwt->b[14], pws->b[14], pwt->b[14]);
3248 pwd->b[15] = msa_maddv_df(DF_BYTE, pwt->b[15], pws->b[15], pwt->b[15]);
3249 }
3250
3251 void helper_msa_maddv_h(CPUMIPSState *env,
3252 uint32_t wd, uint32_t ws, uint32_t wt)
3253 {
3254 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3255 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3256 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3257
3258 pwd->h[0] = msa_maddv_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
3259 pwd->h[1] = msa_maddv_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
3260 pwd->h[2] = msa_maddv_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
3261 pwd->h[3] = msa_maddv_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
3262 pwd->h[4] = msa_maddv_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
3263 pwd->h[5] = msa_maddv_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
3264 pwd->h[6] = msa_maddv_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
3265 pwd->h[7] = msa_maddv_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
3266 }
3267
3268 void helper_msa_maddv_w(CPUMIPSState *env,
3269 uint32_t wd, uint32_t ws, uint32_t wt)
3270 {
3271 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3272 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3273 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3274
3275 pwd->w[0] = msa_maddv_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
3276 pwd->w[1] = msa_maddv_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
3277 pwd->w[2] = msa_maddv_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
3278 pwd->w[3] = msa_maddv_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
3279 }
3280
3281 void helper_msa_maddv_d(CPUMIPSState *env,
3282 uint32_t wd, uint32_t ws, uint32_t wt)
3283 {
3284 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3285 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3286 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3287
3288 pwd->d[0] = msa_maddv_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
3289 pwd->d[1] = msa_maddv_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
3290 }
3291
3292 static inline int64_t msa_msubv_df(uint32_t df, int64_t dest, int64_t arg1,
3293 int64_t arg2)
3294 {
3295 return dest - arg1 * arg2;
3296 }
3297
3298 void helper_msa_msubv_b(CPUMIPSState *env,
3299 uint32_t wd, uint32_t ws, uint32_t wt)
3300 {
3301 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3302 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3303 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3304
3305 pwd->b[0] = msa_msubv_df(DF_BYTE, pwt->b[0], pws->b[0], pwt->b[0]);
3306 pwd->b[1] = msa_msubv_df(DF_BYTE, pwt->b[1], pws->b[1], pwt->b[1]);
3307 pwd->b[2] = msa_msubv_df(DF_BYTE, pwt->b[2], pws->b[2], pwt->b[2]);
3308 pwd->b[3] = msa_msubv_df(DF_BYTE, pwt->b[3], pws->b[3], pwt->b[3]);
3309 pwd->b[4] = msa_msubv_df(DF_BYTE, pwt->b[4], pws->b[4], pwt->b[4]);
3310 pwd->b[5] = msa_msubv_df(DF_BYTE, pwt->b[5], pws->b[5], pwt->b[5]);
3311 pwd->b[6] = msa_msubv_df(DF_BYTE, pwt->b[6], pws->b[6], pwt->b[6]);
3312 pwd->b[7] = msa_msubv_df(DF_BYTE, pwt->b[7], pws->b[7], pwt->b[7]);
3313 pwd->b[8] = msa_msubv_df(DF_BYTE, pwt->b[8], pws->b[8], pwt->b[8]);
3314 pwd->b[9] = msa_msubv_df(DF_BYTE, pwt->b[9], pws->b[9], pwt->b[9]);
3315 pwd->b[10] = msa_msubv_df(DF_BYTE, pwt->b[10], pws->b[10], pwt->b[10]);
3316 pwd->b[11] = msa_msubv_df(DF_BYTE, pwt->b[11], pws->b[11], pwt->b[11]);
3317 pwd->b[12] = msa_msubv_df(DF_BYTE, pwt->b[12], pws->b[12], pwt->b[12]);
3318 pwd->b[13] = msa_msubv_df(DF_BYTE, pwt->b[13], pws->b[13], pwt->b[13]);
3319 pwd->b[14] = msa_msubv_df(DF_BYTE, pwt->b[14], pws->b[14], pwt->b[14]);
3320 pwd->b[15] = msa_msubv_df(DF_BYTE, pwt->b[15], pws->b[15], pwt->b[15]);
3321 }
3322
3323 void helper_msa_msubv_h(CPUMIPSState *env,
3324 uint32_t wd, uint32_t ws, uint32_t wt)
3325 {
3326 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3327 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3328 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3329
3330 pwd->h[0] = msa_msubv_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
3331 pwd->h[1] = msa_msubv_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
3332 pwd->h[2] = msa_msubv_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
3333 pwd->h[3] = msa_msubv_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
3334 pwd->h[4] = msa_msubv_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
3335 pwd->h[5] = msa_msubv_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
3336 pwd->h[6] = msa_msubv_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
3337 pwd->h[7] = msa_msubv_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
3338 }
3339
3340 void helper_msa_msubv_w(CPUMIPSState *env,
3341 uint32_t wd, uint32_t ws, uint32_t wt)
3342 {
3343 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3344 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3345 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3346
3347 pwd->w[0] = msa_msubv_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
3348 pwd->w[1] = msa_msubv_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
3349 pwd->w[2] = msa_msubv_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
3350 pwd->w[3] = msa_msubv_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
3351 }
3352
3353 void helper_msa_msubv_d(CPUMIPSState *env,
3354 uint32_t wd, uint32_t ws, uint32_t wt)
3355 {
3356 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3357 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3358 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3359
3360 pwd->d[0] = msa_msubv_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
3361 pwd->d[1] = msa_msubv_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
3362 }
3363
3364
3365 static inline int64_t msa_mulv_df(uint32_t df, int64_t arg1, int64_t arg2)
3366 {
3367 return arg1 * arg2;
3368 }
3369
3370 void helper_msa_mulv_b(CPUMIPSState *env,
3371 uint32_t wd, uint32_t ws, uint32_t wt)
3372 {
3373 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3374 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3375 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3376
3377 pwd->b[0] = msa_mulv_df(DF_BYTE, pws->b[0], pwt->b[0]);
3378 pwd->b[1] = msa_mulv_df(DF_BYTE, pws->b[1], pwt->b[1]);
3379 pwd->b[2] = msa_mulv_df(DF_BYTE, pws->b[2], pwt->b[2]);
3380 pwd->b[3] = msa_mulv_df(DF_BYTE, pws->b[3], pwt->b[3]);
3381 pwd->b[4] = msa_mulv_df(DF_BYTE, pws->b[4], pwt->b[4]);
3382 pwd->b[5] = msa_mulv_df(DF_BYTE, pws->b[5], pwt->b[5]);
3383 pwd->b[6] = msa_mulv_df(DF_BYTE, pws->b[6], pwt->b[6]);
3384 pwd->b[7] = msa_mulv_df(DF_BYTE, pws->b[7], pwt->b[7]);
3385 pwd->b[8] = msa_mulv_df(DF_BYTE, pws->b[8], pwt->b[8]);
3386 pwd->b[9] = msa_mulv_df(DF_BYTE, pws->b[9], pwt->b[9]);
3387 pwd->b[10] = msa_mulv_df(DF_BYTE, pws->b[10], pwt->b[10]);
3388 pwd->b[11] = msa_mulv_df(DF_BYTE, pws->b[11], pwt->b[11]);
3389 pwd->b[12] = msa_mulv_df(DF_BYTE, pws->b[12], pwt->b[12]);
3390 pwd->b[13] = msa_mulv_df(DF_BYTE, pws->b[13], pwt->b[13]);
3391 pwd->b[14] = msa_mulv_df(DF_BYTE, pws->b[14], pwt->b[14]);
3392 pwd->b[15] = msa_mulv_df(DF_BYTE, pws->b[15], pwt->b[15]);
3393 }
3394
3395 void helper_msa_mulv_h(CPUMIPSState *env,
3396 uint32_t wd, uint32_t ws, uint32_t wt)
3397 {
3398 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3399 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3400 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3401
3402 pwd->h[0] = msa_mulv_df(DF_HALF, pws->h[0], pwt->h[0]);
3403 pwd->h[1] = msa_mulv_df(DF_HALF, pws->h[1], pwt->h[1]);
3404 pwd->h[2] = msa_mulv_df(DF_HALF, pws->h[2], pwt->h[2]);
3405 pwd->h[3] = msa_mulv_df(DF_HALF, pws->h[3], pwt->h[3]);
3406 pwd->h[4] = msa_mulv_df(DF_HALF, pws->h[4], pwt->h[4]);
3407 pwd->h[5] = msa_mulv_df(DF_HALF, pws->h[5], pwt->h[5]);
3408 pwd->h[6] = msa_mulv_df(DF_HALF, pws->h[6], pwt->h[6]);
3409 pwd->h[7] = msa_mulv_df(DF_HALF, pws->h[7], pwt->h[7]);
3410 }
3411
3412 void helper_msa_mulv_w(CPUMIPSState *env,
3413 uint32_t wd, uint32_t ws, uint32_t wt)
3414 {
3415 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3416 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3417 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3418
3419 pwd->w[0] = msa_mulv_df(DF_WORD, pws->w[0], pwt->w[0]);
3420 pwd->w[1] = msa_mulv_df(DF_WORD, pws->w[1], pwt->w[1]);
3421 pwd->w[2] = msa_mulv_df(DF_WORD, pws->w[2], pwt->w[2]);
3422 pwd->w[3] = msa_mulv_df(DF_WORD, pws->w[3], pwt->w[3]);
3423 }
3424
3425 void helper_msa_mulv_d(CPUMIPSState *env,
3426 uint32_t wd, uint32_t ws, uint32_t wt)
3427 {
3428 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3429 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3430 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3431
3432 pwd->d[0] = msa_mulv_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3433 pwd->d[1] = msa_mulv_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3434 }
3435
3436
3437 /*
3438 * Int Subtract
3439 * ------------
3440 *
3441 * +---------------+----------------------------------------------------------+
3442 * | ASUB_S.B | Vector Absolute Values of Signed Subtract (byte) |
3443 * | ASUB_S.H | Vector Absolute Values of Signed Subtract (halfword) |
3444 * | ASUB_S.W | Vector Absolute Values of Signed Subtract (word) |
3445 * | ASUB_S.D | Vector Absolute Values of Signed Subtract (doubleword) |
3446 * | ASUB_U.B | Vector Absolute Values of Unsigned Subtract (byte) |
3447 * | ASUB_U.H | Vector Absolute Values of Unsigned Subtract (halfword) |
3448 * | ASUB_U.W | Vector Absolute Values of Unsigned Subtract (word) |
3449 * | ASUB_U.D | Vector Absolute Values of Unsigned Subtract (doubleword) |
3450 * | HSUB_S.H | Vector Signed Horizontal Subtract (halfword) |
3451 * | HSUB_S.W | Vector Signed Horizontal Subtract (word) |
3452 * | HSUB_S.D | Vector Signed Horizontal Subtract (doubleword) |
3453 * | HSUB_U.H | Vector Unigned Horizontal Subtract (halfword) |
3454 * | HSUB_U.W | Vector Unigned Horizontal Subtract (word) |
3455 * | HSUB_U.D | Vector Unigned Horizontal Subtract (doubleword) |
3456 * | SUBS_S.B | Vector Signed Saturated Subtract (of Signed) (byte) |
3457 * | SUBS_S.H | Vector Signed Saturated Subtract (of Signed) (halfword) |
3458 * | SUBS_S.W | Vector Signed Saturated Subtract (of Signed) (word) |
3459 * | SUBS_S.D | Vector Signed Saturated Subtract (of Signed) (doubleword)|
3460 * | SUBS_U.B | Vector Unsigned Saturated Subtract (of Uns.) (byte) |
3461 * | SUBS_U.H | Vector Unsigned Saturated Subtract (of Uns.) (halfword) |
3462 * | SUBS_U.W | Vector Unsigned Saturated Subtract (of Uns.) (word) |
3463 * | SUBS_U.D | Vector Unsigned Saturated Subtract (of Uns.) (doubleword)|
3464 * | SUBSUS_U.B | Vector Uns. Sat. Subtract (of S. from Uns.) (byte) |
3465 * | SUBSUS_U.H | Vector Uns. Sat. Subtract (of S. from Uns.) (halfword) |
3466 * | SUBSUS_U.W | Vector Uns. Sat. Subtract (of S. from Uns.) (word) |
3467 * | SUBSUS_U.D | Vector Uns. Sat. Subtract (of S. from Uns.) (doubleword) |
3468 * | SUBSUU_S.B | Vector Signed Saturated Subtract (of Uns.) (byte) |
3469 * | SUBSUU_S.H | Vector Signed Saturated Subtract (of Uns.) (halfword) |
3470 * | SUBSUU_S.W | Vector Signed Saturated Subtract (of Uns.) (word) |
3471 * | SUBSUU_S.D | Vector Signed Saturated Subtract (of Uns.) (doubleword) |
3472 * | SUBV.B | Vector Subtract (byte) |
3473 * | SUBV.H | Vector Subtract (halfword) |
3474 * | SUBV.W | Vector Subtract (word) |
3475 * | SUBV.D | Vector Subtract (doubleword) |
3476 * +---------------+----------------------------------------------------------+
3477 */
3478
3479
3480 static inline int64_t msa_asub_s_df(uint32_t df, int64_t arg1, int64_t arg2)
3481 {
3482 /* signed compare */
3483 return (arg1 < arg2) ?
3484 (uint64_t)(arg2 - arg1) : (uint64_t)(arg1 - arg2);
3485 }
3486
3487 void helper_msa_asub_s_b(CPUMIPSState *env,
3488 uint32_t wd, uint32_t ws, uint32_t wt)
3489 {
3490 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3491 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3492 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3493
3494 pwd->b[0] = msa_asub_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
3495 pwd->b[1] = msa_asub_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
3496 pwd->b[2] = msa_asub_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
3497 pwd->b[3] = msa_asub_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
3498 pwd->b[4] = msa_asub_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
3499 pwd->b[5] = msa_asub_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
3500 pwd->b[6] = msa_asub_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
3501 pwd->b[7] = msa_asub_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
3502 pwd->b[8] = msa_asub_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
3503 pwd->b[9] = msa_asub_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
3504 pwd->b[10] = msa_asub_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
3505 pwd->b[11] = msa_asub_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
3506 pwd->b[12] = msa_asub_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
3507 pwd->b[13] = msa_asub_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
3508 pwd->b[14] = msa_asub_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
3509 pwd->b[15] = msa_asub_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
3510 }
3511
3512 void helper_msa_asub_s_h(CPUMIPSState *env,
3513 uint32_t wd, uint32_t ws, uint32_t wt)
3514 {
3515 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3516 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3517 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3518
3519 pwd->h[0] = msa_asub_s_df(DF_HALF, pws->h[0], pwt->h[0]);
3520 pwd->h[1] = msa_asub_s_df(DF_HALF, pws->h[1], pwt->h[1]);
3521 pwd->h[2] = msa_asub_s_df(DF_HALF, pws->h[2], pwt->h[2]);
3522 pwd->h[3] = msa_asub_s_df(DF_HALF, pws->h[3], pwt->h[3]);
3523 pwd->h[4] = msa_asub_s_df(DF_HALF, pws->h[4], pwt->h[4]);
3524 pwd->h[5] = msa_asub_s_df(DF_HALF, pws->h[5], pwt->h[5]);
3525 pwd->h[6] = msa_asub_s_df(DF_HALF, pws->h[6], pwt->h[6]);
3526 pwd->h[7] = msa_asub_s_df(DF_HALF, pws->h[7], pwt->h[7]);
3527 }
3528
3529 void helper_msa_asub_s_w(CPUMIPSState *env,
3530 uint32_t wd, uint32_t ws, uint32_t wt)
3531 {
3532 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3533 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3534 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3535
3536 pwd->w[0] = msa_asub_s_df(DF_WORD, pws->w[0], pwt->w[0]);
3537 pwd->w[1] = msa_asub_s_df(DF_WORD, pws->w[1], pwt->w[1]);
3538 pwd->w[2] = msa_asub_s_df(DF_WORD, pws->w[2], pwt->w[2]);
3539 pwd->w[3] = msa_asub_s_df(DF_WORD, pws->w[3], pwt->w[3]);
3540 }
3541
3542 void helper_msa_asub_s_d(CPUMIPSState *env,
3543 uint32_t wd, uint32_t ws, uint32_t wt)
3544 {
3545 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3546 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3547 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3548
3549 pwd->d[0] = msa_asub_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3550 pwd->d[1] = msa_asub_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3551 }
3552
3553
3554 static inline uint64_t msa_asub_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
3555 {
3556 uint64_t u_arg1 = UNSIGNED(arg1, df);
3557 uint64_t u_arg2 = UNSIGNED(arg2, df);
3558 /* unsigned compare */
3559 return (u_arg1 < u_arg2) ?
3560 (uint64_t)(u_arg2 - u_arg1) : (uint64_t)(u_arg1 - u_arg2);
3561 }
3562
3563 void helper_msa_asub_u_b(CPUMIPSState *env,
3564 uint32_t wd, uint32_t ws, uint32_t wt)
3565 {
3566 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3567 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3568 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3569
3570 pwd->b[0] = msa_asub_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
3571 pwd->b[1] = msa_asub_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
3572 pwd->b[2] = msa_asub_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
3573 pwd->b[3] = msa_asub_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
3574 pwd->b[4] = msa_asub_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
3575 pwd->b[5] = msa_asub_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
3576 pwd->b[6] = msa_asub_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
3577 pwd->b[7] = msa_asub_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
3578 pwd->b[8] = msa_asub_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
3579 pwd->b[9] = msa_asub_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
3580 pwd->b[10] = msa_asub_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
3581 pwd->b[11] = msa_asub_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
3582 pwd->b[12] = msa_asub_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
3583 pwd->b[13] = msa_asub_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
3584 pwd->b[14] = msa_asub_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
3585 pwd->b[15] = msa_asub_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
3586 }
3587
3588 void helper_msa_asub_u_h(CPUMIPSState *env,
3589 uint32_t wd, uint32_t ws, uint32_t wt)
3590 {
3591 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3592 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3593 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3594
3595 pwd->h[0] = msa_asub_u_df(DF_HALF, pws->h[0], pwt->h[0]);
3596 pwd->h[1] = msa_asub_u_df(DF_HALF, pws->h[1], pwt->h[1]);
3597 pwd->h[2] = msa_asub_u_df(DF_HALF, pws->h[2], pwt->h[2]);
3598 pwd->h[3] = msa_asub_u_df(DF_HALF, pws->h[3], pwt->h[3]);
3599 pwd->h[4] = msa_asub_u_df(DF_HALF, pws->h[4], pwt->h[4]);
3600 pwd->h[5] = msa_asub_u_df(DF_HALF, pws->h[5], pwt->h[5]);
3601 pwd->h[6] = msa_asub_u_df(DF_HALF, pws->h[6], pwt->h[6]);
3602 pwd->h[7] = msa_asub_u_df(DF_HALF, pws->h[7], pwt->h[7]);
3603 }
3604
3605 void helper_msa_asub_u_w(CPUMIPSState *env,
3606 uint32_t wd, uint32_t ws, uint32_t wt)
3607 {
3608 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3609 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3610 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3611
3612 pwd->w[0] = msa_asub_u_df(DF_WORD, pws->w[0], pwt->w[0]);
3613 pwd->w[1] = msa_asub_u_df(DF_WORD, pws->w[1], pwt->w[1]);
3614 pwd->w[2] = msa_asub_u_df(DF_WORD, pws->w[2], pwt->w[2]);
3615 pwd->w[3] = msa_asub_u_df(DF_WORD, pws->w[3], pwt->w[3]);
3616 }
3617
3618 void helper_msa_asub_u_d(CPUMIPSState *env,
3619 uint32_t wd, uint32_t ws, uint32_t wt)
3620 {
3621 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3622 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3623 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3624
3625 pwd->d[0] = msa_asub_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3626 pwd->d[1] = msa_asub_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3627 }
3628
3629
3630 static inline int64_t msa_hsub_s_df(uint32_t df, int64_t arg1, int64_t arg2)
3631 {
3632 return SIGNED_ODD(arg1, df) - SIGNED_EVEN(arg2, df);
3633 }
3634
3635 void helper_msa_hsub_s_h(CPUMIPSState *env,
3636 uint32_t wd, uint32_t ws, uint32_t wt)
3637 {
3638 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3639 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3640 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3641
3642 pwd->h[0] = msa_hsub_s_df(DF_HALF, pws->h[0], pwt->h[0]);
3643 pwd->h[1] = msa_hsub_s_df(DF_HALF, pws->h[1], pwt->h[1]);
3644 pwd->h[2] = msa_hsub_s_df(DF_HALF, pws->h[2], pwt->h[2]);
3645 pwd->h[3] = msa_hsub_s_df(DF_HALF, pws->h[3], pwt->h[3]);
3646 pwd->h[4] = msa_hsub_s_df(DF_HALF, pws->h[4], pwt->h[4]);
3647 pwd->h[5] = msa_hsub_s_df(DF_HALF, pws->h[5], pwt->h[5]);
3648 pwd->h[6] = msa_hsub_s_df(DF_HALF, pws->h[6], pwt->h[6]);
3649 pwd->h[7] = msa_hsub_s_df(DF_HALF, pws->h[7], pwt->h[7]);
3650 }
3651
3652 void helper_msa_hsub_s_w(CPUMIPSState *env,
3653 uint32_t wd, uint32_t ws, uint32_t wt)
3654 {
3655 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3656 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3657 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3658
3659 pwd->w[0] = msa_hsub_s_df(DF_WORD, pws->w[0], pwt->w[0]);
3660 pwd->w[1] = msa_hsub_s_df(DF_WORD, pws->w[1], pwt->w[1]);
3661 pwd->w[2] = msa_hsub_s_df(DF_WORD, pws->w[2], pwt->w[2]);
3662 pwd->w[3] = msa_hsub_s_df(DF_WORD, pws->w[3], pwt->w[3]);
3663 }
3664
3665 void helper_msa_hsub_s_d(CPUMIPSState *env,
3666 uint32_t wd, uint32_t ws, uint32_t wt)
3667 {
3668 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3669 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3670 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3671
3672 pwd->d[0] = msa_hsub_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3673 pwd->d[1] = msa_hsub_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3674 }
3675
3676
3677 static inline int64_t msa_hsub_u_df(uint32_t df, int64_t arg1, int64_t arg2)
3678 {
3679 return UNSIGNED_ODD(arg1, df) - UNSIGNED_EVEN(arg2, df);
3680 }
3681
3682 void helper_msa_hsub_u_h(CPUMIPSState *env,
3683 uint32_t wd, uint32_t ws, uint32_t wt)
3684 {
3685 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3686 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3687 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3688
3689 pwd->h[0] = msa_hsub_u_df(DF_HALF, pws->h[0], pwt->h[0]);
3690 pwd->h[1] = msa_hsub_u_df(DF_HALF, pws->h[1], pwt->h[1]);
3691 pwd->h[2] = msa_hsub_u_df(DF_HALF, pws->h[2], pwt->h[2]);
3692 pwd->h[3] = msa_hsub_u_df(DF_HALF, pws->h[3], pwt->h[3]);
3693 pwd->h[4] = msa_hsub_u_df(DF_HALF, pws->h[4], pwt->h[4]);
3694 pwd->h[5] = msa_hsub_u_df(DF_HALF, pws->h[5], pwt->h[5]);
3695 pwd->h[6] = msa_hsub_u_df(DF_HALF, pws->h[6], pwt->h[6]);
3696 pwd->h[7] = msa_hsub_u_df(DF_HALF, pws->h[7], pwt->h[7]);
3697 }
3698
3699 void helper_msa_hsub_u_w(CPUMIPSState *env,
3700 uint32_t wd, uint32_t ws, uint32_t wt)
3701 {
3702 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3703 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3704 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3705
3706 pwd->w[0] = msa_hsub_u_df(DF_WORD, pws->w[0], pwt->w[0]);
3707 pwd->w[1] = msa_hsub_u_df(DF_WORD, pws->w[1], pwt->w[1]);
3708 pwd->w[2] = msa_hsub_u_df(DF_WORD, pws->w[2], pwt->w[2]);
3709 pwd->w[3] = msa_hsub_u_df(DF_WORD, pws->w[3], pwt->w[3]);
3710 }
3711
3712 void helper_msa_hsub_u_d(CPUMIPSState *env,
3713 uint32_t wd, uint32_t ws, uint32_t wt)
3714 {
3715 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3716 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3717 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3718
3719 pwd->d[0] = msa_hsub_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3720 pwd->d[1] = msa_hsub_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3721 }
3722
3723
3724 static inline int64_t msa_subs_s_df(uint32_t df, int64_t arg1, int64_t arg2)
3725 {
3726 int64_t max_int = DF_MAX_INT(df);
3727 int64_t min_int = DF_MIN_INT(df);
3728 if (arg2 > 0) {
3729 return (min_int + arg2 < arg1) ? arg1 - arg2 : min_int;
3730 } else {
3731 return (arg1 < max_int + arg2) ? arg1 - arg2 : max_int;
3732 }
3733 }
3734
3735 void helper_msa_subs_s_b(CPUMIPSState *env,
3736 uint32_t wd, uint32_t ws, uint32_t wt)
3737 {
3738 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3739 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3740 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3741
3742 pwd->b[0] = msa_subs_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
3743 pwd->b[1] = msa_subs_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
3744 pwd->b[2] = msa_subs_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
3745 pwd->b[3] = msa_subs_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
3746 pwd->b[4] = msa_subs_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
3747 pwd->b[5] = msa_subs_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
3748 pwd->b[6] = msa_subs_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
3749 pwd->b[7] = msa_subs_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
3750 pwd->b[8] = msa_subs_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
3751 pwd->b[9] = msa_subs_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
3752 pwd->b[10] = msa_subs_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
3753 pwd->b[11] = msa_subs_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
3754 pwd->b[12] = msa_subs_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
3755 pwd->b[13] = msa_subs_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
3756 pwd->b[14] = msa_subs_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
3757 pwd->b[15] = msa_subs_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
3758 }
3759
3760 void helper_msa_subs_s_h(CPUMIPSState *env,
3761 uint32_t wd, uint32_t ws, uint32_t wt)
3762 {
3763 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3764 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3765 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3766
3767 pwd->h[0] = msa_subs_s_df(DF_HALF, pws->h[0], pwt->h[0]);
3768 pwd->h[1] = msa_subs_s_df(DF_HALF, pws->h[1], pwt->h[1]);
3769 pwd->h[2] = msa_subs_s_df(DF_HALF, pws->h[2], pwt->h[2]);
3770 pwd->h[3] = msa_subs_s_df(DF_HALF, pws->h[3], pwt->h[3]);
3771 pwd->h[4] = msa_subs_s_df(DF_HALF, pws->h[4], pwt->h[4]);
3772 pwd->h[5] = msa_subs_s_df(DF_HALF, pws->h[5], pwt->h[5]);
3773 pwd->h[6] = msa_subs_s_df(DF_HALF, pws->h[6], pwt->h[6]);
3774 pwd->h[7] = msa_subs_s_df(DF_HALF, pws->h[7], pwt->h[7]);
3775 }
3776
3777 void helper_msa_subs_s_w(CPUMIPSState *env,
3778 uint32_t wd, uint32_t ws, uint32_t wt)
3779 {
3780 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3781 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3782 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3783
3784 pwd->w[0] = msa_subs_s_df(DF_WORD, pws->w[0], pwt->w[0]);
3785 pwd->w[1] = msa_subs_s_df(DF_WORD, pws->w[1], pwt->w[1]);
3786 pwd->w[2] = msa_subs_s_df(DF_WORD, pws->w[2], pwt->w[2]);
3787 pwd->w[3] = msa_subs_s_df(DF_WORD, pws->w[3], pwt->w[3]);
3788 }
3789
3790 void helper_msa_subs_s_d(CPUMIPSState *env,
3791 uint32_t wd, uint32_t ws, uint32_t wt)
3792 {
3793 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3794 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3795 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3796
3797 pwd->d[0] = msa_subs_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3798 pwd->d[1] = msa_subs_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3799 }
3800
3801
3802 static inline int64_t msa_subs_u_df(uint32_t df, int64_t arg1, int64_t arg2)
3803 {
3804 uint64_t u_arg1 = UNSIGNED(arg1, df);
3805 uint64_t u_arg2 = UNSIGNED(arg2, df);
3806 return (u_arg1 > u_arg2) ? u_arg1 - u_arg2 : 0;
3807 }
3808
3809 void helper_msa_subs_u_b(CPUMIPSState *env,
3810 uint32_t wd, uint32_t ws, uint32_t wt)
3811 {
3812 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3813 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3814 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3815
3816 pwd->b[0] = msa_subs_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
3817 pwd->b[1] = msa_subs_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
3818 pwd->b[2] = msa_subs_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
3819 pwd->b[3] = msa_subs_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
3820 pwd->b[4] = msa_subs_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
3821 pwd->b[5] = msa_subs_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
3822 pwd->b[6] = msa_subs_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
3823 pwd->b[7] = msa_subs_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
3824 pwd->b[8] = msa_subs_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
3825 pwd->b[9] = msa_subs_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
3826 pwd->b[10] = msa_subs_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
3827 pwd->b[11] = msa_subs_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
3828 pwd->b[12] = msa_subs_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
3829 pwd->b[13] = msa_subs_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
3830 pwd->b[14] = msa_subs_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
3831 pwd->b[15] = msa_subs_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
3832 }
3833
3834 void helper_msa_subs_u_h(CPUMIPSState *env,
3835 uint32_t wd, uint32_t ws, uint32_t wt)
3836 {
3837 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3838 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3839 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3840
3841 pwd->h[0] = msa_subs_u_df(DF_HALF, pws->h[0], pwt->h[0]);
3842 pwd->h[1] = msa_subs_u_df(DF_HALF, pws->h[1], pwt->h[1]);
3843 pwd->h[2] = msa_subs_u_df(DF_HALF, pws->h[2], pwt->h[2]);
3844 pwd->h[3] = msa_subs_u_df(DF_HALF, pws->h[3], pwt->h[3]);
3845 pwd->h[4] = msa_subs_u_df(DF_HALF, pws->h[4], pwt->h[4]);
3846 pwd->h[5] = msa_subs_u_df(DF_HALF, pws->h[5], pwt->h[5]);
3847 pwd->h[6] = msa_subs_u_df(DF_HALF, pws->h[6], pwt->h[6]);
3848 pwd->h[7] = msa_subs_u_df(DF_HALF, pws->h[7], pwt->h[7]);
3849 }
3850
3851 void helper_msa_subs_u_w(CPUMIPSState *env,
3852 uint32_t wd, uint32_t ws, uint32_t wt)
3853 {
3854 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3855 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3856 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3857
3858 pwd->w[0] = msa_subs_u_df(DF_WORD, pws->w[0], pwt->w[0]);
3859 pwd->w[1] = msa_subs_u_df(DF_WORD, pws->w[1], pwt->w[1]);
3860 pwd->w[2] = msa_subs_u_df(DF_WORD, pws->w[2], pwt->w[2]);
3861 pwd->w[3] = msa_subs_u_df(DF_WORD, pws->w[3], pwt->w[3]);
3862 }
3863
3864 void helper_msa_subs_u_d(CPUMIPSState *env,
3865 uint32_t wd, uint32_t ws, uint32_t wt)
3866 {
3867 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3868 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3869 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3870
3871 pwd->d[0] = msa_subs_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3872 pwd->d[1] = msa_subs_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3873 }
3874
3875
3876 static inline int64_t msa_subsus_u_df(uint32_t df, int64_t arg1, int64_t arg2)
3877 {
3878 uint64_t u_arg1 = UNSIGNED(arg1, df);
3879 uint64_t max_uint = DF_MAX_UINT(df);
3880 if (arg2 >= 0) {
3881 uint64_t u_arg2 = (uint64_t)arg2;
3882 return (u_arg1 > u_arg2) ?
3883 (int64_t)(u_arg1 - u_arg2) :
3884 0;
3885 } else {
3886 uint64_t u_arg2 = (uint64_t)(-arg2);
3887 return (u_arg1 < max_uint - u_arg2) ?
3888 (int64_t)(u_arg1 + u_arg2) :
3889 (int64_t)max_uint;
3890 }
3891 }
3892
3893 void helper_msa_subsus_u_b(CPUMIPSState *env,
3894 uint32_t wd, uint32_t ws, uint32_t wt)
3895 {
3896 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3897 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3898 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3899
3900 pwd->b[0] = msa_subsus_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
3901 pwd->b[1] = msa_subsus_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
3902 pwd->b[2] = msa_subsus_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
3903 pwd->b[3] = msa_subsus_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
3904 pwd->b[4] = msa_subsus_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
3905 pwd->b[5] = msa_subsus_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
3906 pwd->b[6] = msa_subsus_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
3907 pwd->b[7] = msa_subsus_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
3908 pwd->b[8] = msa_subsus_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
3909 pwd->b[9] = msa_subsus_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
3910 pwd->b[10] = msa_subsus_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
3911 pwd->b[11] = msa_subsus_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
3912 pwd->b[12] = msa_subsus_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
3913 pwd->b[13] = msa_subsus_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
3914 pwd->b[14] = msa_subsus_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
3915 pwd->b[15] = msa_subsus_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
3916 }
3917
3918 void helper_msa_subsus_u_h(CPUMIPSState *env,
3919 uint32_t wd, uint32_t ws, uint32_t wt)
3920 {
3921 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3922 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3923 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3924
3925 pwd->h[0] = msa_subsus_u_df(DF_HALF, pws->h[0], pwt->h[0]);
3926 pwd->h[1] = msa_subsus_u_df(DF_HALF, pws->h[1], pwt->h[1]);
3927 pwd->h[2] = msa_subsus_u_df(DF_HALF, pws->h[2], pwt->h[2]);
3928 pwd->h[3] = msa_subsus_u_df(DF_HALF, pws->h[3], pwt->h[3]);
3929 pwd->h[4] = msa_subsus_u_df(DF_HALF, pws->h[4], pwt->h[4]);
3930 pwd->h[5] = msa_subsus_u_df(DF_HALF, pws->h[5], pwt->h[5]);
3931 pwd->h[6] = msa_subsus_u_df(DF_HALF, pws->h[6], pwt->h[6]);
3932 pwd->h[7] = msa_subsus_u_df(DF_HALF, pws->h[7], pwt->h[7]);
3933 }
3934
3935 void helper_msa_subsus_u_w(CPUMIPSState *env,
3936 uint32_t wd, uint32_t ws, uint32_t wt)
3937 {
3938 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3939 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3940 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3941
3942 pwd->w[0] = msa_subsus_u_df(DF_WORD, pws->w[0], pwt->w[0]);
3943 pwd->w[1] = msa_subsus_u_df(DF_WORD, pws->w[1], pwt->w[1]);
3944 pwd->w[2] = msa_subsus_u_df(DF_WORD, pws->w[2], pwt->w[2]);
3945 pwd->w[3] = msa_subsus_u_df(DF_WORD, pws->w[3], pwt->w[3]);
3946 }
3947
3948 void helper_msa_subsus_u_d(CPUMIPSState *env,
3949 uint32_t wd, uint32_t ws, uint32_t wt)
3950 {
3951 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3952 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3953 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3954
3955 pwd->d[0] = msa_subsus_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3956 pwd->d[1] = msa_subsus_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3957 }
3958
3959
3960 static inline int64_t msa_subsuu_s_df(uint32_t df, int64_t arg1, int64_t arg2)
3961 {
3962 uint64_t u_arg1 = UNSIGNED(arg1, df);
3963 uint64_t u_arg2 = UNSIGNED(arg2, df);
3964 int64_t max_int = DF_MAX_INT(df);
3965 int64_t min_int = DF_MIN_INT(df);
3966 if (u_arg1 > u_arg2) {
3967 return u_arg1 - u_arg2 < (uint64_t)max_int ?
3968 (int64_t)(u_arg1 - u_arg2) :
3969 max_int;
3970 } else {
3971 return u_arg2 - u_arg1 < (uint64_t)(-min_int) ?
3972 (int64_t)(u_arg1 - u_arg2) :
3973 min_int;
3974 }
3975 }
3976
3977 void helper_msa_subsuu_s_b(CPUMIPSState *env,
3978 uint32_t wd, uint32_t ws, uint32_t wt)
3979 {
3980 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3981 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3982 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3983
3984 pwd->b[0] = msa_subsuu_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
3985 pwd->b[1] = msa_subsuu_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
3986 pwd->b[2] = msa_subsuu_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
3987 pwd->b[3] = msa_subsuu_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
3988 pwd->b[4] = msa_subsuu_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
3989 pwd->b[5] = msa_subsuu_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
3990 pwd->b[6] = msa_subsuu_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
3991 pwd->b[7] = msa_subsuu_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
3992 pwd->b[8] = msa_subsuu_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
3993 pwd->b[9] = msa_subsuu_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
3994 pwd->b[10] = msa_subsuu_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
3995 pwd->b[11] = msa_subsuu_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
3996 pwd->b[12] = msa_subsuu_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
3997 pwd->b[13] = msa_subsuu_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
3998 pwd->b[14] = msa_subsuu_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
3999 pwd->b[15] = msa_subsuu_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
4000 }
4001
4002 void helper_msa_subsuu_s_h(CPUMIPSState *env,
4003 uint32_t wd, uint32_t ws, uint32_t wt)
4004 {
4005 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4006 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4007 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4008
4009 pwd->h[0] = msa_subsuu_s_df(DF_HALF, pws->h[0], pwt->h[0]);
4010 pwd->h[1] = msa_subsuu_s_df(DF_HALF, pws->h[1], pwt->h[1]);
4011 pwd->h[2] = msa_subsuu_s_df(DF_HALF, pws->h[2], pwt->h[2]);
4012 pwd->h[3] = msa_subsuu_s_df(DF_HALF, pws->h[3], pwt->h[3]);
4013 pwd->h[4] = msa_subsuu_s_df(DF_HALF, pws->h[4], pwt->h[4]);
4014 pwd->h[5] = msa_subsuu_s_df(DF_HALF, pws->h[5], pwt->h[5]);
4015 pwd->h[6] = msa_subsuu_s_df(DF_HALF, pws->h[6], pwt->h[6]);
4016 pwd->h[7] = msa_subsuu_s_df(DF_HALF, pws->h[7], pwt->h[7]);
4017 }
4018
4019 void helper_msa_subsuu_s_w(CPUMIPSState *env,
4020 uint32_t wd, uint32_t ws, uint32_t wt)
4021 {
4022 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4023 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4024 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4025
4026 pwd->w[0] = msa_subsuu_s_df(DF_WORD, pws->w[0], pwt->w[0]);
4027 pwd->w[1] = msa_subsuu_s_df(DF_WORD, pws->w[1], pwt->w[1]);
4028 pwd->w[2] = msa_subsuu_s_df(DF_WORD, pws->w[2], pwt->w[2]);
4029 pwd->w[3] = msa_subsuu_s_df(DF_WORD, pws->w[3], pwt->w[3]);
4030 }
4031
4032 void helper_msa_subsuu_s_d(CPUMIPSState *env,
4033 uint32_t wd, uint32_t ws, uint32_t wt)
4034 {
4035 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4036 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4037 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4038
4039 pwd->d[0] = msa_subsuu_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
4040 pwd->d[1] = msa_subsuu_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
4041 }
4042
4043
4044 static inline int64_t msa_subv_df(uint32_t df, int64_t arg1, int64_t arg2)
4045 {
4046 return arg1 - arg2;
4047 }
4048
4049 void helper_msa_subv_b(CPUMIPSState *env,
4050 uint32_t wd, uint32_t ws, uint32_t wt)
4051 {
4052 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4053 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4054 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4055
4056 pwd->b[0] = msa_subv_df(DF_BYTE, pws->b[0], pwt->b[0]);
4057 pwd->b[1] = msa_subv_df(DF_BYTE, pws->b[1], pwt->b[1]);
4058 pwd->b[2] = msa_subv_df(DF_BYTE, pws->b[2], pwt->b[2]);
4059 pwd->b[3] = msa_subv_df(DF_BYTE, pws->b[3], pwt->b[3]);
4060 pwd->b[4] = msa_subv_df(DF_BYTE, pws->b[4], pwt->b[4]);
4061 pwd->b[5] = msa_subv_df(DF_BYTE, pws->b[5], pwt->b[5]);
4062 pwd->b[6] = msa_subv_df(DF_BYTE, pws->b[6], pwt->b[6]);
4063 pwd->b[7] = msa_subv_df(DF_BYTE, pws->b[7], pwt->b[7]);
4064 pwd->b[8] = msa_subv_df(DF_BYTE, pws->b[8], pwt->b[8]);
4065 pwd->b[9] = msa_subv_df(DF_BYTE, pws->b[9], pwt->b[9]);
4066 pwd->b[10] = msa_subv_df(DF_BYTE, pws->b[10], pwt->b[10]);
4067 pwd->b[11] = msa_subv_df(DF_BYTE, pws->b[11], pwt->b[11]);
4068 pwd->b[12] = msa_subv_df(DF_BYTE, pws->b[12], pwt->b[12]);
4069 pwd->b[13] = msa_subv_df(DF_BYTE, pws->b[13], pwt->b[13]);
4070 pwd->b[14] = msa_subv_df(DF_BYTE, pws->b[14], pwt->b[14]);
4071 pwd->b[15] = msa_subv_df(DF_BYTE, pws->b[15], pwt->b[15]);
4072 }
4073
4074 void helper_msa_subv_h(CPUMIPSState *env,
4075 uint32_t wd, uint32_t ws, uint32_t wt)
4076 {
4077 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4078 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4079 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4080
4081 pwd->h[0] = msa_subv_df(DF_HALF, pws->h[0], pwt->h[0]);
4082 pwd->h[1] = msa_subv_df(DF_HALF, pws->h[1], pwt->h[1]);
4083 pwd->h[2] = msa_subv_df(DF_HALF, pws->h[2], pwt->h[2]);
4084 pwd->h[3] = msa_subv_df(DF_HALF, pws->h[3], pwt->h[3]);
4085 pwd->h[4] = msa_subv_df(DF_HALF, pws->h[4], pwt->h[4]);
4086 pwd->h[5] = msa_subv_df(DF_HALF, pws->h[5], pwt->h[5]);
4087 pwd->h[6] = msa_subv_df(DF_HALF, pws->h[6], pwt->h[6]);
4088 pwd->h[7] = msa_subv_df(DF_HALF, pws->h[7], pwt->h[7]);
4089 }
4090
4091 void helper_msa_subv_w(CPUMIPSState *env,
4092 uint32_t wd, uint32_t ws, uint32_t wt)
4093 {
4094 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4095 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4096 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4097
4098 pwd->w[0] = msa_subv_df(DF_WORD, pws->w[0], pwt->w[0]);
4099 pwd->w[1] = msa_subv_df(DF_WORD, pws->w[1], pwt->w[1]);
4100 pwd->w[2] = msa_subv_df(DF_WORD, pws->w[2], pwt->w[2]);
4101 pwd->w[3] = msa_subv_df(DF_WORD, pws->w[3], pwt->w[3]);
4102 }
4103
4104 void helper_msa_subv_d(CPUMIPSState *env,
4105 uint32_t wd, uint32_t ws, uint32_t wt)
4106 {
4107 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4108 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4109 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4110
4111 pwd->d[0] = msa_subv_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
4112 pwd->d[1] = msa_subv_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
4113 }
4114
4115
4116 /*
4117 * Interleave
4118 * ----------
4119 *
4120 * +---------------+----------------------------------------------------------+
4121 * | ILVEV.B | Vector Interleave Even (byte) |
4122 * | ILVEV.H | Vector Interleave Even (halfword) |
4123 * | ILVEV.W | Vector Interleave Even (word) |
4124 * | ILVEV.D | Vector Interleave Even (doubleword) |
4125 * | ILVOD.B | Vector Interleave Odd (byte) |
4126 * | ILVOD.H | Vector Interleave Odd (halfword) |
4127 * | ILVOD.W | Vector Interleave Odd (word) |
4128 * | ILVOD.D | Vector Interleave Odd (doubleword) |
4129 * | ILVL.B | Vector Interleave Left (byte) |
4130 * | ILVL.H | Vector Interleave Left (halfword) |
4131 * | ILVL.W | Vector Interleave Left (word) |
4132 * | ILVL.D | Vector Interleave Left (doubleword) |
4133 * | ILVR.B | Vector Interleave Right (byte) |
4134 * | ILVR.H | Vector Interleave Right (halfword) |
4135 * | ILVR.W | Vector Interleave Right (word) |
4136 * | ILVR.D | Vector Interleave Right (doubleword) |
4137 * +---------------+----------------------------------------------------------+
4138 */
4139
4140
4141 void helper_msa_ilvev_b(CPUMIPSState *env,
4142 uint32_t wd, uint32_t ws, uint32_t wt)
4143 {
4144 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4145 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4146 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4147
4148 #if defined(HOST_WORDS_BIGENDIAN)
4149 pwd->b[8] = pws->b[9];
4150 pwd->b[9] = pwt->b[9];
4151 pwd->b[10] = pws->b[11];
4152 pwd->b[11] = pwt->b[11];
4153 pwd->b[12] = pws->b[13];
4154 pwd->b[13] = pwt->b[13];
4155 pwd->b[14] = pws->b[15];
4156 pwd->b[15] = pwt->b[15];
4157 pwd->b[0] = pws->b[1];
4158 pwd->b[1] = pwt->b[1];
4159 pwd->b[2] = pws->b[3];
4160 pwd->b[3] = pwt->b[3];
4161 pwd->b[4] = pws->b[5];
4162 pwd->b[5] = pwt->b[5];
4163 pwd->b[6] = pws->b[7];
4164 pwd->b[7] = pwt->b[7];
4165 #else
4166 pwd->b[15] = pws->b[14];
4167 pwd->b[14] = pwt->b[14];
4168 pwd->b[13] = pws->b[12];
4169 pwd->b[12] = pwt->b[12];
4170 pwd->b[11] = pws->b[10];
4171 pwd->b[10] = pwt->b[10];
4172 pwd->b[9] = pws->b[8];
4173 pwd->b[8] = pwt->b[8];
4174 pwd->b[7] = pws->b[6];
4175 pwd->b[6] = pwt->b[6];
4176 pwd->b[5] = pws->b[4];
4177 pwd->b[4] = pwt->b[4];
4178 pwd->b[3] = pws->b[2];
4179 pwd->b[2] = pwt->b[2];
4180 pwd->b[1] = pws->b[0];
4181 pwd->b[0] = pwt->b[0];
4182 #endif
4183 }
4184
4185 void helper_msa_ilvev_h(CPUMIPSState *env,
4186 uint32_t wd, uint32_t ws, uint32_t wt)
4187 {
4188 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4189 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4190 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4191
4192 #if defined(HOST_WORDS_BIGENDIAN)
4193 pwd->h[4] = pws->h[5];
4194 pwd->h[5] = pwt->h[5];
4195 pwd->h[6] = pws->h[7];
4196 pwd->h[7] = pwt->h[7];
4197 pwd->h[0] = pws->h[1];
4198 pwd->h[1] = pwt->h[1];
4199 pwd->h[2] = pws->h[3];
4200 pwd->h[3] = pwt->h[3];
4201 #else
4202 pwd->h[7] = pws->h[6];
4203 pwd->h[6] = pwt->h[6];
4204 pwd->h[5] = pws->h[4];
4205 pwd->h[4] = pwt->h[4];
4206 pwd->h[3] = pws->h[2];
4207 pwd->h[2] = pwt->h[2];
4208 pwd->h[1] = pws->h[0];
4209 pwd->h[0] = pwt->h[0];
4210 #endif
4211 }
4212
4213 void helper_msa_ilvev_w(CPUMIPSState *env,
4214 uint32_t wd, uint32_t ws, uint32_t wt)
4215 {
4216 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4217 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4218 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4219
4220 #if defined(HOST_WORDS_BIGENDIAN)
4221 pwd->w[2] = pws->w[3];
4222 pwd->w[3] = pwt->w[3];
4223 pwd->w[0] = pws->w[1];
4224 pwd->w[1] = pwt->w[1];
4225 #else
4226 pwd->w[3] = pws->w[2];
4227 pwd->w[2] = pwt->w[2];
4228 pwd->w[1] = pws->w[0];
4229 pwd->w[0] = pwt->w[0];
4230 #endif
4231 }
4232
4233 void helper_msa_ilvev_d(CPUMIPSState *env,
4234 uint32_t wd, uint32_t ws, uint32_t wt)
4235 {
4236 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4237 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4238 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4239
4240 pwd->d[1] = pws->d[0];
4241 pwd->d[0] = pwt->d[0];
4242 }
4243
4244
4245 void helper_msa_ilvod_b(CPUMIPSState *env,
4246 uint32_t wd, uint32_t ws, uint32_t wt)
4247 {
4248 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4249 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4250 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4251
4252 #if defined(HOST_WORDS_BIGENDIAN)
4253 pwd->b[7] = pwt->b[6];
4254 pwd->b[6] = pws->b[6];
4255 pwd->b[5] = pwt->b[4];
4256 pwd->b[4] = pws->b[4];
4257 pwd->b[3] = pwt->b[2];
4258 pwd->b[2] = pws->b[2];
4259 pwd->b[1] = pwt->b[0];
4260 pwd->b[0] = pws->b[0];
4261 pwd->b[15] = pwt->b[14];
4262 pwd->b[14] = pws->b[14];
4263 pwd->b[13] = pwt->b[12];
4264 pwd->b[12] = pws->b[12];
4265 pwd->b[11] = pwt->b[10];
4266 pwd->b[10] = pws->b[10];
4267 pwd->b[9] = pwt->b[8];
4268 pwd->b[8] = pws->b[8];
4269 #else
4270 pwd->b[0] = pwt->b[1];
4271 pwd->b[1] = pws->b[1];
4272 pwd->b[2] = pwt->b[3];
4273 pwd->b[3] = pws->b[3];
4274 pwd->b[4] = pwt->b[5];
4275 pwd->b[5] = pws->b[5];
4276 pwd->b[6] = pwt->b[7];
4277 pwd->b[7] = pws->b[7];
4278 pwd->b[8] = pwt->b[9];
4279 pwd->b[9] = pws->b[9];
4280 pwd->b[10] = pwt->b[11];
4281 pwd->b[11] = pws->b[11];
4282 pwd->b[12] = pwt->b[13];
4283 pwd->b[13] = pws->b[13];
4284 pwd->b[14] = pwt->b[15];
4285 pwd->b[15] = pws->b[15];
4286 #endif
4287 }
4288
4289 void helper_msa_ilvod_h(CPUMIPSState *env,
4290 uint32_t wd, uint32_t ws, uint32_t wt)
4291 {
4292 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4293 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4294 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4295
4296 #if defined(HOST_WORDS_BIGENDIAN)
4297 pwd->h[3] = pwt->h[2];
4298 pwd->h[2] = pws->h[2];
4299 pwd->h[1] = pwt->h[0];
4300 pwd->h[0] = pws->h[0];
4301 pwd->h[7] = pwt->h[6];
4302 pwd->h[6] = pws->h[6];
4303 pwd->h[5] = pwt->h[4];
4304 pwd->h[4] = pws->h[4];
4305 #else
4306 pwd->h[0] = pwt->h[1];
4307 pwd->h[1] = pws->h[1];
4308 pwd->h[2] = pwt->h[3];
4309 pwd->h[3] = pws->h[3];
4310 pwd->h[4] = pwt->h[5];
4311 pwd->h[5] = pws->h[5];
4312 pwd->h[6] = pwt->h[7];
4313 pwd->h[7] = pws->h[7];
4314 #endif
4315 }
4316
4317 void helper_msa_ilvod_w(CPUMIPSState *env,
4318 uint32_t wd, uint32_t ws, uint32_t wt)
4319 {
4320 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4321 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4322 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4323
4324 #if defined(HOST_WORDS_BIGENDIAN)
4325 pwd->w[1] = pwt->w[0];
4326 pwd->w[0] = pws->w[0];
4327 pwd->w[3] = pwt->w[2];
4328 pwd->w[2] = pws->w[2];
4329 #else
4330 pwd->w[0] = pwt->w[1];
4331 pwd->w[1] = pws->w[1];
4332 pwd->w[2] = pwt->w[3];
4333 pwd->w[3] = pws->w[3];
4334 #endif
4335 }
4336
4337 void helper_msa_ilvod_d(CPUMIPSState *env,
4338 uint32_t wd, uint32_t ws, uint32_t wt)
4339 {
4340 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4341 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4342 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4343
4344 pwd->d[0] = pwt->d[1];
4345 pwd->d[1] = pws->d[1];
4346 }
4347
4348
4349 void helper_msa_ilvl_b(CPUMIPSState *env,
4350 uint32_t wd, uint32_t ws, uint32_t wt)
4351 {
4352 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4353 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4354 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4355
4356 #if defined(HOST_WORDS_BIGENDIAN)
4357 pwd->b[7] = pwt->b[15];
4358 pwd->b[6] = pws->b[15];
4359 pwd->b[5] = pwt->b[14];
4360 pwd->b[4] = pws->b[14];
4361 pwd->b[3] = pwt->b[13];
4362 pwd->b[2] = pws->b[13];
4363 pwd->b[1] = pwt->b[12];
4364 pwd->b[0] = pws->b[12];
4365 pwd->b[15] = pwt->b[11];
4366 pwd->b[14] = pws->b[11];
4367 pwd->b[13] = pwt->b[10];
4368 pwd->b[12] = pws->b[10];
4369 pwd->b[11] = pwt->b[9];
4370 pwd->b[10] = pws->b[9];
4371 pwd->b[9] = pwt->b[8];
4372 pwd->b[8] = pws->b[8];
4373 #else
4374 pwd->b[0] = pwt->b[8];
4375 pwd->b[1] = pws->b[8];
4376 pwd->b[2] = pwt->b[9];
4377 pwd->b[3] = pws->b[9];
4378 pwd->b[4] = pwt->b[10];
4379 pwd->b[5] = pws->b[10];
4380 pwd->b[6] = pwt->b[11];
4381 pwd->b[7] = pws->b[11];
4382 pwd->b[8] = pwt->b[12];
4383 pwd->b[9] = pws->b[12];
4384 pwd->b[10] = pwt->b[13];
4385 pwd->b[11] = pws->b[13];
4386 pwd->b[12] = pwt->b[14];
4387 pwd->b[13] = pws->b[14];
4388 pwd->b[14] = pwt->b[15];
4389 pwd->b[15] = pws->b[15];
4390 #endif
4391 }
4392
4393 void helper_msa_ilvl_h(CPUMIPSState *env,
4394 uint32_t wd, uint32_t ws, uint32_t wt)
4395 {
4396 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4397 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4398 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4399
4400 #if defined(HOST_WORDS_BIGENDIAN)
4401 pwd->h[3] = pwt->h[7];
4402 pwd->h[2] = pws->h[7];
4403 pwd->h[1] = pwt->h[6];
4404 pwd->h[0] = pws->h[6];
4405 pwd->h[7] = pwt->h[5];
4406 pwd->h[6] = pws->h[5];
4407 pwd->h[5] = pwt->h[4];
4408 pwd->h[4] = pws->h[4];
4409 #else
4410 pwd->h[0] = pwt->h[4];
4411 pwd->h[1] = pws->h[4];
4412 pwd->h[2] = pwt->h[5];
4413 pwd->h[3] = pws->h[5];
4414 pwd->h[4] = pwt->h[6];
4415 pwd->h[5] = pws->h[6];
4416 pwd->h[6] = pwt->h[7];
4417 pwd->h[7] = pws->h[7];
4418 #endif
4419 }
4420
4421 void helper_msa_ilvl_w(CPUMIPSState *env,
4422 uint32_t wd, uint32_t ws, uint32_t wt)
4423 {
4424 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4425 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4426 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4427
4428 #if defined(HOST_WORDS_BIGENDIAN)
4429 pwd->w[1] = pwt->w[3];
4430 pwd->w[0] = pws->w[3];
4431 pwd->w[3] = pwt->w[2];
4432 pwd->w[2] = pws->w[2];
4433 #else
4434 pwd->w[0] = pwt->w[2];
4435 pwd->w[1] = pws->w[2];
4436 pwd->w[2] = pwt->w[3];
4437 pwd->w[3] = pws->w[3];
4438 #endif
4439 }
4440
4441 void helper_msa_ilvl_d(CPUMIPSState *env,
4442 uint32_t wd, uint32_t ws, uint32_t wt)
4443 {
4444 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4445 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4446 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4447
4448 pwd->d[0] = pwt->d[1];
4449 pwd->d[1] = pws->d[1];
4450 }
4451
4452
4453 void helper_msa_ilvr_b(CPUMIPSState *env,
4454 uint32_t wd, uint32_t ws, uint32_t wt)
4455 {
4456 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4457 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4458 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4459
4460 #if defined(HOST_WORDS_BIGENDIAN)
4461 pwd->b[8] = pws->b[0];
4462 pwd->b[9] = pwt->b[0];
4463 pwd->b[10] = pws->b[1];
4464 pwd->b[11] = pwt->b[1];
4465 pwd->b[12] = pws->b[2];
4466 pwd->b[13] = pwt->b[2];
4467 pwd->b[14] = pws->b[3];
4468 pwd->b[15] = pwt->b[3];
4469 pwd->b[0] = pws->b[4];
4470 pwd->b[1] = pwt->b[4];
4471 pwd->b[2] = pws->b[5];
4472 pwd->b[3] = pwt->b[5];
4473 pwd->b[4] = pws->b[6];
4474 pwd->b[5] = pwt->b[6];
4475 pwd->b[6] = pws->b[7];
4476 pwd->b[7] = pwt->b[7];
4477 #else
4478 pwd->b[15] = pws->b[7];
4479 pwd->b[14] = pwt->b[7];
4480 pwd->b[13] = pws->b[6];
4481 pwd->b[12] = pwt->b[6];
4482 pwd->b[11] = pws->b[5];
4483 pwd->b[10] = pwt->b[5];
4484 pwd->b[9] = pws->b[4];
4485 pwd->b[8] = pwt->b[4];
4486 pwd->b[7] = pws->b[3];
4487 pwd->b[6] = pwt->b[3];
4488 pwd->b[5] = pws->b[2];
4489 pwd->b[4] = pwt->b[2];
4490 pwd->b[3] = pws->b[1];
4491 pwd->b[2] = pwt->b[1];
4492 pwd->b[1] = pws->b[0];
4493 pwd->b[0] = pwt->b[0];
4494 #endif
4495 }
4496
4497 void helper_msa_ilvr_h(CPUMIPSState *env,
4498 uint32_t wd, uint32_t ws, uint32_t wt)
4499 {
4500 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4501 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4502 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4503
4504 #if defined(HOST_WORDS_BIGENDIAN)
4505 pwd->h[4] = pws->h[0];
4506 pwd->h[5] = pwt->h[0];
4507 pwd->h[6] = pws->h[1];
4508 pwd->h[7] = pwt->h[1];
4509 pwd->h[0] = pws->h[2];
4510 pwd->h[1] = pwt->h[2];
4511 pwd->h[2] = pws->h[3];
4512 pwd->h[3] = pwt->h[3];
4513 #else
4514 pwd->h[7] = pws->h[3];
4515 pwd->h[6] = pwt->h[3];
4516 pwd->h[5] = pws->h[2];
4517 pwd->h[4] = pwt->h[2];
4518 pwd->h[3] = pws->h[1];
4519 pwd->h[2] = pwt->h[1];
4520 pwd->h[1] = pws->h[0];
4521 pwd->h[0] = pwt->h[0];
4522 #endif
4523 }
4524
4525 void helper_msa_ilvr_w(CPUMIPSState *env,
4526 uint32_t wd, uint32_t ws, uint32_t wt)
4527 {
4528 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4529 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4530 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4531
4532 #if defined(HOST_WORDS_BIGENDIAN)
4533 pwd->w[2] = pws->w[0];
4534 pwd->w[3] = pwt->w[0];
4535 pwd->w[0] = pws->w[1];
4536 pwd->w[1] = pwt->w[1];
4537 #else
4538 pwd->w[3] = pws->w[1];
4539 pwd->w[2] = pwt->w[1];
4540 pwd->w[1] = pws->w[0];
4541 pwd->w[0] = pwt->w[0];
4542 #endif
4543 }
4544
4545 void helper_msa_ilvr_d(CPUMIPSState *env,
4546 uint32_t wd, uint32_t ws, uint32_t wt)
4547 {
4548 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4549 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4550 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4551
4552 pwd->d[1] = pws->d[0];
4553 pwd->d[0] = pwt->d[0];
4554 }
4555
4556
4557 /*
4558 * Logic
4559 * -----
4560 *
4561 * +---------------+----------------------------------------------------------+
4562 * | AND.V | Vector Logical And |
4563 * | NOR.V | Vector Logical Negated Or |
4564 * | OR.V | Vector Logical Or |
4565 * | XOR.V | Vector Logical Exclusive Or |
4566 * +---------------+----------------------------------------------------------+
4567 */
4568
4569
4570 void helper_msa_and_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
4571 {
4572 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4573 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4574 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4575
4576 pwd->d[0] = pws->d[0] & pwt->d[0];
4577 pwd->d[1] = pws->d[1] & pwt->d[1];
4578 }
4579
4580 void helper_msa_nor_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
4581 {
4582 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4583 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4584 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4585
4586 pwd->d[0] = ~(pws->d[0] | pwt->d[0]);
4587 pwd->d[1] = ~(pws->d[1] | pwt->d[1]);
4588 }
4589
4590 void helper_msa_or_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
4591 {
4592 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4593 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4594 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4595
4596 pwd->d[0] = pws->d[0] | pwt->d[0];
4597 pwd->d[1] = pws->d[1] | pwt->d[1];
4598 }
4599
4600 void helper_msa_xor_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
4601 {
4602 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4603 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4604 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4605
4606 pwd->d[0] = pws->d[0] ^ pwt->d[0];
4607 pwd->d[1] = pws->d[1] ^ pwt->d[1];
4608 }
4609
4610
4611 /*
4612 * Move
4613 * ----
4614 *
4615 * +---------------+----------------------------------------------------------+
4616 * | MOVE.V | Vector Move |
4617 * +---------------+----------------------------------------------------------+
4618 */
4619
4620 static inline void msa_move_v(wr_t *pwd, wr_t *pws)
4621 {
4622 pwd->d[0] = pws->d[0];
4623 pwd->d[1] = pws->d[1];
4624 }
4625
4626 void helper_msa_move_v(CPUMIPSState *env, uint32_t wd, uint32_t ws)
4627 {
4628 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4629 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4630
4631 msa_move_v(pwd, pws);
4632 }
4633
4634
4635 /*
4636 * Pack
4637 * ----
4638 *
4639 * +---------------+----------------------------------------------------------+
4640 * | PCKEV.B | Vector Pack Even (byte) |
4641 * | PCKEV.H | Vector Pack Even (halfword) |
4642 * | PCKEV.W | Vector Pack Even (word) |
4643 * | PCKEV.D | Vector Pack Even (doubleword) |
4644 * | PCKOD.B | Vector Pack Odd (byte) |
4645 * | PCKOD.H | Vector Pack Odd (halfword) |
4646 * | PCKOD.W | Vector Pack Odd (word) |
4647 * | PCKOD.D | Vector Pack Odd (doubleword) |
4648 * | VSHF.B | Vector Data Preserving Shuffle (byte) |
4649 * | VSHF.H | Vector Data Preserving Shuffle (halfword) |
4650 * | VSHF.W | Vector Data Preserving Shuffle (word) |
4651 * | VSHF.D | Vector Data Preserving Shuffle (doubleword) |
4652 * +---------------+----------------------------------------------------------+
4653 */
4654
4655
4656 void helper_msa_pckev_b(CPUMIPSState *env,
4657 uint32_t wd, uint32_t ws, uint32_t wt)
4658 {
4659 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4660 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4661 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4662
4663 #if defined(HOST_WORDS_BIGENDIAN)
4664 pwd->b[8] = pws->b[9];
4665 pwd->b[10] = pws->b[13];
4666 pwd->b[12] = pws->b[1];
4667 pwd->b[14] = pws->b[5];
4668 pwd->b[0] = pwt->b[9];
4669 pwd->b[2] = pwt->b[13];
4670 pwd->b[4] = pwt->b[1];
4671 pwd->b[6] = pwt->b[5];
4672 pwd->b[9] = pws->b[11];
4673 pwd->b[13] = pws->b[3];
4674 pwd->b[1] = pwt->b[11];
4675 pwd->b[5] = pwt->b[3];
4676 pwd->b[11] = pws->b[15];
4677 pwd->b[3] = pwt->b[15];
4678 pwd->b[15] = pws->b[7];
4679 pwd->b[7] = pwt->b[7];
4680 #else
4681 pwd->b[15] = pws->b[14];
4682 pwd->b[13] = pws->b[10];
4683 pwd->b[11] = pws->b[6];
4684 pwd->b[9] = pws->b[2];
4685 pwd->b[7] = pwt->b[14];
4686 pwd->b[5] = pwt->b[10];
4687 pwd->b[3] = pwt->b[6];
4688 pwd->b[1] = pwt->b[2];
4689 pwd->b[14] = pws->b[12];
4690 pwd->b[10] = pws->b[4];
4691 pwd->b[6] = pwt->b[12];
4692 pwd->b[2] = pwt->b[4];
4693 pwd->b[12] = pws->b[8];
4694 pwd->b[4] = pwt->b[8];
4695 pwd->b[8] = pws->b[0];
4696 pwd->b[0] = pwt->b[0];
4697 #endif
4698 }
4699
4700 void helper_msa_pckev_h(CPUMIPSState *env,
4701 uint32_t wd, uint32_t ws, uint32_t wt)
4702 {
4703 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4704 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4705 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4706
4707 #if defined(HOST_WORDS_BIGENDIAN)
4708 pwd->h[4] = pws->h[5];
4709 pwd->h[6] = pws->h[1];
4710 pwd->h[0] = pwt->h[5];
4711 pwd->h[2] = pwt->h[1];
4712 pwd->h[5] = pws->h[7];
4713 pwd->h[1] = pwt->h[7];
4714 pwd->h[7] = pws->h[3];
4715 pwd->h[3] = pwt->h[3];
4716 #else
4717 pwd->h[7] = pws->h[6];
4718 pwd->h[5] = pws->h[2];
4719 pwd->h[3] = pwt->h[6];
4720 pwd->h[1] = pwt->h[2];
4721 pwd->h[6] = pws->h[4];
4722 pwd->h[2] = pwt->h[4];
4723 pwd->h[4] = pws->h[0];
4724 pwd->h[0] = pwt->h[0];
4725 #endif
4726 }
4727
4728 void helper_msa_pckev_w(CPUMIPSState *env,
4729 uint32_t wd, uint32_t ws, uint32_t wt)
4730 {
4731 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4732 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4733 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4734
4735 #if defined(HOST_WORDS_BIGENDIAN)
4736 pwd->w[2] = pws->w[3];
4737 pwd->w[0] = pwt->w[3];
4738 pwd->w[3] = pws->w[1];
4739 pwd->w[1] = pwt->w[1];
4740 #else
4741 pwd->w[3] = pws->w[2];
4742 pwd->w[1] = pwt->w[2];
4743 pwd->w[2] = pws->w[0];
4744 pwd->w[0] = pwt->w[0];
4745 #endif
4746 }
4747
4748 void helper_msa_pckev_d(CPUMIPSState *env,
4749 uint32_t wd, uint32_t ws, uint32_t wt)
4750 {
4751 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4752 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4753 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4754
4755 pwd->d[1] = pws->d[0];
4756 pwd->d[0] = pwt->d[0];
4757 }
4758
4759
4760 void helper_msa_pckod_b(CPUMIPSState *env,
4761 uint32_t wd, uint32_t ws, uint32_t wt)
4762 {
4763 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4764 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4765 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4766
4767 #if defined(HOST_WORDS_BIGENDIAN)
4768 pwd->b[7] = pwt->b[6];
4769 pwd->b[5] = pwt->b[2];
4770 pwd->b[3] = pwt->b[14];
4771 pwd->b[1] = pwt->b[10];
4772 pwd->b[15] = pws->b[6];
4773 pwd->b[13] = pws->b[2];
4774 pwd->b[11] = pws->b[14];
4775 pwd->b[9] = pws->b[10];
4776 pwd->b[6] = pwt->b[4];
4777 pwd->b[2] = pwt->b[12];
4778 pwd->b[14] = pws->b[4];
4779 pwd->b[10] = pws->b[12];
4780 pwd->b[4] = pwt->b[0];
4781 pwd->b[12] = pws->b[0];
4782 pwd->b[0] = pwt->b[8];
4783 pwd->b[8] = pws->b[8];
4784 #else
4785 pwd->b[0] = pwt->b[1];
4786 pwd->b[2] = pwt->b[5];
4787 pwd->b[4] = pwt->b[9];
4788 pwd->b[6] = pwt->b[13];
4789 pwd->b[8] = pws->b[1];
4790 pwd->b[10] = pws->b[5];
4791 pwd->b[12] = pws->b[9];
4792 pwd->b[14] = pws->b[13];
4793 pwd->b[1] = pwt->b[3];
4794 pwd->b[5] = pwt->b[11];
4795 pwd->b[9] = pws->b[3];
4796 pwd->b[13] = pws->b[11];
4797 pwd->b[3] = pwt->b[7];
4798 pwd->b[11] = pws->b[7];
4799 pwd->b[7] = pwt->b[15];
4800 pwd->b[15] = pws->b[15];
4801 #endif
4802
4803 }
4804
4805 void helper_msa_pckod_h(CPUMIPSState *env,
4806 uint32_t wd, uint32_t ws, uint32_t wt)
4807 {
4808 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4809 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4810 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4811
4812 #if defined(HOST_WORDS_BIGENDIAN)
4813 pwd->h[3] = pwt->h[2];
4814 pwd->h[1] = pwt->h[6];
4815 pwd->h[7] = pws->h[2];
4816 pwd->h[5] = pws->h[6];
4817 pwd->h[2] = pwt->h[0];
4818 pwd->h[6] = pws->h[0];
4819 pwd->h[0] = pwt->h[4];
4820 pwd->h[4] = pws->h[4];
4821 #else
4822 pwd->h[0] = pwt->h[1];
4823 pwd->h[2] = pwt->h[5];
4824 pwd->h[4] = pws->h[1];
4825 pwd->h[6] = pws->h[5];
4826 pwd->h[1] = pwt->h[3];
4827 pwd->h[5] = pws->h[3];
4828 pwd->h[3] = pwt->h[7];
4829 pwd->h[7] = pws->h[7];
4830 #endif
4831 }
4832
4833 void helper_msa_pckod_w(CPUMIPSState *env,
4834 uint32_t wd, uint32_t ws, uint32_t wt)
4835 {
4836 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4837 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4838 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4839
4840 #if defined(HOST_WORDS_BIGENDIAN)
4841 pwd->w[1] = pwt->w[0];
4842 pwd->w[3] = pws->w[0];
4843 pwd->w[0] = pwt->w[2];
4844 pwd->w[2] = pws->w[2];
4845 #else
4846 pwd->w[0] = pwt->w[1];
4847 pwd->w[2] = pws->w[1];
4848 pwd->w[1] = pwt->w[3];
4849 pwd->w[3] = pws->w[3];
4850 #endif
4851 }
4852
4853 void helper_msa_pckod_d(CPUMIPSState *env,
4854 uint32_t wd, uint32_t ws, uint32_t wt)
4855 {
4856 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4857 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4858 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4859
4860 pwd->d[0] = pwt->d[1];
4861 pwd->d[1] = pws->d[1];
4862 }
4863
4864
4865 /*
4866 * Shift
4867 * -----
4868 *
4869 * +---------------+----------------------------------------------------------+
4870 * | SLL.B | Vector Shift Left (byte) |
4871 * | SLL.H | Vector Shift Left (halfword) |
4872 * | SLL.W | Vector Shift Left (word) |
4873 * | SLL.D | Vector Shift Left (doubleword) |
4874 * | SRA.B | Vector Shift Right Arithmetic (byte) |
4875 * | SRA.H | Vector Shift Right Arithmetic (halfword) |
4876 * | SRA.W | Vector Shift Right Arithmetic (word) |
4877 * | SRA.D | Vector Shift Right Arithmetic (doubleword) |
4878 * | SRAR.B | Vector Shift Right Arithmetic Rounded (byte) |
4879 * | SRAR.H | Vector Shift Right Arithmetic Rounded (halfword) |
4880 * | SRAR.W | Vector Shift Right Arithmetic Rounded (word) |
4881 * | SRAR.D | Vector Shift Right Arithmetic Rounded (doubleword) |
4882 * | SRL.B | Vector Shift Right Logical (byte) |
4883 * | SRL.H | Vector Shift Right Logical (halfword) |
4884 * | SRL.W | Vector Shift Right Logical (word) |
4885 * | SRL.D | Vector Shift Right Logical (doubleword) |
4886 * | SRLR.B | Vector Shift Right Logical Rounded (byte) |
4887 * | SRLR.H | Vector Shift Right Logical Rounded (halfword) |
4888 * | SRLR.W | Vector Shift Right Logical Rounded (word) |
4889 * | SRLR.D | Vector Shift Right Logical Rounded (doubleword) |
4890 * +---------------+----------------------------------------------------------+
4891 */
4892
4893
4894 static inline int64_t msa_sll_df(uint32_t df, int64_t arg1, int64_t arg2)
4895 {
4896 int32_t b_arg2 = BIT_POSITION(arg2, df);
4897 return arg1 << b_arg2;
4898 }
4899
4900 void helper_msa_sll_b(CPUMIPSState *env,
4901 uint32_t wd, uint32_t ws, uint32_t wt)
4902 {
4903 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4904 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4905 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4906
4907 pwd->b[0] = msa_sll_df(DF_BYTE, pws->b[0], pwt->b[0]);
4908 pwd->b[1] = msa_sll_df(DF_BYTE, pws->b[1], pwt->b[1]);
4909 pwd->b[2] = msa_sll_df(DF_BYTE, pws->b[2], pwt->b[2]);
4910 pwd->b[3] = msa_sll_df(DF_BYTE, pws->b[3], pwt->b[3]);
4911 pwd->b[4] = msa_sll_df(DF_BYTE, pws->b[4], pwt->b[4]);
4912 pwd->b[5] = msa_sll_df(DF_BYTE, pws->b[5], pwt->b[5]);
4913 pwd->b[6] = msa_sll_df(DF_BYTE, pws->b[6], pwt->b[6]);
4914 pwd->b[7] = msa_sll_df(DF_BYTE, pws->b[7], pwt->b[7]);
4915 pwd->b[8] = msa_sll_df(DF_BYTE, pws->b[8], pwt->b[8]);
4916 pwd->b[9] = msa_sll_df(DF_BYTE, pws->b[9], pwt->b[9]);
4917 pwd->b[10] = msa_sll_df(DF_BYTE, pws->b[10], pwt->b[10]);
4918 pwd->b[11] = msa_sll_df(DF_BYTE, pws->b[11], pwt->b[11]);
4919 pwd->b[12] = msa_sll_df(DF_BYTE, pws->b[12], pwt->b[12]);
4920 pwd->b[13] = msa_sll_df(DF_BYTE, pws->b[13], pwt->b[13]);
4921 pwd->b[14] = msa_sll_df(DF_BYTE, pws->b[14], pwt->b[14]);
4922 pwd->b[15] = msa_sll_df(DF_BYTE, pws->b[15], pwt->b[15]);
4923 }
4924
4925 void helper_msa_sll_h(CPUMIPSState *env,
4926 uint32_t wd, uint32_t ws, uint32_t wt)
4927 {
4928 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4929 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4930 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4931
4932 pwd->h[0] = msa_sll_df(DF_HALF, pws->h[0], pwt->h[0]);
4933 pwd->h[1] = msa_sll_df(DF_HALF, pws->h[1], pwt->h[1]);
4934 pwd->h[2] = msa_sll_df(DF_HALF, pws->h[2], pwt->h[2]);
4935 pwd->h[3] = msa_sll_df(DF_HALF, pws->h[3], pwt->h[3]);
4936 pwd->h[4] = msa_sll_df(DF_HALF, pws->h[4], pwt->h[4]);
4937 pwd->h[5] = msa_sll_df(DF_HALF, pws->h[5], pwt->h[5]);
4938 pwd->h[6] = msa_sll_df(DF_HALF, pws->h[6], pwt->h[6]);
4939 pwd->h[7] = msa_sll_df(DF_HALF, pws->h[7], pwt->h[7]);
4940 }
4941
4942 void helper_msa_sll_w(CPUMIPSState *env,
4943 uint32_t wd, uint32_t ws, uint32_t wt)
4944 {
4945 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4946 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4947 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4948
4949 pwd->w[0] = msa_sll_df(DF_WORD, pws->w[0], pwt->w[0]);
4950 pwd->w[1] = msa_sll_df(DF_WORD, pws->w[1], pwt->w[1]);
4951 pwd->w[2] = msa_sll_df(DF_WORD, pws->w[2], pwt->w[2]);
4952 pwd->w[3] = msa_sll_df(DF_WORD, pws->w[3], pwt->w[3]);
4953 }
4954
4955 void helper_msa_sll_d(CPUMIPSState *env,
4956 uint32_t wd, uint32_t ws, uint32_t wt)
4957 {
4958 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4959 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4960 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4961
4962 pwd->d[0] = msa_sll_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
4963 pwd->d[1] = msa_sll_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
4964 }
4965
4966
4967 static inline int64_t msa_sra_df(uint32_t df, int64_t arg1, int64_t arg2)
4968 {
4969 int32_t b_arg2 = BIT_POSITION(arg2, df);
4970 return arg1 >> b_arg2;
4971 }
4972
4973 void helper_msa_sra_b(CPUMIPSState *env,
4974 uint32_t wd, uint32_t ws, uint32_t wt)
4975 {
4976 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4977 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4978 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4979
4980 pwd->b[0] = msa_sra_df(DF_BYTE, pws->b[0], pwt->b[0]);
4981 pwd->b[1] = msa_sra_df(DF_BYTE, pws->b[1], pwt->b[1]);
4982 pwd->b[2] = msa_sra_df(DF_BYTE, pws->b[2], pwt->b[2]);
4983 pwd->b[3] = msa_sra_df(DF_BYTE, pws->b[3], pwt->b[3]);
4984 pwd->b[4] = msa_sra_df(DF_BYTE, pws->b[4], pwt->b[4]);
4985 pwd->b[5] = msa_sra_df(DF_BYTE, pws->b[5], pwt->b[5]);
4986 pwd->b[6] = msa_sra_df(DF_BYTE, pws->b[6], pwt->b[6]);
4987 pwd->b[7] = msa_sra_df(DF_BYTE, pws->b[7], pwt->b[7]);
4988 pwd->b[8] = msa_sra_df(DF_BYTE, pws->b[8], pwt->b[8]);
4989 pwd->b[9] = msa_sra_df(DF_BYTE, pws->b[9], pwt->b[9]);
4990 pwd->b[10] = msa_sra_df(DF_BYTE, pws->b[10], pwt->b[10]);
4991 pwd->b[11] = msa_sra_df(DF_BYTE, pws->b[11], pwt->b[11]);
4992 pwd->b[12] = msa_sra_df(DF_BYTE, pws->b[12], pwt->b[12]);
4993 pwd->b[13] = msa_sra_df(DF_BYTE, pws->b[13], pwt->b[13]);
4994 pwd->b[14] = msa_sra_df(DF_BYTE, pws->b[14], pwt->b[14]);
4995 pwd->b[15] = msa_sra_df(DF_BYTE, pws->b[15], pwt->b[15]);
4996 }
4997
4998 void helper_msa_sra_h(CPUMIPSState *env,
4999 uint32_t wd, uint32_t ws, uint32_t wt)
5000 {
5001 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5002 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5003 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5004
5005 pwd->h[0] = msa_sra_df(DF_HALF, pws->h[0], pwt->h[0]);
5006 pwd->h[1] = msa_sra_df(DF_HALF, pws->h[1], pwt->h[1]);
5007 pwd->h[2] = msa_sra_df(DF_HALF, pws->h[2], pwt->h[2]);
5008 pwd->h[3] = msa_sra_df(DF_HALF, pws->h[3], pwt->h[3]);
5009 pwd->h[4] = msa_sra_df(DF_HALF, pws->h[4], pwt->h[4]);
5010 pwd->h[5] = msa_sra_df(DF_HALF, pws->h[5], pwt->h[5]);
5011 pwd->h[6] = msa_sra_df(DF_HALF, pws->h[6], pwt->h[6]);
5012 pwd->h[7] = msa_sra_df(DF_HALF, pws->h[7], pwt->h[7]);
5013 }
5014
5015 void helper_msa_sra_w(CPUMIPSState *env,
5016 uint32_t wd, uint32_t ws, uint32_t wt)
5017 {
5018 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5019 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5020 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5021
5022 pwd->w[0] = msa_sra_df(DF_WORD, pws->w[0], pwt->w[0]);
5023 pwd->w[1] = msa_sra_df(DF_WORD, pws->w[1], pwt->w[1]);
5024 pwd->w[2] = msa_sra_df(DF_WORD, pws->w[2], pwt->w[2]);
5025 pwd->w[3] = msa_sra_df(DF_WORD, pws->w[3], pwt->w[3]);
5026 }
5027
5028 void helper_msa_sra_d(CPUMIPSState *env,
5029 uint32_t wd, uint32_t ws, uint32_t wt)
5030 {
5031 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5032 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5033 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5034
5035 pwd->d[0] = msa_sra_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
5036 pwd->d[1] = msa_sra_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
5037 }
5038
5039
5040 static inline int64_t msa_srar_df(uint32_t df, int64_t arg1, int64_t arg2)
5041 {
5042 int32_t b_arg2 = BIT_POSITION(arg2, df);
5043 if (b_arg2 == 0) {
5044 return arg1;
5045 } else {
5046 int64_t r_bit = (arg1 >> (b_arg2 - 1)) & 1;
5047 return (arg1 >> b_arg2) + r_bit;
5048 }
5049 }
5050
5051 void helper_msa_srar_b(CPUMIPSState *env,
5052 uint32_t wd, uint32_t ws, uint32_t wt)
5053 {
5054 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5055 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5056 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5057
5058 pwd->b[0] = msa_srar_df(DF_BYTE, pws->b[0], pwt->b[0]);
5059 pwd->b[1] = msa_srar_df(DF_BYTE, pws->b[1], pwt->b[1]);
5060 pwd->b[2] = msa_srar_df(DF_BYTE, pws->b[2], pwt->b[2]);
5061 pwd->b[3] = msa_srar_df(DF_BYTE, pws->b[3], pwt->b[3]);
5062 pwd->b[4] = msa_srar_df(DF_BYTE, pws->b[4], pwt->b[4]);
5063 pwd->b[5] = msa_srar_df(DF_BYTE, pws->b[5], pwt->b[5]);
5064 pwd->b[6] = msa_srar_df(DF_BYTE, pws->b[6], pwt->b[6]);
5065 pwd->b[7] = msa_srar_df(DF_BYTE, pws->b[7], pwt->b[7]);
5066 pwd->b[8] = msa_srar_df(DF_BYTE, pws->b[8], pwt->b[8]);
5067 pwd->b[9] = msa_srar_df(DF_BYTE, pws->b[9], pwt->b[9]);
5068 pwd->b[10] = msa_srar_df(DF_BYTE, pws->b[10], pwt->b[10]);
5069 pwd->b[11] = msa_srar_df(DF_BYTE, pws->b[11], pwt->b[11]);
5070 pwd->b[12] = msa_srar_df(DF_BYTE, pws->b[12], pwt->b[12]);
5071 pwd->b[13] = msa_srar_df(DF_BYTE, pws->b[13], pwt->b[13]);
5072 pwd->b[14] = msa_srar_df(DF_BYTE, pws->b[14], pwt->b[14]);
5073 pwd->b[15] = msa_srar_df(DF_BYTE, pws->b[15], pwt->b[15]);
5074 }
5075
5076 void helper_msa_srar_h(CPUMIPSState *env,
5077 uint32_t wd, uint32_t ws, uint32_t wt)
5078 {
5079 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5080 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5081 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5082
5083 pwd->h[0] = msa_srar_df(DF_HALF, pws->h[0], pwt->h[0]);
5084 pwd->h[1] = msa_srar_df(DF_HALF, pws->h[1], pwt->h[1]);
5085 pwd->h[2] = msa_srar_df(DF_HALF, pws->h[2], pwt->h[2]);
5086 pwd->h[3] = msa_srar_df(DF_HALF, pws->h[3], pwt->h[3]);
5087 pwd->h[4] = msa_srar_df(DF_HALF, pws->h[4], pwt->h[4]);
5088 pwd->h[5] = msa_srar_df(DF_HALF, pws->h[5], pwt->h[5]);
5089 pwd->h[6] = msa_srar_df(DF_HALF, pws->h[6], pwt->h[6]);
5090 pwd->h[7] = msa_srar_df(DF_HALF, pws->h[7], pwt->h[7]);
5091 }
5092
5093 void helper_msa_srar_w(CPUMIPSState *env,
5094 uint32_t wd, uint32_t ws, uint32_t wt)
5095 {
5096 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5097 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5098 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5099
5100 pwd->w[0] = msa_srar_df(DF_WORD, pws->w[0], pwt->w[0]);
5101 pwd->w[1] = msa_srar_df(DF_WORD, pws->w[1], pwt->w[1]);
5102 pwd->w[2] = msa_srar_df(DF_WORD, pws->w[2], pwt->w[2]);
5103 pwd->w[3] = msa_srar_df(DF_WORD, pws->w[3], pwt->w[3]);
5104 }
5105
5106 void helper_msa_srar_d(CPUMIPSState *env,
5107 uint32_t wd, uint32_t ws, uint32_t wt)
5108 {
5109 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5110 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5111 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5112
5113 pwd->d[0] = msa_srar_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
5114 pwd->d[1] = msa_srar_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
5115 }
5116
5117
5118 static inline int64_t msa_srl_df(uint32_t df, int64_t arg1, int64_t arg2)
5119 {
5120 uint64_t u_arg1 = UNSIGNED(arg1, df);
5121 int32_t b_arg2 = BIT_POSITION(arg2, df);
5122 return u_arg1 >> b_arg2;
5123 }
5124
5125 void helper_msa_srl_b(CPUMIPSState *env,
5126 uint32_t wd, uint32_t ws, uint32_t wt)
5127 {
5128 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5129 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5130 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5131
5132 pwd->b[0] = msa_srl_df(DF_BYTE, pws->b[0], pwt->b[0]);
5133 pwd->b[1] = msa_srl_df(DF_BYTE, pws->b[1], pwt->b[1]);
5134 pwd->b[2] = msa_srl_df(DF_BYTE, pws->b[2], pwt->b[2]);
5135 pwd->b[3] = msa_srl_df(DF_BYTE, pws->b[3], pwt->b[3]);
5136 pwd->b[4] = msa_srl_df(DF_BYTE, pws->b[4], pwt->b[4]);
5137 pwd->b[5] = msa_srl_df(DF_BYTE, pws->b[5], pwt->b[5]);
5138 pwd->b[6] = msa_srl_df(DF_BYTE, pws->b[6], pwt->b[6]);
5139 pwd->b[7] = msa_srl_df(DF_BYTE, pws->b[7], pwt->b[7]);
5140 pwd->b[8] = msa_srl_df(DF_BYTE, pws->b[8], pwt->b[8]);
5141 pwd->b[9] = msa_srl_df(DF_BYTE, pws->b[9], pwt->b[9]);
5142 pwd->b[10] = msa_srl_df(DF_BYTE, pws->b[10], pwt->b[10]);
5143 pwd->b[11] = msa_srl_df(DF_BYTE, pws->b[11], pwt->b[11]);
5144 pwd->b[12] = msa_srl_df(DF_BYTE, pws->b[12], pwt->b[12]);
5145 pwd->b[13] = msa_srl_df(DF_BYTE, pws->b[13], pwt->b[13]);
5146 pwd->b[14] = msa_srl_df(DF_BYTE, pws->b[14], pwt->b[14]);
5147 pwd->b[15] = msa_srl_df(DF_BYTE, pws->b[15], pwt->b[15]);
5148 }
5149
5150 void helper_msa_srl_h(CPUMIPSState *env,
5151 uint32_t wd, uint32_t ws, uint32_t wt)
5152 {
5153 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5154 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5155 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5156
5157 pwd->h[0] = msa_srl_df(DF_HALF, pws->h[0], pwt->h[0]);
5158 pwd->h[1] = msa_srl_df(DF_HALF, pws->h[1], pwt->h[1]);
5159 pwd->h[2] = msa_srl_df(DF_HALF, pws->h[2], pwt->h[2]);
5160 pwd->h[3] = msa_srl_df(DF_HALF, pws->h[3], pwt->h[3]);
5161 pwd->h[4] = msa_srl_df(DF_HALF, pws->h[4], pwt->h[4]);
5162 pwd->h[5] = msa_srl_df(DF_HALF, pws->h[5], pwt->h[5]);
5163 pwd->h[6] = msa_srl_df(DF_HALF, pws->h[6], pwt->h[6]);
5164 pwd->h[7] = msa_srl_df(DF_HALF, pws->h[7], pwt->h[7]);
5165 }
5166
5167 void helper_msa_srl_w(CPUMIPSState *env,
5168 uint32_t wd, uint32_t ws, uint32_t wt)
5169 {
5170 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5171 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5172 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5173
5174 pwd->w[0] = msa_srl_df(DF_WORD, pws->w[0], pwt->w[0]);
5175 pwd->w[1] = msa_srl_df(DF_WORD, pws->w[1], pwt->w[1]);
5176 pwd->w[2] = msa_srl_df(DF_WORD, pws->w[2], pwt->w[2]);
5177 pwd->w[3] = msa_srl_df(DF_WORD, pws->w[3], pwt->w[3]);
5178 }
5179
5180 void helper_msa_srl_d(CPUMIPSState *env,
5181 uint32_t wd, uint32_t ws, uint32_t wt)
5182 {
5183 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5184 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5185 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5186
5187 pwd->d[0] = msa_srl_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
5188 pwd->d[1] = msa_srl_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
5189 }
5190
5191
5192 static inline int64_t msa_srlr_df(uint32_t df, int64_t arg1, int64_t arg2)
5193 {
5194 uint64_t u_arg1 = UNSIGNED(arg1, df);
5195 int32_t b_arg2 = BIT_POSITION(arg2, df);
5196 if (b_arg2 == 0) {
5197 return u_arg1;
5198 } else {
5199 uint64_t r_bit = (u_arg1 >> (b_arg2 - 1)) & 1;
5200 return (u_arg1 >> b_arg2) + r_bit;
5201 }
5202 }
5203
5204 void helper_msa_srlr_b(CPUMIPSState *env,
5205 uint32_t wd, uint32_t ws, uint32_t wt)
5206 {
5207 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5208 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5209 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5210
5211 pwd->b[0] = msa_srlr_df(DF_BYTE, pws->b[0], pwt->b[0]);
5212 pwd->b[1] = msa_srlr_df(DF_BYTE, pws->b[1], pwt->b[1]);
5213 pwd->b[2] = msa_srlr_df(DF_BYTE, pws->b[2], pwt->b[2]);
5214 pwd->b[3] = msa_srlr_df(DF_BYTE, pws->b[3], pwt->b[3]);
5215 pwd->b[4] = msa_srlr_df(DF_BYTE, pws->b[4], pwt->b[4]);
5216 pwd->b[5] = msa_srlr_df(DF_BYTE, pws->b[5], pwt->b[5]);
5217 pwd->b[6] = msa_srlr_df(DF_BYTE, pws->b[6], pwt->b[6]);
5218 pwd->b[7] = msa_srlr_df(DF_BYTE, pws->b[7], pwt->b[7]);
5219 pwd->b[8] = msa_srlr_df(DF_BYTE, pws->b[8], pwt->b[8]);
5220 pwd->b[9] = msa_srlr_df(DF_BYTE, pws->b[9], pwt->b[9]);
5221 pwd->b[10] = msa_srlr_df(DF_BYTE, pws->b[10], pwt->b[10]);
5222 pwd->b[11] = msa_srlr_df(DF_BYTE, pws->b[11], pwt->b[11]);
5223 pwd->b[12] = msa_srlr_df(DF_BYTE, pws->b[12], pwt->b[12]);
5224 pwd->b[13] = msa_srlr_df(DF_BYTE, pws->b[13], pwt->b[13]);
5225 pwd->b[14] = msa_srlr_df(DF_BYTE, pws->b[14], pwt->b[14]);
5226 pwd->b[15] = msa_srlr_df(DF_BYTE, pws->b[15], pwt->b[15]);
5227 }
5228
5229 void helper_msa_srlr_h(CPUMIPSState *env,
5230 uint32_t wd, uint32_t ws, uint32_t wt)
5231 {
5232 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5233 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5234 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5235
5236 pwd->h[0] = msa_srlr_df(DF_HALF, pws->h[0], pwt->h[0]);
5237 pwd->h[1] = msa_srlr_df(DF_HALF, pws->h[1], pwt->h[1]);
5238 pwd->h[2] = msa_srlr_df(DF_HALF, pws->h[2], pwt->h[2]);
5239 pwd->h[3] = msa_srlr_df(DF_HALF, pws->h[3], pwt->h[3]);
5240 pwd->h[4] = msa_srlr_df(DF_HALF, pws->h[4], pwt->h[4]);
5241 pwd->h[5] = msa_srlr_df(DF_HALF, pws->h[5], pwt->h[5]);
5242 pwd->h[6] = msa_srlr_df(DF_HALF, pws->h[6], pwt->h[6]);
5243 pwd->h[7] = msa_srlr_df(DF_HALF, pws->h[7], pwt->h[7]);
5244 }
5245
5246 void helper_msa_srlr_w(CPUMIPSState *env,
5247 uint32_t wd, uint32_t ws, uint32_t wt)
5248 {
5249 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5250 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5251 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5252
5253 pwd->w[0] = msa_srlr_df(DF_WORD, pws->w[0], pwt->w[0]);
5254 pwd->w[1] = msa_srlr_df(DF_WORD, pws->w[1], pwt->w[1]);
5255 pwd->w[2] = msa_srlr_df(DF_WORD, pws->w[2], pwt->w[2]);
5256 pwd->w[3] = msa_srlr_df(DF_WORD, pws->w[3], pwt->w[3]);
5257 }
5258
5259 void helper_msa_srlr_d(CPUMIPSState *env,
5260 uint32_t wd, uint32_t ws, uint32_t wt)
5261 {
5262 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5263 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5264 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5265
5266 pwd->d[0] = msa_srlr_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
5267 pwd->d[1] = msa_srlr_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
5268 }
5269
5270
5271 #define MSA_FN_IMM8(FUNC, DEST, OPERATION) \
5272 void helper_msa_ ## FUNC(CPUMIPSState *env, uint32_t wd, uint32_t ws, \
5273 uint32_t i8) \
5274 { \
5275 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
5276 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
5277 uint32_t i; \
5278 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) { \
5279 DEST = OPERATION; \
5280 } \
5281 }
5282
5283 MSA_FN_IMM8(andi_b, pwd->b[i], pws->b[i] & i8)
5284 MSA_FN_IMM8(ori_b, pwd->b[i], pws->b[i] | i8)
5285 MSA_FN_IMM8(nori_b, pwd->b[i], ~(pws->b[i] | i8))
5286 MSA_FN_IMM8(xori_b, pwd->b[i], pws->b[i] ^ i8)
5287
5288 #define BIT_MOVE_IF_NOT_ZERO(dest, arg1, arg2, df) \
5289 UNSIGNED(((dest & (~arg2)) | (arg1 & arg2)), df)
5290 MSA_FN_IMM8(bmnzi_b, pwd->b[i],
5291 BIT_MOVE_IF_NOT_ZERO(pwd->b[i], pws->b[i], i8, DF_BYTE))
5292
5293 #define BIT_MOVE_IF_ZERO(dest, arg1, arg2, df) \
5294 UNSIGNED((dest & arg2) | (arg1 & (~arg2)), df)
5295 MSA_FN_IMM8(bmzi_b, pwd->b[i],
5296 BIT_MOVE_IF_ZERO(pwd->b[i], pws->b[i], i8, DF_BYTE))
5297
5298 #define BIT_SELECT(dest, arg1, arg2, df) \
5299 UNSIGNED((arg1 & (~dest)) | (arg2 & dest), df)
5300 MSA_FN_IMM8(bseli_b, pwd->b[i],
5301 BIT_SELECT(pwd->b[i], pws->b[i], i8, DF_BYTE))
5302
5303 #undef BIT_SELECT
5304 #undef BIT_MOVE_IF_ZERO
5305 #undef BIT_MOVE_IF_NOT_ZERO
5306 #undef MSA_FN_IMM8
5307
5308 #define SHF_POS(i, imm) (((i) & 0xfc) + (((imm) >> (2 * ((i) & 0x03))) & 0x03))
5309
5310 void helper_msa_shf_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
5311 uint32_t ws, uint32_t imm)
5312 {
5313 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5314 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5315 wr_t wx, *pwx = &wx;
5316 uint32_t i;
5317
5318 switch (df) {
5319 case DF_BYTE:
5320 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {
5321 pwx->b[i] = pws->b[SHF_POS(i, imm)];
5322 }
5323 break;
5324 case DF_HALF:
5325 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {
5326 pwx->h[i] = pws->h[SHF_POS(i, imm)];
5327 }
5328 break;
5329 case DF_WORD:
5330 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
5331 pwx->w[i] = pws->w[SHF_POS(i, imm)];
5332 }
5333 break;
5334 default:
5335 assert(0);
5336 }
5337 msa_move_v(pwd, pwx);
5338 }
5339
5340 #define MSA_BINOP_IMM_DF(helper, func) \
5341 void helper_msa_ ## helper ## _df(CPUMIPSState *env, uint32_t df, \
5342 uint32_t wd, uint32_t ws, int32_t u5) \
5343 { \
5344 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
5345 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
5346 uint32_t i; \
5347 \
5348 switch (df) { \
5349 case DF_BYTE: \
5350 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) { \
5351 pwd->b[i] = msa_ ## func ## _df(df, pws->b[i], u5); \
5352 } \
5353 break; \
5354 case DF_HALF: \
5355 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) { \
5356 pwd->h[i] = msa_ ## func ## _df(df, pws->h[i], u5); \
5357 } \
5358 break; \
5359 case DF_WORD: \
5360 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { \
5361 pwd->w[i] = msa_ ## func ## _df(df, pws->w[i], u5); \
5362 } \
5363 break; \
5364 case DF_DOUBLE: \
5365 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { \
5366 pwd->d[i] = msa_ ## func ## _df(df, pws->d[i], u5); \
5367 } \
5368 break; \
5369 default: \
5370 assert(0); \
5371 } \
5372 }
5373
5374 MSA_BINOP_IMM_DF(addvi, addv)
5375 MSA_BINOP_IMM_DF(subvi, subv)
5376 MSA_BINOP_IMM_DF(ceqi, ceq)
5377 MSA_BINOP_IMM_DF(clei_s, cle_s)
5378 MSA_BINOP_IMM_DF(clei_u, cle_u)
5379 MSA_BINOP_IMM_DF(clti_s, clt_s)
5380 MSA_BINOP_IMM_DF(clti_u, clt_u)
5381 MSA_BINOP_IMM_DF(maxi_s, max_s)
5382 MSA_BINOP_IMM_DF(maxi_u, max_u)
5383 MSA_BINOP_IMM_DF(mini_s, min_s)
5384 MSA_BINOP_IMM_DF(mini_u, min_u)
5385 #undef MSA_BINOP_IMM_DF
5386
5387 void helper_msa_ldi_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
5388 int32_t s10)
5389 {
5390 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5391 uint32_t i;
5392
5393 switch (df) {
5394 case DF_BYTE:
5395 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {
5396 pwd->b[i] = (int8_t)s10;
5397 }
5398 break;
5399 case DF_HALF:
5400 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {
5401 pwd->h[i] = (int16_t)s10;
5402 }
5403 break;
5404 case DF_WORD:
5405 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
5406 pwd->w[i] = (int32_t)s10;
5407 }
5408 break;
5409 case DF_DOUBLE:
5410 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
5411 pwd->d[i] = (int64_t)s10;
5412 }
5413 break;
5414 default:
5415 assert(0);
5416 }
5417 }
5418
5419 static inline int64_t msa_sat_s_df(uint32_t df, int64_t arg, uint32_t m)
5420 {
5421 return arg < M_MIN_INT(m + 1) ? M_MIN_INT(m + 1) :
5422 arg > M_MAX_INT(m + 1) ? M_MAX_INT(m + 1) :
5423 arg;
5424 }
5425
5426 static inline int64_t msa_sat_u_df(uint32_t df, int64_t arg, uint32_t m)
5427 {
5428 uint64_t u_arg = UNSIGNED(arg, df);
5429 return u_arg < M_MAX_UINT(m + 1) ? u_arg :
5430 M_MAX_UINT(m + 1);
5431 }
5432
5433 #define MSA_BINOP_IMMU_DF(helper, func) \
5434 void helper_msa_ ## helper ## _df(CPUMIPSState *env, uint32_t df, uint32_t wd, \
5435 uint32_t ws, uint32_t u5) \
5436 { \
5437 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
5438 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
5439 uint32_t i; \
5440 \
5441 switch (df) { \
5442 case DF_BYTE: \
5443 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) { \
5444 pwd->b[i] = msa_ ## func ## _df(df, pws->b[i], u5); \
5445 } \
5446 break; \
5447 case DF_HALF: \
5448 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) { \
5449 pwd->h[i] = msa_ ## func ## _df(df, pws->h[i], u5); \
5450 } \
5451 break; \
5452 case DF_WORD: \
5453 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { \
5454 pwd->w[i] = msa_ ## func ## _df(df, pws->w[i], u5); \
5455 } \
5456 break; \
5457 case DF_DOUBLE: \
5458 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { \
5459 pwd->d[i] = msa_ ## func ## _df(df, pws->d[i], u5); \
5460 } \
5461 break; \
5462 default: \
5463 assert(0); \
5464 } \
5465 }
5466
5467 MSA_BINOP_IMMU_DF(slli, sll)
5468 MSA_BINOP_IMMU_DF(srai, sra)
5469 MSA_BINOP_IMMU_DF(srli, srl)
5470 MSA_BINOP_IMMU_DF(bclri, bclr)
5471 MSA_BINOP_IMMU_DF(bseti, bset)
5472 MSA_BINOP_IMMU_DF(bnegi, bneg)
5473 MSA_BINOP_IMMU_DF(sat_s, sat_s)
5474 MSA_BINOP_IMMU_DF(sat_u, sat_u)
5475 MSA_BINOP_IMMU_DF(srari, srar)
5476 MSA_BINOP_IMMU_DF(srlri, srlr)
5477 #undef MSA_BINOP_IMMU_DF
5478
5479 #define MSA_TEROP_IMMU_DF(helper, func) \
5480 void helper_msa_ ## helper ## _df(CPUMIPSState *env, uint32_t df, \
5481 uint32_t wd, uint32_t ws, uint32_t u5) \
5482 { \
5483 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
5484 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
5485 uint32_t i; \
5486 \
5487 switch (df) { \
5488 case DF_BYTE: \
5489 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) { \
5490 pwd->b[i] = msa_ ## func ## _df(df, pwd->b[i], pws->b[i], \
5491 u5); \
5492 } \
5493 break; \
5494 case DF_HALF: \
5495 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) { \
5496 pwd->h[i] = msa_ ## func ## _df(df, pwd->h[i], pws->h[i], \
5497 u5); \
5498 } \
5499 break; \
5500 case DF_WORD: \
5501 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { \
5502 pwd->w[i] = msa_ ## func ## _df(df, pwd->w[i], pws->w[i], \
5503 u5); \
5504 } \
5505 break; \
5506 case DF_DOUBLE: \
5507 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { \
5508 pwd->d[i] = msa_ ## func ## _df(df, pwd->d[i], pws->d[i], \
5509 u5); \
5510 } \
5511 break; \
5512 default: \
5513 assert(0); \
5514 } \
5515 }
5516
5517 MSA_TEROP_IMMU_DF(binsli, binsl)
5518 MSA_TEROP_IMMU_DF(binsri, binsr)
5519 #undef MSA_TEROP_IMMU_DF
5520
5521 #define CONCATENATE_AND_SLIDE(s, k) \
5522 do { \
5523 for (i = 0; i < s; i++) { \
5524 v[i] = pws->b[s * k + i]; \
5525 v[i + s] = pwd->b[s * k + i]; \
5526 } \
5527 for (i = 0; i < s; i++) { \
5528 pwd->b[s * k + i] = v[i + n]; \
5529 } \
5530 } while (0)
5531
5532 static inline void msa_sld_df(uint32_t df, wr_t *pwd,
5533 wr_t *pws, target_ulong rt)
5534 {
5535 uint32_t n = rt % DF_ELEMENTS(df);
5536 uint8_t v[64];
5537 uint32_t i, k;
5538
5539 switch (df) {
5540 case DF_BYTE:
5541 CONCATENATE_AND_SLIDE(DF_ELEMENTS(DF_BYTE), 0);
5542 break;
5543 case DF_HALF:
5544 for (k = 0; k < 2; k++) {
5545 CONCATENATE_AND_SLIDE(DF_ELEMENTS(DF_HALF), k);
5546 }
5547 break;
5548 case DF_WORD:
5549 for (k = 0; k < 4; k++) {
5550 CONCATENATE_AND_SLIDE(DF_ELEMENTS(DF_WORD), k);
5551 }
5552 break;
5553 case DF_DOUBLE:
5554 for (k = 0; k < 8; k++) {
5555 CONCATENATE_AND_SLIDE(DF_ELEMENTS(DF_DOUBLE), k);
5556 }
5557 break;
5558 default:
5559 assert(0);
5560 }
5561 }
5562
5563 static inline int64_t msa_mul_q_df(uint32_t df, int64_t arg1, int64_t arg2)
5564 {
5565 int64_t q_min = DF_MIN_INT(df);
5566 int64_t q_max = DF_MAX_INT(df);
5567
5568 if (arg1 == q_min && arg2 == q_min) {
5569 return q_max;
5570 }
5571 return (arg1 * arg2) >> (DF_BITS(df) - 1);
5572 }
5573
5574 static inline int64_t msa_mulr_q_df(uint32_t df, int64_t arg1, int64_t arg2)
5575 {
5576 int64_t q_min = DF_MIN_INT(df);
5577 int64_t q_max = DF_MAX_INT(df);
5578 int64_t r_bit = 1 << (DF_BITS(df) - 2);
5579
5580 if (arg1 == q_min && arg2 == q_min) {
5581 return q_max;
5582 }
5583 return (arg1 * arg2 + r_bit) >> (DF_BITS(df) - 1);
5584 }
5585
5586 #define MSA_BINOP_DF(func) \
5587 void helper_msa_ ## func ## _df(CPUMIPSState *env, uint32_t df, \
5588 uint32_t wd, uint32_t ws, uint32_t wt) \
5589 { \
5590 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
5591 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
5592 wr_t *pwt = &(env->active_fpu.fpr[wt].wr); \
5593 \
5594 switch (df) { \
5595 case DF_BYTE: \
5596 pwd->b[0] = msa_ ## func ## _df(df, pws->b[0], pwt->b[0]); \
5597 pwd->b[1] = msa_ ## func ## _df(df, pws->b[1], pwt->b[1]); \
5598 pwd->b[2] = msa_ ## func ## _df(df, pws->b[2], pwt->b[2]); \
5599 pwd->b[3] = msa_ ## func ## _df(df, pws->b[3], pwt->b[3]); \
5600 pwd->b[4] = msa_ ## func ## _df(df, pws->b[4], pwt->b[4]); \
5601 pwd->b[5] = msa_ ## func ## _df(df, pws->b[5], pwt->b[5]); \
5602 pwd->b[6] = msa_ ## func ## _df(df, pws->b[6], pwt->b[6]); \
5603 pwd->b[7] = msa_ ## func ## _df(df, pws->b[7], pwt->b[7]); \
5604 pwd->b[8] = msa_ ## func ## _df(df, pws->b[8], pwt->b[8]); \
5605 pwd->b[9] = msa_ ## func ## _df(df, pws->b[9], pwt->b[9]); \
5606 pwd->b[10] = msa_ ## func ## _df(df, pws->b[10], pwt->b[10]); \
5607 pwd->b[11] = msa_ ## func ## _df(df, pws->b[11], pwt->b[11]); \
5608 pwd->b[12] = msa_ ## func ## _df(df, pws->b[12], pwt->b[12]); \
5609 pwd->b[13] = msa_ ## func ## _df(df, pws->b[13], pwt->b[13]); \
5610 pwd->b[14] = msa_ ## func ## _df(df, pws->b[14], pwt->b[14]); \
5611 pwd->b[15] = msa_ ## func ## _df(df, pws->b[15], pwt->b[15]); \
5612 break; \
5613 case DF_HALF: \
5614 pwd->h[0] = msa_ ## func ## _df(df, pws->h[0], pwt->h[0]); \
5615 pwd->h[1] = msa_ ## func ## _df(df, pws->h[1], pwt->h[1]); \
5616 pwd->h[2] = msa_ ## func ## _df(df, pws->h[2], pwt->h[2]); \
5617 pwd->h[3] = msa_ ## func ## _df(df, pws->h[3], pwt->h[3]); \
5618 pwd->h[4] = msa_ ## func ## _df(df, pws->h[4], pwt->h[4]); \
5619 pwd->h[5] = msa_ ## func ## _df(df, pws->h[5], pwt->h[5]); \
5620 pwd->h[6] = msa_ ## func ## _df(df, pws->h[6], pwt->h[6]); \
5621 pwd->h[7] = msa_ ## func ## _df(df, pws->h[7], pwt->h[7]); \
5622 break; \
5623 case DF_WORD: \
5624 pwd->w[0] = msa_ ## func ## _df(df, pws->w[0], pwt->w[0]); \
5625 pwd->w[1] = msa_ ## func ## _df(df, pws->w[1], pwt->w[1]); \
5626 pwd->w[2] = msa_ ## func ## _df(df, pws->w[2], pwt->w[2]); \
5627 pwd->w[3] = msa_ ## func ## _df(df, pws->w[3], pwt->w[3]); \
5628 break; \
5629 case DF_DOUBLE: \
5630 pwd->d[0] = msa_ ## func ## _df(df, pws->d[0], pwt->d[0]); \
5631 pwd->d[1] = msa_ ## func ## _df(df, pws->d[1], pwt->d[1]); \
5632 break; \
5633 default: \
5634 assert(0); \
5635 } \
5636 }
5637
5638 MSA_BINOP_DF(mul_q)
5639 MSA_BINOP_DF(mulr_q)
5640 #undef MSA_BINOP_DF
5641
5642 void helper_msa_sld_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
5643 uint32_t ws, uint32_t rt)
5644 {
5645 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5646 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5647
5648 msa_sld_df(df, pwd, pws, env->active_tc.gpr[rt]);
5649 }
5650
5651 static inline int64_t msa_madd_q_df(uint32_t df, int64_t dest, int64_t arg1,
5652 int64_t arg2)
5653 {
5654 int64_t q_prod, q_ret;
5655
5656 int64_t q_max = DF_MAX_INT(df);
5657 int64_t q_min = DF_MIN_INT(df);
5658
5659 q_prod = arg1 * arg2;
5660 q_ret = ((dest << (DF_BITS(df) - 1)) + q_prod) >> (DF_BITS(df) - 1);
5661
5662 return (q_ret < q_min) ? q_min : (q_max < q_ret) ? q_max : q_ret;
5663 }
5664
5665 static inline int64_t msa_msub_q_df(uint32_t df, int64_t dest, int64_t arg1,
5666 int64_t arg2)
5667 {
5668 int64_t q_prod, q_ret;
5669
5670 int64_t q_max = DF_MAX_INT(df);
5671 int64_t q_min = DF_MIN_INT(df);
5672
5673 q_prod = arg1 * arg2;
5674 q_ret = ((dest << (DF_BITS(df) - 1)) - q_prod) >> (DF_BITS(df) - 1);
5675
5676 return (q_ret < q_min) ? q_min : (q_max < q_ret) ? q_max : q_ret;
5677 }
5678
5679 static inline int64_t msa_maddr_q_df(uint32_t df, int64_t dest, int64_t arg1,
5680 int64_t arg2)
5681 {
5682 int64_t q_prod, q_ret;
5683
5684 int64_t q_max = DF_MAX_INT(df);
5685 int64_t q_min = DF_MIN_INT(df);
5686 int64_t r_bit = 1 << (DF_BITS(df) - 2);
5687
5688 q_prod = arg1 * arg2;
5689 q_ret = ((dest << (DF_BITS(df) - 1)) + q_prod + r_bit) >> (DF_BITS(df) - 1);
5690
5691 return (q_ret < q_min) ? q_min : (q_max < q_ret) ? q_max : q_ret;
5692 }
5693
5694 static inline int64_t msa_msubr_q_df(uint32_t df, int64_t dest, int64_t arg1,
5695 int64_t arg2)
5696 {
5697 int64_t q_prod, q_ret;
5698
5699 int64_t q_max = DF_MAX_INT(df);
5700 int64_t q_min = DF_MIN_INT(df);
5701 int64_t r_bit = 1 << (DF_BITS(df) - 2);
5702
5703 q_prod = arg1 * arg2;
5704 q_ret = ((dest << (DF_BITS(df) - 1)) - q_prod + r_bit) >> (DF_BITS(df) - 1);
5705
5706 return (q_ret < q_min) ? q_min : (q_max < q_ret) ? q_max : q_ret;
5707 }
5708
5709 #define MSA_TEROP_DF(func) \
5710 void helper_msa_ ## func ## _df(CPUMIPSState *env, uint32_t df, uint32_t wd, \
5711 uint32_t ws, uint32_t wt) \
5712 { \
5713 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
5714 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
5715 wr_t *pwt = &(env->active_fpu.fpr[wt].wr); \
5716 \
5717 switch (df) { \
5718 case DF_BYTE: \
5719 pwd->b[0] = msa_ ## func ## _df(df, pwd->b[0], pws->b[0], \
5720 pwt->b[0]); \
5721 pwd->b[1] = msa_ ## func ## _df(df, pwd->b[1], pws->b[1], \
5722 pwt->b[1]); \
5723 pwd->b[2] = msa_ ## func ## _df(df, pwd->b[2], pws->b[2], \
5724 pwt->b[2]); \
5725 pwd->b[3] = msa_ ## func ## _df(df, pwd->b[3], pws->b[3], \
5726 pwt->b[3]); \
5727 pwd->b[4] = msa_ ## func ## _df(df, pwd->b[4], pws->b[4], \
5728 pwt->b[4]); \
5729 pwd->b[5] = msa_ ## func ## _df(df, pwd->b[5], pws->b[5], \
5730 pwt->b[5]); \
5731 pwd->b[6] = msa_ ## func ## _df(df, pwd->b[6], pws->b[6], \
5732 pwt->b[6]); \
5733 pwd->b[7] = msa_ ## func ## _df(df, pwd->b[7], pws->b[7], \
5734 pwt->b[7]); \
5735 pwd->b[8] = msa_ ## func ## _df(df, pwd->b[8], pws->b[8], \
5736 pwt->b[8]); \
5737 pwd->b[9] = msa_ ## func ## _df(df, pwd->b[9], pws->b[9], \
5738 pwt->b[9]); \
5739 pwd->b[10] = msa_ ## func ## _df(df, pwd->b[10], pws->b[10], \
5740 pwt->b[10]); \
5741 pwd->b[11] = msa_ ## func ## _df(df, pwd->b[11], pws->b[11], \
5742 pwt->b[11]); \
5743 pwd->b[12] = msa_ ## func ## _df(df, pwd->b[12], pws->b[12], \
5744 pwt->b[12]); \
5745 pwd->b[13] = msa_ ## func ## _df(df, pwd->b[13], pws->b[13], \
5746 pwt->b[13]); \
5747 pwd->b[14] = msa_ ## func ## _df(df, pwd->b[14], pws->b[14], \
5748 pwt->b[14]); \
5749 pwd->b[15] = msa_ ## func ## _df(df, pwd->b[15], pws->b[15], \
5750 pwt->b[15]); \
5751 break; \
5752 case DF_HALF: \
5753 pwd->h[0] = msa_ ## func ## _df(df, pwd->h[0], pws->h[0], pwt->h[0]); \
5754 pwd->h[1] = msa_ ## func ## _df(df, pwd->h[1], pws->h[1], pwt->h[1]); \
5755 pwd->h[2] = msa_ ## func ## _df(df, pwd->h[2], pws->h[2], pwt->h[2]); \
5756 pwd->h[3] = msa_ ## func ## _df(df, pwd->h[3], pws->h[3], pwt->h[3]); \
5757 pwd->h[4] = msa_ ## func ## _df(df, pwd->h[4], pws->h[4], pwt->h[4]); \
5758 pwd->h[5] = msa_ ## func ## _df(df, pwd->h[5], pws->h[5], pwt->h[5]); \
5759 pwd->h[6] = msa_ ## func ## _df(df, pwd->h[6], pws->h[6], pwt->h[6]); \
5760 pwd->h[7] = msa_ ## func ## _df(df, pwd->h[7], pws->h[7], pwt->h[7]); \
5761 break; \
5762 case DF_WORD: \
5763 pwd->w[0] = msa_ ## func ## _df(df, pwd->w[0], pws->w[0], pwt->w[0]); \
5764 pwd->w[1] = msa_ ## func ## _df(df, pwd->w[1], pws->w[1], pwt->w[1]); \
5765 pwd->w[2] = msa_ ## func ## _df(df, pwd->w[2], pws->w[2], pwt->w[2]); \
5766 pwd->w[3] = msa_ ## func ## _df(df, pwd->w[3], pws->w[3], pwt->w[3]); \
5767 break; \
5768 case DF_DOUBLE: \
5769 pwd->d[0] = msa_ ## func ## _df(df, pwd->d[0], pws->d[0], pwt->d[0]); \
5770 pwd->d[1] = msa_ ## func ## _df(df, pwd->d[1], pws->d[1], pwt->d[1]); \
5771 break; \
5772 default: \
5773 assert(0); \
5774 } \
5775 }
5776
5777 MSA_TEROP_DF(binsl)
5778 MSA_TEROP_DF(binsr)
5779 MSA_TEROP_DF(madd_q)
5780 MSA_TEROP_DF(msub_q)
5781 MSA_TEROP_DF(maddr_q)
5782 MSA_TEROP_DF(msubr_q)
5783 #undef MSA_TEROP_DF
5784
5785 static inline void msa_splat_df(uint32_t df, wr_t *pwd,
5786 wr_t *pws, target_ulong rt)
5787 {
5788 uint32_t n = rt % DF_ELEMENTS(df);
5789 uint32_t i;
5790
5791 switch (df) {
5792 case DF_BYTE:
5793 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {
5794 pwd->b[i] = pws->b[n];
5795 }
5796 break;
5797 case DF_HALF:
5798 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {
5799 pwd->h[i] = pws->h[n];
5800 }
5801 break;
5802 case DF_WORD:
5803 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
5804 pwd->w[i] = pws->w[n];
5805 }
5806 break;
5807 case DF_DOUBLE:
5808 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
5809 pwd->d[i] = pws->d[n];
5810 }
5811 break;
5812 default:
5813 assert(0);
5814 }
5815 }
5816
5817 void helper_msa_splat_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
5818 uint32_t ws, uint32_t rt)
5819 {
5820 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5821 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5822
5823 msa_splat_df(df, pwd, pws, env->active_tc.gpr[rt]);
5824 }
5825
5826 #define MSA_DO_B MSA_DO(b)
5827 #define MSA_DO_H MSA_DO(h)
5828 #define MSA_DO_W MSA_DO(w)
5829 #define MSA_DO_D MSA_DO(d)
5830
5831 #define MSA_LOOP_B MSA_LOOP(B)
5832 #define MSA_LOOP_H MSA_LOOP(H)
5833 #define MSA_LOOP_W MSA_LOOP(W)
5834 #define MSA_LOOP_D MSA_LOOP(D)
5835
5836 #define MSA_LOOP_COND_B MSA_LOOP_COND(DF_BYTE)
5837 #define MSA_LOOP_COND_H MSA_LOOP_COND(DF_HALF)
5838 #define MSA_LOOP_COND_W MSA_LOOP_COND(DF_WORD)
5839 #define MSA_LOOP_COND_D MSA_LOOP_COND(DF_DOUBLE)
5840
5841 #define MSA_LOOP(DF) \
5842 do { \
5843 for (i = 0; i < (MSA_LOOP_COND_ ## DF) ; i++) { \
5844 MSA_DO_ ## DF; \
5845 } \
5846 } while (0)
5847
5848 #define MSA_FN_DF(FUNC) \
5849 void helper_msa_##FUNC(CPUMIPSState *env, uint32_t df, uint32_t wd, \
5850 uint32_t ws, uint32_t wt) \
5851 { \
5852 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
5853 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
5854 wr_t *pwt = &(env->active_fpu.fpr[wt].wr); \
5855 wr_t wx, *pwx = &wx; \
5856 uint32_t i; \
5857 switch (df) { \
5858 case DF_BYTE: \
5859 MSA_LOOP_B; \
5860 break; \
5861 case DF_HALF: \
5862 MSA_LOOP_H; \
5863 break; \
5864 case DF_WORD: \
5865 MSA_LOOP_W; \
5866 break; \
5867 case DF_DOUBLE: \
5868 MSA_LOOP_D; \
5869 break; \
5870 default: \
5871 assert(0); \
5872 } \
5873 msa_move_v(pwd, pwx); \
5874 }
5875
5876 #define MSA_LOOP_COND(DF) \
5877 (DF_ELEMENTS(DF) / 2)
5878
5879 #define Rb(pwr, i) (pwr->b[i])
5880 #define Lb(pwr, i) (pwr->b[i + DF_ELEMENTS(DF_BYTE) / 2])
5881 #define Rh(pwr, i) (pwr->h[i])
5882 #define Lh(pwr, i) (pwr->h[i + DF_ELEMENTS(DF_HALF) / 2])
5883 #define Rw(pwr, i) (pwr->w[i])
5884 #define Lw(pwr, i) (pwr->w[i + DF_ELEMENTS(DF_WORD) / 2])
5885 #define Rd(pwr, i) (pwr->d[i])
5886 #define Ld(pwr, i) (pwr->d[i + DF_ELEMENTS(DF_DOUBLE) / 2])
5887
5888 #undef MSA_LOOP_COND
5889
5890 #define MSA_LOOP_COND(DF) \
5891 (DF_ELEMENTS(DF))
5892
5893 #define MSA_DO(DF) \
5894 do { \
5895 uint32_t n = DF_ELEMENTS(df); \
5896 uint32_t k = (pwd->DF[i] & 0x3f) % (2 * n); \
5897 pwx->DF[i] = \
5898 (pwd->DF[i] & 0xc0) ? 0 : k < n ? pwt->DF[k] : pws->DF[k - n]; \
5899 } while (0)
5900 MSA_FN_DF(vshf_df)
5901 #undef MSA_DO
5902 #undef MSA_LOOP_COND
5903 #undef MSA_FN_DF
5904
5905
5906 void helper_msa_sldi_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
5907 uint32_t ws, uint32_t n)
5908 {
5909 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5910 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5911
5912 msa_sld_df(df, pwd, pws, n);
5913 }
5914
5915 void helper_msa_splati_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
5916 uint32_t ws, uint32_t n)
5917 {
5918 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5919 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5920
5921 msa_splat_df(df, pwd, pws, n);
5922 }
5923
5924 void helper_msa_copy_s_b(CPUMIPSState *env, uint32_t rd,
5925 uint32_t ws, uint32_t n)
5926 {
5927 n %= 16;
5928 #if defined(HOST_WORDS_BIGENDIAN)
5929 if (n < 8) {
5930 n = 8 - n - 1;
5931 } else {
5932 n = 24 - n - 1;
5933 }
5934 #endif
5935 env->active_tc.gpr[rd] = (int8_t)env->active_fpu.fpr[ws].wr.b[n];
5936 }
5937
5938 void helper_msa_copy_s_h(CPUMIPSState *env, uint32_t rd,
5939 uint32_t ws, uint32_t n)
5940 {
5941 n %= 8;
5942 #if defined(HOST_WORDS_BIGENDIAN)
5943 if (n < 4) {
5944 n = 4 - n - 1;
5945 } else {
5946 n = 12 - n - 1;
5947 }
5948 #endif
5949 env->active_tc.gpr[rd] = (int16_t)env->active_fpu.fpr[ws].wr.h[n];
5950 }
5951
5952 void helper_msa_copy_s_w(CPUMIPSState *env, uint32_t rd,
5953 uint32_t ws, uint32_t n)
5954 {
5955 n %= 4;
5956 #if defined(HOST_WORDS_BIGENDIAN)
5957 if (n < 2) {
5958 n = 2 - n - 1;
5959 } else {
5960 n = 6 - n - 1;
5961 }
5962 #endif
5963 env->active_tc.gpr[rd] = (int32_t)env->active_fpu.fpr[ws].wr.w[n];
5964 }
5965
5966 void helper_msa_copy_s_d(CPUMIPSState *env, uint32_t rd,
5967 uint32_t ws, uint32_t n)
5968 {
5969 n %= 2;
5970 env->active_tc.gpr[rd] = (int64_t)env->active_fpu.fpr[ws].wr.d[n];
5971 }
5972
5973 void helper_msa_copy_u_b(CPUMIPSState *env, uint32_t rd,
5974 uint32_t ws, uint32_t n)
5975 {
5976 n %= 16;
5977 #if defined(HOST_WORDS_BIGENDIAN)
5978 if (n < 8) {
5979 n = 8 - n - 1;
5980 } else {
5981 n = 24 - n - 1;
5982 }
5983 #endif
5984 env->active_tc.gpr[rd] = (uint8_t)env->active_fpu.fpr[ws].wr.b[n];
5985 }
5986
5987 void helper_msa_copy_u_h(CPUMIPSState *env, uint32_t rd,
5988 uint32_t ws, uint32_t n)
5989 {
5990 n %= 8;
5991 #if defined(HOST_WORDS_BIGENDIAN)
5992 if (n < 4) {
5993 n = 4 - n - 1;
5994 } else {
5995 n = 12 - n - 1;
5996 }
5997 #endif
5998 env->active_tc.gpr[rd] = (uint16_t)env->active_fpu.fpr[ws].wr.h[n];
5999 }
6000
6001 void helper_msa_copy_u_w(CPUMIPSState *env, uint32_t rd,
6002 uint32_t ws, uint32_t n)
6003 {
6004 n %= 4;
6005 #if defined(HOST_WORDS_BIGENDIAN)
6006 if (n < 2) {
6007 n = 2 - n - 1;
6008 } else {
6009 n = 6 - n - 1;
6010 }
6011 #endif
6012 env->active_tc.gpr[rd] = (uint32_t)env->active_fpu.fpr[ws].wr.w[n];
6013 }
6014
6015 void helper_msa_insert_b(CPUMIPSState *env, uint32_t wd,
6016 uint32_t rs_num, uint32_t n)
6017 {
6018 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6019 target_ulong rs = env->active_tc.gpr[rs_num];
6020 n %= 16;
6021 #if defined(HOST_WORDS_BIGENDIAN)
6022 if (n < 8) {
6023 n = 8 - n - 1;
6024 } else {
6025 n = 24 - n - 1;
6026 }
6027 #endif
6028 pwd->b[n] = (int8_t)rs;
6029 }
6030
6031 void helper_msa_insert_h(CPUMIPSState *env, uint32_t wd,
6032 uint32_t rs_num, uint32_t n)
6033 {
6034 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6035 target_ulong rs = env->active_tc.gpr[rs_num];
6036 n %= 8;
6037 #if defined(HOST_WORDS_BIGENDIAN)
6038 if (n < 4) {
6039 n = 4 - n - 1;
6040 } else {
6041 n = 12 - n - 1;
6042 }
6043 #endif
6044 pwd->h[n] = (int16_t)rs;
6045 }
6046
6047 void helper_msa_insert_w(CPUMIPSState *env, uint32_t wd,
6048 uint32_t rs_num, uint32_t n)
6049 {
6050 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6051 target_ulong rs = env->active_tc.gpr[rs_num];
6052 n %= 4;
6053 #if defined(HOST_WORDS_BIGENDIAN)
6054 if (n < 2) {
6055 n = 2 - n - 1;
6056 } else {
6057 n = 6 - n - 1;
6058 }
6059 #endif
6060 pwd->w[n] = (int32_t)rs;
6061 }
6062
6063 void helper_msa_insert_d(CPUMIPSState *env, uint32_t wd,
6064 uint32_t rs_num, uint32_t n)
6065 {
6066 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6067 target_ulong rs = env->active_tc.gpr[rs_num];
6068 n %= 2;
6069 pwd->d[n] = (int64_t)rs;
6070 }
6071
6072 void helper_msa_insve_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6073 uint32_t ws, uint32_t n)
6074 {
6075 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6076 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6077
6078 switch (df) {
6079 case DF_BYTE:
6080 pwd->b[n] = (int8_t)pws->b[0];
6081 break;
6082 case DF_HALF:
6083 pwd->h[n] = (int16_t)pws->h[0];
6084 break;
6085 case DF_WORD:
6086 pwd->w[n] = (int32_t)pws->w[0];
6087 break;
6088 case DF_DOUBLE:
6089 pwd->d[n] = (int64_t)pws->d[0];
6090 break;
6091 default:
6092 assert(0);
6093 }
6094 }
6095
6096 void helper_msa_ctcmsa(CPUMIPSState *env, target_ulong elm, uint32_t cd)
6097 {
6098 switch (cd) {
6099 case 0:
6100 break;
6101 case 1:
6102 env->active_tc.msacsr = (int32_t)elm & MSACSR_MASK;
6103 restore_msa_fp_status(env);
6104 /* check exception */
6105 if ((GET_FP_ENABLE(env->active_tc.msacsr) | FP_UNIMPLEMENTED)
6106 & GET_FP_CAUSE(env->active_tc.msacsr)) {
6107 do_raise_exception(env, EXCP_MSAFPE, GETPC());
6108 }
6109 break;
6110 }
6111 }
6112
6113 target_ulong helper_msa_cfcmsa(CPUMIPSState *env, uint32_t cs)
6114 {
6115 switch (cs) {
6116 case 0:
6117 return env->msair;
6118 case 1:
6119 return env->active_tc.msacsr & MSACSR_MASK;
6120 }
6121 return 0;
6122 }
6123
6124 void helper_msa_fill_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6125 uint32_t rs)
6126 {
6127 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6128 uint32_t i;
6129
6130 switch (df) {
6131 case DF_BYTE:
6132 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {
6133 pwd->b[i] = (int8_t)env->active_tc.gpr[rs];
6134 }
6135 break;
6136 case DF_HALF:
6137 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {
6138 pwd->h[i] = (int16_t)env->active_tc.gpr[rs];
6139 }
6140 break;
6141 case DF_WORD:
6142 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6143 pwd->w[i] = (int32_t)env->active_tc.gpr[rs];
6144 }
6145 break;
6146 case DF_DOUBLE:
6147 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6148 pwd->d[i] = (int64_t)env->active_tc.gpr[rs];
6149 }
6150 break;
6151 default:
6152 assert(0);
6153 }
6154 }
6155
6156
6157 #define FLOAT_ONE32 make_float32(0x3f8 << 20)
6158 #define FLOAT_ONE64 make_float64(0x3ffULL << 52)
6159
6160 #define FLOAT_SNAN16(s) (float16_default_nan(s) ^ 0x0220)
6161 /* 0x7c20 */
6162 #define FLOAT_SNAN32(s) (float32_default_nan(s) ^ 0x00400020)
6163 /* 0x7f800020 */
6164 #define FLOAT_SNAN64(s) (float64_default_nan(s) ^ 0x0008000000000020ULL)
6165 /* 0x7ff0000000000020 */
6166
6167 static inline void clear_msacsr_cause(CPUMIPSState *env)
6168 {
6169 SET_FP_CAUSE(env->active_tc.msacsr, 0);
6170 }
6171
6172 static inline void check_msacsr_cause(CPUMIPSState *env, uintptr_t retaddr)
6173 {
6174 if ((GET_FP_CAUSE(env->active_tc.msacsr) &
6175 (GET_FP_ENABLE(env->active_tc.msacsr) | FP_UNIMPLEMENTED)) == 0) {
6176 UPDATE_FP_FLAGS(env->active_tc.msacsr,
6177 GET_FP_CAUSE(env->active_tc.msacsr));
6178 } else {
6179 do_raise_exception(env, EXCP_MSAFPE, retaddr);
6180 }
6181 }
6182
6183 /* Flush-to-zero use cases for update_msacsr() */
6184 #define CLEAR_FS_UNDERFLOW 1
6185 #define CLEAR_IS_INEXACT 2
6186 #define RECIPROCAL_INEXACT 4
6187
6188
6189 static inline int ieee_to_mips_xcpt_msa(int ieee_xcpt)
6190 {
6191 int mips_xcpt = 0;
6192
6193 if (ieee_xcpt & float_flag_invalid) {
6194 mips_xcpt |= FP_INVALID;
6195 }
6196 if (ieee_xcpt & float_flag_overflow) {
6197 mips_xcpt |= FP_OVERFLOW;
6198 }
6199 if (ieee_xcpt & float_flag_underflow) {
6200 mips_xcpt |= FP_UNDERFLOW;
6201 }
6202 if (ieee_xcpt & float_flag_divbyzero) {
6203 mips_xcpt |= FP_DIV0;
6204 }
6205 if (ieee_xcpt & float_flag_inexact) {
6206 mips_xcpt |= FP_INEXACT;
6207 }
6208
6209 return mips_xcpt;
6210 }
6211
6212 static inline int update_msacsr(CPUMIPSState *env, int action, int denormal)
6213 {
6214 int ieee_exception_flags;
6215 int mips_exception_flags = 0;
6216 int cause;
6217 int enable;
6218
6219 ieee_exception_flags = get_float_exception_flags(
6220 &env->active_tc.msa_fp_status);
6221
6222 /* QEMU softfloat does not signal all underflow cases */
6223 if (denormal) {
6224 ieee_exception_flags |= float_flag_underflow;
6225 }
6226 if (ieee_exception_flags) {
6227 mips_exception_flags = ieee_to_mips_xcpt_msa(ieee_exception_flags);
6228 }
6229 enable = GET_FP_ENABLE(env->active_tc.msacsr) | FP_UNIMPLEMENTED;
6230
6231 /* Set Inexact (I) when flushing inputs to zero */
6232 if ((ieee_exception_flags & float_flag_input_denormal) &&
6233 (env->active_tc.msacsr & MSACSR_FS_MASK) != 0) {
6234 if (action & CLEAR_IS_INEXACT) {
6235 mips_exception_flags &= ~FP_INEXACT;
6236 } else {
6237 mips_exception_flags |= FP_INEXACT;
6238 }
6239 }
6240
6241 /* Set Inexact (I) and Underflow (U) when flushing outputs to zero */
6242 if ((ieee_exception_flags & float_flag_output_denormal) &&
6243 (env->active_tc.msacsr & MSACSR_FS_MASK) != 0) {
6244 mips_exception_flags |= FP_INEXACT;
6245 if (action & CLEAR_FS_UNDERFLOW) {
6246 mips_exception_flags &= ~FP_UNDERFLOW;
6247 } else {
6248 mips_exception_flags |= FP_UNDERFLOW;
6249 }
6250 }
6251
6252 /* Set Inexact (I) when Overflow (O) is not enabled */
6253 if ((mips_exception_flags & FP_OVERFLOW) != 0 &&
6254 (enable & FP_OVERFLOW) == 0) {
6255 mips_exception_flags |= FP_INEXACT;
6256 }
6257
6258 /* Clear Exact Underflow when Underflow (U) is not enabled */
6259 if ((mips_exception_flags & FP_UNDERFLOW) != 0 &&
6260 (enable & FP_UNDERFLOW) == 0 &&
6261 (mips_exception_flags & FP_INEXACT) == 0) {
6262 mips_exception_flags &= ~FP_UNDERFLOW;
6263 }
6264
6265 /*
6266 * Reciprocal operations set only Inexact when valid and not
6267 * divide by zero
6268 */
6269 if ((action & RECIPROCAL_INEXACT) &&
6270 (mips_exception_flags & (FP_INVALID | FP_DIV0)) == 0) {
6271 mips_exception_flags = FP_INEXACT;
6272 }
6273
6274 cause = mips_exception_flags & enable; /* all current enabled exceptions */
6275
6276 if (cause == 0) {
6277 /*
6278 * No enabled exception, update the MSACSR Cause
6279 * with all current exceptions
6280 */
6281 SET_FP_CAUSE(env->active_tc.msacsr,
6282 (GET_FP_CAUSE(env->active_tc.msacsr) | mips_exception_flags));
6283 } else {
6284 /* Current exceptions are enabled */
6285 if ((env->active_tc.msacsr & MSACSR_NX_MASK) == 0) {
6286 /*
6287 * Exception(s) will trap, update MSACSR Cause
6288 * with all enabled exceptions
6289 */
6290 SET_FP_CAUSE(env->active_tc.msacsr,
6291 (GET_FP_CAUSE(env->active_tc.msacsr) | mips_exception_flags));
6292 }
6293 }
6294
6295 return mips_exception_flags;
6296 }
6297
6298 static inline int get_enabled_exceptions(const CPUMIPSState *env, int c)
6299 {
6300 int enable = GET_FP_ENABLE(env->active_tc.msacsr) | FP_UNIMPLEMENTED;
6301 return c & enable;
6302 }
6303
6304 static inline float16 float16_from_float32(int32_t a, bool ieee,
6305 float_status *status)
6306 {
6307 float16 f_val;
6308
6309 f_val = float32_to_float16((float32)a, ieee, status);
6310
6311 return a < 0 ? (f_val | (1 << 15)) : f_val;
6312 }
6313
6314 static inline float32 float32_from_float64(int64_t a, float_status *status)
6315 {
6316 float32 f_val;
6317
6318 f_val = float64_to_float32((float64)a, status);
6319
6320 return a < 0 ? (f_val | (1 << 31)) : f_val;
6321 }
6322
6323 static inline float32 float32_from_float16(int16_t a, bool ieee,
6324 float_status *status)
6325 {
6326 float32 f_val;
6327
6328 f_val = float16_to_float32((float16)a, ieee, status);
6329
6330 return a < 0 ? (f_val | (1 << 31)) : f_val;
6331 }
6332
6333 static inline float64 float64_from_float32(int32_t a, float_status *status)
6334 {
6335 float64 f_val;
6336
6337 f_val = float32_to_float64((float64)a, status);
6338
6339 return a < 0 ? (f_val | (1ULL << 63)) : f_val;
6340 }
6341
6342 static inline float32 float32_from_q16(int16_t a, float_status *status)
6343 {
6344 float32 f_val;
6345
6346 /* conversion as integer and scaling */
6347 f_val = int32_to_float32(a, status);
6348 f_val = float32_scalbn(f_val, -15, status);
6349
6350 return f_val;
6351 }
6352
6353 static inline float64 float64_from_q32(int32_t a, float_status *status)
6354 {
6355 float64 f_val;
6356
6357 /* conversion as integer and scaling */
6358 f_val = int32_to_float64(a, status);
6359 f_val = float64_scalbn(f_val, -31, status);
6360
6361 return f_val;
6362 }
6363
6364 static inline int16_t float32_to_q16(float32 a, float_status *status)
6365 {
6366 int32_t q_val;
6367 int32_t q_min = 0xffff8000;
6368 int32_t q_max = 0x00007fff;
6369
6370 int ieee_ex;
6371
6372 if (float32_is_any_nan(a)) {
6373 float_raise(float_flag_invalid, status);
6374 return 0;
6375 }
6376
6377 /* scaling */
6378 a = float32_scalbn(a, 15, status);
6379
6380 ieee_ex = get_float_exception_flags(status);
6381 set_float_exception_flags(ieee_ex & (~float_flag_underflow)
6382 , status);
6383
6384 if (ieee_ex & float_flag_overflow) {
6385 float_raise(float_flag_inexact, status);
6386 return (int32_t)a < 0 ? q_min : q_max;
6387 }
6388
6389 /* conversion to int */
6390 q_val = float32_to_int32(a, status);
6391
6392 ieee_ex = get_float_exception_flags(status);
6393 set_float_exception_flags(ieee_ex & (~float_flag_underflow)
6394 , status);
6395
6396 if (ieee_ex & float_flag_invalid) {
6397 set_float_exception_flags(ieee_ex & (~float_flag_invalid)
6398 , status);
6399 float_raise(float_flag_overflow | float_flag_inexact, status);
6400 return (int32_t)a < 0 ? q_min : q_max;
6401 }
6402
6403 if (q_val < q_min) {
6404 float_raise(float_flag_overflow | float_flag_inexact, status);
6405 return (int16_t)q_min;
6406 }
6407
6408 if (q_max < q_val) {
6409 float_raise(float_flag_overflow | float_flag_inexact, status);
6410 return (int16_t)q_max;
6411 }
6412
6413 return (int16_t)q_val;
6414 }
6415
6416 static inline int32_t float64_to_q32(float64 a, float_status *status)
6417 {
6418 int64_t q_val;
6419 int64_t q_min = 0xffffffff80000000LL;
6420 int64_t q_max = 0x000000007fffffffLL;
6421
6422 int ieee_ex;
6423
6424 if (float64_is_any_nan(a)) {
6425 float_raise(float_flag_invalid, status);
6426 return 0;
6427 }
6428
6429 /* scaling */
6430 a = float64_scalbn(a, 31, status);
6431
6432 ieee_ex = get_float_exception_flags(status);
6433 set_float_exception_flags(ieee_ex & (~float_flag_underflow)
6434 , status);
6435
6436 if (ieee_ex & float_flag_overflow) {
6437 float_raise(float_flag_inexact, status);
6438 return (int64_t)a < 0 ? q_min : q_max;
6439 }
6440
6441 /* conversion to integer */
6442 q_val = float64_to_int64(a, status);
6443
6444 ieee_ex = get_float_exception_flags(status);
6445 set_float_exception_flags(ieee_ex & (~float_flag_underflow)
6446 , status);
6447
6448 if (ieee_ex & float_flag_invalid) {
6449 set_float_exception_flags(ieee_ex & (~float_flag_invalid)
6450 , status);
6451 float_raise(float_flag_overflow | float_flag_inexact, status);
6452 return (int64_t)a < 0 ? q_min : q_max;
6453 }
6454
6455 if (q_val < q_min) {
6456 float_raise(float_flag_overflow | float_flag_inexact, status);
6457 return (int32_t)q_min;
6458 }
6459
6460 if (q_max < q_val) {
6461 float_raise(float_flag_overflow | float_flag_inexact, status);
6462 return (int32_t)q_max;
6463 }
6464
6465 return (int32_t)q_val;
6466 }
6467
6468 #define MSA_FLOAT_COND(DEST, OP, ARG1, ARG2, BITS, QUIET) \
6469 do { \
6470 float_status *status = &env->active_tc.msa_fp_status; \
6471 int c; \
6472 int64_t cond; \
6473 set_float_exception_flags(0, status); \
6474 if (!QUIET) { \
6475 cond = float ## BITS ## _ ## OP(ARG1, ARG2, status); \
6476 } else { \
6477 cond = float ## BITS ## _ ## OP ## _quiet(ARG1, ARG2, status); \
6478 } \
6479 DEST = cond ? M_MAX_UINT(BITS) : 0; \
6480 c = update_msacsr(env, CLEAR_IS_INEXACT, 0); \
6481 \
6482 if (get_enabled_exceptions(env, c)) { \
6483 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
6484 } \
6485 } while (0)
6486
6487 #define MSA_FLOAT_AF(DEST, ARG1, ARG2, BITS, QUIET) \
6488 do { \
6489 MSA_FLOAT_COND(DEST, eq, ARG1, ARG2, BITS, QUIET); \
6490 if ((DEST & M_MAX_UINT(BITS)) == M_MAX_UINT(BITS)) { \
6491 DEST = 0; \
6492 } \
6493 } while (0)
6494
6495 #define MSA_FLOAT_UEQ(DEST, ARG1, ARG2, BITS, QUIET) \
6496 do { \
6497 MSA_FLOAT_COND(DEST, unordered, ARG1, ARG2, BITS, QUIET); \
6498 if (DEST == 0) { \
6499 MSA_FLOAT_COND(DEST, eq, ARG1, ARG2, BITS, QUIET); \
6500 } \
6501 } while (0)
6502
6503 #define MSA_FLOAT_NE(DEST, ARG1, ARG2, BITS, QUIET) \
6504 do { \
6505 MSA_FLOAT_COND(DEST, lt, ARG1, ARG2, BITS, QUIET); \
6506 if (DEST == 0) { \
6507 MSA_FLOAT_COND(DEST, lt, ARG2, ARG1, BITS, QUIET); \
6508 } \
6509 } while (0)
6510
6511 #define MSA_FLOAT_UNE(DEST, ARG1, ARG2, BITS, QUIET) \
6512 do { \
6513 MSA_FLOAT_COND(DEST, unordered, ARG1, ARG2, BITS, QUIET); \
6514 if (DEST == 0) { \
6515 MSA_FLOAT_COND(DEST, lt, ARG1, ARG2, BITS, QUIET); \
6516 if (DEST == 0) { \
6517 MSA_FLOAT_COND(DEST, lt, ARG2, ARG1, BITS, QUIET); \
6518 } \
6519 } \
6520 } while (0)
6521
6522 #define MSA_FLOAT_ULE(DEST, ARG1, ARG2, BITS, QUIET) \
6523 do { \
6524 MSA_FLOAT_COND(DEST, unordered, ARG1, ARG2, BITS, QUIET); \
6525 if (DEST == 0) { \
6526 MSA_FLOAT_COND(DEST, le, ARG1, ARG2, BITS, QUIET); \
6527 } \
6528 } while (0)
6529
6530 #define MSA_FLOAT_ULT(DEST, ARG1, ARG2, BITS, QUIET) \
6531 do { \
6532 MSA_FLOAT_COND(DEST, unordered, ARG1, ARG2, BITS, QUIET); \
6533 if (DEST == 0) { \
6534 MSA_FLOAT_COND(DEST, lt, ARG1, ARG2, BITS, QUIET); \
6535 } \
6536 } while (0)
6537
6538 #define MSA_FLOAT_OR(DEST, ARG1, ARG2, BITS, QUIET) \
6539 do { \
6540 MSA_FLOAT_COND(DEST, le, ARG1, ARG2, BITS, QUIET); \
6541 if (DEST == 0) { \
6542 MSA_FLOAT_COND(DEST, le, ARG2, ARG1, BITS, QUIET); \
6543 } \
6544 } while (0)
6545
6546 static inline void compare_af(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6547 wr_t *pwt, uint32_t df, int quiet,
6548 uintptr_t retaddr)
6549 {
6550 wr_t wx, *pwx = &wx;
6551 uint32_t i;
6552
6553 clear_msacsr_cause(env);
6554
6555 switch (df) {
6556 case DF_WORD:
6557 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6558 MSA_FLOAT_AF(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
6559 }
6560 break;
6561 case DF_DOUBLE:
6562 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6563 MSA_FLOAT_AF(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
6564 }
6565 break;
6566 default:
6567 assert(0);
6568 }
6569
6570 check_msacsr_cause(env, retaddr);
6571
6572 msa_move_v(pwd, pwx);
6573 }
6574
6575 static inline void compare_un(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6576 wr_t *pwt, uint32_t df, int quiet,
6577 uintptr_t retaddr)
6578 {
6579 wr_t wx, *pwx = &wx;
6580 uint32_t i;
6581
6582 clear_msacsr_cause(env);
6583
6584 switch (df) {
6585 case DF_WORD:
6586 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6587 MSA_FLOAT_COND(pwx->w[i], unordered, pws->w[i], pwt->w[i], 32,
6588 quiet);
6589 }
6590 break;
6591 case DF_DOUBLE:
6592 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6593 MSA_FLOAT_COND(pwx->d[i], unordered, pws->d[i], pwt->d[i], 64,
6594 quiet);
6595 }
6596 break;
6597 default:
6598 assert(0);
6599 }
6600
6601 check_msacsr_cause(env, retaddr);
6602
6603 msa_move_v(pwd, pwx);
6604 }
6605
6606 static inline void compare_eq(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6607 wr_t *pwt, uint32_t df, int quiet,
6608 uintptr_t retaddr)
6609 {
6610 wr_t wx, *pwx = &wx;
6611 uint32_t i;
6612
6613 clear_msacsr_cause(env);
6614
6615 switch (df) {
6616 case DF_WORD:
6617 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6618 MSA_FLOAT_COND(pwx->w[i], eq, pws->w[i], pwt->w[i], 32, quiet);
6619 }
6620 break;
6621 case DF_DOUBLE:
6622 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6623 MSA_FLOAT_COND(pwx->d[i], eq, pws->d[i], pwt->d[i], 64, quiet);
6624 }
6625 break;
6626 default:
6627 assert(0);
6628 }
6629
6630 check_msacsr_cause(env, retaddr);
6631
6632 msa_move_v(pwd, pwx);
6633 }
6634
6635 static inline void compare_ueq(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6636 wr_t *pwt, uint32_t df, int quiet,
6637 uintptr_t retaddr)
6638 {
6639 wr_t wx, *pwx = &wx;
6640 uint32_t i;
6641
6642 clear_msacsr_cause(env);
6643
6644 switch (df) {
6645 case DF_WORD:
6646 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6647 MSA_FLOAT_UEQ(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
6648 }
6649 break;
6650 case DF_DOUBLE:
6651 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6652 MSA_FLOAT_UEQ(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
6653 }
6654 break;
6655 default:
6656 assert(0);
6657 }
6658
6659 check_msacsr_cause(env, retaddr);
6660
6661 msa_move_v(pwd, pwx);
6662 }
6663
6664 static inline void compare_lt(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6665 wr_t *pwt, uint32_t df, int quiet,
6666 uintptr_t retaddr)
6667 {
6668 wr_t wx, *pwx = &wx;
6669 uint32_t i;
6670
6671 clear_msacsr_cause(env);
6672
6673 switch (df) {
6674 case DF_WORD:
6675 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6676 MSA_FLOAT_COND(pwx->w[i], lt, pws->w[i], pwt->w[i], 32, quiet);
6677 }
6678 break;
6679 case DF_DOUBLE:
6680 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6681 MSA_FLOAT_COND(pwx->d[i], lt, pws->d[i], pwt->d[i], 64, quiet);
6682 }
6683 break;
6684 default:
6685 assert(0);
6686 }
6687
6688 check_msacsr_cause(env, retaddr);
6689
6690 msa_move_v(pwd, pwx);
6691 }
6692
6693 static inline void compare_ult(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6694 wr_t *pwt, uint32_t df, int quiet,
6695 uintptr_t retaddr)
6696 {
6697 wr_t wx, *pwx = &wx;
6698 uint32_t i;
6699
6700 clear_msacsr_cause(env);
6701
6702 switch (df) {
6703 case DF_WORD:
6704 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6705 MSA_FLOAT_ULT(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
6706 }
6707 break;
6708 case DF_DOUBLE:
6709 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6710 MSA_FLOAT_ULT(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
6711 }
6712 break;
6713 default:
6714 assert(0);
6715 }
6716
6717 check_msacsr_cause(env, retaddr);
6718
6719 msa_move_v(pwd, pwx);
6720 }
6721
6722 static inline void compare_le(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6723 wr_t *pwt, uint32_t df, int quiet,
6724 uintptr_t retaddr)
6725 {
6726 wr_t wx, *pwx = &wx;
6727 uint32_t i;
6728
6729 clear_msacsr_cause(env);
6730
6731 switch (df) {
6732 case DF_WORD:
6733 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6734 MSA_FLOAT_COND(pwx->w[i], le, pws->w[i], pwt->w[i], 32, quiet);
6735 }
6736 break;
6737 case DF_DOUBLE:
6738 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6739 MSA_FLOAT_COND(pwx->d[i], le, pws->d[i], pwt->d[i], 64, quiet);
6740 }
6741 break;
6742 default:
6743 assert(0);
6744 }
6745
6746 check_msacsr_cause(env, retaddr);
6747
6748 msa_move_v(pwd, pwx);
6749 }
6750
6751 static inline void compare_ule(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6752 wr_t *pwt, uint32_t df, int quiet,
6753 uintptr_t retaddr)
6754 {
6755 wr_t wx, *pwx = &wx;
6756 uint32_t i;
6757
6758 clear_msacsr_cause(env);
6759
6760 switch (df) {
6761 case DF_WORD:
6762 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6763 MSA_FLOAT_ULE(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
6764 }
6765 break;
6766 case DF_DOUBLE:
6767 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6768 MSA_FLOAT_ULE(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
6769 }
6770 break;
6771 default:
6772 assert(0);
6773 }
6774
6775 check_msacsr_cause(env, retaddr);
6776
6777 msa_move_v(pwd, pwx);
6778 }
6779
6780 static inline void compare_or(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6781 wr_t *pwt, uint32_t df, int quiet,
6782 uintptr_t retaddr)
6783 {
6784 wr_t wx, *pwx = &wx;
6785 uint32_t i;
6786
6787 clear_msacsr_cause(env);
6788
6789 switch (df) {
6790 case DF_WORD:
6791 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6792 MSA_FLOAT_OR(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
6793 }
6794 break;
6795 case DF_DOUBLE:
6796 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6797 MSA_FLOAT_OR(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
6798 }
6799 break;
6800 default:
6801 assert(0);
6802 }
6803
6804 check_msacsr_cause(env, retaddr);
6805
6806 msa_move_v(pwd, pwx);
6807 }
6808
6809 static inline void compare_une(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6810 wr_t *pwt, uint32_t df, int quiet,
6811 uintptr_t retaddr)
6812 {
6813 wr_t wx, *pwx = &wx;
6814 uint32_t i;
6815
6816 clear_msacsr_cause(env);
6817
6818 switch (df) {
6819 case DF_WORD:
6820 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6821 MSA_FLOAT_UNE(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
6822 }
6823 break;
6824 case DF_DOUBLE:
6825 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6826 MSA_FLOAT_UNE(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
6827 }
6828 break;
6829 default:
6830 assert(0);
6831 }
6832
6833 check_msacsr_cause(env, retaddr);
6834
6835 msa_move_v(pwd, pwx);
6836 }
6837
6838 static inline void compare_ne(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6839 wr_t *pwt, uint32_t df, int quiet,
6840 uintptr_t retaddr)
6841 {
6842 wr_t wx, *pwx = &wx;
6843 uint32_t i;
6844
6845 clear_msacsr_cause(env);
6846
6847 switch (df) {
6848 case DF_WORD:
6849 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6850 MSA_FLOAT_NE(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
6851 }
6852 break;
6853 case DF_DOUBLE:
6854 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6855 MSA_FLOAT_NE(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
6856 }
6857 break;
6858 default:
6859 assert(0);
6860 }
6861
6862 check_msacsr_cause(env, retaddr);
6863
6864 msa_move_v(pwd, pwx);
6865 }
6866
6867 void helper_msa_fcaf_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6868 uint32_t ws, uint32_t wt)
6869 {
6870 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6871 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6872 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6873 compare_af(env, pwd, pws, pwt, df, 1, GETPC());
6874 }
6875
6876 void helper_msa_fcun_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6877 uint32_t ws, uint32_t wt)
6878 {
6879 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6880 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6881 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6882 compare_un(env, pwd, pws, pwt, df, 1, GETPC());
6883 }
6884
6885 void helper_msa_fceq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6886 uint32_t ws, uint32_t wt)
6887 {
6888 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6889 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6890 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6891 compare_eq(env, pwd, pws, pwt, df, 1, GETPC());
6892 }
6893
6894 void helper_msa_fcueq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6895 uint32_t ws, uint32_t wt)
6896 {
6897 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6898 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6899 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6900 compare_ueq(env, pwd, pws, pwt, df, 1, GETPC());
6901 }
6902
6903 void helper_msa_fclt_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6904 uint32_t ws, uint32_t wt)
6905 {
6906 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6907 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6908 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6909 compare_lt(env, pwd, pws, pwt, df, 1, GETPC());
6910 }
6911
6912 void helper_msa_fcult_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6913 uint32_t ws, uint32_t wt)
6914 {
6915 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6916 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6917 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6918 compare_ult(env, pwd, pws, pwt, df, 1, GETPC());
6919 }
6920
6921 void helper_msa_fcle_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6922 uint32_t ws, uint32_t wt)
6923 {
6924 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6925 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6926 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6927 compare_le(env, pwd, pws, pwt, df, 1, GETPC());
6928 }
6929
6930 void helper_msa_fcule_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6931 uint32_t ws, uint32_t wt)
6932 {
6933 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6934 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6935 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6936 compare_ule(env, pwd, pws, pwt, df, 1, GETPC());
6937 }
6938
6939 void helper_msa_fsaf_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6940 uint32_t ws, uint32_t wt)
6941 {
6942 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6943 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6944 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6945 compare_af(env, pwd, pws, pwt, df, 0, GETPC());
6946 }
6947
6948 void helper_msa_fsun_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6949 uint32_t ws, uint32_t wt)
6950 {
6951 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6952 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6953 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6954 compare_un(env, pwd, pws, pwt, df, 0, GETPC());
6955 }
6956
6957 void helper_msa_fseq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6958 uint32_t ws, uint32_t wt)
6959 {
6960 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6961 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6962 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6963 compare_eq(env, pwd, pws, pwt, df, 0, GETPC());
6964 }
6965
6966 void helper_msa_fsueq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6967 uint32_t ws, uint32_t wt)
6968 {
6969 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6970 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6971 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6972 compare_ueq(env, pwd, pws, pwt, df, 0, GETPC());
6973 }
6974
6975 void helper_msa_fslt_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6976 uint32_t ws, uint32_t wt)
6977 {
6978 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6979 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6980 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6981 compare_lt(env, pwd, pws, pwt, df, 0, GETPC());
6982 }
6983
6984 void helper_msa_fsult_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6985 uint32_t ws, uint32_t wt)
6986 {
6987 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6988 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6989 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6990 compare_ult(env, pwd, pws, pwt, df, 0, GETPC());
6991 }
6992
6993 void helper_msa_fsle_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6994 uint32_t ws, uint32_t wt)
6995 {
6996 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6997 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6998 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6999 compare_le(env, pwd, pws, pwt, df, 0, GETPC());
7000 }
7001
7002 void helper_msa_fsule_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7003 uint32_t ws, uint32_t wt)
7004 {
7005 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7006 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7007 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7008 compare_ule(env, pwd, pws, pwt, df, 0, GETPC());
7009 }
7010
7011 void helper_msa_fcor_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7012 uint32_t ws, uint32_t wt)
7013 {
7014 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7015 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7016 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7017 compare_or(env, pwd, pws, pwt, df, 1, GETPC());
7018 }
7019
7020 void helper_msa_fcune_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7021 uint32_t ws, uint32_t wt)
7022 {
7023 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7024 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7025 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7026 compare_une(env, pwd, pws, pwt, df, 1, GETPC());
7027 }
7028
7029 void helper_msa_fcne_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7030 uint32_t ws, uint32_t wt)
7031 {
7032 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7033 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7034 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7035 compare_ne(env, pwd, pws, pwt, df, 1, GETPC());
7036 }
7037
7038 void helper_msa_fsor_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7039 uint32_t ws, uint32_t wt)
7040 {
7041 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7042 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7043 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7044 compare_or(env, pwd, pws, pwt, df, 0, GETPC());
7045 }
7046
7047 void helper_msa_fsune_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7048 uint32_t ws, uint32_t wt)
7049 {
7050 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7051 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7052 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7053 compare_une(env, pwd, pws, pwt, df, 0, GETPC());
7054 }
7055
7056 void helper_msa_fsne_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7057 uint32_t ws, uint32_t wt)
7058 {
7059 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7060 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7061 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7062 compare_ne(env, pwd, pws, pwt, df, 0, GETPC());
7063 }
7064
7065 #define float16_is_zero(ARG) 0
7066 #define float16_is_zero_or_denormal(ARG) 0
7067
7068 #define IS_DENORMAL(ARG, BITS) \
7069 (!float ## BITS ## _is_zero(ARG) \
7070 && float ## BITS ## _is_zero_or_denormal(ARG))
7071
7072 #define MSA_FLOAT_BINOP(DEST, OP, ARG1, ARG2, BITS) \
7073 do { \
7074 float_status *status = &env->active_tc.msa_fp_status; \
7075 int c; \
7076 \
7077 set_float_exception_flags(0, status); \
7078 DEST = float ## BITS ## _ ## OP(ARG1, ARG2, status); \
7079 c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \
7080 \
7081 if (get_enabled_exceptions(env, c)) { \
7082 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
7083 } \
7084 } while (0)
7085
7086 void helper_msa_fadd_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7087 uint32_t ws, uint32_t wt)
7088 {
7089 wr_t wx, *pwx = &wx;
7090 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7091 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7092 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7093 uint32_t i;
7094
7095 clear_msacsr_cause(env);
7096
7097 switch (df) {
7098 case DF_WORD:
7099 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7100 MSA_FLOAT_BINOP(pwx->w[i], add, pws->w[i], pwt->w[i], 32);
7101 }
7102 break;
7103 case DF_DOUBLE:
7104 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7105 MSA_FLOAT_BINOP(pwx->d[i], add, pws->d[i], pwt->d[i], 64);
7106 }
7107 break;
7108 default:
7109 assert(0);
7110 }
7111
7112 check_msacsr_cause(env, GETPC());
7113 msa_move_v(pwd, pwx);
7114 }
7115
7116 void helper_msa_fsub_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7117 uint32_t ws, uint32_t wt)
7118 {
7119 wr_t wx, *pwx = &wx;
7120 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7121 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7122 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7123 uint32_t i;
7124
7125 clear_msacsr_cause(env);
7126
7127 switch (df) {
7128 case DF_WORD:
7129 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7130 MSA_FLOAT_BINOP(pwx->w[i], sub, pws->w[i], pwt->w[i], 32);
7131 }
7132 break;
7133 case DF_DOUBLE:
7134 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7135 MSA_FLOAT_BINOP(pwx->d[i], sub, pws->d[i], pwt->d[i], 64);
7136 }
7137 break;
7138 default:
7139 assert(0);
7140 }
7141
7142 check_msacsr_cause(env, GETPC());
7143 msa_move_v(pwd, pwx);
7144 }
7145
7146 void helper_msa_fmul_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7147 uint32_t ws, uint32_t wt)
7148 {
7149 wr_t wx, *pwx = &wx;
7150 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7151 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7152 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7153 uint32_t i;
7154
7155 clear_msacsr_cause(env);
7156
7157 switch (df) {
7158 case DF_WORD:
7159 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7160 MSA_FLOAT_BINOP(pwx->w[i], mul, pws->w[i], pwt->w[i], 32);
7161 }
7162 break;
7163 case DF_DOUBLE:
7164 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7165 MSA_FLOAT_BINOP(pwx->d[i], mul, pws->d[i], pwt->d[i], 64);
7166 }
7167 break;
7168 default:
7169 assert(0);
7170 }
7171
7172 check_msacsr_cause(env, GETPC());
7173
7174 msa_move_v(pwd, pwx);
7175 }
7176
7177 void helper_msa_fdiv_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7178 uint32_t ws, uint32_t wt)
7179 {
7180 wr_t wx, *pwx = &wx;
7181 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7182 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7183 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7184 uint32_t i;
7185
7186 clear_msacsr_cause(env);
7187
7188 switch (df) {
7189 case DF_WORD:
7190 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7191 MSA_FLOAT_BINOP(pwx->w[i], div, pws->w[i], pwt->w[i], 32);
7192 }
7193 break;
7194 case DF_DOUBLE:
7195 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7196 MSA_FLOAT_BINOP(pwx->d[i], div, pws->d[i], pwt->d[i], 64);
7197 }
7198 break;
7199 default:
7200 assert(0);
7201 }
7202
7203 check_msacsr_cause(env, GETPC());
7204
7205 msa_move_v(pwd, pwx);
7206 }
7207
7208 #define MSA_FLOAT_MULADD(DEST, ARG1, ARG2, ARG3, NEGATE, BITS) \
7209 do { \
7210 float_status *status = &env->active_tc.msa_fp_status; \
7211 int c; \
7212 \
7213 set_float_exception_flags(0, status); \
7214 DEST = float ## BITS ## _muladd(ARG2, ARG3, ARG1, NEGATE, status); \
7215 c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \
7216 \
7217 if (get_enabled_exceptions(env, c)) { \
7218 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
7219 } \
7220 } while (0)
7221
7222 void helper_msa_fmadd_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7223 uint32_t ws, uint32_t wt)
7224 {
7225 wr_t wx, *pwx = &wx;
7226 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7227 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7228 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7229 uint32_t i;
7230
7231 clear_msacsr_cause(env);
7232
7233 switch (df) {
7234 case DF_WORD:
7235 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7236 MSA_FLOAT_MULADD(pwx->w[i], pwd->w[i],
7237 pws->w[i], pwt->w[i], 0, 32);
7238 }
7239 break;
7240 case DF_DOUBLE:
7241 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7242 MSA_FLOAT_MULADD(pwx->d[i], pwd->d[i],
7243 pws->d[i], pwt->d[i], 0, 64);
7244 }
7245 break;
7246 default:
7247 assert(0);
7248 }
7249
7250 check_msacsr_cause(env, GETPC());
7251
7252 msa_move_v(pwd, pwx);
7253 }
7254
7255 void helper_msa_fmsub_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7256 uint32_t ws, uint32_t wt)
7257 {
7258 wr_t wx, *pwx = &wx;
7259 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7260 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7261 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7262 uint32_t i;
7263
7264 clear_msacsr_cause(env);
7265
7266 switch (df) {
7267 case DF_WORD:
7268 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7269 MSA_FLOAT_MULADD(pwx->w[i], pwd->w[i],
7270 pws->w[i], pwt->w[i],
7271 float_muladd_negate_product, 32);
7272 }
7273 break;
7274 case DF_DOUBLE:
7275 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7276 MSA_FLOAT_MULADD(pwx->d[i], pwd->d[i],
7277 pws->d[i], pwt->d[i],
7278 float_muladd_negate_product, 64);
7279 }
7280 break;
7281 default:
7282 assert(0);
7283 }
7284
7285 check_msacsr_cause(env, GETPC());
7286
7287 msa_move_v(pwd, pwx);
7288 }
7289
7290 void helper_msa_fexp2_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7291 uint32_t ws, uint32_t wt)
7292 {
7293 wr_t wx, *pwx = &wx;
7294 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7295 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7296 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7297 uint32_t i;
7298
7299 clear_msacsr_cause(env);
7300
7301 switch (df) {
7302 case DF_WORD:
7303 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7304 MSA_FLOAT_BINOP(pwx->w[i], scalbn, pws->w[i],
7305 pwt->w[i] > 0x200 ? 0x200 :
7306 pwt->w[i] < -0x200 ? -0x200 : pwt->w[i],
7307 32);
7308 }
7309 break;
7310 case DF_DOUBLE:
7311 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7312 MSA_FLOAT_BINOP(pwx->d[i], scalbn, pws->d[i],
7313 pwt->d[i] > 0x1000 ? 0x1000 :
7314 pwt->d[i] < -0x1000 ? -0x1000 : pwt->d[i],
7315 64);
7316 }
7317 break;
7318 default:
7319 assert(0);
7320 }
7321
7322 check_msacsr_cause(env, GETPC());
7323
7324 msa_move_v(pwd, pwx);
7325 }
7326
7327 #define MSA_FLOAT_UNOP(DEST, OP, ARG, BITS) \
7328 do { \
7329 float_status *status = &env->active_tc.msa_fp_status; \
7330 int c; \
7331 \
7332 set_float_exception_flags(0, status); \
7333 DEST = float ## BITS ## _ ## OP(ARG, status); \
7334 c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \
7335 \
7336 if (get_enabled_exceptions(env, c)) { \
7337 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
7338 } \
7339 } while (0)
7340
7341 void helper_msa_fexdo_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7342 uint32_t ws, uint32_t wt)
7343 {
7344 wr_t wx, *pwx = &wx;
7345 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7346 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7347 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7348 uint32_t i;
7349
7350 clear_msacsr_cause(env);
7351
7352 switch (df) {
7353 case DF_WORD:
7354 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7355 /*
7356 * Half precision floats come in two formats: standard
7357 * IEEE and "ARM" format. The latter gains extra exponent
7358 * range by omitting the NaN/Inf encodings.
7359 */
7360 bool ieee = true;
7361
7362 MSA_FLOAT_BINOP(Lh(pwx, i), from_float32, pws->w[i], ieee, 16);
7363 MSA_FLOAT_BINOP(Rh(pwx, i), from_float32, pwt->w[i], ieee, 16);
7364 }
7365 break;
7366 case DF_DOUBLE:
7367 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7368 MSA_FLOAT_UNOP(Lw(pwx, i), from_float64, pws->d[i], 32);
7369 MSA_FLOAT_UNOP(Rw(pwx, i), from_float64, pwt->d[i], 32);
7370 }
7371 break;
7372 default:
7373 assert(0);
7374 }
7375
7376 check_msacsr_cause(env, GETPC());
7377 msa_move_v(pwd, pwx);
7378 }
7379
7380 #define MSA_FLOAT_UNOP_XD(DEST, OP, ARG, BITS, XBITS) \
7381 do { \
7382 float_status *status = &env->active_tc.msa_fp_status; \
7383 int c; \
7384 \
7385 set_float_exception_flags(0, status); \
7386 DEST = float ## BITS ## _ ## OP(ARG, status); \
7387 c = update_msacsr(env, CLEAR_FS_UNDERFLOW, 0); \
7388 \
7389 if (get_enabled_exceptions(env, c)) { \
7390 DEST = ((FLOAT_SNAN ## XBITS(status) >> 6) << 6) | c; \
7391 } \
7392 } while (0)
7393
7394 void helper_msa_ftq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7395 uint32_t ws, uint32_t wt)
7396 {
7397 wr_t wx, *pwx = &wx;
7398 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7399 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7400 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7401 uint32_t i;
7402
7403 clear_msacsr_cause(env);
7404
7405 switch (df) {
7406 case DF_WORD:
7407 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7408 MSA_FLOAT_UNOP_XD(Lh(pwx, i), to_q16, pws->w[i], 32, 16);
7409 MSA_FLOAT_UNOP_XD(Rh(pwx, i), to_q16, pwt->w[i], 32, 16);
7410 }
7411 break;
7412 case DF_DOUBLE:
7413 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7414 MSA_FLOAT_UNOP_XD(Lw(pwx, i), to_q32, pws->d[i], 64, 32);
7415 MSA_FLOAT_UNOP_XD(Rw(pwx, i), to_q32, pwt->d[i], 64, 32);
7416 }
7417 break;
7418 default:
7419 assert(0);
7420 }
7421
7422 check_msacsr_cause(env, GETPC());
7423
7424 msa_move_v(pwd, pwx);
7425 }
7426
7427 #define NUMBER_QNAN_PAIR(ARG1, ARG2, BITS, STATUS) \
7428 !float ## BITS ## _is_any_nan(ARG1) \
7429 && float ## BITS ## _is_quiet_nan(ARG2, STATUS)
7430
7431 #define MSA_FLOAT_MAXOP(DEST, OP, ARG1, ARG2, BITS) \
7432 do { \
7433 float_status *status = &env->active_tc.msa_fp_status; \
7434 int c; \
7435 \
7436 set_float_exception_flags(0, status); \
7437 DEST = float ## BITS ## _ ## OP(ARG1, ARG2, status); \
7438 c = update_msacsr(env, 0, 0); \
7439 \
7440 if (get_enabled_exceptions(env, c)) { \
7441 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
7442 } \
7443 } while (0)
7444
7445 #define FMAXMIN_A(F, G, X, _S, _T, BITS, STATUS) \
7446 do { \
7447 uint## BITS ##_t S = _S, T = _T; \
7448 uint## BITS ##_t as, at, xs, xt, xd; \
7449 if (NUMBER_QNAN_PAIR(S, T, BITS, STATUS)) { \
7450 T = S; \
7451 } \
7452 else if (NUMBER_QNAN_PAIR(T, S, BITS, STATUS)) { \
7453 S = T; \
7454 } \
7455 as = float## BITS ##_abs(S); \
7456 at = float## BITS ##_abs(T); \
7457 MSA_FLOAT_MAXOP(xs, F, S, T, BITS); \
7458 MSA_FLOAT_MAXOP(xt, G, S, T, BITS); \
7459 MSA_FLOAT_MAXOP(xd, F, as, at, BITS); \
7460 X = (as == at || xd == float## BITS ##_abs(xs)) ? xs : xt; \
7461 } while (0)
7462
7463 void helper_msa_fmin_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7464 uint32_t ws, uint32_t wt)
7465 {
7466 float_status *status = &env->active_tc.msa_fp_status;
7467 wr_t wx, *pwx = &wx;
7468 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7469 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7470 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7471
7472 clear_msacsr_cause(env);
7473
7474 if (df == DF_WORD) {
7475
7476 if (NUMBER_QNAN_PAIR(pws->w[0], pwt->w[0], 32, status)) {
7477 MSA_FLOAT_MAXOP(pwx->w[0], min, pws->w[0], pws->w[0], 32);
7478 } else if (NUMBER_QNAN_PAIR(pwt->w[0], pws->w[0], 32, status)) {
7479 MSA_FLOAT_MAXOP(pwx->w[0], min, pwt->w[0], pwt->w[0], 32);
7480 } else {
7481 MSA_FLOAT_MAXOP(pwx->w[0], min, pws->w[0], pwt->w[0], 32);
7482 }
7483
7484 if (NUMBER_QNAN_PAIR(pws->w[1], pwt->w[1], 32, status)) {
7485 MSA_FLOAT_MAXOP(pwx->w[1], min, pws->w[1], pws->w[1], 32);
7486 } else if (NUMBER_QNAN_PAIR(pwt->w[1], pws->w[1], 32, status)) {
7487 MSA_FLOAT_MAXOP(pwx->w[1], min, pwt->w[1], pwt->w[1], 32);
7488 } else {
7489 MSA_FLOAT_MAXOP(pwx->w[1], min, pws->w[1], pwt->w[1], 32);
7490 }
7491
7492 if (NUMBER_QNAN_PAIR(pws->w[2], pwt->w[2], 32, status)) {
7493 MSA_FLOAT_MAXOP(pwx->w[2], min, pws->w[2], pws->w[2], 32);
7494 } else if (NUMBER_QNAN_PAIR(pwt->w[2], pws->w[2], 32, status)) {
7495 MSA_FLOAT_MAXOP(pwx->w[2], min, pwt->w[2], pwt->w[2], 32);
7496 } else {
7497 MSA_FLOAT_MAXOP(pwx->w[2], min, pws->w[2], pwt->w[2], 32);
7498 }
7499
7500 if (NUMBER_QNAN_PAIR(pws->w[3], pwt->w[3], 32, status)) {
7501 MSA_FLOAT_MAXOP(pwx->w[3], min, pws->w[3], pws->w[3], 32);
7502 } else if (NUMBER_QNAN_PAIR(pwt->w[3], pws->w[3], 32, status)) {
7503 MSA_FLOAT_MAXOP(pwx->w[3], min, pwt->w[3], pwt->w[3], 32);
7504 } else {
7505 MSA_FLOAT_MAXOP(pwx->w[3], min, pws->w[3], pwt->w[3], 32);
7506 }
7507
7508 } else if (df == DF_DOUBLE) {
7509
7510 if (NUMBER_QNAN_PAIR(pws->d[0], pwt->d[0], 64, status)) {
7511 MSA_FLOAT_MAXOP(pwx->d[0], min, pws->d[0], pws->d[0], 64);
7512 } else if (NUMBER_QNAN_PAIR(pwt->d[0], pws->d[0], 64, status)) {
7513 MSA_FLOAT_MAXOP(pwx->d[0], min, pwt->d[0], pwt->d[0], 64);
7514 } else {
7515 MSA_FLOAT_MAXOP(pwx->d[0], min, pws->d[0], pwt->d[0], 64);
7516 }
7517
7518 if (NUMBER_QNAN_PAIR(pws->d[1], pwt->d[1], 64, status)) {
7519 MSA_FLOAT_MAXOP(pwx->d[1], min, pws->d[1], pws->d[1], 64);
7520 } else if (NUMBER_QNAN_PAIR(pwt->d[1], pws->d[1], 64, status)) {
7521 MSA_FLOAT_MAXOP(pwx->d[1], min, pwt->d[1], pwt->d[1], 64);
7522 } else {
7523 MSA_FLOAT_MAXOP(pwx->d[1], min, pws->d[1], pwt->d[1], 64);
7524 }
7525
7526 } else {
7527
7528 assert(0);
7529
7530 }
7531
7532 check_msacsr_cause(env, GETPC());
7533
7534 msa_move_v(pwd, pwx);
7535 }
7536
7537 void helper_msa_fmin_a_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7538 uint32_t ws, uint32_t wt)
7539 {
7540 float_status *status = &env->active_tc.msa_fp_status;
7541 wr_t wx, *pwx = &wx;
7542 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7543 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7544 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7545
7546 clear_msacsr_cause(env);
7547
7548 if (df == DF_WORD) {
7549 FMAXMIN_A(min, max, pwx->w[0], pws->w[0], pwt->w[0], 32, status);
7550 FMAXMIN_A(min, max, pwx->w[1], pws->w[1], pwt->w[1], 32, status);
7551 FMAXMIN_A(min, max, pwx->w[2], pws->w[2], pwt->w[2], 32, status);
7552 FMAXMIN_A(min, max, pwx->w[3], pws->w[3], pwt->w[3], 32, status);
7553 } else if (df == DF_DOUBLE) {
7554 FMAXMIN_A(min, max, pwx->d[0], pws->d[0], pwt->d[0], 64, status);
7555 FMAXMIN_A(min, max, pwx->d[1], pws->d[1], pwt->d[1], 64, status);
7556 } else {
7557 assert(0);
7558 }
7559
7560 check_msacsr_cause(env, GETPC());
7561
7562 msa_move_v(pwd, pwx);
7563 }
7564
7565 void helper_msa_fmax_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7566 uint32_t ws, uint32_t wt)
7567 {
7568 float_status *status = &env->active_tc.msa_fp_status;
7569 wr_t wx, *pwx = &wx;
7570 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7571 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7572 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7573
7574 clear_msacsr_cause(env);
7575
7576 if (df == DF_WORD) {
7577
7578 if (NUMBER_QNAN_PAIR(pws->w[0], pwt->w[0], 32, status)) {
7579 MSA_FLOAT_MAXOP(pwx->w[0], max, pws->w[0], pws->w[0], 32);
7580 } else if (NUMBER_QNAN_PAIR(pwt->w[0], pws->w[0], 32, status)) {
7581 MSA_FLOAT_MAXOP(pwx->w[0], max, pwt->w[0], pwt->w[0], 32);
7582 } else {
7583 MSA_FLOAT_MAXOP(pwx->w[0], max, pws->w[0], pwt->w[0], 32);
7584 }
7585
7586 if (NUMBER_QNAN_PAIR(pws->w[1], pwt->w[1], 32, status)) {
7587 MSA_FLOAT_MAXOP(pwx->w[1], max, pws->w[1], pws->w[1], 32);
7588 } else if (NUMBER_QNAN_PAIR(pwt->w[1], pws->w[1], 32, status)) {
7589 MSA_FLOAT_MAXOP(pwx->w[1], max, pwt->w[1], pwt->w[1], 32);
7590 } else {
7591 MSA_FLOAT_MAXOP(pwx->w[1], max, pws->w[1], pwt->w[1], 32);
7592 }
7593
7594 if (NUMBER_QNAN_PAIR(pws->w[2], pwt->w[2], 32, status)) {
7595 MSA_FLOAT_MAXOP(pwx->w[2], max, pws->w[2], pws->w[2], 32);
7596 } else if (NUMBER_QNAN_PAIR(pwt->w[2], pws->w[2], 32, status)) {
7597 MSA_FLOAT_MAXOP(pwx->w[2], max, pwt->w[2], pwt->w[2], 32);
7598 } else {
7599 MSA_FLOAT_MAXOP(pwx->w[2], max, pws->w[2], pwt->w[2], 32);
7600 }
7601
7602 if (NUMBER_QNAN_PAIR(pws->w[3], pwt->w[3], 32, status)) {
7603 MSA_FLOAT_MAXOP(pwx->w[3], max, pws->w[3], pws->w[3], 32);
7604 } else if (NUMBER_QNAN_PAIR(pwt->w[3], pws->w[3], 32, status)) {
7605 MSA_FLOAT_MAXOP(pwx->w[3], max, pwt->w[3], pwt->w[3], 32);
7606 } else {
7607 MSA_FLOAT_MAXOP(pwx->w[3], max, pws->w[3], pwt->w[3], 32);
7608 }
7609
7610 } else if (df == DF_DOUBLE) {
7611
7612 if (NUMBER_QNAN_PAIR(pws->d[0], pwt->d[0], 64, status)) {
7613 MSA_FLOAT_MAXOP(pwx->d[0], max, pws->d[0], pws->d[0], 64);
7614 } else if (NUMBER_QNAN_PAIR(pwt->d[0], pws->d[0], 64, status)) {
7615 MSA_FLOAT_MAXOP(pwx->d[0], max, pwt->d[0], pwt->d[0], 64);
7616 } else {
7617 MSA_FLOAT_MAXOP(pwx->d[0], max, pws->d[0], pwt->d[0], 64);
7618 }
7619
7620 if (NUMBER_QNAN_PAIR(pws->d[1], pwt->d[1], 64, status)) {
7621 MSA_FLOAT_MAXOP(pwx->d[1], max, pws->d[1], pws->d[1], 64);
7622 } else if (NUMBER_QNAN_PAIR(pwt->d[1], pws->d[1], 64, status)) {
7623 MSA_FLOAT_MAXOP(pwx->d[1], max, pwt->d[1], pwt->d[1], 64);
7624 } else {
7625 MSA_FLOAT_MAXOP(pwx->d[1], max, pws->d[1], pwt->d[1], 64);
7626 }
7627
7628 } else {
7629
7630 assert(0);
7631
7632 }
7633
7634 check_msacsr_cause(env, GETPC());
7635
7636 msa_move_v(pwd, pwx);
7637 }
7638
7639 void helper_msa_fmax_a_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7640 uint32_t ws, uint32_t wt)
7641 {
7642 float_status *status = &env->active_tc.msa_fp_status;
7643 wr_t wx, *pwx = &wx;
7644 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7645 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7646 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7647
7648 clear_msacsr_cause(env);
7649
7650 if (df == DF_WORD) {
7651 FMAXMIN_A(max, min, pwx->w[0], pws->w[0], pwt->w[0], 32, status);
7652 FMAXMIN_A(max, min, pwx->w[1], pws->w[1], pwt->w[1], 32, status);
7653 FMAXMIN_A(max, min, pwx->w[2], pws->w[2], pwt->w[2], 32, status);
7654 FMAXMIN_A(max, min, pwx->w[3], pws->w[3], pwt->w[3], 32, status);
7655 } else if (df == DF_DOUBLE) {
7656 FMAXMIN_A(max, min, pwx->d[0], pws->d[0], pwt->d[0], 64, status);
7657 FMAXMIN_A(max, min, pwx->d[1], pws->d[1], pwt->d[1], 64, status);
7658 } else {
7659 assert(0);
7660 }
7661
7662 check_msacsr_cause(env, GETPC());
7663
7664 msa_move_v(pwd, pwx);
7665 }
7666
7667 void helper_msa_fclass_df(CPUMIPSState *env, uint32_t df,
7668 uint32_t wd, uint32_t ws)
7669 {
7670 float_status *status = &env->active_tc.msa_fp_status;
7671
7672 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7673 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7674 if (df == DF_WORD) {
7675 pwd->w[0] = float_class_s(pws->w[0], status);
7676 pwd->w[1] = float_class_s(pws->w[1], status);
7677 pwd->w[2] = float_class_s(pws->w[2], status);
7678 pwd->w[3] = float_class_s(pws->w[3], status);
7679 } else if (df == DF_DOUBLE) {
7680 pwd->d[0] = float_class_d(pws->d[0], status);
7681 pwd->d[1] = float_class_d(pws->d[1], status);
7682 } else {
7683 assert(0);
7684 }
7685 }
7686
7687 #define MSA_FLOAT_UNOP0(DEST, OP, ARG, BITS) \
7688 do { \
7689 float_status *status = &env->active_tc.msa_fp_status; \
7690 int c; \
7691 \
7692 set_float_exception_flags(0, status); \
7693 DEST = float ## BITS ## _ ## OP(ARG, status); \
7694 c = update_msacsr(env, CLEAR_FS_UNDERFLOW, 0); \
7695 \
7696 if (get_enabled_exceptions(env, c)) { \
7697 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
7698 } else if (float ## BITS ## _is_any_nan(ARG)) { \
7699 DEST = 0; \
7700 } \
7701 } while (0)
7702
7703 void helper_msa_ftrunc_s_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7704 uint32_t ws)
7705 {
7706 wr_t wx, *pwx = &wx;
7707 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7708 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7709 uint32_t i;
7710
7711 clear_msacsr_cause(env);
7712
7713 switch (df) {
7714 case DF_WORD:
7715 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7716 MSA_FLOAT_UNOP0(pwx->w[i], to_int32_round_to_zero, pws->w[i], 32);
7717 }
7718 break;
7719 case DF_DOUBLE:
7720 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7721 MSA_FLOAT_UNOP0(pwx->d[i], to_int64_round_to_zero, pws->d[i], 64);
7722 }
7723 break;
7724 default:
7725 assert(0);
7726 }
7727
7728 check_msacsr_cause(env, GETPC());
7729
7730 msa_move_v(pwd, pwx);
7731 }
7732
7733 void helper_msa_ftrunc_u_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7734 uint32_t ws)
7735 {
7736 wr_t wx, *pwx = &wx;
7737 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7738 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7739 uint32_t i;
7740
7741 clear_msacsr_cause(env);
7742
7743 switch (df) {
7744 case DF_WORD:
7745 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7746 MSA_FLOAT_UNOP0(pwx->w[i], to_uint32_round_to_zero, pws->w[i], 32);
7747 }
7748 break;
7749 case DF_DOUBLE:
7750 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7751 MSA_FLOAT_UNOP0(pwx->d[i], to_uint64_round_to_zero, pws->d[i], 64);
7752 }
7753 break;
7754 default:
7755 assert(0);
7756 }
7757
7758 check_msacsr_cause(env, GETPC());
7759
7760 msa_move_v(pwd, pwx);
7761 }
7762
7763 void helper_msa_fsqrt_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7764 uint32_t ws)
7765 {
7766 wr_t wx, *pwx = &wx;
7767 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7768 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7769 uint32_t i;
7770
7771 clear_msacsr_cause(env);
7772
7773 switch (df) {
7774 case DF_WORD:
7775 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7776 MSA_FLOAT_UNOP(pwx->w[i], sqrt, pws->w[i], 32);
7777 }
7778 break;
7779 case DF_DOUBLE:
7780 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7781 MSA_FLOAT_UNOP(pwx->d[i], sqrt, pws->d[i], 64);
7782 }
7783 break;
7784 default:
7785 assert(0);
7786 }
7787
7788 check_msacsr_cause(env, GETPC());
7789
7790 msa_move_v(pwd, pwx);
7791 }
7792
7793 #define MSA_FLOAT_RECIPROCAL(DEST, ARG, BITS) \
7794 do { \
7795 float_status *status = &env->active_tc.msa_fp_status; \
7796 int c; \
7797 \
7798 set_float_exception_flags(0, status); \
7799 DEST = float ## BITS ## _ ## div(FLOAT_ONE ## BITS, ARG, status); \
7800 c = update_msacsr(env, float ## BITS ## _is_infinity(ARG) || \
7801 float ## BITS ## _is_quiet_nan(DEST, status) ? \
7802 0 : RECIPROCAL_INEXACT, \
7803 IS_DENORMAL(DEST, BITS)); \
7804 \
7805 if (get_enabled_exceptions(env, c)) { \
7806 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
7807 } \
7808 } while (0)
7809
7810 void helper_msa_frsqrt_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7811 uint32_t ws)
7812 {
7813 wr_t wx, *pwx = &wx;
7814 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7815 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7816 uint32_t i;
7817
7818 clear_msacsr_cause(env);
7819
7820 switch (df) {
7821 case DF_WORD:
7822 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7823 MSA_FLOAT_RECIPROCAL(pwx->w[i], float32_sqrt(pws->w[i],
7824 &env->active_tc.msa_fp_status), 32);
7825 }
7826 break;
7827 case DF_DOUBLE:
7828 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7829 MSA_FLOAT_RECIPROCAL(pwx->d[i], float64_sqrt(pws->d[i],
7830 &env->active_tc.msa_fp_status), 64);
7831 }
7832 break;
7833 default:
7834 assert(0);
7835 }
7836
7837 check_msacsr_cause(env, GETPC());
7838
7839 msa_move_v(pwd, pwx);
7840 }
7841
7842 void helper_msa_frcp_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7843 uint32_t ws)
7844 {
7845 wr_t wx, *pwx = &wx;
7846 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7847 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7848 uint32_t i;
7849
7850 clear_msacsr_cause(env);
7851
7852 switch (df) {
7853 case DF_WORD:
7854 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7855 MSA_FLOAT_RECIPROCAL(pwx->w[i], pws->w[i], 32);
7856 }
7857 break;
7858 case DF_DOUBLE:
7859 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7860 MSA_FLOAT_RECIPROCAL(pwx->d[i], pws->d[i], 64);
7861 }
7862 break;
7863 default:
7864 assert(0);
7865 }
7866
7867 check_msacsr_cause(env, GETPC());
7868
7869 msa_move_v(pwd, pwx);
7870 }
7871
7872 void helper_msa_frint_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7873 uint32_t ws)
7874 {
7875 wr_t wx, *pwx = &wx;
7876 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7877 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7878 uint32_t i;
7879
7880 clear_msacsr_cause(env);
7881
7882 switch (df) {
7883 case DF_WORD:
7884 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7885 MSA_FLOAT_UNOP(pwx->w[i], round_to_int, pws->w[i], 32);
7886 }
7887 break;
7888 case DF_DOUBLE:
7889 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7890 MSA_FLOAT_UNOP(pwx->d[i], round_to_int, pws->d[i], 64);
7891 }
7892 break;
7893 default:
7894 assert(0);
7895 }
7896
7897 check_msacsr_cause(env, GETPC());
7898
7899 msa_move_v(pwd, pwx);
7900 }
7901
7902 #define MSA_FLOAT_LOGB(DEST, ARG, BITS) \
7903 do { \
7904 float_status *status = &env->active_tc.msa_fp_status; \
7905 int c; \
7906 \
7907 set_float_exception_flags(0, status); \
7908 set_float_rounding_mode(float_round_down, status); \
7909 DEST = float ## BITS ## _ ## log2(ARG, status); \
7910 DEST = float ## BITS ## _ ## round_to_int(DEST, status); \
7911 set_float_rounding_mode(ieee_rm[(env->active_tc.msacsr & \
7912 MSACSR_RM_MASK) >> MSACSR_RM], \
7913 status); \
7914 \
7915 set_float_exception_flags(get_float_exception_flags(status) & \
7916 (~float_flag_inexact), \
7917 status); \
7918 \
7919 c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \
7920 \
7921 if (get_enabled_exceptions(env, c)) { \
7922 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
7923 } \
7924 } while (0)
7925
7926 void helper_msa_flog2_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7927 uint32_t ws)
7928 {
7929 wr_t wx, *pwx = &wx;
7930 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7931 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7932 uint32_t i;
7933
7934 clear_msacsr_cause(env);
7935
7936 switch (df) {
7937 case DF_WORD:
7938 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7939 MSA_FLOAT_LOGB(pwx->w[i], pws->w[i], 32);
7940 }
7941 break;
7942 case DF_DOUBLE:
7943 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7944 MSA_FLOAT_LOGB(pwx->d[i], pws->d[i], 64);
7945 }
7946 break;
7947 default:
7948 assert(0);
7949 }
7950
7951 check_msacsr_cause(env, GETPC());
7952
7953 msa_move_v(pwd, pwx);
7954 }
7955
7956 void helper_msa_fexupl_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7957 uint32_t ws)
7958 {
7959 wr_t wx, *pwx = &wx;
7960 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7961 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7962 uint32_t i;
7963
7964 clear_msacsr_cause(env);
7965
7966 switch (df) {
7967 case DF_WORD:
7968 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7969 /*
7970 * Half precision floats come in two formats: standard
7971 * IEEE and "ARM" format. The latter gains extra exponent
7972 * range by omitting the NaN/Inf encodings.
7973 */
7974 bool ieee = true;
7975
7976 MSA_FLOAT_BINOP(pwx->w[i], from_float16, Lh(pws, i), ieee, 32);
7977 }
7978 break;
7979 case DF_DOUBLE:
7980 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7981 MSA_FLOAT_UNOP(pwx->d[i], from_float32, Lw(pws, i), 64);
7982 }
7983 break;
7984 default:
7985 assert(0);
7986 }
7987
7988 check_msacsr_cause(env, GETPC());
7989 msa_move_v(pwd, pwx);
7990 }
7991
7992 void helper_msa_fexupr_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7993 uint32_t ws)
7994 {
7995 wr_t wx, *pwx = &wx;
7996 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7997 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7998 uint32_t i;
7999
8000 clear_msacsr_cause(env);
8001
8002 switch (df) {
8003 case DF_WORD:
8004 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
8005 /*
8006 * Half precision floats come in two formats: standard
8007 * IEEE and "ARM" format. The latter gains extra exponent
8008 * range by omitting the NaN/Inf encodings.
8009 */
8010 bool ieee = true;
8011
8012 MSA_FLOAT_BINOP(pwx->w[i], from_float16, Rh(pws, i), ieee, 32);
8013 }
8014 break;
8015 case DF_DOUBLE:
8016 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
8017 MSA_FLOAT_UNOP(pwx->d[i], from_float32, Rw(pws, i), 64);
8018 }
8019 break;
8020 default:
8021 assert(0);
8022 }
8023
8024 check_msacsr_cause(env, GETPC());
8025 msa_move_v(pwd, pwx);
8026 }
8027
8028 void helper_msa_ffql_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
8029 uint32_t ws)
8030 {
8031 wr_t wx, *pwx = &wx;
8032 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
8033 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
8034 uint32_t i;
8035
8036 switch (df) {
8037 case DF_WORD:
8038 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
8039 MSA_FLOAT_UNOP(pwx->w[i], from_q16, Lh(pws, i), 32);
8040 }
8041 break;
8042 case DF_DOUBLE:
8043 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
8044 MSA_FLOAT_UNOP(pwx->d[i], from_q32, Lw(pws, i), 64);
8045 }
8046 break;
8047 default:
8048 assert(0);
8049 }
8050
8051 msa_move_v(pwd, pwx);
8052 }
8053
8054 void helper_msa_ffqr_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
8055 uint32_t ws)
8056 {
8057 wr_t wx, *pwx = &wx;
8058 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
8059 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
8060 uint32_t i;
8061
8062 switch (df) {
8063 case DF_WORD:
8064 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
8065 MSA_FLOAT_UNOP(pwx->w[i], from_q16, Rh(pws, i), 32);
8066 }
8067 break;
8068 case DF_DOUBLE:
8069 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
8070 MSA_FLOAT_UNOP(pwx->d[i], from_q32, Rw(pws, i), 64);
8071 }
8072 break;
8073 default:
8074 assert(0);
8075 }
8076
8077 msa_move_v(pwd, pwx);
8078 }
8079
8080 void helper_msa_ftint_s_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
8081 uint32_t ws)
8082 {
8083 wr_t wx, *pwx = &wx;
8084 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
8085 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
8086 uint32_t i;
8087
8088 clear_msacsr_cause(env);
8089
8090 switch (df) {
8091 case DF_WORD:
8092 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
8093 MSA_FLOAT_UNOP0(pwx->w[i], to_int32, pws->w[i], 32);
8094 }
8095 break;
8096 case DF_DOUBLE:
8097 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
8098 MSA_FLOAT_UNOP0(pwx->d[i], to_int64, pws->d[i], 64);
8099 }
8100 break;
8101 default:
8102 assert(0);
8103 }
8104
8105 check_msacsr_cause(env, GETPC());
8106
8107 msa_move_v(pwd, pwx);
8108 }
8109
8110 void helper_msa_ftint_u_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
8111 uint32_t ws)
8112 {
8113 wr_t wx, *pwx = &wx;
8114 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
8115 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
8116 uint32_t i;
8117
8118 clear_msacsr_cause(env);
8119
8120 switch (df) {
8121 case DF_WORD:
8122 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
8123 MSA_FLOAT_UNOP0(pwx->w[i], to_uint32, pws->w[i], 32);
8124 }
8125 break;
8126 case DF_DOUBLE:
8127 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
8128 MSA_FLOAT_UNOP0(pwx->d[i], to_uint64, pws->d[i], 64);
8129 }
8130 break;
8131 default:
8132 assert(0);
8133 }
8134
8135 check_msacsr_cause(env, GETPC());
8136
8137 msa_move_v(pwd, pwx);
8138 }
8139
8140 #define float32_from_int32 int32_to_float32
8141 #define float32_from_uint32 uint32_to_float32
8142
8143 #define float64_from_int64 int64_to_float64
8144 #define float64_from_uint64 uint64_to_float64
8145
8146 void helper_msa_ffint_s_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
8147 uint32_t ws)
8148 {
8149 wr_t wx, *pwx = &wx;
8150 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
8151 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
8152 uint32_t i;
8153
8154 clear_msacsr_cause(env);
8155
8156 switch (df) {
8157 case DF_WORD:
8158 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
8159 MSA_FLOAT_UNOP(pwx->w[i], from_int32, pws->w[i], 32);
8160 }
8161 break;
8162 case DF_DOUBLE:
8163 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
8164 MSA_FLOAT_UNOP(pwx->d[i], from_int64, pws->d[i], 64);
8165 }
8166 break;
8167 default:
8168 assert(0);
8169 }
8170
8171 check_msacsr_cause(env, GETPC());
8172
8173 msa_move_v(pwd, pwx);
8174 }
8175
8176 void helper_msa_ffint_u_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
8177 uint32_t ws)
8178 {
8179 wr_t wx, *pwx = &wx;
8180 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
8181 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
8182 uint32_t i;
8183
8184 clear_msacsr_cause(env);
8185
8186 switch (df) {
8187 case DF_WORD:
8188 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
8189 MSA_FLOAT_UNOP(pwx->w[i], from_uint32, pws->w[i], 32);
8190 }
8191 break;
8192 case DF_DOUBLE:
8193 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
8194 MSA_FLOAT_UNOP(pwx->d[i], from_uint64, pws->d[i], 64);
8195 }
8196 break;
8197 default:
8198 assert(0);
8199 }
8200
8201 check_msacsr_cause(env, GETPC());
8202
8203 msa_move_v(pwd, pwx);
8204 }
8205
8206 /* Data format min and max values */
8207 #define DF_BITS(df) (1 << ((df) + 3))
8208
8209 /* Element-by-element access macros */
8210 #define DF_ELEMENTS(df) (MSA_WRLEN / DF_BITS(df))
8211
8212 #if !defined(CONFIG_USER_ONLY)
8213 #define MEMOP_IDX(DF) \
8214 TCGMemOpIdx oi = make_memop_idx(MO_TE | DF | MO_UNALN, \
8215 cpu_mmu_index(env, false));
8216 #else
8217 #define MEMOP_IDX(DF)
8218 #endif
8219
8220 void helper_msa_ld_b(CPUMIPSState *env, uint32_t wd,
8221 target_ulong addr)
8222 {
8223 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
8224 MEMOP_IDX(DF_BYTE)
8225 #if !defined(CONFIG_USER_ONLY)
8226 #if !defined(HOST_WORDS_BIGENDIAN)
8227 pwd->b[0] = helper_ret_ldub_mmu(env, addr + (0 << DF_BYTE), oi, GETPC());
8228 pwd->b[1] = helper_ret_ldub_mmu(env, addr + (1 << DF_BYTE), oi, GETPC());
8229 pwd->b[2] = helper_ret_ldub_mmu(env, addr + (2 << DF_BYTE), oi, GETPC());
8230 pwd->b[3] = helper_ret_ldub_mmu(env, addr + (3 << DF_BYTE), oi, GETPC());
8231 pwd->b[4] = helper_ret_ldub_mmu(env, addr + (4 << DF_BYTE), oi, GETPC());
8232 pwd->b[5] = helper_ret_ldub_mmu(env, addr + (5 << DF_BYTE), oi, GETPC());
8233 pwd->b[6] = helper_ret_ldub_mmu(env, addr + (6 << DF_BYTE), oi, GETPC());
8234 pwd->b[7] = helper_ret_ldub_mmu(env, addr + (7 << DF_BYTE), oi, GETPC());
8235 pwd->b[8] = helper_ret_ldub_mmu(env, addr + (8 << DF_BYTE), oi, GETPC());
8236 pwd->b[9] = helper_ret_ldub_mmu(env, addr + (9 << DF_BYTE), oi, GETPC());
8237 pwd->b[10] = helper_ret_ldub_mmu(env, addr + (10 << DF_BYTE), oi, GETPC());
8238 pwd->b[11] = helper_ret_ldub_mmu(env, addr + (11 << DF_BYTE), oi, GETPC());
8239 pwd->b[12] = helper_ret_ldub_mmu(env, addr + (12 << DF_BYTE), oi, GETPC());
8240 pwd->b[13] = helper_ret_ldub_mmu(env, addr + (13 << DF_BYTE), oi, GETPC());
8241 pwd->b[14] = helper_ret_ldub_mmu(env, addr + (14 << DF_BYTE), oi, GETPC());
8242 pwd->b[15] = helper_ret_ldub_mmu(env, addr + (15 << DF_BYTE), oi, GETPC());
8243 #else
8244 pwd->b[0] = helper_ret_ldub_mmu(env, addr + (7 << DF_BYTE), oi, GETPC());
8245 pwd->b[1] = helper_ret_ldub_mmu(env, addr + (6 << DF_BYTE), oi, GETPC());
8246 pwd->b[2] = helper_ret_ldub_mmu(env, addr + (5 << DF_BYTE), oi, GETPC());
8247 pwd->b[3] = helper_ret_ldub_mmu(env, addr + (4 << DF_BYTE), oi, GETPC());
8248 pwd->b[4] = helper_ret_ldub_mmu(env, addr + (3 << DF_BYTE), oi, GETPC());
8249 pwd->b[5] = helper_ret_ldub_mmu(env, addr + (2 << DF_BYTE), oi, GETPC());
8250 pwd->b[6] = helper_ret_ldub_mmu(env, addr + (1 << DF_BYTE), oi, GETPC());
8251 pwd->b[7] = helper_ret_ldub_mmu(env, addr + (0 << DF_BYTE), oi, GETPC());
8252 pwd->b[8] = helper_ret_ldub_mmu(env, addr + (15 << DF_BYTE), oi, GETPC());
8253 pwd->b[9] = helper_ret_ldub_mmu(env, addr + (14 << DF_BYTE), oi, GETPC());
8254 pwd->b[10] = helper_ret_ldub_mmu(env, addr + (13 << DF_BYTE), oi, GETPC());
8255 pwd->b[11] = helper_ret_ldub_mmu(env, addr + (12 << DF_BYTE), oi, GETPC());
8256 pwd->b[12] = helper_ret_ldub_mmu(env, addr + (11 << DF_BYTE), oi, GETPC());
8257 pwd->b[13] = helper_ret_ldub_mmu(env, addr + (10 << DF_BYTE), oi, GETPC());
8258 pwd->b[14] = helper_ret_ldub_mmu(env, addr + (9 << DF_BYTE), oi, GETPC());
8259 pwd->b[15] = helper_ret_ldub_mmu(env, addr + (8 << DF_BYTE), oi, GETPC());
8260 #endif
8261 #else
8262 #if !defined(HOST_WORDS_BIGENDIAN)
8263 pwd->b[0] = cpu_ldub_data(env, addr + (0 << DF_BYTE));
8264 pwd->b[1] = cpu_ldub_data(env, addr + (1 << DF_BYTE));
8265 pwd->b[2] = cpu_ldub_data(env, addr + (2 << DF_BYTE));
8266 pwd->b[3] = cpu_ldub_data(env, addr + (3 << DF_BYTE));
8267 pwd->b[4] = cpu_ldub_data(env, addr + (4 << DF_BYTE));
8268 pwd->b[5] = cpu_ldub_data(env, addr + (5 << DF_BYTE));
8269 pwd->b[6] = cpu_ldub_data(env, addr + (6 << DF_BYTE));
8270 pwd->b[7] = cpu_ldub_data(env, addr + (7 << DF_BYTE));
8271 pwd->b[8] = cpu_ldub_data(env, addr + (8 << DF_BYTE));
8272 pwd->b[9] = cpu_ldub_data(env, addr + (9 << DF_BYTE));
8273 pwd->b[10] = cpu_ldub_data(env, addr + (10 << DF_BYTE));
8274 pwd->b[11] = cpu_ldub_data(env, addr + (11 << DF_BYTE));
8275 pwd->b[12] = cpu_ldub_data(env, addr + (12 << DF_BYTE));
8276 pwd->b[13] = cpu_ldub_data(env, addr + (13 << DF_BYTE));
8277 pwd->b[14] = cpu_ldub_data(env, addr + (14 << DF_BYTE));
8278 pwd->b[15] = cpu_ldub_data(env, addr + (15 << DF_BYTE));
8279 #else
8280 pwd->b[0] = cpu_ldub_data(env, addr + (7 << DF_BYTE));
8281 pwd->b[1] = cpu_ldub_data(env, addr + (6 << DF_BYTE));
8282 pwd->b[2] = cpu_ldub_data(env, addr + (5 << DF_BYTE));
8283 pwd->b[3] = cpu_ldub_data(env, addr + (4 << DF_BYTE));
8284 pwd->b[4] = cpu_ldub_data(env, addr + (3 << DF_BYTE));
8285 pwd->b[5] = cpu_ldub_data(env, addr + (2 << DF_BYTE));
8286 pwd->b[6] = cpu_ldub_data(env, addr + (1 << DF_BYTE));
8287 pwd->b[7] = cpu_ldub_data(env, addr + (0 << DF_BYTE));
8288 pwd->b[8] = cpu_ldub_data(env, addr + (15 << DF_BYTE));
8289 pwd->b[9] = cpu_ldub_data(env, addr + (14 << DF_BYTE));
8290 pwd->b[10] = cpu_ldub_data(env, addr + (13 << DF_BYTE));
8291 pwd->b[11] = cpu_ldub_data(env, addr + (12 << DF_BYTE));
8292 pwd->b[12] = cpu_ldub_data(env, addr + (11 << DF_BYTE));
8293 pwd->b[13] = cpu_ldub_data(env, addr + (10 << DF_BYTE));
8294 pwd->b[14] = cpu_ldub_data(env, addr + (9 << DF_BYTE));
8295 pwd->b[15] = cpu_ldub_data(env, addr + (8 << DF_BYTE));
8296 #endif
8297 #endif
8298 }
8299
8300 void helper_msa_ld_h(CPUMIPSState *env, uint32_t wd,
8301 target_ulong addr)
8302 {
8303 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
8304 MEMOP_IDX(DF_HALF)
8305 #if !defined(CONFIG_USER_ONLY)
8306 #if !defined(HOST_WORDS_BIGENDIAN)
8307 pwd->h[0] = helper_ret_lduw_mmu(env, addr + (0 << DF_HALF), oi, GETPC());
8308 pwd->h[1] = helper_ret_lduw_mmu(env, addr + (1 << DF_HALF), oi, GETPC());
8309 pwd->h[2] = helper_ret_lduw_mmu(env, addr + (2 << DF_HALF), oi, GETPC());
8310 pwd->h[3] = helper_ret_lduw_mmu(env, addr + (3 << DF_HALF), oi, GETPC());
8311 pwd->h[4] = helper_ret_lduw_mmu(env, addr + (4 << DF_HALF), oi, GETPC());
8312 pwd->h[5] = helper_ret_lduw_mmu(env, addr + (5 << DF_HALF), oi, GETPC());
8313 pwd->h[6] = helper_ret_lduw_mmu(env, addr + (6 << DF_HALF), oi, GETPC());
8314 pwd->h[7] = helper_ret_lduw_mmu(env, addr + (7 << DF_HALF), oi, GETPC());
8315 #else
8316 pwd->h[0] = helper_ret_lduw_mmu(env, addr + (3 << DF_HALF), oi, GETPC());
8317 pwd->h[1] = helper_ret_lduw_mmu(env, addr + (2 << DF_HALF), oi, GETPC());
8318 pwd->h[2] = helper_ret_lduw_mmu(env, addr + (1 << DF_HALF), oi, GETPC());
8319 pwd->h[3] = helper_ret_lduw_mmu(env, addr + (0 << DF_HALF), oi, GETPC());
8320 pwd->h[4] = helper_ret_lduw_mmu(env, addr + (7 << DF_HALF), oi, GETPC());
8321 pwd->h[5] = helper_ret_lduw_mmu(env, addr + (6 << DF_HALF), oi, GETPC());
8322 pwd->h[6] = helper_ret_lduw_mmu(env, addr + (5 << DF_HALF), oi, GETPC());
8323 pwd->h[7] = helper_ret_lduw_mmu(env, addr + (4 << DF_HALF), oi, GETPC());
8324 #endif
8325 #else
8326 #if !defined(HOST_WORDS_BIGENDIAN)
8327 pwd->h[0] = cpu_lduw_data(env, addr + (0 << DF_HALF));
8328 pwd->h[1] = cpu_lduw_data(env, addr + (1 << DF_HALF));
8329 pwd->h[2] = cpu_lduw_data(env, addr + (2 << DF_HALF));
8330 pwd->h[3] = cpu_lduw_data(env, addr + (3 << DF_HALF));
8331 pwd->h[4] = cpu_lduw_data(env, addr + (4 << DF_HALF));
8332 pwd->h[5] = cpu_lduw_data(env, addr + (5 << DF_HALF));
8333 pwd->h[6] = cpu_lduw_data(env, addr + (6 << DF_HALF));
8334 pwd->h[7] = cpu_lduw_data(env, addr + (7 << DF_HALF));
8335 #else
8336 pwd->h[0] = cpu_lduw_data(env, addr + (3 << DF_HALF));
8337 pwd->h[1] = cpu_lduw_data(env, addr + (2 << DF_HALF));
8338 pwd->h[2] = cpu_lduw_data(env, addr + (1 << DF_HALF));
8339 pwd->h[3] = cpu_lduw_data(env, addr + (0 << DF_HALF));
8340 pwd->h[4] = cpu_lduw_data(env, addr + (7 << DF_HALF));
8341 pwd->h[5] = cpu_lduw_data(env, addr + (6 << DF_HALF));
8342 pwd->h[6] = cpu_lduw_data(env, addr + (5 << DF_HALF));
8343 pwd->h[7] = cpu_lduw_data(env, addr + (4 << DF_HALF));
8344 #endif
8345 #endif
8346 }
8347
8348 void helper_msa_ld_w(CPUMIPSState *env, uint32_t wd,
8349 target_ulong addr)
8350 {
8351 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
8352 MEMOP_IDX(DF_WORD)
8353 #if !defined(CONFIG_USER_ONLY)
8354 #if !defined(HOST_WORDS_BIGENDIAN)
8355 pwd->w[0] = helper_ret_ldul_mmu(env, addr + (0 << DF_WORD), oi, GETPC());
8356 pwd->w[1] = helper_ret_ldul_mmu(env, addr + (1 << DF_WORD), oi, GETPC());
8357 pwd->w[2] = helper_ret_ldul_mmu(env, addr + (2 << DF_WORD), oi, GETPC());
8358 pwd->w[3] = helper_ret_ldul_mmu(env, addr + (3 << DF_WORD), oi, GETPC());
8359 #else
8360 pwd->w[0] = helper_ret_ldul_mmu(env, addr + (1 << DF_WORD), oi, GETPC());
8361 pwd->w[1] = helper_ret_ldul_mmu(env, addr + (0 << DF_WORD), oi, GETPC());
8362 pwd->w[2] = helper_ret_ldul_mmu(env, addr + (3 << DF_WORD), oi, GETPC());
8363 pwd->w[3] = helper_ret_ldul_mmu(env, addr + (2 << DF_WORD), oi, GETPC());
8364 #endif
8365 #else
8366 #if !defined(HOST_WORDS_BIGENDIAN)
8367 pwd->w[0] = cpu_ldl_data(env, addr + (0 << DF_WORD));
8368 pwd->w[1] = cpu_ldl_data(env, addr + (1 << DF_WORD));
8369 pwd->w[2] = cpu_ldl_data(env, addr + (2 << DF_WORD));
8370 pwd->w[3] = cpu_ldl_data(env, addr + (3 << DF_WORD));
8371 #else
8372 pwd->w[0] = cpu_ldl_data(env, addr + (1 << DF_WORD));
8373 pwd->w[1] = cpu_ldl_data(env, addr + (0 << DF_WORD));
8374 pwd->w[2] = cpu_ldl_data(env, addr + (3 << DF_WORD));
8375 pwd->w[3] = cpu_ldl_data(env, addr + (2 << DF_WORD));
8376 #endif
8377 #endif
8378 }
8379
8380 void helper_msa_ld_d(CPUMIPSState *env, uint32_t wd,
8381 target_ulong addr)
8382 {
8383 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
8384 MEMOP_IDX(DF_DOUBLE)
8385 #if !defined(CONFIG_USER_ONLY)
8386 pwd->d[0] = helper_ret_ldq_mmu(env, addr + (0 << DF_DOUBLE), oi, GETPC());
8387 pwd->d[1] = helper_ret_ldq_mmu(env, addr + (1 << DF_DOUBLE), oi, GETPC());
8388 #else
8389 pwd->d[0] = cpu_ldq_data(env, addr + (0 << DF_DOUBLE));
8390 pwd->d[1] = cpu_ldq_data(env, addr + (1 << DF_DOUBLE));
8391 #endif
8392 }
8393
8394 #define MSA_PAGESPAN(x) \
8395 ((((x) & ~TARGET_PAGE_MASK) + MSA_WRLEN / 8 - 1) >= TARGET_PAGE_SIZE)
8396
8397 static inline void ensure_writable_pages(CPUMIPSState *env,
8398 target_ulong addr,
8399 int mmu_idx,
8400 uintptr_t retaddr)
8401 {
8402 /* FIXME: Probe the actual accesses (pass and use a size) */
8403 if (unlikely(MSA_PAGESPAN(addr))) {
8404 /* first page */
8405 probe_write(env, addr, 0, mmu_idx, retaddr);
8406 /* second page */
8407 addr = (addr & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
8408 probe_write(env, addr, 0, mmu_idx, retaddr);
8409 }
8410 }
8411
8412 void helper_msa_st_b(CPUMIPSState *env, uint32_t wd,
8413 target_ulong addr)
8414 {
8415 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
8416 int mmu_idx = cpu_mmu_index(env, false);
8417
8418 MEMOP_IDX(DF_BYTE)
8419 ensure_writable_pages(env, addr, mmu_idx, GETPC());
8420 #if !defined(CONFIG_USER_ONLY)
8421 #if !defined(HOST_WORDS_BIGENDIAN)
8422 helper_ret_stb_mmu(env, addr + (0 << DF_BYTE), pwd->b[0], oi, GETPC());
8423 helper_ret_stb_mmu(env, addr + (1 << DF_BYTE), pwd->b[1], oi, GETPC());
8424 helper_ret_stb_mmu(env, addr + (2 << DF_BYTE), pwd->b[2], oi, GETPC());
8425 helper_ret_stb_mmu(env, addr + (3 << DF_BYTE), pwd->b[3], oi, GETPC());
8426 helper_ret_stb_mmu(env, addr + (4 << DF_BYTE), pwd->b[4], oi, GETPC());
8427 helper_ret_stb_mmu(env, addr + (5 << DF_BYTE), pwd->b[5], oi, GETPC());
8428 helper_ret_stb_mmu(env, addr + (6 << DF_BYTE), pwd->b[6], oi, GETPC());
8429 helper_ret_stb_mmu(env, addr + (7 << DF_BYTE), pwd->b[7], oi, GETPC());
8430 helper_ret_stb_mmu(env, addr + (8 << DF_BYTE), pwd->b[8], oi, GETPC());
8431 helper_ret_stb_mmu(env, addr + (9 << DF_BYTE), pwd->b[9], oi, GETPC());
8432 helper_ret_stb_mmu(env, addr + (10 << DF_BYTE), pwd->b[10], oi, GETPC());
8433 helper_ret_stb_mmu(env, addr + (11 << DF_BYTE), pwd->b[11], oi, GETPC());
8434 helper_ret_stb_mmu(env, addr + (12 << DF_BYTE), pwd->b[12], oi, GETPC());
8435 helper_ret_stb_mmu(env, addr + (13 << DF_BYTE), pwd->b[13], oi, GETPC());
8436 helper_ret_stb_mmu(env, addr + (14 << DF_BYTE), pwd->b[14], oi, GETPC());
8437 helper_ret_stb_mmu(env, addr + (15 << DF_BYTE), pwd->b[15], oi, GETPC());
8438 #else
8439 helper_ret_stb_mmu(env, addr + (7 << DF_BYTE), pwd->b[0], oi, GETPC());
8440 helper_ret_stb_mmu(env, addr + (6 << DF_BYTE), pwd->b[1], oi, GETPC());
8441 helper_ret_stb_mmu(env, addr + (5 << DF_BYTE), pwd->b[2], oi, GETPC());
8442 helper_ret_stb_mmu(env, addr + (4 << DF_BYTE), pwd->b[3], oi, GETPC());
8443 helper_ret_stb_mmu(env, addr + (3 << DF_BYTE), pwd->b[4], oi, GETPC());
8444 helper_ret_stb_mmu(env, addr + (2 << DF_BYTE), pwd->b[5], oi, GETPC());
8445 helper_ret_stb_mmu(env, addr + (1 << DF_BYTE), pwd->b[6], oi, GETPC());
8446 helper_ret_stb_mmu(env, addr + (0 << DF_BYTE), pwd->b[7], oi, GETPC());
8447 helper_ret_stb_mmu(env, addr + (15 << DF_BYTE), pwd->b[8], oi, GETPC());
8448 helper_ret_stb_mmu(env, addr + (14 << DF_BYTE), pwd->b[9], oi, GETPC());
8449 helper_ret_stb_mmu(env, addr + (13 << DF_BYTE), pwd->b[10], oi, GETPC());
8450 helper_ret_stb_mmu(env, addr + (12 << DF_BYTE), pwd->b[11], oi, GETPC());
8451 helper_ret_stb_mmu(env, addr + (11 << DF_BYTE), pwd->b[12], oi, GETPC());
8452 helper_ret_stb_mmu(env, addr + (10 << DF_BYTE), pwd->b[13], oi, GETPC());
8453 helper_ret_stb_mmu(env, addr + (9 << DF_BYTE), pwd->b[14], oi, GETPC());
8454 helper_ret_stb_mmu(env, addr + (8 << DF_BYTE), pwd->b[15], oi, GETPC());
8455 #endif
8456 #else
8457 #if !defined(HOST_WORDS_BIGENDIAN)
8458 cpu_stb_data(env, addr + (0 << DF_BYTE), pwd->b[0]);
8459 cpu_stb_data(env, addr + (1 << DF_BYTE), pwd->b[1]);
8460 cpu_stb_data(env, addr + (2 << DF_BYTE), pwd->b[2]);
8461 cpu_stb_data(env, addr + (3 << DF_BYTE), pwd->b[3]);
8462 cpu_stb_data(env, addr + (4 << DF_BYTE), pwd->b[4]);
8463 cpu_stb_data(env, addr + (5 << DF_BYTE), pwd->b[5]);
8464 cpu_stb_data(env, addr + (6 << DF_BYTE), pwd->b[6]);
8465 cpu_stb_data(env, addr + (7 << DF_BYTE), pwd->b[7]);
8466 cpu_stb_data(env, addr + (8 << DF_BYTE), pwd->b[8]);
8467 cpu_stb_data(env, addr + (9 << DF_BYTE), pwd->b[9]);
8468 cpu_stb_data(env, addr + (10 << DF_BYTE), pwd->b[10]);
8469 cpu_stb_data(env, addr + (11 << DF_BYTE), pwd->b[11]);
8470 cpu_stb_data(env, addr + (12 << DF_BYTE), pwd->b[12]);
8471 cpu_stb_data(env, addr + (13 << DF_BYTE), pwd->b[13]);
8472 cpu_stb_data(env, addr + (14 << DF_BYTE), pwd->b[14]);
8473 cpu_stb_data(env, addr + (15 << DF_BYTE), pwd->b[15]);
8474 #else
8475 cpu_stb_data(env, addr + (7 << DF_BYTE), pwd->b[0]);
8476 cpu_stb_data(env, addr + (6 << DF_BYTE), pwd->b[1]);
8477 cpu_stb_data(env, addr + (5 << DF_BYTE), pwd->b[2]);
8478 cpu_stb_data(env, addr + (4 << DF_BYTE), pwd->b[3]);
8479 cpu_stb_data(env, addr + (3 << DF_BYTE), pwd->b[4]);
8480 cpu_stb_data(env, addr + (2 << DF_BYTE), pwd->b[5]);
8481 cpu_stb_data(env, addr + (1 << DF_BYTE), pwd->b[6]);
8482 cpu_stb_data(env, addr + (0 << DF_BYTE), pwd->b[7]);
8483 cpu_stb_data(env, addr + (15 << DF_BYTE), pwd->b[8]);
8484 cpu_stb_data(env, addr + (14 << DF_BYTE), pwd->b[9]);
8485 cpu_stb_data(env, addr + (13 << DF_BYTE), pwd->b[10]);
8486 cpu_stb_data(env, addr + (12 << DF_BYTE), pwd->b[11]);
8487 cpu_stb_data(env, addr + (11 << DF_BYTE), pwd->b[12]);
8488 cpu_stb_data(env, addr + (10 << DF_BYTE), pwd->b[13]);
8489 cpu_stb_data(env, addr + (9 << DF_BYTE), pwd->b[14]);
8490 cpu_stb_data(env, addr + (8 << DF_BYTE), pwd->b[15]);
8491 #endif
8492 #endif
8493 }
8494
8495 void helper_msa_st_h(CPUMIPSState *env, uint32_t wd,
8496 target_ulong addr)
8497 {
8498 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
8499 int mmu_idx = cpu_mmu_index(env, false);
8500
8501 MEMOP_IDX(DF_HALF)
8502 ensure_writable_pages(env, addr, mmu_idx, GETPC());
8503 #if !defined(CONFIG_USER_ONLY)
8504 #if !defined(HOST_WORDS_BIGENDIAN)
8505 helper_ret_stw_mmu(env, addr + (0 << DF_HALF), pwd->h[0], oi, GETPC());
8506 helper_ret_stw_mmu(env, addr + (1 << DF_HALF), pwd->h[1], oi, GETPC());
8507 helper_ret_stw_mmu(env, addr + (2 << DF_HALF), pwd->h[2], oi, GETPC());
8508 helper_ret_stw_mmu(env, addr + (3 << DF_HALF), pwd->h[3], oi, GETPC());
8509 helper_ret_stw_mmu(env, addr + (4 << DF_HALF), pwd->h[4], oi, GETPC());
8510 helper_ret_stw_mmu(env, addr + (5 << DF_HALF), pwd->h[5], oi, GETPC());
8511 helper_ret_stw_mmu(env, addr + (6 << DF_HALF), pwd->h[6], oi, GETPC());
8512 helper_ret_stw_mmu(env, addr + (7 << DF_HALF), pwd->h[7], oi, GETPC());
8513 #else
8514 helper_ret_stw_mmu(env, addr + (3 << DF_HALF), pwd->h[0], oi, GETPC());
8515 helper_ret_stw_mmu(env, addr + (2 << DF_HALF), pwd->h[1], oi, GETPC());
8516 helper_ret_stw_mmu(env, addr + (1 << DF_HALF), pwd->h[2], oi, GETPC());
8517 helper_ret_stw_mmu(env, addr + (0 << DF_HALF), pwd->h[3], oi, GETPC());
8518 helper_ret_stw_mmu(env, addr + (7 << DF_HALF), pwd->h[4], oi, GETPC());
8519 helper_ret_stw_mmu(env, addr + (6 << DF_HALF), pwd->h[5], oi, GETPC());
8520 helper_ret_stw_mmu(env, addr + (5 << DF_HALF), pwd->h[6], oi, GETPC());
8521 helper_ret_stw_mmu(env, addr + (4 << DF_HALF), pwd->h[7], oi, GETPC());
8522 #endif
8523 #else
8524 #if !defined(HOST_WORDS_BIGENDIAN)
8525 cpu_stw_data(env, addr + (0 << DF_HALF), pwd->h[0]);
8526 cpu_stw_data(env, addr + (1 << DF_HALF), pwd->h[1]);
8527 cpu_stw_data(env, addr + (2 << DF_HALF), pwd->h[2]);
8528 cpu_stw_data(env, addr + (3 << DF_HALF), pwd->h[3]);
8529 cpu_stw_data(env, addr + (4 << DF_HALF), pwd->h[4]);
8530 cpu_stw_data(env, addr + (5 << DF_HALF), pwd->h[5]);
8531 cpu_stw_data(env, addr + (6 << DF_HALF), pwd->h[6]);
8532 cpu_stw_data(env, addr + (7 << DF_HALF), pwd->h[7]);
8533 #else
8534 cpu_stw_data(env, addr + (3 << DF_HALF), pwd->h[0]);
8535 cpu_stw_data(env, addr + (2 << DF_HALF), pwd->h[1]);
8536 cpu_stw_data(env, addr + (1 << DF_HALF), pwd->h[2]);
8537 cpu_stw_data(env, addr + (0 << DF_HALF), pwd->h[3]);
8538 cpu_stw_data(env, addr + (7 << DF_HALF), pwd->h[4]);
8539 cpu_stw_data(env, addr + (6 << DF_HALF), pwd->h[5]);
8540 cpu_stw_data(env, addr + (5 << DF_HALF), pwd->h[6]);
8541 cpu_stw_data(env, addr + (4 << DF_HALF), pwd->h[7]);
8542 #endif
8543 #endif
8544 }
8545
8546 void helper_msa_st_w(CPUMIPSState *env, uint32_t wd,
8547 target_ulong addr)
8548 {
8549 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
8550 int mmu_idx = cpu_mmu_index(env, false);
8551
8552 MEMOP_IDX(DF_WORD)
8553 ensure_writable_pages(env, addr, mmu_idx, GETPC());
8554 #if !defined(CONFIG_USER_ONLY)
8555 #if !defined(HOST_WORDS_BIGENDIAN)
8556 helper_ret_stl_mmu(env, addr + (0 << DF_WORD), pwd->w[0], oi, GETPC());
8557 helper_ret_stl_mmu(env, addr + (1 << DF_WORD), pwd->w[1], oi, GETPC());
8558 helper_ret_stl_mmu(env, addr + (2 << DF_WORD), pwd->w[2], oi, GETPC());
8559 helper_ret_stl_mmu(env, addr + (3 << DF_WORD), pwd->w[3], oi, GETPC());
8560 #else
8561 helper_ret_stl_mmu(env, addr + (1 << DF_WORD), pwd->w[0], oi, GETPC());
8562 helper_ret_stl_mmu(env, addr + (0 << DF_WORD), pwd->w[1], oi, GETPC());
8563 helper_ret_stl_mmu(env, addr + (3 << DF_WORD), pwd->w[2], oi, GETPC());
8564 helper_ret_stl_mmu(env, addr + (2 << DF_WORD), pwd->w[3], oi, GETPC());
8565 #endif
8566 #else
8567 #if !defined(HOST_WORDS_BIGENDIAN)
8568 cpu_stl_data(env, addr + (0 << DF_WORD), pwd->w[0]);
8569 cpu_stl_data(env, addr + (1 << DF_WORD), pwd->w[1]);
8570 cpu_stl_data(env, addr + (2 << DF_WORD), pwd->w[2]);
8571 cpu_stl_data(env, addr + (3 << DF_WORD), pwd->w[3]);
8572 #else
8573 cpu_stl_data(env, addr + (1 << DF_WORD), pwd->w[0]);
8574 cpu_stl_data(env, addr + (0 << DF_WORD), pwd->w[1]);
8575 cpu_stl_data(env, addr + (3 << DF_WORD), pwd->w[2]);
8576 cpu_stl_data(env, addr + (2 << DF_WORD), pwd->w[3]);
8577 #endif
8578 #endif
8579 }
8580
8581 void helper_msa_st_d(CPUMIPSState *env, uint32_t wd,
8582 target_ulong addr)
8583 {
8584 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
8585 int mmu_idx = cpu_mmu_index(env, false);
8586
8587 MEMOP_IDX(DF_DOUBLE)
8588 ensure_writable_pages(env, addr, mmu_idx, GETPC());
8589 #if !defined(CONFIG_USER_ONLY)
8590 helper_ret_stq_mmu(env, addr + (0 << DF_DOUBLE), pwd->d[0], oi, GETPC());
8591 helper_ret_stq_mmu(env, addr + (1 << DF_DOUBLE), pwd->d[1], oi, GETPC());
8592 #else
8593 cpu_stq_data(env, addr + (0 << DF_DOUBLE), pwd->d[0]);
8594 cpu_stq_data(env, addr + (1 << DF_DOUBLE), pwd->d[1]);
8595 #endif
8596 }
8597
8598 void msa_reset(CPUMIPSState *env)
8599 {
8600 if (!ase_msa_available(env)) {
8601 return;
8602 }
8603
8604 #ifdef CONFIG_USER_ONLY
8605 /* MSA access enabled */
8606 env->CP0_Config5 |= 1 << CP0C5_MSAEn;
8607 env->CP0_Status |= (1 << CP0St_CU1) | (1 << CP0St_FR);
8608 #endif
8609
8610 /*
8611 * MSA CSR:
8612 * - non-signaling floating point exception mode off (NX bit is 0)
8613 * - Cause, Enables, and Flags are all 0
8614 * - round to nearest / ties to even (RM bits are 0)
8615 */
8616 env->active_tc.msacsr = 0;
8617
8618 restore_msa_fp_status(env);
8619
8620 /* tininess detected after rounding.*/
8621 set_float_detect_tininess(float_tininess_after_rounding,
8622 &env->active_tc.msa_fp_status);
8623
8624 /* clear float_status exception flags */
8625 set_float_exception_flags(0, &env->active_tc.msa_fp_status);
8626
8627 /* clear float_status nan mode */
8628 set_default_nan_mode(0, &env->active_tc.msa_fp_status);
8629
8630 /* set proper signanling bit meaning ("1" means "quiet") */
8631 set_snan_bit_is_one(0, &env->active_tc.msa_fp_status);
8632 }
AR7 emulation for QEMU