2 * Arm PrimeCell PL110 Color LCD Controller
4 * Copyright (c) 2005-2009 CodeSourcery.
5 * Written by Paul Brook
7 * This code is licensed under the GNU LGPL
10 #include "qemu/osdep.h"
12 #include "hw/sysbus.h"
13 #include "migration/vmstate.h"
14 #include "ui/console.h"
15 #include "framebuffer.h"
16 #include "ui/pixel_ops.h"
17 #include "qemu/timer.h"
19 #include "qemu/module.h"
20 #include "qom/object.h"
22 #define PL110_CR_EN 0x001
23 #define PL110_CR_BGR 0x100
24 #define PL110_CR_BEBO 0x200
25 #define PL110_CR_BEPO 0x400
26 #define PL110_CR_PWR 0x800
27 #define PL110_IE_NB 0x004
28 #define PL110_IE_VC 0x008
38 BPP_16_565
, /* PL111 only */
39 BPP_12
/* PL111 only */
43 /* The Versatile/PB uses a slightly modified PL110 controller. */
47 VERSION_PL110_VERSATILE
,
51 #define TYPE_PL110 "pl110"
52 OBJECT_DECLARE_SIMPLE_TYPE(PL110State
, PL110
)
55 SysBusDevice parent_obj
;
58 MemoryRegionSection fbsection
;
60 QEMUTimer
*vblank_timer
;
71 enum pl110_bppmode bpp
;
74 uint32_t palette
[256];
75 uint32_t raw_palette
[128];
79 static int vmstate_pl110_post_load(void *opaque
, int version_id
);
81 static const VMStateDescription vmstate_pl110
= {
84 .minimum_version_id
= 1,
85 .post_load
= vmstate_pl110_post_load
,
86 .fields
= (VMStateField
[]) {
87 VMSTATE_INT32(version
, PL110State
),
88 VMSTATE_UINT32_ARRAY(timing
, PL110State
, 4),
89 VMSTATE_UINT32(cr
, PL110State
),
90 VMSTATE_UINT32(upbase
, PL110State
),
91 VMSTATE_UINT32(lpbase
, PL110State
),
92 VMSTATE_UINT32(int_status
, PL110State
),
93 VMSTATE_UINT32(int_mask
, PL110State
),
94 VMSTATE_INT32(cols
, PL110State
),
95 VMSTATE_INT32(rows
, PL110State
),
96 VMSTATE_UINT32(bpp
, PL110State
),
97 VMSTATE_INT32(invalidate
, PL110State
),
98 VMSTATE_UINT32_ARRAY(palette
, PL110State
, 256),
99 VMSTATE_UINT32_ARRAY(raw_palette
, PL110State
, 128),
100 VMSTATE_UINT32_V(mux_ctrl
, PL110State
, 2),
101 VMSTATE_END_OF_LIST()
105 static const unsigned char pl110_id
[] =
106 { 0x10, 0x11, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
108 static const unsigned char pl111_id
[] = {
109 0x11, 0x11, 0x24, 0x00, 0x0d, 0xf0, 0x05, 0xb1
113 /* Indexed by pl110_version */
114 static const unsigned char *idregs
[] = {
116 /* The ARM documentation (DDI0224C) says the CLCDC on the Versatile board
117 * has a different ID (0x93, 0x10, 0x04, 0x00, ...). However the hardware
118 * itself has the same ID values as a stock PL110, and guests (in
119 * particular Linux) rely on this. We emulate what the hardware does,
120 * rather than what the docs claim it ought to do.
127 #include "pl110_template.h"
129 #include "pl110_template.h"
131 #include "pl110_template.h"
133 #include "pl110_template.h"
135 #include "pl110_template.h"
137 static int pl110_enabled(PL110State
*s
)
139 return (s
->cr
& PL110_CR_EN
) && (s
->cr
& PL110_CR_PWR
);
142 static void pl110_update_display(void *opaque
)
144 PL110State
*s
= (PL110State
*)opaque
;
146 DisplaySurface
*surface
= qemu_console_surface(s
->con
);
155 if (!pl110_enabled(s
)) {
159 sbd
= SYS_BUS_DEVICE(s
);
161 switch (surface_bits_per_pixel(surface
)) {
165 fntable
= pl110_draw_fn_8
;
169 fntable
= pl110_draw_fn_15
;
173 fntable
= pl110_draw_fn_16
;
177 fntable
= pl110_draw_fn_24
;
181 fntable
= pl110_draw_fn_32
;
185 fprintf(stderr
, "pl110: Bad color depth\n");
188 if (s
->cr
& PL110_CR_BGR
)
193 if ((s
->version
!= VERSION_PL111
) && (s
->bpp
== BPP_16
)) {
194 /* The PL110's native 16 bit mode is 5551; however
195 * most boards with a PL110 implement an external
196 * mux which allows bits to be reshuffled to give
197 * 565 format. The mux is typically controlled by
198 * an external system register.
199 * This is controlled by a GPIO input pin
200 * so boards can wire it up to their register.
202 * The PL111 straightforwardly implements both
203 * 5551 and 565 under control of the bpp field
204 * in the LCDControl register.
206 switch (s
->mux_ctrl
) {
207 case 3: /* 565 BGR */
208 bpp_offset
= (BPP_16_565
- BPP_16
);
212 case 0: /* 888; also if we have loaded vmstate from an old version */
213 case 2: /* 565 RGB */
215 /* treat as 565 but honour BGR bit */
216 bpp_offset
+= (BPP_16_565
- BPP_16
);
221 if (s
->cr
& PL110_CR_BEBO
)
222 fn
= fntable
[s
->bpp
+ 8 + bpp_offset
];
223 else if (s
->cr
& PL110_CR_BEPO
)
224 fn
= fntable
[s
->bpp
+ 16 + bpp_offset
];
226 fn
= fntable
[s
->bpp
+ bpp_offset
];
250 dest_width
*= s
->cols
;
253 framebuffer_update_memory_section(&s
->fbsection
,
254 sysbus_address_space(sbd
),
259 framebuffer_update_display(surface
, &s
->fbsection
,
261 src_width
, dest_width
, 0,
267 dpy_gfx_update(s
->con
, 0, first
, s
->cols
, last
- first
+ 1);
272 static void pl110_invalidate_display(void * opaque
)
274 PL110State
*s
= (PL110State
*)opaque
;
276 if (pl110_enabled(s
)) {
277 qemu_console_resize(s
->con
, s
->cols
, s
->rows
);
281 static void pl110_update_palette(PL110State
*s
, int n
)
283 DisplaySurface
*surface
= qemu_console_surface(s
->con
);
286 unsigned int r
, g
, b
;
288 raw
= s
->raw_palette
[n
];
290 for (i
= 0; i
< 2; i
++) {
291 r
= (raw
& 0x1f) << 3;
293 g
= (raw
& 0x1f) << 3;
295 b
= (raw
& 0x1f) << 3;
296 /* The I bit is ignored. */
298 switch (surface_bits_per_pixel(surface
)) {
300 s
->palette
[n
] = rgb_to_pixel8(r
, g
, b
);
303 s
->palette
[n
] = rgb_to_pixel15(r
, g
, b
);
306 s
->palette
[n
] = rgb_to_pixel16(r
, g
, b
);
310 s
->palette
[n
] = rgb_to_pixel32(r
, g
, b
);
317 static void pl110_resize(PL110State
*s
, int width
, int height
)
319 if (width
!= s
->cols
|| height
!= s
->rows
) {
320 if (pl110_enabled(s
)) {
321 qemu_console_resize(s
->con
, width
, height
);
328 /* Update interrupts. */
329 static void pl110_update(PL110State
*s
)
331 /* Raise IRQ if enabled and any status bit is 1 */
332 if (s
->int_status
& s
->int_mask
) {
333 qemu_irq_raise(s
->irq
);
335 qemu_irq_lower(s
->irq
);
339 static void pl110_vblank_interrupt(void *opaque
)
341 PL110State
*s
= opaque
;
343 /* Fire the vertical compare and next base IRQs and re-arm */
344 s
->int_status
|= (PL110_IE_NB
| PL110_IE_VC
);
345 timer_mod(s
->vblank_timer
,
346 qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL
) +
347 NANOSECONDS_PER_SECOND
/ 60);
351 static uint64_t pl110_read(void *opaque
, hwaddr offset
,
354 PL110State
*s
= (PL110State
*)opaque
;
356 if (offset
>= 0xfe0 && offset
< 0x1000) {
357 return idregs
[s
->version
][(offset
- 0xfe0) >> 2];
359 if (offset
>= 0x200 && offset
< 0x400) {
360 return s
->raw_palette
[(offset
- 0x200) >> 2];
362 switch (offset
>> 2) {
363 case 0: /* LCDTiming0 */
365 case 1: /* LCDTiming1 */
367 case 2: /* LCDTiming2 */
369 case 3: /* LCDTiming3 */
371 case 4: /* LCDUPBASE */
373 case 5: /* LCDLPBASE */
375 case 6: /* LCDIMSC */
376 if (s
->version
!= VERSION_PL110
) {
380 case 7: /* LCDControl */
381 if (s
->version
!= VERSION_PL110
) {
386 return s
->int_status
;
388 return s
->int_status
& s
->int_mask
;
389 case 11: /* LCDUPCURR */
390 /* TODO: Implement vertical refresh. */
392 case 12: /* LCDLPCURR */
395 qemu_log_mask(LOG_GUEST_ERROR
,
396 "pl110_read: Bad offset %x\n", (int)offset
);
401 static void pl110_write(void *opaque
, hwaddr offset
,
402 uint64_t val
, unsigned size
)
404 PL110State
*s
= (PL110State
*)opaque
;
407 /* For simplicity invalidate the display whenever a control register
410 if (offset
>= 0x200 && offset
< 0x400) {
412 n
= (offset
- 0x200) >> 2;
413 s
->raw_palette
[(offset
- 0x200) >> 2] = val
;
414 pl110_update_palette(s
, n
);
417 switch (offset
>> 2) {
418 case 0: /* LCDTiming0 */
420 n
= ((val
& 0xfc) + 4) * 4;
421 pl110_resize(s
, n
, s
->rows
);
423 case 1: /* LCDTiming1 */
425 n
= (val
& 0x3ff) + 1;
426 pl110_resize(s
, s
->cols
, n
);
428 case 2: /* LCDTiming2 */
431 case 3: /* LCDTiming3 */
434 case 4: /* LCDUPBASE */
437 case 5: /* LCDLPBASE */
440 case 6: /* LCDIMSC */
441 if (s
->version
!= VERSION_PL110
) {
448 case 7: /* LCDControl */
449 if (s
->version
!= VERSION_PL110
) {
454 s
->bpp
= (val
>> 1) & 7;
455 if (pl110_enabled(s
)) {
456 qemu_console_resize(s
->con
, s
->cols
, s
->rows
);
457 timer_mod(s
->vblank_timer
,
458 qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL
) +
459 NANOSECONDS_PER_SECOND
/ 60);
461 timer_del(s
->vblank_timer
);
464 case 10: /* LCDICR */
465 s
->int_status
&= ~val
;
469 qemu_log_mask(LOG_GUEST_ERROR
,
470 "pl110_write: Bad offset %x\n", (int)offset
);
474 static const MemoryRegionOps pl110_ops
= {
476 .write
= pl110_write
,
477 .endianness
= DEVICE_NATIVE_ENDIAN
,
480 static void pl110_mux_ctrl_set(void *opaque
, int line
, int level
)
482 PL110State
*s
= (PL110State
*)opaque
;
486 static int vmstate_pl110_post_load(void *opaque
, int version_id
)
488 PL110State
*s
= opaque
;
489 /* Make sure we redraw, and at the right size */
490 pl110_invalidate_display(s
);
494 static const GraphicHwOps pl110_gfx_ops
= {
495 .invalidate
= pl110_invalidate_display
,
496 .gfx_update
= pl110_update_display
,
499 static void pl110_realize(DeviceState
*dev
, Error
**errp
)
501 PL110State
*s
= PL110(dev
);
502 SysBusDevice
*sbd
= SYS_BUS_DEVICE(dev
);
504 memory_region_init_io(&s
->iomem
, OBJECT(s
), &pl110_ops
, s
, "pl110", 0x1000);
505 sysbus_init_mmio(sbd
, &s
->iomem
);
506 sysbus_init_irq(sbd
, &s
->irq
);
507 s
->vblank_timer
= timer_new_ns(QEMU_CLOCK_VIRTUAL
,
508 pl110_vblank_interrupt
, s
);
509 qdev_init_gpio_in(dev
, pl110_mux_ctrl_set
, 1);
510 s
->con
= graphic_console_init(dev
, 0, &pl110_gfx_ops
, s
);
513 static void pl110_init(Object
*obj
)
515 PL110State
*s
= PL110(obj
);
517 s
->version
= VERSION_PL110
;
520 static void pl110_versatile_init(Object
*obj
)
522 PL110State
*s
= PL110(obj
);
524 s
->version
= VERSION_PL110_VERSATILE
;
527 static void pl111_init(Object
*obj
)
529 PL110State
*s
= PL110(obj
);
531 s
->version
= VERSION_PL111
;
534 static void pl110_class_init(ObjectClass
*klass
, void *data
)
536 DeviceClass
*dc
= DEVICE_CLASS(klass
);
538 set_bit(DEVICE_CATEGORY_DISPLAY
, dc
->categories
);
539 dc
->vmsd
= &vmstate_pl110
;
540 dc
->realize
= pl110_realize
;
543 static const TypeInfo pl110_info
= {
545 .parent
= TYPE_SYS_BUS_DEVICE
,
546 .instance_size
= sizeof(PL110State
),
547 .instance_init
= pl110_init
,
548 .class_init
= pl110_class_init
,
551 static const TypeInfo pl110_versatile_info
= {
552 .name
= "pl110_versatile",
553 .parent
= TYPE_PL110
,
554 .instance_init
= pl110_versatile_init
,
557 static const TypeInfo pl111_info
= {
559 .parent
= TYPE_PL110
,
560 .instance_init
= pl111_init
,
563 static void pl110_register_types(void)
565 type_register_static(&pl110_info
);
566 type_register_static(&pl110_versatile_info
);
567 type_register_static(&pl111_info
);
570 type_init(pl110_register_types
)