Merge remote-tracking branch 'remotes/kraxel/tags/pull-audio-20170301-1' into staging
[qemu/ar7.git] / exec.c
blob785d20f648fb9e5b65c236108fb7d53e757798a2
1 /*
2 * Virtual page mapping
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 #include "qemu/osdep.h"
20 #include "qapi/error.h"
21 #ifndef _WIN32
22 #endif
24 #include "qemu/cutils.h"
25 #include "cpu.h"
26 #include "exec/exec-all.h"
27 #include "tcg.h"
28 #include "hw/qdev-core.h"
29 #if !defined(CONFIG_USER_ONLY)
30 #include "hw/boards.h"
31 #include "hw/xen/xen.h"
32 #endif
33 #include "sysemu/kvm.h"
34 #include "sysemu/sysemu.h"
35 #include "qemu/timer.h"
36 #include "qemu/config-file.h"
37 #include "qemu/error-report.h"
38 #if defined(CONFIG_USER_ONLY)
39 #include "qemu.h"
40 #else /* !CONFIG_USER_ONLY */
41 #include "hw/hw.h"
42 #include "exec/memory.h"
43 #include "exec/ioport.h"
44 #include "sysemu/dma.h"
45 #include "exec/address-spaces.h"
46 #include "sysemu/xen-mapcache.h"
47 #include "trace-root.h"
49 #ifdef CONFIG_FALLOCATE_PUNCH_HOLE
50 #include <fcntl.h>
51 #include <linux/falloc.h>
52 #endif
54 #endif
55 #include "exec/cpu-all.h"
56 #include "qemu/rcu_queue.h"
57 #include "qemu/main-loop.h"
58 #include "translate-all.h"
59 #include "sysemu/replay.h"
61 #include "exec/memory-internal.h"
62 #include "exec/ram_addr.h"
63 #include "exec/log.h"
65 #include "migration/vmstate.h"
67 #include "qemu/range.h"
68 #ifndef _WIN32
69 #include "qemu/mmap-alloc.h"
70 #endif
72 //#define DEBUG_SUBPAGE
74 #if !defined(CONFIG_USER_ONLY)
75 /* ram_list is read under rcu_read_lock()/rcu_read_unlock(). Writes
76 * are protected by the ramlist lock.
78 RAMList ram_list = { .blocks = QLIST_HEAD_INITIALIZER(ram_list.blocks) };
80 static MemoryRegion *system_memory;
81 static MemoryRegion *system_io;
83 AddressSpace address_space_io;
84 AddressSpace address_space_memory;
86 MemoryRegion io_mem_rom, io_mem_notdirty;
87 static MemoryRegion io_mem_unassigned;
89 /* RAM is pre-allocated and passed into qemu_ram_alloc_from_ptr */
90 #define RAM_PREALLOC (1 << 0)
92 /* RAM is mmap-ed with MAP_SHARED */
93 #define RAM_SHARED (1 << 1)
95 /* Only a portion of RAM (used_length) is actually used, and migrated.
96 * This used_length size can change across reboots.
98 #define RAM_RESIZEABLE (1 << 2)
100 #endif
102 #ifdef TARGET_PAGE_BITS_VARY
103 int target_page_bits;
104 bool target_page_bits_decided;
105 #endif
107 struct CPUTailQ cpus = QTAILQ_HEAD_INITIALIZER(cpus);
108 /* current CPU in the current thread. It is only valid inside
109 cpu_exec() */
110 __thread CPUState *current_cpu;
111 /* 0 = Do not count executed instructions.
112 1 = Precise instruction counting.
113 2 = Adaptive rate instruction counting. */
114 int use_icount;
116 bool set_preferred_target_page_bits(int bits)
118 /* The target page size is the lowest common denominator for all
119 * the CPUs in the system, so we can only make it smaller, never
120 * larger. And we can't make it smaller once we've committed to
121 * a particular size.
123 #ifdef TARGET_PAGE_BITS_VARY
124 assert(bits >= TARGET_PAGE_BITS_MIN);
125 if (target_page_bits == 0 || target_page_bits > bits) {
126 if (target_page_bits_decided) {
127 return false;
129 target_page_bits = bits;
131 #endif
132 return true;
135 #if !defined(CONFIG_USER_ONLY)
137 static void finalize_target_page_bits(void)
139 #ifdef TARGET_PAGE_BITS_VARY
140 if (target_page_bits == 0) {
141 target_page_bits = TARGET_PAGE_BITS_MIN;
143 target_page_bits_decided = true;
144 #endif
147 typedef struct PhysPageEntry PhysPageEntry;
149 struct PhysPageEntry {
150 /* How many bits skip to next level (in units of L2_SIZE). 0 for a leaf. */
151 uint32_t skip : 6;
152 /* index into phys_sections (!skip) or phys_map_nodes (skip) */
153 uint32_t ptr : 26;
156 #define PHYS_MAP_NODE_NIL (((uint32_t)~0) >> 6)
158 /* Size of the L2 (and L3, etc) page tables. */
159 #define ADDR_SPACE_BITS 64
161 #define P_L2_BITS 9
162 #define P_L2_SIZE (1 << P_L2_BITS)
164 #define P_L2_LEVELS (((ADDR_SPACE_BITS - TARGET_PAGE_BITS - 1) / P_L2_BITS) + 1)
166 typedef PhysPageEntry Node[P_L2_SIZE];
168 typedef struct PhysPageMap {
169 struct rcu_head rcu;
171 unsigned sections_nb;
172 unsigned sections_nb_alloc;
173 unsigned nodes_nb;
174 unsigned nodes_nb_alloc;
175 Node *nodes;
176 MemoryRegionSection *sections;
177 } PhysPageMap;
179 struct AddressSpaceDispatch {
180 struct rcu_head rcu;
182 MemoryRegionSection *mru_section;
183 /* This is a multi-level map on the physical address space.
184 * The bottom level has pointers to MemoryRegionSections.
186 PhysPageEntry phys_map;
187 PhysPageMap map;
188 AddressSpace *as;
191 #define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK)
192 typedef struct subpage_t {
193 MemoryRegion iomem;
194 AddressSpace *as;
195 hwaddr base;
196 uint16_t sub_section[];
197 } subpage_t;
199 #define PHYS_SECTION_UNASSIGNED 0
200 #define PHYS_SECTION_NOTDIRTY 1
201 #define PHYS_SECTION_ROM 2
202 #define PHYS_SECTION_WATCH 3
204 static void io_mem_init(void);
205 static void memory_map_init(void);
206 static void tcg_commit(MemoryListener *listener);
208 static MemoryRegion io_mem_watch;
211 * CPUAddressSpace: all the information a CPU needs about an AddressSpace
212 * @cpu: the CPU whose AddressSpace this is
213 * @as: the AddressSpace itself
214 * @memory_dispatch: its dispatch pointer (cached, RCU protected)
215 * @tcg_as_listener: listener for tracking changes to the AddressSpace
217 struct CPUAddressSpace {
218 CPUState *cpu;
219 AddressSpace *as;
220 struct AddressSpaceDispatch *memory_dispatch;
221 MemoryListener tcg_as_listener;
224 #endif
226 #if !defined(CONFIG_USER_ONLY)
228 static void phys_map_node_reserve(PhysPageMap *map, unsigned nodes)
230 static unsigned alloc_hint = 16;
231 if (map->nodes_nb + nodes > map->nodes_nb_alloc) {
232 map->nodes_nb_alloc = MAX(map->nodes_nb_alloc, alloc_hint);
233 map->nodes_nb_alloc = MAX(map->nodes_nb_alloc, map->nodes_nb + nodes);
234 map->nodes = g_renew(Node, map->nodes, map->nodes_nb_alloc);
235 alloc_hint = map->nodes_nb_alloc;
239 static uint32_t phys_map_node_alloc(PhysPageMap *map, bool leaf)
241 unsigned i;
242 uint32_t ret;
243 PhysPageEntry e;
244 PhysPageEntry *p;
246 ret = map->nodes_nb++;
247 p = map->nodes[ret];
248 assert(ret != PHYS_MAP_NODE_NIL);
249 assert(ret != map->nodes_nb_alloc);
251 e.skip = leaf ? 0 : 1;
252 e.ptr = leaf ? PHYS_SECTION_UNASSIGNED : PHYS_MAP_NODE_NIL;
253 for (i = 0; i < P_L2_SIZE; ++i) {
254 memcpy(&p[i], &e, sizeof(e));
256 return ret;
259 static void phys_page_set_level(PhysPageMap *map, PhysPageEntry *lp,
260 hwaddr *index, hwaddr *nb, uint16_t leaf,
261 int level)
263 PhysPageEntry *p;
264 hwaddr step = (hwaddr)1 << (level * P_L2_BITS);
266 if (lp->skip && lp->ptr == PHYS_MAP_NODE_NIL) {
267 lp->ptr = phys_map_node_alloc(map, level == 0);
269 p = map->nodes[lp->ptr];
270 lp = &p[(*index >> (level * P_L2_BITS)) & (P_L2_SIZE - 1)];
272 while (*nb && lp < &p[P_L2_SIZE]) {
273 if ((*index & (step - 1)) == 0 && *nb >= step) {
274 lp->skip = 0;
275 lp->ptr = leaf;
276 *index += step;
277 *nb -= step;
278 } else {
279 phys_page_set_level(map, lp, index, nb, leaf, level - 1);
281 ++lp;
285 static void phys_page_set(AddressSpaceDispatch *d,
286 hwaddr index, hwaddr nb,
287 uint16_t leaf)
289 /* Wildly overreserve - it doesn't matter much. */
290 phys_map_node_reserve(&d->map, 3 * P_L2_LEVELS);
292 phys_page_set_level(&d->map, &d->phys_map, &index, &nb, leaf, P_L2_LEVELS - 1);
295 /* Compact a non leaf page entry. Simply detect that the entry has a single child,
296 * and update our entry so we can skip it and go directly to the destination.
298 static void phys_page_compact(PhysPageEntry *lp, Node *nodes)
300 unsigned valid_ptr = P_L2_SIZE;
301 int valid = 0;
302 PhysPageEntry *p;
303 int i;
305 if (lp->ptr == PHYS_MAP_NODE_NIL) {
306 return;
309 p = nodes[lp->ptr];
310 for (i = 0; i < P_L2_SIZE; i++) {
311 if (p[i].ptr == PHYS_MAP_NODE_NIL) {
312 continue;
315 valid_ptr = i;
316 valid++;
317 if (p[i].skip) {
318 phys_page_compact(&p[i], nodes);
322 /* We can only compress if there's only one child. */
323 if (valid != 1) {
324 return;
327 assert(valid_ptr < P_L2_SIZE);
329 /* Don't compress if it won't fit in the # of bits we have. */
330 if (lp->skip + p[valid_ptr].skip >= (1 << 3)) {
331 return;
334 lp->ptr = p[valid_ptr].ptr;
335 if (!p[valid_ptr].skip) {
336 /* If our only child is a leaf, make this a leaf. */
337 /* By design, we should have made this node a leaf to begin with so we
338 * should never reach here.
339 * But since it's so simple to handle this, let's do it just in case we
340 * change this rule.
342 lp->skip = 0;
343 } else {
344 lp->skip += p[valid_ptr].skip;
348 static void phys_page_compact_all(AddressSpaceDispatch *d, int nodes_nb)
350 if (d->phys_map.skip) {
351 phys_page_compact(&d->phys_map, d->map.nodes);
355 static inline bool section_covers_addr(const MemoryRegionSection *section,
356 hwaddr addr)
358 /* Memory topology clips a memory region to [0, 2^64); size.hi > 0 means
359 * the section must cover the entire address space.
361 return int128_gethi(section->size) ||
362 range_covers_byte(section->offset_within_address_space,
363 int128_getlo(section->size), addr);
366 static MemoryRegionSection *phys_page_find(PhysPageEntry lp, hwaddr addr,
367 Node *nodes, MemoryRegionSection *sections)
369 PhysPageEntry *p;
370 hwaddr index = addr >> TARGET_PAGE_BITS;
371 int i;
373 for (i = P_L2_LEVELS; lp.skip && (i -= lp.skip) >= 0;) {
374 if (lp.ptr == PHYS_MAP_NODE_NIL) {
375 return &sections[PHYS_SECTION_UNASSIGNED];
377 p = nodes[lp.ptr];
378 lp = p[(index >> (i * P_L2_BITS)) & (P_L2_SIZE - 1)];
381 if (section_covers_addr(&sections[lp.ptr], addr)) {
382 return &sections[lp.ptr];
383 } else {
384 return &sections[PHYS_SECTION_UNASSIGNED];
388 bool memory_region_is_unassigned(MemoryRegion *mr)
390 return mr != &io_mem_rom && mr != &io_mem_notdirty && !mr->rom_device
391 && mr != &io_mem_watch;
394 /* Called from RCU critical section */
395 static MemoryRegionSection *address_space_lookup_region(AddressSpaceDispatch *d,
396 hwaddr addr,
397 bool resolve_subpage)
399 MemoryRegionSection *section = atomic_read(&d->mru_section);
400 subpage_t *subpage;
401 bool update;
403 if (section && section != &d->map.sections[PHYS_SECTION_UNASSIGNED] &&
404 section_covers_addr(section, addr)) {
405 update = false;
406 } else {
407 section = phys_page_find(d->phys_map, addr, d->map.nodes,
408 d->map.sections);
409 update = true;
411 if (resolve_subpage && section->mr->subpage) {
412 subpage = container_of(section->mr, subpage_t, iomem);
413 section = &d->map.sections[subpage->sub_section[SUBPAGE_IDX(addr)]];
415 if (update) {
416 atomic_set(&d->mru_section, section);
418 return section;
421 /* Called from RCU critical section */
422 static MemoryRegionSection *
423 address_space_translate_internal(AddressSpaceDispatch *d, hwaddr addr, hwaddr *xlat,
424 hwaddr *plen, bool resolve_subpage)
426 MemoryRegionSection *section;
427 MemoryRegion *mr;
428 Int128 diff;
430 section = address_space_lookup_region(d, addr, resolve_subpage);
431 /* Compute offset within MemoryRegionSection */
432 addr -= section->offset_within_address_space;
434 /* Compute offset within MemoryRegion */
435 *xlat = addr + section->offset_within_region;
437 mr = section->mr;
439 /* MMIO registers can be expected to perform full-width accesses based only
440 * on their address, without considering adjacent registers that could
441 * decode to completely different MemoryRegions. When such registers
442 * exist (e.g. I/O ports 0xcf8 and 0xcf9 on most PC chipsets), MMIO
443 * regions overlap wildly. For this reason we cannot clamp the accesses
444 * here.
446 * If the length is small (as is the case for address_space_ldl/stl),
447 * everything works fine. If the incoming length is large, however,
448 * the caller really has to do the clamping through memory_access_size.
450 if (memory_region_is_ram(mr)) {
451 diff = int128_sub(section->size, int128_make64(addr));
452 *plen = int128_get64(int128_min(diff, int128_make64(*plen)));
454 return section;
457 /* Called from RCU critical section */
458 IOMMUTLBEntry address_space_get_iotlb_entry(AddressSpace *as, hwaddr addr,
459 bool is_write)
461 IOMMUTLBEntry iotlb = {0};
462 MemoryRegionSection *section;
463 MemoryRegion *mr;
465 for (;;) {
466 AddressSpaceDispatch *d = atomic_rcu_read(&as->dispatch);
467 section = address_space_lookup_region(d, addr, false);
468 addr = addr - section->offset_within_address_space
469 + section->offset_within_region;
470 mr = section->mr;
472 if (!mr->iommu_ops) {
473 break;
476 iotlb = mr->iommu_ops->translate(mr, addr, is_write);
477 if (!(iotlb.perm & (1 << is_write))) {
478 iotlb.target_as = NULL;
479 break;
482 addr = ((iotlb.translated_addr & ~iotlb.addr_mask)
483 | (addr & iotlb.addr_mask));
484 as = iotlb.target_as;
487 return iotlb;
490 /* Called from RCU critical section */
491 MemoryRegion *address_space_translate(AddressSpace *as, hwaddr addr,
492 hwaddr *xlat, hwaddr *plen,
493 bool is_write)
495 IOMMUTLBEntry iotlb;
496 MemoryRegionSection *section;
497 MemoryRegion *mr;
499 for (;;) {
500 AddressSpaceDispatch *d = atomic_rcu_read(&as->dispatch);
501 section = address_space_translate_internal(d, addr, &addr, plen, true);
502 mr = section->mr;
504 if (!mr->iommu_ops) {
505 break;
508 iotlb = mr->iommu_ops->translate(mr, addr, is_write);
509 addr = ((iotlb.translated_addr & ~iotlb.addr_mask)
510 | (addr & iotlb.addr_mask));
511 *plen = MIN(*plen, (addr | iotlb.addr_mask) - addr + 1);
512 if (!(iotlb.perm & (1 << is_write))) {
513 mr = &io_mem_unassigned;
514 break;
517 as = iotlb.target_as;
520 if (xen_enabled() && memory_access_is_direct(mr, is_write)) {
521 hwaddr page = ((addr & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE) - addr;
522 *plen = MIN(page, *plen);
525 *xlat = addr;
526 return mr;
529 /* Called from RCU critical section */
530 MemoryRegionSection *
531 address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr addr,
532 hwaddr *xlat, hwaddr *plen)
534 MemoryRegionSection *section;
535 AddressSpaceDispatch *d = atomic_rcu_read(&cpu->cpu_ases[asidx].memory_dispatch);
537 section = address_space_translate_internal(d, addr, xlat, plen, false);
539 assert(!section->mr->iommu_ops);
540 return section;
542 #endif
544 #if !defined(CONFIG_USER_ONLY)
546 static int cpu_common_post_load(void *opaque, int version_id)
548 CPUState *cpu = opaque;
550 /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
551 version_id is increased. */
552 cpu->interrupt_request &= ~0x01;
553 tlb_flush(cpu);
555 return 0;
558 static int cpu_common_pre_load(void *opaque)
560 CPUState *cpu = opaque;
562 cpu->exception_index = -1;
564 return 0;
567 static bool cpu_common_exception_index_needed(void *opaque)
569 CPUState *cpu = opaque;
571 return tcg_enabled() && cpu->exception_index != -1;
574 static const VMStateDescription vmstate_cpu_common_exception_index = {
575 .name = "cpu_common/exception_index",
576 .version_id = 1,
577 .minimum_version_id = 1,
578 .needed = cpu_common_exception_index_needed,
579 .fields = (VMStateField[]) {
580 VMSTATE_INT32(exception_index, CPUState),
581 VMSTATE_END_OF_LIST()
585 static bool cpu_common_crash_occurred_needed(void *opaque)
587 CPUState *cpu = opaque;
589 return cpu->crash_occurred;
592 static const VMStateDescription vmstate_cpu_common_crash_occurred = {
593 .name = "cpu_common/crash_occurred",
594 .version_id = 1,
595 .minimum_version_id = 1,
596 .needed = cpu_common_crash_occurred_needed,
597 .fields = (VMStateField[]) {
598 VMSTATE_BOOL(crash_occurred, CPUState),
599 VMSTATE_END_OF_LIST()
603 const VMStateDescription vmstate_cpu_common = {
604 .name = "cpu_common",
605 .version_id = 1,
606 .minimum_version_id = 1,
607 .pre_load = cpu_common_pre_load,
608 .post_load = cpu_common_post_load,
609 .fields = (VMStateField[]) {
610 VMSTATE_UINT32(halted, CPUState),
611 VMSTATE_UINT32(interrupt_request, CPUState),
612 VMSTATE_END_OF_LIST()
614 .subsections = (const VMStateDescription*[]) {
615 &vmstate_cpu_common_exception_index,
616 &vmstate_cpu_common_crash_occurred,
617 NULL
621 #endif
623 CPUState *qemu_get_cpu(int index)
625 CPUState *cpu;
627 CPU_FOREACH(cpu) {
628 if (cpu->cpu_index == index) {
629 return cpu;
633 return NULL;
636 #if !defined(CONFIG_USER_ONLY)
637 void cpu_address_space_init(CPUState *cpu, AddressSpace *as, int asidx)
639 CPUAddressSpace *newas;
641 /* Target code should have set num_ases before calling us */
642 assert(asidx < cpu->num_ases);
644 if (asidx == 0) {
645 /* address space 0 gets the convenience alias */
646 cpu->as = as;
649 /* KVM cannot currently support multiple address spaces. */
650 assert(asidx == 0 || !kvm_enabled());
652 if (!cpu->cpu_ases) {
653 cpu->cpu_ases = g_new0(CPUAddressSpace, cpu->num_ases);
656 newas = &cpu->cpu_ases[asidx];
657 newas->cpu = cpu;
658 newas->as = as;
659 if (tcg_enabled()) {
660 newas->tcg_as_listener.commit = tcg_commit;
661 memory_listener_register(&newas->tcg_as_listener, as);
665 AddressSpace *cpu_get_address_space(CPUState *cpu, int asidx)
667 /* Return the AddressSpace corresponding to the specified index */
668 return cpu->cpu_ases[asidx].as;
670 #endif
672 void cpu_exec_unrealizefn(CPUState *cpu)
674 CPUClass *cc = CPU_GET_CLASS(cpu);
676 cpu_list_remove(cpu);
678 if (cc->vmsd != NULL) {
679 vmstate_unregister(NULL, cc->vmsd, cpu);
681 if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
682 vmstate_unregister(NULL, &vmstate_cpu_common, cpu);
686 void cpu_exec_initfn(CPUState *cpu)
688 cpu->as = NULL;
689 cpu->num_ases = 0;
691 #ifndef CONFIG_USER_ONLY
692 cpu->thread_id = qemu_get_thread_id();
694 /* This is a softmmu CPU object, so create a property for it
695 * so users can wire up its memory. (This can't go in qom/cpu.c
696 * because that file is compiled only once for both user-mode
697 * and system builds.) The default if no link is set up is to use
698 * the system address space.
700 object_property_add_link(OBJECT(cpu), "memory", TYPE_MEMORY_REGION,
701 (Object **)&cpu->memory,
702 qdev_prop_allow_set_link_before_realize,
703 OBJ_PROP_LINK_UNREF_ON_RELEASE,
704 &error_abort);
705 cpu->memory = system_memory;
706 object_ref(OBJECT(cpu->memory));
707 #endif
710 void cpu_exec_realizefn(CPUState *cpu, Error **errp)
712 CPUClass *cc ATTRIBUTE_UNUSED = CPU_GET_CLASS(cpu);
714 cpu_list_add(cpu);
716 #ifndef CONFIG_USER_ONLY
717 if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
718 vmstate_register(NULL, cpu->cpu_index, &vmstate_cpu_common, cpu);
720 if (cc->vmsd != NULL) {
721 vmstate_register(NULL, cpu->cpu_index, cc->vmsd, cpu);
723 #endif
726 static void breakpoint_invalidate(CPUState *cpu, target_ulong pc)
728 /* Flush the whole TB as this will not have race conditions
729 * even if we don't have proper locking yet.
730 * Ideally we would just invalidate the TBs for the
731 * specified PC.
733 tb_flush(cpu);
736 #if defined(CONFIG_USER_ONLY)
737 void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
742 int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, vaddr len,
743 int flags)
745 return -ENOSYS;
748 void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint)
752 int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
753 int flags, CPUWatchpoint **watchpoint)
755 return -ENOSYS;
757 #else
758 /* Add a watchpoint. */
759 int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
760 int flags, CPUWatchpoint **watchpoint)
762 CPUWatchpoint *wp;
764 /* forbid ranges which are empty or run off the end of the address space */
765 if (len == 0 || (addr + len - 1) < addr) {
766 error_report("tried to set invalid watchpoint at %"
767 VADDR_PRIx ", len=%" VADDR_PRIu, addr, len);
768 return -EINVAL;
770 wp = g_malloc(sizeof(*wp));
772 wp->vaddr = addr;
773 wp->len = len;
774 wp->flags = flags;
776 /* keep all GDB-injected watchpoints in front */
777 if (flags & BP_GDB) {
778 QTAILQ_INSERT_HEAD(&cpu->watchpoints, wp, entry);
779 } else {
780 QTAILQ_INSERT_TAIL(&cpu->watchpoints, wp, entry);
783 tlb_flush_page(cpu, addr);
785 if (watchpoint)
786 *watchpoint = wp;
787 return 0;
790 /* Remove a specific watchpoint. */
791 int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, vaddr len,
792 int flags)
794 CPUWatchpoint *wp;
796 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
797 if (addr == wp->vaddr && len == wp->len
798 && flags == (wp->flags & ~BP_WATCHPOINT_HIT)) {
799 cpu_watchpoint_remove_by_ref(cpu, wp);
800 return 0;
803 return -ENOENT;
806 /* Remove a specific watchpoint by reference. */
807 void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint)
809 QTAILQ_REMOVE(&cpu->watchpoints, watchpoint, entry);
811 tlb_flush_page(cpu, watchpoint->vaddr);
813 g_free(watchpoint);
816 /* Remove all matching watchpoints. */
817 void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
819 CPUWatchpoint *wp, *next;
821 QTAILQ_FOREACH_SAFE(wp, &cpu->watchpoints, entry, next) {
822 if (wp->flags & mask) {
823 cpu_watchpoint_remove_by_ref(cpu, wp);
828 /* Return true if this watchpoint address matches the specified
829 * access (ie the address range covered by the watchpoint overlaps
830 * partially or completely with the address range covered by the
831 * access).
833 static inline bool cpu_watchpoint_address_matches(CPUWatchpoint *wp,
834 vaddr addr,
835 vaddr len)
837 /* We know the lengths are non-zero, but a little caution is
838 * required to avoid errors in the case where the range ends
839 * exactly at the top of the address space and so addr + len
840 * wraps round to zero.
842 vaddr wpend = wp->vaddr + wp->len - 1;
843 vaddr addrend = addr + len - 1;
845 return !(addr > wpend || wp->vaddr > addrend);
848 #endif
850 /* Add a breakpoint. */
851 int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
852 CPUBreakpoint **breakpoint)
854 CPUBreakpoint *bp;
856 bp = g_malloc(sizeof(*bp));
858 bp->pc = pc;
859 bp->flags = flags;
861 /* keep all GDB-injected breakpoints in front */
862 if (flags & BP_GDB) {
863 QTAILQ_INSERT_HEAD(&cpu->breakpoints, bp, entry);
864 } else {
865 QTAILQ_INSERT_TAIL(&cpu->breakpoints, bp, entry);
868 breakpoint_invalidate(cpu, pc);
870 if (breakpoint) {
871 *breakpoint = bp;
873 return 0;
876 /* Remove a specific breakpoint. */
877 int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags)
879 CPUBreakpoint *bp;
881 QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
882 if (bp->pc == pc && bp->flags == flags) {
883 cpu_breakpoint_remove_by_ref(cpu, bp);
884 return 0;
887 return -ENOENT;
890 /* Remove a specific breakpoint by reference. */
891 void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *breakpoint)
893 QTAILQ_REMOVE(&cpu->breakpoints, breakpoint, entry);
895 breakpoint_invalidate(cpu, breakpoint->pc);
897 g_free(breakpoint);
900 /* Remove all matching breakpoints. */
901 void cpu_breakpoint_remove_all(CPUState *cpu, int mask)
903 CPUBreakpoint *bp, *next;
905 QTAILQ_FOREACH_SAFE(bp, &cpu->breakpoints, entry, next) {
906 if (bp->flags & mask) {
907 cpu_breakpoint_remove_by_ref(cpu, bp);
912 /* enable or disable single step mode. EXCP_DEBUG is returned by the
913 CPU loop after each instruction */
914 void cpu_single_step(CPUState *cpu, int enabled)
916 if (cpu->singlestep_enabled != enabled) {
917 cpu->singlestep_enabled = enabled;
918 if (kvm_enabled()) {
919 kvm_update_guest_debug(cpu, 0);
920 } else {
921 /* must flush all the translated code to avoid inconsistencies */
922 /* XXX: only flush what is necessary */
923 tb_flush(cpu);
928 void cpu_abort(CPUState *cpu, const char *fmt, ...)
930 va_list ap;
931 va_list ap2;
933 va_start(ap, fmt);
934 va_copy(ap2, ap);
935 fprintf(stderr, "qemu: fatal: ");
936 vfprintf(stderr, fmt, ap);
937 fprintf(stderr, "\n");
938 cpu_dump_state(cpu, stderr, fprintf, CPU_DUMP_FPU | CPU_DUMP_CCOP);
939 if (qemu_log_separate()) {
940 qemu_log_lock();
941 qemu_log("qemu: fatal: ");
942 qemu_log_vprintf(fmt, ap2);
943 qemu_log("\n");
944 log_cpu_state(cpu, CPU_DUMP_FPU | CPU_DUMP_CCOP);
945 qemu_log_flush();
946 qemu_log_unlock();
947 qemu_log_close();
949 va_end(ap2);
950 va_end(ap);
951 replay_finish();
952 #if defined(CONFIG_USER_ONLY)
954 struct sigaction act;
955 sigfillset(&act.sa_mask);
956 act.sa_handler = SIG_DFL;
957 sigaction(SIGABRT, &act, NULL);
959 #endif
960 abort();
963 #if !defined(CONFIG_USER_ONLY)
964 /* Called from RCU critical section */
965 static RAMBlock *qemu_get_ram_block(ram_addr_t addr)
967 RAMBlock *block;
969 block = atomic_rcu_read(&ram_list.mru_block);
970 if (block && addr - block->offset < block->max_length) {
971 return block;
973 QLIST_FOREACH_RCU(block, &ram_list.blocks, next) {
974 if (addr - block->offset < block->max_length) {
975 goto found;
979 fprintf(stderr, "Bad ram offset %" PRIx64 "\n", (uint64_t)addr);
980 abort();
982 found:
983 /* It is safe to write mru_block outside the iothread lock. This
984 * is what happens:
986 * mru_block = xxx
987 * rcu_read_unlock()
988 * xxx removed from list
989 * rcu_read_lock()
990 * read mru_block
991 * mru_block = NULL;
992 * call_rcu(reclaim_ramblock, xxx);
993 * rcu_read_unlock()
995 * atomic_rcu_set is not needed here. The block was already published
996 * when it was placed into the list. Here we're just making an extra
997 * copy of the pointer.
999 ram_list.mru_block = block;
1000 return block;
1003 static void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length)
1005 CPUState *cpu;
1006 ram_addr_t start1;
1007 RAMBlock *block;
1008 ram_addr_t end;
1010 end = TARGET_PAGE_ALIGN(start + length);
1011 start &= TARGET_PAGE_MASK;
1013 rcu_read_lock();
1014 block = qemu_get_ram_block(start);
1015 assert(block == qemu_get_ram_block(end - 1));
1016 start1 = (uintptr_t)ramblock_ptr(block, start - block->offset);
1017 CPU_FOREACH(cpu) {
1018 tlb_reset_dirty(cpu, start1, length);
1020 rcu_read_unlock();
1023 /* Note: start and end must be within the same ram block. */
1024 bool cpu_physical_memory_test_and_clear_dirty(ram_addr_t start,
1025 ram_addr_t length,
1026 unsigned client)
1028 DirtyMemoryBlocks *blocks;
1029 unsigned long end, page;
1030 bool dirty = false;
1032 if (length == 0) {
1033 return false;
1036 end = TARGET_PAGE_ALIGN(start + length) >> TARGET_PAGE_BITS;
1037 page = start >> TARGET_PAGE_BITS;
1039 rcu_read_lock();
1041 blocks = atomic_rcu_read(&ram_list.dirty_memory[client]);
1043 while (page < end) {
1044 unsigned long idx = page / DIRTY_MEMORY_BLOCK_SIZE;
1045 unsigned long offset = page % DIRTY_MEMORY_BLOCK_SIZE;
1046 unsigned long num = MIN(end - page, DIRTY_MEMORY_BLOCK_SIZE - offset);
1048 dirty |= bitmap_test_and_clear_atomic(blocks->blocks[idx],
1049 offset, num);
1050 page += num;
1053 rcu_read_unlock();
1055 if (dirty && tcg_enabled()) {
1056 tlb_reset_dirty_range_all(start, length);
1059 return dirty;
1062 /* Called from RCU critical section */
1063 hwaddr memory_region_section_get_iotlb(CPUState *cpu,
1064 MemoryRegionSection *section,
1065 target_ulong vaddr,
1066 hwaddr paddr, hwaddr xlat,
1067 int prot,
1068 target_ulong *address)
1070 hwaddr iotlb;
1071 CPUWatchpoint *wp;
1073 if (memory_region_is_ram(section->mr)) {
1074 /* Normal RAM. */
1075 iotlb = memory_region_get_ram_addr(section->mr) + xlat;
1076 if (!section->readonly) {
1077 iotlb |= PHYS_SECTION_NOTDIRTY;
1078 } else {
1079 iotlb |= PHYS_SECTION_ROM;
1081 } else {
1082 AddressSpaceDispatch *d;
1084 d = atomic_rcu_read(&section->address_space->dispatch);
1085 iotlb = section - d->map.sections;
1086 iotlb += xlat;
1089 /* Make accesses to pages with watchpoints go via the
1090 watchpoint trap routines. */
1091 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
1092 if (cpu_watchpoint_address_matches(wp, vaddr, TARGET_PAGE_SIZE)) {
1093 /* Avoid trapping reads of pages with a write breakpoint. */
1094 if ((prot & PAGE_WRITE) || (wp->flags & BP_MEM_READ)) {
1095 iotlb = PHYS_SECTION_WATCH + paddr;
1096 *address |= TLB_MMIO;
1097 break;
1102 return iotlb;
1104 #endif /* defined(CONFIG_USER_ONLY) */
1106 #if !defined(CONFIG_USER_ONLY)
1108 static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end,
1109 uint16_t section);
1110 static subpage_t *subpage_init(AddressSpace *as, hwaddr base);
1112 static void *(*phys_mem_alloc)(size_t size, uint64_t *align) =
1113 qemu_anon_ram_alloc;
1116 * Set a custom physical guest memory alloator.
1117 * Accelerators with unusual needs may need this. Hopefully, we can
1118 * get rid of it eventually.
1120 void phys_mem_set_alloc(void *(*alloc)(size_t, uint64_t *align))
1122 phys_mem_alloc = alloc;
1125 static uint16_t phys_section_add(PhysPageMap *map,
1126 MemoryRegionSection *section)
1128 /* The physical section number is ORed with a page-aligned
1129 * pointer to produce the iotlb entries. Thus it should
1130 * never overflow into the page-aligned value.
1132 assert(map->sections_nb < TARGET_PAGE_SIZE);
1134 if (map->sections_nb == map->sections_nb_alloc) {
1135 map->sections_nb_alloc = MAX(map->sections_nb_alloc * 2, 16);
1136 map->sections = g_renew(MemoryRegionSection, map->sections,
1137 map->sections_nb_alloc);
1139 map->sections[map->sections_nb] = *section;
1140 memory_region_ref(section->mr);
1141 return map->sections_nb++;
1144 static void phys_section_destroy(MemoryRegion *mr)
1146 bool have_sub_page = mr->subpage;
1148 memory_region_unref(mr);
1150 if (have_sub_page) {
1151 subpage_t *subpage = container_of(mr, subpage_t, iomem);
1152 object_unref(OBJECT(&subpage->iomem));
1153 g_free(subpage);
1157 static void phys_sections_free(PhysPageMap *map)
1159 while (map->sections_nb > 0) {
1160 MemoryRegionSection *section = &map->sections[--map->sections_nb];
1161 phys_section_destroy(section->mr);
1163 g_free(map->sections);
1164 g_free(map->nodes);
1167 static void register_subpage(AddressSpaceDispatch *d, MemoryRegionSection *section)
1169 subpage_t *subpage;
1170 hwaddr base = section->offset_within_address_space
1171 & TARGET_PAGE_MASK;
1172 MemoryRegionSection *existing = phys_page_find(d->phys_map, base,
1173 d->map.nodes, d->map.sections);
1174 MemoryRegionSection subsection = {
1175 .offset_within_address_space = base,
1176 .size = int128_make64(TARGET_PAGE_SIZE),
1178 hwaddr start, end;
1180 assert(existing->mr->subpage || existing->mr == &io_mem_unassigned);
1182 if (!(existing->mr->subpage)) {
1183 subpage = subpage_init(d->as, base);
1184 subsection.address_space = d->as;
1185 subsection.mr = &subpage->iomem;
1186 phys_page_set(d, base >> TARGET_PAGE_BITS, 1,
1187 phys_section_add(&d->map, &subsection));
1188 } else {
1189 subpage = container_of(existing->mr, subpage_t, iomem);
1191 start = section->offset_within_address_space & ~TARGET_PAGE_MASK;
1192 end = start + int128_get64(section->size) - 1;
1193 subpage_register(subpage, start, end,
1194 phys_section_add(&d->map, section));
1198 static void register_multipage(AddressSpaceDispatch *d,
1199 MemoryRegionSection *section)
1201 hwaddr start_addr = section->offset_within_address_space;
1202 uint16_t section_index = phys_section_add(&d->map, section);
1203 uint64_t num_pages = int128_get64(int128_rshift(section->size,
1204 TARGET_PAGE_BITS));
1206 assert(num_pages);
1207 phys_page_set(d, start_addr >> TARGET_PAGE_BITS, num_pages, section_index);
1210 static void mem_add(MemoryListener *listener, MemoryRegionSection *section)
1212 AddressSpace *as = container_of(listener, AddressSpace, dispatch_listener);
1213 AddressSpaceDispatch *d = as->next_dispatch;
1214 MemoryRegionSection now = *section, remain = *section;
1215 Int128 page_size = int128_make64(TARGET_PAGE_SIZE);
1217 if (now.offset_within_address_space & ~TARGET_PAGE_MASK) {
1218 uint64_t left = TARGET_PAGE_ALIGN(now.offset_within_address_space)
1219 - now.offset_within_address_space;
1221 now.size = int128_min(int128_make64(left), now.size);
1222 register_subpage(d, &now);
1223 } else {
1224 now.size = int128_zero();
1226 while (int128_ne(remain.size, now.size)) {
1227 remain.size = int128_sub(remain.size, now.size);
1228 remain.offset_within_address_space += int128_get64(now.size);
1229 remain.offset_within_region += int128_get64(now.size);
1230 now = remain;
1231 if (int128_lt(remain.size, page_size)) {
1232 register_subpage(d, &now);
1233 } else if (remain.offset_within_address_space & ~TARGET_PAGE_MASK) {
1234 now.size = page_size;
1235 register_subpage(d, &now);
1236 } else {
1237 now.size = int128_and(now.size, int128_neg(page_size));
1238 register_multipage(d, &now);
1243 void qemu_flush_coalesced_mmio_buffer(void)
1245 if (kvm_enabled())
1246 kvm_flush_coalesced_mmio_buffer();
1249 void qemu_mutex_lock_ramlist(void)
1251 qemu_mutex_lock(&ram_list.mutex);
1254 void qemu_mutex_unlock_ramlist(void)
1256 qemu_mutex_unlock(&ram_list.mutex);
1259 #ifdef __linux__
1260 static int64_t get_file_size(int fd)
1262 int64_t size = lseek(fd, 0, SEEK_END);
1263 if (size < 0) {
1264 return -errno;
1266 return size;
1269 static void *file_ram_alloc(RAMBlock *block,
1270 ram_addr_t memory,
1271 const char *path,
1272 Error **errp)
1274 bool unlink_on_error = false;
1275 char *filename;
1276 char *sanitized_name;
1277 char *c;
1278 void *area = MAP_FAILED;
1279 int fd = -1;
1280 int64_t file_size;
1282 if (kvm_enabled() && !kvm_has_sync_mmu()) {
1283 error_setg(errp,
1284 "host lacks kvm mmu notifiers, -mem-path unsupported");
1285 return NULL;
1288 for (;;) {
1289 fd = open(path, O_RDWR);
1290 if (fd >= 0) {
1291 /* @path names an existing file, use it */
1292 break;
1294 if (errno == ENOENT) {
1295 /* @path names a file that doesn't exist, create it */
1296 fd = open(path, O_RDWR | O_CREAT | O_EXCL, 0644);
1297 if (fd >= 0) {
1298 unlink_on_error = true;
1299 break;
1301 } else if (errno == EISDIR) {
1302 /* @path names a directory, create a file there */
1303 /* Make name safe to use with mkstemp by replacing '/' with '_'. */
1304 sanitized_name = g_strdup(memory_region_name(block->mr));
1305 for (c = sanitized_name; *c != '\0'; c++) {
1306 if (*c == '/') {
1307 *c = '_';
1311 filename = g_strdup_printf("%s/qemu_back_mem.%s.XXXXXX", path,
1312 sanitized_name);
1313 g_free(sanitized_name);
1315 fd = mkstemp(filename);
1316 if (fd >= 0) {
1317 unlink(filename);
1318 g_free(filename);
1319 break;
1321 g_free(filename);
1323 if (errno != EEXIST && errno != EINTR) {
1324 error_setg_errno(errp, errno,
1325 "can't open backing store %s for guest RAM",
1326 path);
1327 goto error;
1330 * Try again on EINTR and EEXIST. The latter happens when
1331 * something else creates the file between our two open().
1335 block->page_size = qemu_fd_getpagesize(fd);
1336 block->mr->align = block->page_size;
1337 #if defined(__s390x__)
1338 if (kvm_enabled()) {
1339 block->mr->align = MAX(block->mr->align, QEMU_VMALLOC_ALIGN);
1341 #endif
1343 file_size = get_file_size(fd);
1345 if (memory < block->page_size) {
1346 error_setg(errp, "memory size 0x" RAM_ADDR_FMT " must be equal to "
1347 "or larger than page size 0x%zx",
1348 memory, block->page_size);
1349 goto error;
1352 if (file_size > 0 && file_size < memory) {
1353 error_setg(errp, "backing store %s size 0x%" PRIx64
1354 " does not match 'size' option 0x" RAM_ADDR_FMT,
1355 path, file_size, memory);
1356 goto error;
1359 memory = ROUND_UP(memory, block->page_size);
1362 * ftruncate is not supported by hugetlbfs in older
1363 * hosts, so don't bother bailing out on errors.
1364 * If anything goes wrong with it under other filesystems,
1365 * mmap will fail.
1367 * Do not truncate the non-empty backend file to avoid corrupting
1368 * the existing data in the file. Disabling shrinking is not
1369 * enough. For example, the current vNVDIMM implementation stores
1370 * the guest NVDIMM labels at the end of the backend file. If the
1371 * backend file is later extended, QEMU will not be able to find
1372 * those labels. Therefore, extending the non-empty backend file
1373 * is disabled as well.
1375 if (!file_size && ftruncate(fd, memory)) {
1376 perror("ftruncate");
1379 area = qemu_ram_mmap(fd, memory, block->mr->align,
1380 block->flags & RAM_SHARED);
1381 if (area == MAP_FAILED) {
1382 error_setg_errno(errp, errno,
1383 "unable to map backing store for guest RAM");
1384 goto error;
1387 if (mem_prealloc) {
1388 os_mem_prealloc(fd, area, memory, errp);
1389 if (errp && *errp) {
1390 goto error;
1394 block->fd = fd;
1395 return area;
1397 error:
1398 if (area != MAP_FAILED) {
1399 qemu_ram_munmap(area, memory);
1401 if (unlink_on_error) {
1402 unlink(path);
1404 if (fd != -1) {
1405 close(fd);
1407 return NULL;
1409 #endif
1411 /* Called with the ramlist lock held. */
1412 static ram_addr_t find_ram_offset(ram_addr_t size)
1414 RAMBlock *block, *next_block;
1415 ram_addr_t offset = RAM_ADDR_MAX, mingap = RAM_ADDR_MAX;
1417 assert(size != 0); /* it would hand out same offset multiple times */
1419 if (QLIST_EMPTY_RCU(&ram_list.blocks)) {
1420 return 0;
1423 QLIST_FOREACH_RCU(block, &ram_list.blocks, next) {
1424 ram_addr_t end, next = RAM_ADDR_MAX;
1426 end = block->offset + block->max_length;
1428 QLIST_FOREACH_RCU(next_block, &ram_list.blocks, next) {
1429 if (next_block->offset >= end) {
1430 next = MIN(next, next_block->offset);
1433 if (next - end >= size && next - end < mingap) {
1434 offset = end;
1435 mingap = next - end;
1439 if (offset == RAM_ADDR_MAX) {
1440 fprintf(stderr, "Failed to find gap of requested size: %" PRIu64 "\n",
1441 (uint64_t)size);
1442 abort();
1445 return offset;
1448 ram_addr_t last_ram_offset(void)
1450 RAMBlock *block;
1451 ram_addr_t last = 0;
1453 rcu_read_lock();
1454 QLIST_FOREACH_RCU(block, &ram_list.blocks, next) {
1455 last = MAX(last, block->offset + block->max_length);
1457 rcu_read_unlock();
1458 return last;
1461 static void qemu_ram_setup_dump(void *addr, ram_addr_t size)
1463 int ret;
1465 /* Use MADV_DONTDUMP, if user doesn't want the guest memory in the core */
1466 if (!machine_dump_guest_core(current_machine)) {
1467 ret = qemu_madvise(addr, size, QEMU_MADV_DONTDUMP);
1468 if (ret) {
1469 perror("qemu_madvise");
1470 fprintf(stderr, "madvise doesn't support MADV_DONTDUMP, "
1471 "but dump_guest_core=off specified\n");
1476 const char *qemu_ram_get_idstr(RAMBlock *rb)
1478 return rb->idstr;
1481 /* Called with iothread lock held. */
1482 void qemu_ram_set_idstr(RAMBlock *new_block, const char *name, DeviceState *dev)
1484 RAMBlock *block;
1486 assert(new_block);
1487 assert(!new_block->idstr[0]);
1489 if (dev) {
1490 char *id = qdev_get_dev_path(dev);
1491 if (id) {
1492 snprintf(new_block->idstr, sizeof(new_block->idstr), "%s/", id);
1493 g_free(id);
1496 pstrcat(new_block->idstr, sizeof(new_block->idstr), name);
1498 rcu_read_lock();
1499 QLIST_FOREACH_RCU(block, &ram_list.blocks, next) {
1500 if (block != new_block &&
1501 !strcmp(block->idstr, new_block->idstr)) {
1502 fprintf(stderr, "RAMBlock \"%s\" already registered, abort!\n",
1503 new_block->idstr);
1504 abort();
1507 rcu_read_unlock();
1510 /* Called with iothread lock held. */
1511 void qemu_ram_unset_idstr(RAMBlock *block)
1513 /* FIXME: arch_init.c assumes that this is not called throughout
1514 * migration. Ignore the problem since hot-unplug during migration
1515 * does not work anyway.
1517 if (block) {
1518 memset(block->idstr, 0, sizeof(block->idstr));
1522 size_t qemu_ram_pagesize(RAMBlock *rb)
1524 return rb->page_size;
1527 /* Returns the largest size of page in use */
1528 size_t qemu_ram_pagesize_largest(void)
1530 RAMBlock *block;
1531 size_t largest = 0;
1533 QLIST_FOREACH_RCU(block, &ram_list.blocks, next) {
1534 largest = MAX(largest, qemu_ram_pagesize(block));
1537 return largest;
1540 static int memory_try_enable_merging(void *addr, size_t len)
1542 if (!machine_mem_merge(current_machine)) {
1543 /* disabled by the user */
1544 return 0;
1547 return qemu_madvise(addr, len, QEMU_MADV_MERGEABLE);
1550 /* Only legal before guest might have detected the memory size: e.g. on
1551 * incoming migration, or right after reset.
1553 * As memory core doesn't know how is memory accessed, it is up to
1554 * resize callback to update device state and/or add assertions to detect
1555 * misuse, if necessary.
1557 int qemu_ram_resize(RAMBlock *block, ram_addr_t newsize, Error **errp)
1559 assert(block);
1561 newsize = HOST_PAGE_ALIGN(newsize);
1563 if (block->used_length == newsize) {
1564 return 0;
1567 if (!(block->flags & RAM_RESIZEABLE)) {
1568 error_setg_errno(errp, EINVAL,
1569 "Length mismatch: %s: 0x" RAM_ADDR_FMT
1570 " in != 0x" RAM_ADDR_FMT, block->idstr,
1571 newsize, block->used_length);
1572 return -EINVAL;
1575 if (block->max_length < newsize) {
1576 error_setg_errno(errp, EINVAL,
1577 "Length too large: %s: 0x" RAM_ADDR_FMT
1578 " > 0x" RAM_ADDR_FMT, block->idstr,
1579 newsize, block->max_length);
1580 return -EINVAL;
1583 cpu_physical_memory_clear_dirty_range(block->offset, block->used_length);
1584 block->used_length = newsize;
1585 cpu_physical_memory_set_dirty_range(block->offset, block->used_length,
1586 DIRTY_CLIENTS_ALL);
1587 memory_region_set_size(block->mr, newsize);
1588 if (block->resized) {
1589 block->resized(block->idstr, newsize, block->host);
1591 return 0;
1594 /* Called with ram_list.mutex held */
1595 static void dirty_memory_extend(ram_addr_t old_ram_size,
1596 ram_addr_t new_ram_size)
1598 ram_addr_t old_num_blocks = DIV_ROUND_UP(old_ram_size,
1599 DIRTY_MEMORY_BLOCK_SIZE);
1600 ram_addr_t new_num_blocks = DIV_ROUND_UP(new_ram_size,
1601 DIRTY_MEMORY_BLOCK_SIZE);
1602 int i;
1604 /* Only need to extend if block count increased */
1605 if (new_num_blocks <= old_num_blocks) {
1606 return;
1609 for (i = 0; i < DIRTY_MEMORY_NUM; i++) {
1610 DirtyMemoryBlocks *old_blocks;
1611 DirtyMemoryBlocks *new_blocks;
1612 int j;
1614 old_blocks = atomic_rcu_read(&ram_list.dirty_memory[i]);
1615 new_blocks = g_malloc(sizeof(*new_blocks) +
1616 sizeof(new_blocks->blocks[0]) * new_num_blocks);
1618 if (old_num_blocks) {
1619 memcpy(new_blocks->blocks, old_blocks->blocks,
1620 old_num_blocks * sizeof(old_blocks->blocks[0]));
1623 for (j = old_num_blocks; j < new_num_blocks; j++) {
1624 new_blocks->blocks[j] = bitmap_new(DIRTY_MEMORY_BLOCK_SIZE);
1627 atomic_rcu_set(&ram_list.dirty_memory[i], new_blocks);
1629 if (old_blocks) {
1630 g_free_rcu(old_blocks, rcu);
1635 static void ram_block_add(RAMBlock *new_block, Error **errp)
1637 RAMBlock *block;
1638 RAMBlock *last_block = NULL;
1639 ram_addr_t old_ram_size, new_ram_size;
1640 Error *err = NULL;
1642 old_ram_size = last_ram_offset() >> TARGET_PAGE_BITS;
1644 qemu_mutex_lock_ramlist();
1645 new_block->offset = find_ram_offset(new_block->max_length);
1647 if (!new_block->host) {
1648 if (xen_enabled()) {
1649 xen_ram_alloc(new_block->offset, new_block->max_length,
1650 new_block->mr, &err);
1651 if (err) {
1652 error_propagate(errp, err);
1653 qemu_mutex_unlock_ramlist();
1654 return;
1656 } else {
1657 new_block->host = phys_mem_alloc(new_block->max_length,
1658 &new_block->mr->align);
1659 if (!new_block->host) {
1660 error_setg_errno(errp, errno,
1661 "cannot set up guest memory '%s'",
1662 memory_region_name(new_block->mr));
1663 qemu_mutex_unlock_ramlist();
1664 return;
1666 memory_try_enable_merging(new_block->host, new_block->max_length);
1670 new_ram_size = MAX(old_ram_size,
1671 (new_block->offset + new_block->max_length) >> TARGET_PAGE_BITS);
1672 if (new_ram_size > old_ram_size) {
1673 migration_bitmap_extend(old_ram_size, new_ram_size);
1674 dirty_memory_extend(old_ram_size, new_ram_size);
1676 /* Keep the list sorted from biggest to smallest block. Unlike QTAILQ,
1677 * QLIST (which has an RCU-friendly variant) does not have insertion at
1678 * tail, so save the last element in last_block.
1680 QLIST_FOREACH_RCU(block, &ram_list.blocks, next) {
1681 last_block = block;
1682 if (block->max_length < new_block->max_length) {
1683 break;
1686 if (block) {
1687 QLIST_INSERT_BEFORE_RCU(block, new_block, next);
1688 } else if (last_block) {
1689 QLIST_INSERT_AFTER_RCU(last_block, new_block, next);
1690 } else { /* list is empty */
1691 QLIST_INSERT_HEAD_RCU(&ram_list.blocks, new_block, next);
1693 ram_list.mru_block = NULL;
1695 /* Write list before version */
1696 smp_wmb();
1697 ram_list.version++;
1698 qemu_mutex_unlock_ramlist();
1700 cpu_physical_memory_set_dirty_range(new_block->offset,
1701 new_block->used_length,
1702 DIRTY_CLIENTS_ALL);
1704 if (new_block->host) {
1705 qemu_ram_setup_dump(new_block->host, new_block->max_length);
1706 qemu_madvise(new_block->host, new_block->max_length, QEMU_MADV_HUGEPAGE);
1707 /* MADV_DONTFORK is also needed by KVM in absence of synchronous MMU */
1708 qemu_madvise(new_block->host, new_block->max_length, QEMU_MADV_DONTFORK);
1709 ram_block_notify_add(new_block->host, new_block->max_length);
1713 #ifdef __linux__
1714 RAMBlock *qemu_ram_alloc_from_file(ram_addr_t size, MemoryRegion *mr,
1715 bool share, const char *mem_path,
1716 Error **errp)
1718 RAMBlock *new_block;
1719 Error *local_err = NULL;
1721 if (xen_enabled()) {
1722 error_setg(errp, "-mem-path not supported with Xen");
1723 return NULL;
1726 if (phys_mem_alloc != qemu_anon_ram_alloc) {
1728 * file_ram_alloc() needs to allocate just like
1729 * phys_mem_alloc, but we haven't bothered to provide
1730 * a hook there.
1732 error_setg(errp,
1733 "-mem-path not supported with this accelerator");
1734 return NULL;
1737 size = HOST_PAGE_ALIGN(size);
1738 new_block = g_malloc0(sizeof(*new_block));
1739 new_block->mr = mr;
1740 new_block->used_length = size;
1741 new_block->max_length = size;
1742 new_block->flags = share ? RAM_SHARED : 0;
1743 new_block->host = file_ram_alloc(new_block, size,
1744 mem_path, errp);
1745 if (!new_block->host) {
1746 g_free(new_block);
1747 return NULL;
1750 ram_block_add(new_block, &local_err);
1751 if (local_err) {
1752 g_free(new_block);
1753 error_propagate(errp, local_err);
1754 return NULL;
1756 return new_block;
1758 #endif
1760 static
1761 RAMBlock *qemu_ram_alloc_internal(ram_addr_t size, ram_addr_t max_size,
1762 void (*resized)(const char*,
1763 uint64_t length,
1764 void *host),
1765 void *host, bool resizeable,
1766 MemoryRegion *mr, Error **errp)
1768 RAMBlock *new_block;
1769 Error *local_err = NULL;
1771 size = HOST_PAGE_ALIGN(size);
1772 max_size = HOST_PAGE_ALIGN(max_size);
1773 new_block = g_malloc0(sizeof(*new_block));
1774 new_block->mr = mr;
1775 new_block->resized = resized;
1776 new_block->used_length = size;
1777 new_block->max_length = max_size;
1778 assert(max_size >= size);
1779 new_block->fd = -1;
1780 new_block->page_size = getpagesize();
1781 new_block->host = host;
1782 if (host) {
1783 new_block->flags |= RAM_PREALLOC;
1785 if (resizeable) {
1786 new_block->flags |= RAM_RESIZEABLE;
1788 ram_block_add(new_block, &local_err);
1789 if (local_err) {
1790 g_free(new_block);
1791 error_propagate(errp, local_err);
1792 return NULL;
1794 return new_block;
1797 RAMBlock *qemu_ram_alloc_from_ptr(ram_addr_t size, void *host,
1798 MemoryRegion *mr, Error **errp)
1800 return qemu_ram_alloc_internal(size, size, NULL, host, false, mr, errp);
1803 RAMBlock *qemu_ram_alloc(ram_addr_t size, MemoryRegion *mr, Error **errp)
1805 return qemu_ram_alloc_internal(size, size, NULL, NULL, false, mr, errp);
1808 RAMBlock *qemu_ram_alloc_resizeable(ram_addr_t size, ram_addr_t maxsz,
1809 void (*resized)(const char*,
1810 uint64_t length,
1811 void *host),
1812 MemoryRegion *mr, Error **errp)
1814 return qemu_ram_alloc_internal(size, maxsz, resized, NULL, true, mr, errp);
1817 static void reclaim_ramblock(RAMBlock *block)
1819 if (block->flags & RAM_PREALLOC) {
1821 } else if (xen_enabled()) {
1822 xen_invalidate_map_cache_entry(block->host);
1823 #ifndef _WIN32
1824 } else if (block->fd >= 0) {
1825 qemu_ram_munmap(block->host, block->max_length);
1826 close(block->fd);
1827 #endif
1828 } else {
1829 qemu_anon_ram_free(block->host, block->max_length);
1831 g_free(block);
1834 void qemu_ram_free(RAMBlock *block)
1836 if (!block) {
1837 return;
1840 if (block->host) {
1841 ram_block_notify_remove(block->host, block->max_length);
1844 qemu_mutex_lock_ramlist();
1845 QLIST_REMOVE_RCU(block, next);
1846 ram_list.mru_block = NULL;
1847 /* Write list before version */
1848 smp_wmb();
1849 ram_list.version++;
1850 call_rcu(block, reclaim_ramblock, rcu);
1851 qemu_mutex_unlock_ramlist();
1854 #ifndef _WIN32
1855 void qemu_ram_remap(ram_addr_t addr, ram_addr_t length)
1857 RAMBlock *block;
1858 ram_addr_t offset;
1859 int flags;
1860 void *area, *vaddr;
1862 QLIST_FOREACH_RCU(block, &ram_list.blocks, next) {
1863 offset = addr - block->offset;
1864 if (offset < block->max_length) {
1865 vaddr = ramblock_ptr(block, offset);
1866 if (block->flags & RAM_PREALLOC) {
1868 } else if (xen_enabled()) {
1869 abort();
1870 } else {
1871 flags = MAP_FIXED;
1872 if (block->fd >= 0) {
1873 flags |= (block->flags & RAM_SHARED ?
1874 MAP_SHARED : MAP_PRIVATE);
1875 area = mmap(vaddr, length, PROT_READ | PROT_WRITE,
1876 flags, block->fd, offset);
1877 } else {
1879 * Remap needs to match alloc. Accelerators that
1880 * set phys_mem_alloc never remap. If they did,
1881 * we'd need a remap hook here.
1883 assert(phys_mem_alloc == qemu_anon_ram_alloc);
1885 flags |= MAP_PRIVATE | MAP_ANONYMOUS;
1886 area = mmap(vaddr, length, PROT_READ | PROT_WRITE,
1887 flags, -1, 0);
1889 if (area != vaddr) {
1890 fprintf(stderr, "Could not remap addr: "
1891 RAM_ADDR_FMT "@" RAM_ADDR_FMT "\n",
1892 length, addr);
1893 exit(1);
1895 memory_try_enable_merging(vaddr, length);
1896 qemu_ram_setup_dump(vaddr, length);
1901 #endif /* !_WIN32 */
1903 /* Return a host pointer to ram allocated with qemu_ram_alloc.
1904 * This should not be used for general purpose DMA. Use address_space_map
1905 * or address_space_rw instead. For local memory (e.g. video ram) that the
1906 * device owns, use memory_region_get_ram_ptr.
1908 * Called within RCU critical section.
1910 void *qemu_map_ram_ptr(RAMBlock *ram_block, ram_addr_t addr)
1912 RAMBlock *block = ram_block;
1914 if (block == NULL) {
1915 block = qemu_get_ram_block(addr);
1916 addr -= block->offset;
1919 if (xen_enabled() && block->host == NULL) {
1920 /* We need to check if the requested address is in the RAM
1921 * because we don't want to map the entire memory in QEMU.
1922 * In that case just map until the end of the page.
1924 if (block->offset == 0) {
1925 return xen_map_cache(addr, 0, 0);
1928 block->host = xen_map_cache(block->offset, block->max_length, 1);
1930 return ramblock_ptr(block, addr);
1933 /* Return a host pointer to guest's ram. Similar to qemu_map_ram_ptr
1934 * but takes a size argument.
1936 * Called within RCU critical section.
1938 static void *qemu_ram_ptr_length(RAMBlock *ram_block, ram_addr_t addr,
1939 hwaddr *size)
1941 RAMBlock *block = ram_block;
1942 if (*size == 0) {
1943 return NULL;
1946 if (block == NULL) {
1947 block = qemu_get_ram_block(addr);
1948 addr -= block->offset;
1950 *size = MIN(*size, block->max_length - addr);
1952 if (xen_enabled() && block->host == NULL) {
1953 /* We need to check if the requested address is in the RAM
1954 * because we don't want to map the entire memory in QEMU.
1955 * In that case just map the requested area.
1957 if (block->offset == 0) {
1958 return xen_map_cache(addr, *size, 1);
1961 block->host = xen_map_cache(block->offset, block->max_length, 1);
1964 return ramblock_ptr(block, addr);
1968 * Translates a host ptr back to a RAMBlock, a ram_addr and an offset
1969 * in that RAMBlock.
1971 * ptr: Host pointer to look up
1972 * round_offset: If true round the result offset down to a page boundary
1973 * *ram_addr: set to result ram_addr
1974 * *offset: set to result offset within the RAMBlock
1976 * Returns: RAMBlock (or NULL if not found)
1978 * By the time this function returns, the returned pointer is not protected
1979 * by RCU anymore. If the caller is not within an RCU critical section and
1980 * does not hold the iothread lock, it must have other means of protecting the
1981 * pointer, such as a reference to the region that includes the incoming
1982 * ram_addr_t.
1984 RAMBlock *qemu_ram_block_from_host(void *ptr, bool round_offset,
1985 ram_addr_t *offset)
1987 RAMBlock *block;
1988 uint8_t *host = ptr;
1990 if (xen_enabled()) {
1991 ram_addr_t ram_addr;
1992 rcu_read_lock();
1993 ram_addr = xen_ram_addr_from_mapcache(ptr);
1994 block = qemu_get_ram_block(ram_addr);
1995 if (block) {
1996 *offset = ram_addr - block->offset;
1998 rcu_read_unlock();
1999 return block;
2002 rcu_read_lock();
2003 block = atomic_rcu_read(&ram_list.mru_block);
2004 if (block && block->host && host - block->host < block->max_length) {
2005 goto found;
2008 QLIST_FOREACH_RCU(block, &ram_list.blocks, next) {
2009 /* This case append when the block is not mapped. */
2010 if (block->host == NULL) {
2011 continue;
2013 if (host - block->host < block->max_length) {
2014 goto found;
2018 rcu_read_unlock();
2019 return NULL;
2021 found:
2022 *offset = (host - block->host);
2023 if (round_offset) {
2024 *offset &= TARGET_PAGE_MASK;
2026 rcu_read_unlock();
2027 return block;
2031 * Finds the named RAMBlock
2033 * name: The name of RAMBlock to find
2035 * Returns: RAMBlock (or NULL if not found)
2037 RAMBlock *qemu_ram_block_by_name(const char *name)
2039 RAMBlock *block;
2041 QLIST_FOREACH_RCU(block, &ram_list.blocks, next) {
2042 if (!strcmp(name, block->idstr)) {
2043 return block;
2047 return NULL;
2050 /* Some of the softmmu routines need to translate from a host pointer
2051 (typically a TLB entry) back to a ram offset. */
2052 ram_addr_t qemu_ram_addr_from_host(void *ptr)
2054 RAMBlock *block;
2055 ram_addr_t offset;
2057 block = qemu_ram_block_from_host(ptr, false, &offset);
2058 if (!block) {
2059 return RAM_ADDR_INVALID;
2062 return block->offset + offset;
2065 /* Called within RCU critical section. */
2066 static void notdirty_mem_write(void *opaque, hwaddr ram_addr,
2067 uint64_t val, unsigned size)
2069 bool locked = false;
2071 if (!cpu_physical_memory_get_dirty_flag(ram_addr, DIRTY_MEMORY_CODE)) {
2072 locked = true;
2073 tb_lock();
2074 tb_invalidate_phys_page_fast(ram_addr, size);
2076 switch (size) {
2077 case 1:
2078 stb_p(qemu_map_ram_ptr(NULL, ram_addr), val);
2079 break;
2080 case 2:
2081 stw_p(qemu_map_ram_ptr(NULL, ram_addr), val);
2082 break;
2083 case 4:
2084 stl_p(qemu_map_ram_ptr(NULL, ram_addr), val);
2085 break;
2086 default:
2087 abort();
2090 if (locked) {
2091 tb_unlock();
2094 /* Set both VGA and migration bits for simplicity and to remove
2095 * the notdirty callback faster.
2097 cpu_physical_memory_set_dirty_range(ram_addr, size,
2098 DIRTY_CLIENTS_NOCODE);
2099 /* we remove the notdirty callback only if the code has been
2100 flushed */
2101 if (!cpu_physical_memory_is_clean(ram_addr)) {
2102 tlb_set_dirty(current_cpu, current_cpu->mem_io_vaddr);
2106 static bool notdirty_mem_accepts(void *opaque, hwaddr addr,
2107 unsigned size, bool is_write)
2109 return is_write;
2112 static const MemoryRegionOps notdirty_mem_ops = {
2113 .write = notdirty_mem_write,
2114 .valid.accepts = notdirty_mem_accepts,
2115 .endianness = DEVICE_NATIVE_ENDIAN,
2118 /* Generate a debug exception if a watchpoint has been hit. */
2119 static void check_watchpoint(int offset, int len, MemTxAttrs attrs, int flags)
2121 CPUState *cpu = current_cpu;
2122 CPUClass *cc = CPU_GET_CLASS(cpu);
2123 CPUArchState *env = cpu->env_ptr;
2124 target_ulong pc, cs_base;
2125 target_ulong vaddr;
2126 CPUWatchpoint *wp;
2127 uint32_t cpu_flags;
2129 if (cpu->watchpoint_hit) {
2130 /* We re-entered the check after replacing the TB. Now raise
2131 * the debug interrupt so that is will trigger after the
2132 * current instruction. */
2133 cpu_interrupt(cpu, CPU_INTERRUPT_DEBUG);
2134 return;
2136 vaddr = (cpu->mem_io_vaddr & TARGET_PAGE_MASK) + offset;
2137 vaddr = cc->adjust_watchpoint_address(cpu, vaddr, len);
2138 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
2139 if (cpu_watchpoint_address_matches(wp, vaddr, len)
2140 && (wp->flags & flags)) {
2141 if (flags == BP_MEM_READ) {
2142 wp->flags |= BP_WATCHPOINT_HIT_READ;
2143 } else {
2144 wp->flags |= BP_WATCHPOINT_HIT_WRITE;
2146 wp->hitaddr = vaddr;
2147 wp->hitattrs = attrs;
2148 if (!cpu->watchpoint_hit) {
2149 if (wp->flags & BP_CPU &&
2150 !cc->debug_check_watchpoint(cpu, wp)) {
2151 wp->flags &= ~BP_WATCHPOINT_HIT;
2152 continue;
2154 cpu->watchpoint_hit = wp;
2156 /* Both tb_lock and iothread_mutex will be reset when
2157 * cpu_loop_exit or cpu_loop_exit_noexc longjmp
2158 * back into the cpu_exec main loop.
2160 tb_lock();
2161 tb_check_watchpoint(cpu);
2162 if (wp->flags & BP_STOP_BEFORE_ACCESS) {
2163 cpu->exception_index = EXCP_DEBUG;
2164 cpu_loop_exit(cpu);
2165 } else {
2166 cpu_get_tb_cpu_state(env, &pc, &cs_base, &cpu_flags);
2167 tb_gen_code(cpu, pc, cs_base, cpu_flags, 1);
2168 cpu_loop_exit_noexc(cpu);
2171 } else {
2172 wp->flags &= ~BP_WATCHPOINT_HIT;
2177 /* Watchpoint access routines. Watchpoints are inserted using TLB tricks,
2178 so these check for a hit then pass through to the normal out-of-line
2179 phys routines. */
2180 static MemTxResult watch_mem_read(void *opaque, hwaddr addr, uint64_t *pdata,
2181 unsigned size, MemTxAttrs attrs)
2183 MemTxResult res;
2184 uint64_t data;
2185 int asidx = cpu_asidx_from_attrs(current_cpu, attrs);
2186 AddressSpace *as = current_cpu->cpu_ases[asidx].as;
2188 check_watchpoint(addr & ~TARGET_PAGE_MASK, size, attrs, BP_MEM_READ);
2189 switch (size) {
2190 case 1:
2191 data = address_space_ldub(as, addr, attrs, &res);
2192 break;
2193 case 2:
2194 data = address_space_lduw(as, addr, attrs, &res);
2195 break;
2196 case 4:
2197 data = address_space_ldl(as, addr, attrs, &res);
2198 break;
2199 default: abort();
2201 *pdata = data;
2202 return res;
2205 static MemTxResult watch_mem_write(void *opaque, hwaddr addr,
2206 uint64_t val, unsigned size,
2207 MemTxAttrs attrs)
2209 MemTxResult res;
2210 int asidx = cpu_asidx_from_attrs(current_cpu, attrs);
2211 AddressSpace *as = current_cpu->cpu_ases[asidx].as;
2213 check_watchpoint(addr & ~TARGET_PAGE_MASK, size, attrs, BP_MEM_WRITE);
2214 switch (size) {
2215 case 1:
2216 address_space_stb(as, addr, val, attrs, &res);
2217 break;
2218 case 2:
2219 address_space_stw(as, addr, val, attrs, &res);
2220 break;
2221 case 4:
2222 address_space_stl(as, addr, val, attrs, &res);
2223 break;
2224 default: abort();
2226 return res;
2229 static const MemoryRegionOps watch_mem_ops = {
2230 .read_with_attrs = watch_mem_read,
2231 .write_with_attrs = watch_mem_write,
2232 .endianness = DEVICE_NATIVE_ENDIAN,
2235 static MemTxResult subpage_read(void *opaque, hwaddr addr, uint64_t *data,
2236 unsigned len, MemTxAttrs attrs)
2238 subpage_t *subpage = opaque;
2239 uint8_t buf[8];
2240 MemTxResult res;
2242 #if defined(DEBUG_SUBPAGE)
2243 printf("%s: subpage %p len %u addr " TARGET_FMT_plx "\n", __func__,
2244 subpage, len, addr);
2245 #endif
2246 res = address_space_read(subpage->as, addr + subpage->base,
2247 attrs, buf, len);
2248 if (res) {
2249 return res;
2251 switch (len) {
2252 case 1:
2253 *data = ldub_p(buf);
2254 return MEMTX_OK;
2255 case 2:
2256 *data = lduw_p(buf);
2257 return MEMTX_OK;
2258 case 4:
2259 *data = ldl_p(buf);
2260 return MEMTX_OK;
2261 case 8:
2262 *data = ldq_p(buf);
2263 return MEMTX_OK;
2264 default:
2265 abort();
2269 static MemTxResult subpage_write(void *opaque, hwaddr addr,
2270 uint64_t value, unsigned len, MemTxAttrs attrs)
2272 subpage_t *subpage = opaque;
2273 uint8_t buf[8];
2275 #if defined(DEBUG_SUBPAGE)
2276 printf("%s: subpage %p len %u addr " TARGET_FMT_plx
2277 " value %"PRIx64"\n",
2278 __func__, subpage, len, addr, value);
2279 #endif
2280 switch (len) {
2281 case 1:
2282 stb_p(buf, value);
2283 break;
2284 case 2:
2285 stw_p(buf, value);
2286 break;
2287 case 4:
2288 stl_p(buf, value);
2289 break;
2290 case 8:
2291 stq_p(buf, value);
2292 break;
2293 default:
2294 abort();
2296 return address_space_write(subpage->as, addr + subpage->base,
2297 attrs, buf, len);
2300 static bool subpage_accepts(void *opaque, hwaddr addr,
2301 unsigned len, bool is_write)
2303 subpage_t *subpage = opaque;
2304 #if defined(DEBUG_SUBPAGE)
2305 printf("%s: subpage %p %c len %u addr " TARGET_FMT_plx "\n",
2306 __func__, subpage, is_write ? 'w' : 'r', len, addr);
2307 #endif
2309 return address_space_access_valid(subpage->as, addr + subpage->base,
2310 len, is_write);
2313 static const MemoryRegionOps subpage_ops = {
2314 .read_with_attrs = subpage_read,
2315 .write_with_attrs = subpage_write,
2316 .impl.min_access_size = 1,
2317 .impl.max_access_size = 8,
2318 .valid.min_access_size = 1,
2319 .valid.max_access_size = 8,
2320 .valid.accepts = subpage_accepts,
2321 .endianness = DEVICE_NATIVE_ENDIAN,
2324 static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end,
2325 uint16_t section)
2327 int idx, eidx;
2329 if (start >= TARGET_PAGE_SIZE || end >= TARGET_PAGE_SIZE)
2330 return -1;
2331 idx = SUBPAGE_IDX(start);
2332 eidx = SUBPAGE_IDX(end);
2333 #if defined(DEBUG_SUBPAGE)
2334 printf("%s: %p start %08x end %08x idx %08x eidx %08x section %d\n",
2335 __func__, mmio, start, end, idx, eidx, section);
2336 #endif
2337 for (; idx <= eidx; idx++) {
2338 mmio->sub_section[idx] = section;
2341 return 0;
2344 static subpage_t *subpage_init(AddressSpace *as, hwaddr base)
2346 subpage_t *mmio;
2348 mmio = g_malloc0(sizeof(subpage_t) + TARGET_PAGE_SIZE * sizeof(uint16_t));
2349 mmio->as = as;
2350 mmio->base = base;
2351 memory_region_init_io(&mmio->iomem, NULL, &subpage_ops, mmio,
2352 NULL, TARGET_PAGE_SIZE);
2353 mmio->iomem.subpage = true;
2354 #if defined(DEBUG_SUBPAGE)
2355 printf("%s: %p base " TARGET_FMT_plx " len %08x\n", __func__,
2356 mmio, base, TARGET_PAGE_SIZE);
2357 #endif
2358 subpage_register(mmio, 0, TARGET_PAGE_SIZE-1, PHYS_SECTION_UNASSIGNED);
2360 return mmio;
2363 static uint16_t dummy_section(PhysPageMap *map, AddressSpace *as,
2364 MemoryRegion *mr)
2366 assert(as);
2367 MemoryRegionSection section = {
2368 .address_space = as,
2369 .mr = mr,
2370 .offset_within_address_space = 0,
2371 .offset_within_region = 0,
2372 .size = int128_2_64(),
2375 return phys_section_add(map, &section);
2378 MemoryRegion *iotlb_to_region(CPUState *cpu, hwaddr index, MemTxAttrs attrs)
2380 int asidx = cpu_asidx_from_attrs(cpu, attrs);
2381 CPUAddressSpace *cpuas = &cpu->cpu_ases[asidx];
2382 AddressSpaceDispatch *d = atomic_rcu_read(&cpuas->memory_dispatch);
2383 MemoryRegionSection *sections = d->map.sections;
2385 return sections[index & ~TARGET_PAGE_MASK].mr;
2388 static void io_mem_init(void)
2390 memory_region_init_io(&io_mem_rom, NULL, &unassigned_mem_ops, NULL, NULL, UINT64_MAX);
2391 memory_region_init_io(&io_mem_unassigned, NULL, &unassigned_mem_ops, NULL,
2392 NULL, UINT64_MAX);
2394 /* io_mem_notdirty calls tb_invalidate_phys_page_fast,
2395 * which can be called without the iothread mutex.
2397 memory_region_init_io(&io_mem_notdirty, NULL, &notdirty_mem_ops, NULL,
2398 NULL, UINT64_MAX);
2399 memory_region_clear_global_locking(&io_mem_notdirty);
2401 memory_region_init_io(&io_mem_watch, NULL, &watch_mem_ops, NULL,
2402 NULL, UINT64_MAX);
2405 static void mem_begin(MemoryListener *listener)
2407 AddressSpace *as = container_of(listener, AddressSpace, dispatch_listener);
2408 AddressSpaceDispatch *d = g_new0(AddressSpaceDispatch, 1);
2409 uint16_t n;
2411 n = dummy_section(&d->map, as, &io_mem_unassigned);
2412 assert(n == PHYS_SECTION_UNASSIGNED);
2413 n = dummy_section(&d->map, as, &io_mem_notdirty);
2414 assert(n == PHYS_SECTION_NOTDIRTY);
2415 n = dummy_section(&d->map, as, &io_mem_rom);
2416 assert(n == PHYS_SECTION_ROM);
2417 n = dummy_section(&d->map, as, &io_mem_watch);
2418 assert(n == PHYS_SECTION_WATCH);
2420 d->phys_map = (PhysPageEntry) { .ptr = PHYS_MAP_NODE_NIL, .skip = 1 };
2421 d->as = as;
2422 as->next_dispatch = d;
2425 static void address_space_dispatch_free(AddressSpaceDispatch *d)
2427 phys_sections_free(&d->map);
2428 g_free(d);
2431 static void mem_commit(MemoryListener *listener)
2433 AddressSpace *as = container_of(listener, AddressSpace, dispatch_listener);
2434 AddressSpaceDispatch *cur = as->dispatch;
2435 AddressSpaceDispatch *next = as->next_dispatch;
2437 phys_page_compact_all(next, next->map.nodes_nb);
2439 atomic_rcu_set(&as->dispatch, next);
2440 if (cur) {
2441 call_rcu(cur, address_space_dispatch_free, rcu);
2445 static void tcg_commit(MemoryListener *listener)
2447 CPUAddressSpace *cpuas;
2448 AddressSpaceDispatch *d;
2450 /* since each CPU stores ram addresses in its TLB cache, we must
2451 reset the modified entries */
2452 cpuas = container_of(listener, CPUAddressSpace, tcg_as_listener);
2453 cpu_reloading_memory_map();
2454 /* The CPU and TLB are protected by the iothread lock.
2455 * We reload the dispatch pointer now because cpu_reloading_memory_map()
2456 * may have split the RCU critical section.
2458 d = atomic_rcu_read(&cpuas->as->dispatch);
2459 atomic_rcu_set(&cpuas->memory_dispatch, d);
2460 tlb_flush(cpuas->cpu);
2463 void address_space_init_dispatch(AddressSpace *as)
2465 as->dispatch = NULL;
2466 as->dispatch_listener = (MemoryListener) {
2467 .begin = mem_begin,
2468 .commit = mem_commit,
2469 .region_add = mem_add,
2470 .region_nop = mem_add,
2471 .priority = 0,
2473 memory_listener_register(&as->dispatch_listener, as);
2476 void address_space_unregister(AddressSpace *as)
2478 memory_listener_unregister(&as->dispatch_listener);
2481 void address_space_destroy_dispatch(AddressSpace *as)
2483 AddressSpaceDispatch *d = as->dispatch;
2485 atomic_rcu_set(&as->dispatch, NULL);
2486 if (d) {
2487 call_rcu(d, address_space_dispatch_free, rcu);
2491 static void memory_map_init(void)
2493 system_memory = g_malloc(sizeof(*system_memory));
2495 memory_region_init(system_memory, NULL, "system", UINT64_MAX);
2496 address_space_init(&address_space_memory, system_memory, "memory");
2498 system_io = g_malloc(sizeof(*system_io));
2499 memory_region_init_io(system_io, NULL, &unassigned_io_ops, NULL, "io",
2500 65536);
2501 address_space_init(&address_space_io, system_io, "I/O");
2504 MemoryRegion *get_system_memory(void)
2506 return system_memory;
2509 MemoryRegion *get_system_io(void)
2511 return system_io;
2514 #endif /* !defined(CONFIG_USER_ONLY) */
2516 /* physical memory access (slow version, mainly for debug) */
2517 #if defined(CONFIG_USER_ONLY)
2518 int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
2519 uint8_t *buf, int len, int is_write)
2521 int l, flags;
2522 target_ulong page;
2523 void * p;
2525 while (len > 0) {
2526 page = addr & TARGET_PAGE_MASK;
2527 l = (page + TARGET_PAGE_SIZE) - addr;
2528 if (l > len)
2529 l = len;
2530 flags = page_get_flags(page);
2531 if (!(flags & PAGE_VALID))
2532 return -1;
2533 if (is_write) {
2534 if (!(flags & PAGE_WRITE))
2535 return -1;
2536 /* XXX: this code should not depend on lock_user */
2537 if (!(p = lock_user(VERIFY_WRITE, addr, l, 0)))
2538 return -1;
2539 memcpy(p, buf, l);
2540 unlock_user(p, addr, l);
2541 } else {
2542 if (!(flags & PAGE_READ))
2543 return -1;
2544 /* XXX: this code should not depend on lock_user */
2545 if (!(p = lock_user(VERIFY_READ, addr, l, 1)))
2546 return -1;
2547 memcpy(buf, p, l);
2548 unlock_user(p, addr, 0);
2550 len -= l;
2551 buf += l;
2552 addr += l;
2554 return 0;
2557 #else
2559 static void invalidate_and_set_dirty(MemoryRegion *mr, hwaddr addr,
2560 hwaddr length)
2562 uint8_t dirty_log_mask = memory_region_get_dirty_log_mask(mr);
2563 addr += memory_region_get_ram_addr(mr);
2565 /* No early return if dirty_log_mask is or becomes 0, because
2566 * cpu_physical_memory_set_dirty_range will still call
2567 * xen_modified_memory.
2569 if (dirty_log_mask) {
2570 dirty_log_mask =
2571 cpu_physical_memory_range_includes_clean(addr, length, dirty_log_mask);
2573 if (dirty_log_mask & (1 << DIRTY_MEMORY_CODE)) {
2574 tb_lock();
2575 tb_invalidate_phys_range(addr, addr + length);
2576 tb_unlock();
2577 dirty_log_mask &= ~(1 << DIRTY_MEMORY_CODE);
2579 cpu_physical_memory_set_dirty_range(addr, length, dirty_log_mask);
2582 static int memory_access_size(MemoryRegion *mr, unsigned l, hwaddr addr)
2584 unsigned access_size_max = mr->ops->valid.max_access_size;
2586 /* Regions are assumed to support 1-4 byte accesses unless
2587 otherwise specified. */
2588 if (access_size_max == 0) {
2589 access_size_max = 4;
2592 /* Bound the maximum access by the alignment of the address. */
2593 if (!mr->ops->impl.unaligned) {
2594 unsigned align_size_max = addr & -addr;
2595 if (align_size_max != 0 && align_size_max < access_size_max) {
2596 access_size_max = align_size_max;
2600 /* Don't attempt accesses larger than the maximum. */
2601 if (l > access_size_max) {
2602 l = access_size_max;
2604 l = pow2floor(l);
2606 return l;
2609 static bool prepare_mmio_access(MemoryRegion *mr)
2611 bool unlocked = !qemu_mutex_iothread_locked();
2612 bool release_lock = false;
2614 if (unlocked && mr->global_locking) {
2615 qemu_mutex_lock_iothread();
2616 unlocked = false;
2617 release_lock = true;
2619 if (mr->flush_coalesced_mmio) {
2620 if (unlocked) {
2621 qemu_mutex_lock_iothread();
2623 qemu_flush_coalesced_mmio_buffer();
2624 if (unlocked) {
2625 qemu_mutex_unlock_iothread();
2629 return release_lock;
2632 /* Called within RCU critical section. */
2633 static MemTxResult address_space_write_continue(AddressSpace *as, hwaddr addr,
2634 MemTxAttrs attrs,
2635 const uint8_t *buf,
2636 int len, hwaddr addr1,
2637 hwaddr l, MemoryRegion *mr)
2639 uint8_t *ptr;
2640 uint64_t val;
2641 MemTxResult result = MEMTX_OK;
2642 bool release_lock = false;
2644 for (;;) {
2645 if (!memory_access_is_direct(mr, true)) {
2646 release_lock |= prepare_mmio_access(mr);
2647 l = memory_access_size(mr, l, addr1);
2648 /* XXX: could force current_cpu to NULL to avoid
2649 potential bugs */
2650 switch (l) {
2651 case 8:
2652 /* 64 bit write access */
2653 val = ldq_p(buf);
2654 result |= memory_region_dispatch_write(mr, addr1, val, 8,
2655 attrs);
2656 break;
2657 case 4:
2658 /* 32 bit write access */
2659 val = (uint32_t)ldl_p(buf);
2660 result |= memory_region_dispatch_write(mr, addr1, val, 4,
2661 attrs);
2662 break;
2663 case 2:
2664 /* 16 bit write access */
2665 val = lduw_p(buf);
2666 result |= memory_region_dispatch_write(mr, addr1, val, 2,
2667 attrs);
2668 break;
2669 case 1:
2670 /* 8 bit write access */
2671 val = ldub_p(buf);
2672 result |= memory_region_dispatch_write(mr, addr1, val, 1,
2673 attrs);
2674 break;
2675 default:
2676 abort();
2678 } else {
2679 /* RAM case */
2680 ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
2681 memcpy(ptr, buf, l);
2682 invalidate_and_set_dirty(mr, addr1, l);
2685 if (release_lock) {
2686 qemu_mutex_unlock_iothread();
2687 release_lock = false;
2690 len -= l;
2691 buf += l;
2692 addr += l;
2694 if (!len) {
2695 break;
2698 l = len;
2699 mr = address_space_translate(as, addr, &addr1, &l, true);
2702 return result;
2705 MemTxResult address_space_write(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,
2706 const uint8_t *buf, int len)
2708 hwaddr l;
2709 hwaddr addr1;
2710 MemoryRegion *mr;
2711 MemTxResult result = MEMTX_OK;
2713 if (len > 0) {
2714 rcu_read_lock();
2715 l = len;
2716 mr = address_space_translate(as, addr, &addr1, &l, true);
2717 result = address_space_write_continue(as, addr, attrs, buf, len,
2718 addr1, l, mr);
2719 rcu_read_unlock();
2722 return result;
2725 /* Called within RCU critical section. */
2726 MemTxResult address_space_read_continue(AddressSpace *as, hwaddr addr,
2727 MemTxAttrs attrs, uint8_t *buf,
2728 int len, hwaddr addr1, hwaddr l,
2729 MemoryRegion *mr)
2731 uint8_t *ptr;
2732 uint64_t val;
2733 MemTxResult result = MEMTX_OK;
2734 bool release_lock = false;
2736 for (;;) {
2737 if (!memory_access_is_direct(mr, false)) {
2738 /* I/O case */
2739 release_lock |= prepare_mmio_access(mr);
2740 l = memory_access_size(mr, l, addr1);
2741 switch (l) {
2742 case 8:
2743 /* 64 bit read access */
2744 result |= memory_region_dispatch_read(mr, addr1, &val, 8,
2745 attrs);
2746 stq_p(buf, val);
2747 break;
2748 case 4:
2749 /* 32 bit read access */
2750 result |= memory_region_dispatch_read(mr, addr1, &val, 4,
2751 attrs);
2752 stl_p(buf, val);
2753 break;
2754 case 2:
2755 /* 16 bit read access */
2756 result |= memory_region_dispatch_read(mr, addr1, &val, 2,
2757 attrs);
2758 stw_p(buf, val);
2759 break;
2760 case 1:
2761 /* 8 bit read access */
2762 result |= memory_region_dispatch_read(mr, addr1, &val, 1,
2763 attrs);
2764 stb_p(buf, val);
2765 break;
2766 default:
2767 abort();
2769 } else {
2770 /* RAM case */
2771 ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
2772 memcpy(buf, ptr, l);
2775 if (release_lock) {
2776 qemu_mutex_unlock_iothread();
2777 release_lock = false;
2780 len -= l;
2781 buf += l;
2782 addr += l;
2784 if (!len) {
2785 break;
2788 l = len;
2789 mr = address_space_translate(as, addr, &addr1, &l, false);
2792 return result;
2795 MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr,
2796 MemTxAttrs attrs, uint8_t *buf, int len)
2798 hwaddr l;
2799 hwaddr addr1;
2800 MemoryRegion *mr;
2801 MemTxResult result = MEMTX_OK;
2803 if (len > 0) {
2804 rcu_read_lock();
2805 l = len;
2806 mr = address_space_translate(as, addr, &addr1, &l, false);
2807 result = address_space_read_continue(as, addr, attrs, buf, len,
2808 addr1, l, mr);
2809 rcu_read_unlock();
2812 return result;
2815 MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,
2816 uint8_t *buf, int len, bool is_write)
2818 if (is_write) {
2819 return address_space_write(as, addr, attrs, (uint8_t *)buf, len);
2820 } else {
2821 return address_space_read(as, addr, attrs, (uint8_t *)buf, len);
2825 void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf,
2826 int len, int is_write)
2828 address_space_rw(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED,
2829 buf, len, is_write);
2832 enum write_rom_type {
2833 WRITE_DATA,
2834 FLUSH_CACHE,
2837 static inline void cpu_physical_memory_write_rom_internal(AddressSpace *as,
2838 hwaddr addr, const uint8_t *buf, int len, enum write_rom_type type)
2840 hwaddr l;
2841 uint8_t *ptr;
2842 hwaddr addr1;
2843 MemoryRegion *mr;
2845 rcu_read_lock();
2846 while (len > 0) {
2847 l = len;
2848 mr = address_space_translate(as, addr, &addr1, &l, true);
2850 if (!(memory_region_is_ram(mr) ||
2851 memory_region_is_romd(mr))) {
2852 l = memory_access_size(mr, l, addr1);
2853 } else {
2854 /* ROM/RAM case */
2855 ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
2856 switch (type) {
2857 case WRITE_DATA:
2858 memcpy(ptr, buf, l);
2859 invalidate_and_set_dirty(mr, addr1, l);
2860 break;
2861 case FLUSH_CACHE:
2862 flush_icache_range((uintptr_t)ptr, (uintptr_t)ptr + l);
2863 break;
2866 len -= l;
2867 buf += l;
2868 addr += l;
2870 rcu_read_unlock();
2873 /* used for ROM loading : can write in RAM and ROM */
2874 void cpu_physical_memory_write_rom(AddressSpace *as, hwaddr addr,
2875 const uint8_t *buf, int len)
2877 cpu_physical_memory_write_rom_internal(as, addr, buf, len, WRITE_DATA);
2880 void cpu_flush_icache_range(hwaddr start, int len)
2883 * This function should do the same thing as an icache flush that was
2884 * triggered from within the guest. For TCG we are always cache coherent,
2885 * so there is no need to flush anything. For KVM / Xen we need to flush
2886 * the host's instruction cache at least.
2888 if (tcg_enabled()) {
2889 return;
2892 cpu_physical_memory_write_rom_internal(&address_space_memory,
2893 start, NULL, len, FLUSH_CACHE);
2896 typedef struct {
2897 MemoryRegion *mr;
2898 void *buffer;
2899 hwaddr addr;
2900 hwaddr len;
2901 bool in_use;
2902 } BounceBuffer;
2904 static BounceBuffer bounce;
2906 typedef struct MapClient {
2907 QEMUBH *bh;
2908 QLIST_ENTRY(MapClient) link;
2909 } MapClient;
2911 QemuMutex map_client_list_lock;
2912 static QLIST_HEAD(map_client_list, MapClient) map_client_list
2913 = QLIST_HEAD_INITIALIZER(map_client_list);
2915 static void cpu_unregister_map_client_do(MapClient *client)
2917 QLIST_REMOVE(client, link);
2918 g_free(client);
2921 static void cpu_notify_map_clients_locked(void)
2923 MapClient *client;
2925 while (!QLIST_EMPTY(&map_client_list)) {
2926 client = QLIST_FIRST(&map_client_list);
2927 qemu_bh_schedule(client->bh);
2928 cpu_unregister_map_client_do(client);
2932 void cpu_register_map_client(QEMUBH *bh)
2934 MapClient *client = g_malloc(sizeof(*client));
2936 qemu_mutex_lock(&map_client_list_lock);
2937 client->bh = bh;
2938 QLIST_INSERT_HEAD(&map_client_list, client, link);
2939 if (!atomic_read(&bounce.in_use)) {
2940 cpu_notify_map_clients_locked();
2942 qemu_mutex_unlock(&map_client_list_lock);
2945 void cpu_exec_init_all(void)
2947 qemu_mutex_init(&ram_list.mutex);
2948 /* The data structures we set up here depend on knowing the page size,
2949 * so no more changes can be made after this point.
2950 * In an ideal world, nothing we did before we had finished the
2951 * machine setup would care about the target page size, and we could
2952 * do this much later, rather than requiring board models to state
2953 * up front what their requirements are.
2955 finalize_target_page_bits();
2956 io_mem_init();
2957 memory_map_init();
2958 qemu_mutex_init(&map_client_list_lock);
2961 void cpu_unregister_map_client(QEMUBH *bh)
2963 MapClient *client;
2965 qemu_mutex_lock(&map_client_list_lock);
2966 QLIST_FOREACH(client, &map_client_list, link) {
2967 if (client->bh == bh) {
2968 cpu_unregister_map_client_do(client);
2969 break;
2972 qemu_mutex_unlock(&map_client_list_lock);
2975 static void cpu_notify_map_clients(void)
2977 qemu_mutex_lock(&map_client_list_lock);
2978 cpu_notify_map_clients_locked();
2979 qemu_mutex_unlock(&map_client_list_lock);
2982 bool address_space_access_valid(AddressSpace *as, hwaddr addr, int len, bool is_write)
2984 MemoryRegion *mr;
2985 hwaddr l, xlat;
2987 rcu_read_lock();
2988 while (len > 0) {
2989 l = len;
2990 mr = address_space_translate(as, addr, &xlat, &l, is_write);
2991 if (!memory_access_is_direct(mr, is_write)) {
2992 l = memory_access_size(mr, l, addr);
2993 if (!memory_region_access_valid(mr, xlat, l, is_write)) {
2994 rcu_read_unlock();
2995 return false;
2999 len -= l;
3000 addr += l;
3002 rcu_read_unlock();
3003 return true;
3006 static hwaddr
3007 address_space_extend_translation(AddressSpace *as, hwaddr addr, hwaddr target_len,
3008 MemoryRegion *mr, hwaddr base, hwaddr len,
3009 bool is_write)
3011 hwaddr done = 0;
3012 hwaddr xlat;
3013 MemoryRegion *this_mr;
3015 for (;;) {
3016 target_len -= len;
3017 addr += len;
3018 done += len;
3019 if (target_len == 0) {
3020 return done;
3023 len = target_len;
3024 this_mr = address_space_translate(as, addr, &xlat, &len, is_write);
3025 if (this_mr != mr || xlat != base + done) {
3026 return done;
3031 /* Map a physical memory region into a host virtual address.
3032 * May map a subset of the requested range, given by and returned in *plen.
3033 * May return NULL if resources needed to perform the mapping are exhausted.
3034 * Use only for reads OR writes - not for read-modify-write operations.
3035 * Use cpu_register_map_client() to know when retrying the map operation is
3036 * likely to succeed.
3038 void *address_space_map(AddressSpace *as,
3039 hwaddr addr,
3040 hwaddr *plen,
3041 bool is_write)
3043 hwaddr len = *plen;
3044 hwaddr l, xlat;
3045 MemoryRegion *mr;
3046 void *ptr;
3048 if (len == 0) {
3049 return NULL;
3052 l = len;
3053 rcu_read_lock();
3054 mr = address_space_translate(as, addr, &xlat, &l, is_write);
3056 if (!memory_access_is_direct(mr, is_write)) {
3057 if (atomic_xchg(&bounce.in_use, true)) {
3058 rcu_read_unlock();
3059 return NULL;
3061 /* Avoid unbounded allocations */
3062 l = MIN(l, TARGET_PAGE_SIZE);
3063 bounce.buffer = qemu_memalign(TARGET_PAGE_SIZE, l);
3064 bounce.addr = addr;
3065 bounce.len = l;
3067 memory_region_ref(mr);
3068 bounce.mr = mr;
3069 if (!is_write) {
3070 address_space_read(as, addr, MEMTXATTRS_UNSPECIFIED,
3071 bounce.buffer, l);
3074 rcu_read_unlock();
3075 *plen = l;
3076 return bounce.buffer;
3080 memory_region_ref(mr);
3081 *plen = address_space_extend_translation(as, addr, len, mr, xlat, l, is_write);
3082 ptr = qemu_ram_ptr_length(mr->ram_block, xlat, plen);
3083 rcu_read_unlock();
3085 return ptr;
3088 /* Unmaps a memory region previously mapped by address_space_map().
3089 * Will also mark the memory as dirty if is_write == 1. access_len gives
3090 * the amount of memory that was actually read or written by the caller.
3092 void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len,
3093 int is_write, hwaddr access_len)
3095 if (buffer != bounce.buffer) {
3096 MemoryRegion *mr;
3097 ram_addr_t addr1;
3099 mr = memory_region_from_host(buffer, &addr1);
3100 assert(mr != NULL);
3101 if (is_write) {
3102 invalidate_and_set_dirty(mr, addr1, access_len);
3104 if (xen_enabled()) {
3105 xen_invalidate_map_cache_entry(buffer);
3107 memory_region_unref(mr);
3108 return;
3110 if (is_write) {
3111 address_space_write(as, bounce.addr, MEMTXATTRS_UNSPECIFIED,
3112 bounce.buffer, access_len);
3114 qemu_vfree(bounce.buffer);
3115 bounce.buffer = NULL;
3116 memory_region_unref(bounce.mr);
3117 atomic_mb_set(&bounce.in_use, false);
3118 cpu_notify_map_clients();
3121 void *cpu_physical_memory_map(hwaddr addr,
3122 hwaddr *plen,
3123 int is_write)
3125 return address_space_map(&address_space_memory, addr, plen, is_write);
3128 void cpu_physical_memory_unmap(void *buffer, hwaddr len,
3129 int is_write, hwaddr access_len)
3131 return address_space_unmap(&address_space_memory, buffer, len, is_write, access_len);
3134 #define ARG1_DECL AddressSpace *as
3135 #define ARG1 as
3136 #define SUFFIX
3137 #define TRANSLATE(...) address_space_translate(as, __VA_ARGS__)
3138 #define IS_DIRECT(mr, is_write) memory_access_is_direct(mr, is_write)
3139 #define MAP_RAM(mr, ofs) qemu_map_ram_ptr((mr)->ram_block, ofs)
3140 #define INVALIDATE(mr, ofs, len) invalidate_and_set_dirty(mr, ofs, len)
3141 #define RCU_READ_LOCK(...) rcu_read_lock()
3142 #define RCU_READ_UNLOCK(...) rcu_read_unlock()
3143 #include "memory_ldst.inc.c"
3145 int64_t address_space_cache_init(MemoryRegionCache *cache,
3146 AddressSpace *as,
3147 hwaddr addr,
3148 hwaddr len,
3149 bool is_write)
3151 hwaddr l, xlat;
3152 MemoryRegion *mr;
3153 void *ptr;
3155 assert(len > 0);
3157 l = len;
3158 mr = address_space_translate(as, addr, &xlat, &l, is_write);
3159 if (!memory_access_is_direct(mr, is_write)) {
3160 return -EINVAL;
3163 l = address_space_extend_translation(as, addr, len, mr, xlat, l, is_write);
3164 ptr = qemu_ram_ptr_length(mr->ram_block, xlat, &l);
3166 cache->xlat = xlat;
3167 cache->is_write = is_write;
3168 cache->mr = mr;
3169 cache->ptr = ptr;
3170 cache->len = l;
3171 memory_region_ref(cache->mr);
3173 return l;
3176 void address_space_cache_invalidate(MemoryRegionCache *cache,
3177 hwaddr addr,
3178 hwaddr access_len)
3180 assert(cache->is_write);
3181 invalidate_and_set_dirty(cache->mr, addr + cache->xlat, access_len);
3184 void address_space_cache_destroy(MemoryRegionCache *cache)
3186 if (!cache->mr) {
3187 return;
3190 if (xen_enabled()) {
3191 xen_invalidate_map_cache_entry(cache->ptr);
3193 memory_region_unref(cache->mr);
3194 cache->mr = NULL;
3197 /* Called from RCU critical section. This function has the same
3198 * semantics as address_space_translate, but it only works on a
3199 * predefined range of a MemoryRegion that was mapped with
3200 * address_space_cache_init.
3202 static inline MemoryRegion *address_space_translate_cached(
3203 MemoryRegionCache *cache, hwaddr addr, hwaddr *xlat,
3204 hwaddr *plen, bool is_write)
3206 assert(addr < cache->len && *plen <= cache->len - addr);
3207 *xlat = addr + cache->xlat;
3208 return cache->mr;
3211 #define ARG1_DECL MemoryRegionCache *cache
3212 #define ARG1 cache
3213 #define SUFFIX _cached
3214 #define TRANSLATE(...) address_space_translate_cached(cache, __VA_ARGS__)
3215 #define IS_DIRECT(mr, is_write) true
3216 #define MAP_RAM(mr, ofs) (cache->ptr + (ofs - cache->xlat))
3217 #define INVALIDATE(mr, ofs, len) ((void)0)
3218 #define RCU_READ_LOCK() ((void)0)
3219 #define RCU_READ_UNLOCK() ((void)0)
3220 #include "memory_ldst.inc.c"
3222 /* virtual memory access for debug (includes writing to ROM) */
3223 int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
3224 uint8_t *buf, int len, int is_write)
3226 int l;
3227 hwaddr phys_addr;
3228 target_ulong page;
3230 while (len > 0) {
3231 int asidx;
3232 MemTxAttrs attrs;
3234 page = addr & TARGET_PAGE_MASK;
3235 phys_addr = cpu_get_phys_page_attrs_debug(cpu, page, &attrs);
3236 asidx = cpu_asidx_from_attrs(cpu, attrs);
3237 /* if no physical page mapped, return an error */
3238 if (phys_addr == -1)
3239 return -1;
3240 l = (page + TARGET_PAGE_SIZE) - addr;
3241 if (l > len)
3242 l = len;
3243 phys_addr += (addr & ~TARGET_PAGE_MASK);
3244 if (is_write) {
3245 cpu_physical_memory_write_rom(cpu->cpu_ases[asidx].as,
3246 phys_addr, buf, l);
3247 } else {
3248 address_space_rw(cpu->cpu_ases[asidx].as, phys_addr,
3249 MEMTXATTRS_UNSPECIFIED,
3250 buf, l, 0);
3252 len -= l;
3253 buf += l;
3254 addr += l;
3256 return 0;
3260 * Allows code that needs to deal with migration bitmaps etc to still be built
3261 * target independent.
3263 size_t qemu_target_page_bits(void)
3265 return TARGET_PAGE_BITS;
3268 #endif
3271 * A helper function for the _utterly broken_ virtio device model to find out if
3272 * it's running on a big endian machine. Don't do this at home kids!
3274 bool target_words_bigendian(void);
3275 bool target_words_bigendian(void)
3277 #if defined(TARGET_WORDS_BIGENDIAN)
3278 return true;
3279 #else
3280 return false;
3281 #endif
3284 #ifndef CONFIG_USER_ONLY
3285 bool cpu_physical_memory_is_io(hwaddr phys_addr)
3287 MemoryRegion*mr;
3288 hwaddr l = 1;
3289 bool res;
3291 rcu_read_lock();
3292 mr = address_space_translate(&address_space_memory,
3293 phys_addr, &phys_addr, &l, false);
3295 res = !(memory_region_is_ram(mr) || memory_region_is_romd(mr));
3296 rcu_read_unlock();
3297 return res;
3300 int qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque)
3302 RAMBlock *block;
3303 int ret = 0;
3305 rcu_read_lock();
3306 QLIST_FOREACH_RCU(block, &ram_list.blocks, next) {
3307 ret = func(block->idstr, block->host, block->offset,
3308 block->used_length, opaque);
3309 if (ret) {
3310 break;
3313 rcu_read_unlock();
3314 return ret;
3318 * Unmap pages of memory from start to start+length such that
3319 * they a) read as 0, b) Trigger whatever fault mechanism
3320 * the OS provides for postcopy.
3321 * The pages must be unmapped by the end of the function.
3322 * Returns: 0 on success, none-0 on failure
3325 int ram_block_discard_range(RAMBlock *rb, uint64_t start, size_t length)
3327 int ret = -1;
3329 uint8_t *host_startaddr = rb->host + start;
3331 if ((uintptr_t)host_startaddr & (rb->page_size - 1)) {
3332 error_report("ram_block_discard_range: Unaligned start address: %p",
3333 host_startaddr);
3334 goto err;
3337 if ((start + length) <= rb->used_length) {
3338 uint8_t *host_endaddr = host_startaddr + length;
3339 if ((uintptr_t)host_endaddr & (rb->page_size - 1)) {
3340 error_report("ram_block_discard_range: Unaligned end address: %p",
3341 host_endaddr);
3342 goto err;
3345 errno = ENOTSUP; /* If we are missing MADVISE etc */
3347 if (rb->page_size == qemu_host_page_size) {
3348 #if defined(CONFIG_MADVISE)
3349 /* Note: We need the madvise MADV_DONTNEED behaviour of definitely
3350 * freeing the page.
3352 ret = madvise(host_startaddr, length, MADV_DONTNEED);
3353 #endif
3354 } else {
3355 /* Huge page case - unfortunately it can't do DONTNEED, but
3356 * it can do the equivalent by FALLOC_FL_PUNCH_HOLE in the
3357 * huge page file.
3359 #ifdef CONFIG_FALLOCATE_PUNCH_HOLE
3360 ret = fallocate(rb->fd, FALLOC_FL_PUNCH_HOLE | FALLOC_FL_KEEP_SIZE,
3361 start, length);
3362 #endif
3364 if (ret) {
3365 ret = -errno;
3366 error_report("ram_block_discard_range: Failed to discard range "
3367 "%s:%" PRIx64 " +%zx (%d)",
3368 rb->idstr, start, length, ret);
3370 } else {
3371 error_report("ram_block_discard_range: Overrun block '%s' (%" PRIu64
3372 "/%zx/" RAM_ADDR_FMT")",
3373 rb->idstr, start, length, rb->used_length);
3376 err:
3377 return ret;
3380 #endif