tcg/tcg.h

   1 /*
   2  * Tiny Code Generator for QEMU
   3  *
   4  * Copyright (c) 2008 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #ifndef TCG_H
  26 #define TCG_H
  27
  28 #include "qemu-common.h"
  29 #include "qemu/bitops.h"
  30 #include "tcg-target.h"
  31
  32 #define CPU_TEMP_BUF_NLONGS 128
  33
  34 /* Default target word size to pointer size.  */
  35 #ifndef TCG_TARGET_REG_BITS
  36 # if UINTPTR_MAX == UINT32_MAX
  37 #  define TCG_TARGET_REG_BITS 32
  38 # elif UINTPTR_MAX == UINT64_MAX
  39 #  define TCG_TARGET_REG_BITS 64
  40 # else
  41 #  error Unknown pointer size for tcg target
  42 # endif
  43 #endif
  44
  45 #if TCG_TARGET_REG_BITS == 32
  46 typedef int32_t tcg_target_long;
  47 typedef uint32_t tcg_target_ulong;
  48 #define TCG_PRIlx PRIx32
  49 #define TCG_PRIld PRId32
  50 #elif TCG_TARGET_REG_BITS == 64
  51 typedef int64_t tcg_target_long;
  52 typedef uint64_t tcg_target_ulong;
  53 #define TCG_PRIlx PRIx64
  54 #define TCG_PRIld PRId64
  55 #else
  56 #error unsupported
  57 #endif
  58
  59 #if TCG_TARGET_NB_REGS <= 32
  60 typedef uint32_t TCGRegSet;
  61 #elif TCG_TARGET_NB_REGS <= 64
  62 typedef uint64_t TCGRegSet;
  63 #else
  64 #error unsupported
  65 #endif
  66
  67 #if TCG_TARGET_REG_BITS == 32
  68 /* Turn some undef macros into false macros.  */
  69 #define TCG_TARGET_HAS_trunc_shr_i32    0
  70 #define TCG_TARGET_HAS_div_i64          0
  71 #define TCG_TARGET_HAS_rem_i64          0
  72 #define TCG_TARGET_HAS_div2_i64         0
  73 #define TCG_TARGET_HAS_rot_i64          0
  74 #define TCG_TARGET_HAS_ext8s_i64        0
  75 #define TCG_TARGET_HAS_ext16s_i64       0
  76 #define TCG_TARGET_HAS_ext32s_i64       0
  77 #define TCG_TARGET_HAS_ext8u_i64        0
  78 #define TCG_TARGET_HAS_ext16u_i64       0
  79 #define TCG_TARGET_HAS_ext32u_i64       0
  80 #define TCG_TARGET_HAS_bswap16_i64      0
  81 #define TCG_TARGET_HAS_bswap32_i64      0
  82 #define TCG_TARGET_HAS_bswap64_i64      0
  83 #define TCG_TARGET_HAS_neg_i64          0
  84 #define TCG_TARGET_HAS_not_i64          0
  85 #define TCG_TARGET_HAS_andc_i64         0
  86 #define TCG_TARGET_HAS_orc_i64          0
  87 #define TCG_TARGET_HAS_eqv_i64          0
  88 #define TCG_TARGET_HAS_nand_i64         0
  89 #define TCG_TARGET_HAS_nor_i64          0
  90 #define TCG_TARGET_HAS_deposit_i64      0
  91 #define TCG_TARGET_HAS_movcond_i64      0
  92 #define TCG_TARGET_HAS_add2_i64         0
  93 #define TCG_TARGET_HAS_sub2_i64         0
  94 #define TCG_TARGET_HAS_mulu2_i64        0
  95 #define TCG_TARGET_HAS_muls2_i64        0
  96 #define TCG_TARGET_HAS_muluh_i64        0
  97 #define TCG_TARGET_HAS_mulsh_i64        0
  98 /* Turn some undef macros into true macros.  */
  99 #define TCG_TARGET_HAS_add2_i32         1
 100 #define TCG_TARGET_HAS_sub2_i32         1
 101 #endif
 102
 103 #ifndef TCG_TARGET_deposit_i32_valid
 104 #define TCG_TARGET_deposit_i32_valid(ofs, len) 1
 105 #endif
 106 #ifndef TCG_TARGET_deposit_i64_valid
 107 #define TCG_TARGET_deposit_i64_valid(ofs, len) 1
 108 #endif
 109
 110 /* Only one of DIV or DIV2 should be defined.  */
 111 #if defined(TCG_TARGET_HAS_div_i32)
 112 #define TCG_TARGET_HAS_div2_i32         0
 113 #elif defined(TCG_TARGET_HAS_div2_i32)
 114 #define TCG_TARGET_HAS_div_i32          0
 115 #define TCG_TARGET_HAS_rem_i32          0
 116 #endif
 117 #if defined(TCG_TARGET_HAS_div_i64)
 118 #define TCG_TARGET_HAS_div2_i64         0
 119 #elif defined(TCG_TARGET_HAS_div2_i64)
 120 #define TCG_TARGET_HAS_div_i64          0
 121 #define TCG_TARGET_HAS_rem_i64          0
 122 #endif
 123
 124 /* For 32-bit targets, some sort of unsigned widening multiply is required.  */
 125 #if TCG_TARGET_REG_BITS == 32 \
 126     && !(defined(TCG_TARGET_HAS_mulu2_i32) \
 127          || defined(TCG_TARGET_HAS_muluh_i32))
 128 # error "Missing unsigned widening multiply"
 129 #endif
 130
 131 typedef enum TCGOpcode {
 132 #define DEF(name, oargs, iargs, cargs, flags) INDEX_op_ ## name,
 133 #include "tcg-opc.h"
 134 #undef DEF
 135     NB_OPS,
 136 } TCGOpcode;
 137
 138 #define tcg_regset_clear(d) (d) = 0
 139 #define tcg_regset_set(d, s) (d) = (s)
 140 #define tcg_regset_set32(d, reg, val32) (d) |= (val32) << (reg)
 141 #define tcg_regset_set_reg(d, r) (d) |= 1L << (r)
 142 #define tcg_regset_reset_reg(d, r) (d) &= ~(1L << (r))
 143 #define tcg_regset_test_reg(d, r) (((d) >> (r)) & 1)
 144 #define tcg_regset_or(d, a, b) (d) = (a) | (b)
 145 #define tcg_regset_and(d, a, b) (d) = (a) & (b)
 146 #define tcg_regset_andnot(d, a, b) (d) = (a) & ~(b)
 147 #define tcg_regset_not(d, a) (d) = ~(a)
 148
 149 #ifndef TCG_TARGET_INSN_UNIT_SIZE
 150 # error "Missing TCG_TARGET_INSN_UNIT_SIZE"
 151 #elif TCG_TARGET_INSN_UNIT_SIZE == 1
 152 typedef uint8_t tcg_insn_unit;
 153 #elif TCG_TARGET_INSN_UNIT_SIZE == 2
 154 typedef uint16_t tcg_insn_unit;
 155 #elif TCG_TARGET_INSN_UNIT_SIZE == 4
 156 typedef uint32_t tcg_insn_unit;
 157 #elif TCG_TARGET_INSN_UNIT_SIZE == 8
 158 typedef uint64_t tcg_insn_unit;
 159 #else
 160 /* The port better have done this.  */
 161 #endif
 162
 163
 164 typedef struct TCGRelocation {
 165     struct TCGRelocation *next;
 166     int type;
 167     tcg_insn_unit *ptr;
 168     intptr_t addend;
 169 } TCGRelocation;
 170
 171 typedef struct TCGLabel {
 172     unsigned has_value : 1;
 173     unsigned id : 31;
 174     union {
 175         uintptr_t value;
 176         tcg_insn_unit *value_ptr;
 177         TCGRelocation *first_reloc;
 178     } u;
 179 } TCGLabel;
 180
 181 typedef struct TCGPool {
 182     struct TCGPool *next;
 183     int size;
 184     uint8_t data[0] __attribute__ ((aligned));
 185 } TCGPool;
 186
 187 #define TCG_POOL_CHUNK_SIZE 32768
 188
 189 #define TCG_MAX_TEMPS 512
 190
 191 /* when the size of the arguments of a called function is smaller than
 192    this value, they are statically allocated in the TB stack frame */
 193 #define TCG_STATIC_CALL_ARGS_SIZE 128
 194
 195 typedef enum TCGType {
 196     TCG_TYPE_I32,
 197     TCG_TYPE_I64,
 198     TCG_TYPE_COUNT, /* number of different types */
 199
 200     /* An alias for the size of the host register.  */
 201 #if TCG_TARGET_REG_BITS == 32
 202     TCG_TYPE_REG = TCG_TYPE_I32,
 203 #else
 204     TCG_TYPE_REG = TCG_TYPE_I64,
 205 #endif
 206
 207     /* An alias for the size of the native pointer.  */
 208 #if UINTPTR_MAX == UINT32_MAX
 209     TCG_TYPE_PTR = TCG_TYPE_I32,
 210 #else
 211     TCG_TYPE_PTR = TCG_TYPE_I64,
 212 #endif
 213
 214     /* An alias for the size of the target "long", aka register.  */
 215 #if TARGET_LONG_BITS == 64
 216     TCG_TYPE_TL = TCG_TYPE_I64,
 217 #else
 218     TCG_TYPE_TL = TCG_TYPE_I32,
 219 #endif
 220 } TCGType;
 221
 222 /* Constants for qemu_ld and qemu_st for the Memory Operation field.  */
 223 typedef enum TCGMemOp {
 224     MO_8     = 0,
 225     MO_16    = 1,
 226     MO_32    = 2,
 227     MO_64    = 3,
 228     MO_SIZE  = 3,   /* Mask for the above.  */
 229
 230     MO_SIGN  = 4,   /* Sign-extended, otherwise zero-extended.  */
 231
 232     MO_BSWAP = 8,   /* Host reverse endian.  */
 233 #ifdef HOST_WORDS_BIGENDIAN
 234     MO_LE    = MO_BSWAP,
 235     MO_BE    = 0,
 236 #else
 237     MO_LE    = 0,
 238     MO_BE    = MO_BSWAP,
 239 #endif
 240 #ifdef TARGET_WORDS_BIGENDIAN
 241     MO_TE    = MO_BE,
 242 #else
 243     MO_TE    = MO_LE,
 244 #endif
 245
 246     /* MO_UNALN accesses are never checked for alignment.
 247        MO_ALIGN accesses will result in a call to the CPU's
 248        do_unaligned_access hook if the guest address is not aligned.
 249        The default depends on whether the target CPU defines ALIGNED_ONLY.  */
 250     MO_AMASK = 16,
 251 #ifdef ALIGNED_ONLY
 252     MO_ALIGN = 0,
 253     MO_UNALN = MO_AMASK,
 254 #else
 255     MO_ALIGN = MO_AMASK,
 256     MO_UNALN = 0,
 257 #endif
 258
 259     /* Combinations of the above, for ease of use.  */
 260     MO_UB    = MO_8,
 261     MO_UW    = MO_16,
 262     MO_UL    = MO_32,
 263     MO_SB    = MO_SIGN | MO_8,
 264     MO_SW    = MO_SIGN | MO_16,
 265     MO_SL    = MO_SIGN | MO_32,
 266     MO_Q     = MO_64,
 267
 268     MO_LEUW  = MO_LE | MO_UW,
 269     MO_LEUL  = MO_LE | MO_UL,
 270     MO_LESW  = MO_LE | MO_SW,
 271     MO_LESL  = MO_LE | MO_SL,
 272     MO_LEQ   = MO_LE | MO_Q,
 273
 274     MO_BEUW  = MO_BE | MO_UW,
 275     MO_BEUL  = MO_BE | MO_UL,
 276     MO_BESW  = MO_BE | MO_SW,
 277     MO_BESL  = MO_BE | MO_SL,
 278     MO_BEQ   = MO_BE | MO_Q,
 279
 280     MO_TEUW  = MO_TE | MO_UW,
 281     MO_TEUL  = MO_TE | MO_UL,
 282     MO_TESW  = MO_TE | MO_SW,
 283     MO_TESL  = MO_TE | MO_SL,
 284     MO_TEQ   = MO_TE | MO_Q,
 285
 286     MO_SSIZE = MO_SIZE | MO_SIGN,
 287 } TCGMemOp;
 288
 289 typedef tcg_target_ulong TCGArg;
 290
 291 /* Define a type and accessor macros for variables.  Using pointer types
 292    is nice because it gives some level of type safely.  Converting to and
 293    from intptr_t rather than int reduces the number of sign-extension
 294    instructions that get implied on 64-bit hosts.  Users of tcg_gen_* don't
 295    need to know about any of this, and should treat TCGv as an opaque type.
 296    In addition we do typechecking for different types of variables.  TCGv_i32
 297    and TCGv_i64 are 32/64-bit variables respectively.  TCGv and TCGv_ptr
 298    are aliases for target_ulong and host pointer sized values respectively.  */
 299
 300 typedef struct TCGv_i32_d *TCGv_i32;
 301 typedef struct TCGv_i64_d *TCGv_i64;
 302 typedef struct TCGv_ptr_d *TCGv_ptr;
 303
 304 static inline TCGv_i32 QEMU_ARTIFICIAL MAKE_TCGV_I32(intptr_t i)
 305 {
 306     return (TCGv_i32)i;
 307 }
 308
 309 static inline TCGv_i64 QEMU_ARTIFICIAL MAKE_TCGV_I64(intptr_t i)
 310 {
 311     return (TCGv_i64)i;
 312 }
 313
 314 static inline TCGv_ptr QEMU_ARTIFICIAL MAKE_TCGV_PTR(intptr_t i)
 315 {
 316     return (TCGv_ptr)i;
 317 }
 318
 319 static inline intptr_t QEMU_ARTIFICIAL GET_TCGV_I32(TCGv_i32 t)
 320 {
 321     return (intptr_t)t;
 322 }
 323
 324 static inline intptr_t QEMU_ARTIFICIAL GET_TCGV_I64(TCGv_i64 t)
 325 {
 326     return (intptr_t)t;
 327 }
 328
 329 static inline intptr_t QEMU_ARTIFICIAL GET_TCGV_PTR(TCGv_ptr t)
 330 {
 331     return (intptr_t)t;
 332 }
 333
 334 #if TCG_TARGET_REG_BITS == 32
 335 #define TCGV_LOW(t) MAKE_TCGV_I32(GET_TCGV_I64(t))
 336 #define TCGV_HIGH(t) MAKE_TCGV_I32(GET_TCGV_I64(t) + 1)
 337 #endif
 338
 339 #define TCGV_EQUAL_I32(a, b) (GET_TCGV_I32(a) == GET_TCGV_I32(b))
 340 #define TCGV_EQUAL_I64(a, b) (GET_TCGV_I64(a) == GET_TCGV_I64(b))
 341 #define TCGV_EQUAL_PTR(a, b) (GET_TCGV_PTR(a) == GET_TCGV_PTR(b))
 342
 343 /* Dummy definition to avoid compiler warnings.  */
 344 #define TCGV_UNUSED_I32(x) x = MAKE_TCGV_I32(-1)
 345 #define TCGV_UNUSED_I64(x) x = MAKE_TCGV_I64(-1)
 346 #define TCGV_UNUSED_PTR(x) x = MAKE_TCGV_PTR(-1)
 347
 348 #define TCGV_IS_UNUSED_I32(x) (GET_TCGV_I32(x) == -1)
 349 #define TCGV_IS_UNUSED_I64(x) (GET_TCGV_I64(x) == -1)
 350 #define TCGV_IS_UNUSED_PTR(x) (GET_TCGV_PTR(x) == -1)
 351
 352 /* call flags */
 353 /* Helper does not read globals (either directly or through an exception). It
 354    implies TCG_CALL_NO_WRITE_GLOBALS. */
 355 #define TCG_CALL_NO_READ_GLOBALS    0x0010
 356 /* Helper does not write globals */
 357 #define TCG_CALL_NO_WRITE_GLOBALS   0x0020
 358 /* Helper can be safely suppressed if the return value is not used. */
 359 #define TCG_CALL_NO_SIDE_EFFECTS    0x0040
 360
 361 /* convenience version of most used call flags */
 362 #define TCG_CALL_NO_RWG         TCG_CALL_NO_READ_GLOBALS
 363 #define TCG_CALL_NO_WG          TCG_CALL_NO_WRITE_GLOBALS
 364 #define TCG_CALL_NO_SE          TCG_CALL_NO_SIDE_EFFECTS
 365 #define TCG_CALL_NO_RWG_SE      (TCG_CALL_NO_RWG | TCG_CALL_NO_SE)
 366 #define TCG_CALL_NO_WG_SE       (TCG_CALL_NO_WG | TCG_CALL_NO_SE)
 367
 368 /* used to align parameters */
 369 #define TCG_CALL_DUMMY_TCGV     MAKE_TCGV_I32(-1)
 370 #define TCG_CALL_DUMMY_ARG      ((TCGArg)(-1))
 371
 372 /* Conditions.  Note that these are laid out for easy manipulation by
 373    the functions below:
 374      bit 0 is used for inverting;
 375      bit 1 is signed,
 376      bit 2 is unsigned,
 377      bit 3 is used with bit 0 for swapping signed/unsigned.  */
 378 typedef enum {
 379     /* non-signed */
 380     TCG_COND_NEVER  = 0 | 0 | 0 | 0,
 381     TCG_COND_ALWAYS = 0 | 0 | 0 | 1,
 382     TCG_COND_EQ     = 8 | 0 | 0 | 0,
 383     TCG_COND_NE     = 8 | 0 | 0 | 1,
 384     /* signed */
 385     TCG_COND_LT     = 0 | 0 | 2 | 0,
 386     TCG_COND_GE     = 0 | 0 | 2 | 1,
 387     TCG_COND_LE     = 8 | 0 | 2 | 0,
 388     TCG_COND_GT     = 8 | 0 | 2 | 1,
 389     /* unsigned */
 390     TCG_COND_LTU    = 0 | 4 | 0 | 0,
 391     TCG_COND_GEU    = 0 | 4 | 0 | 1,
 392     TCG_COND_LEU    = 8 | 4 | 0 | 0,
 393     TCG_COND_GTU    = 8 | 4 | 0 | 1,
 394 } TCGCond;
 395
 396 /* Invert the sense of the comparison.  */
 397 static inline TCGCond tcg_invert_cond(TCGCond c)
 398 {
 399     return (TCGCond)(c ^ 1);
 400 }
 401
 402 /* Swap the operands in a comparison.  */
 403 static inline TCGCond tcg_swap_cond(TCGCond c)
 404 {
 405     return c & 6 ? (TCGCond)(c ^ 9) : c;
 406 }
 407
 408 /* Create an "unsigned" version of a "signed" comparison.  */
 409 static inline TCGCond tcg_unsigned_cond(TCGCond c)
 410 {
 411     return c & 2 ? (TCGCond)(c ^ 6) : c;
 412 }
 413
 414 /* Must a comparison be considered unsigned?  */
 415 static inline bool is_unsigned_cond(TCGCond c)
 416 {
 417     return (c & 4) != 0;
 418 }
 419
 420 /* Create a "high" version of a double-word comparison.
 421    This removes equality from a LTE or GTE comparison.  */
 422 static inline TCGCond tcg_high_cond(TCGCond c)
 423 {
 424     switch (c) {
 425     case TCG_COND_GE:
 426     case TCG_COND_LE:
 427     case TCG_COND_GEU:
 428     case TCG_COND_LEU:
 429         return (TCGCond)(c ^ 8);
 430     default:
 431         return c;
 432     }
 433 }
 434
 435 typedef enum TCGTempVal {
 436     TEMP_VAL_DEAD,
 437     TEMP_VAL_REG,
 438     TEMP_VAL_MEM,
 439     TEMP_VAL_CONST,
 440 } TCGTempVal;
 441
 442 typedef struct TCGTemp {
 443     unsigned int reg:8;
 444     unsigned int mem_reg:8;
 445     TCGTempVal val_type:8;
 446     TCGType base_type:8;
 447     TCGType type:8;
 448     unsigned int fixed_reg:1;
 449     unsigned int mem_coherent:1;
 450     unsigned int mem_allocated:1;
 451     unsigned int temp_local:1; /* If true, the temp is saved across
 452                                   basic blocks. Otherwise, it is not
 453                                   preserved across basic blocks. */
 454     unsigned int temp_allocated:1; /* never used for code gen */
 455
 456     tcg_target_long val;
 457     intptr_t mem_offset;
 458     const char *name;
 459 } TCGTemp;
 460
 461 typedef struct TCGContext TCGContext;
 462
 463 typedef struct TCGTempSet {
 464     unsigned long l[BITS_TO_LONGS(TCG_MAX_TEMPS)];
 465 } TCGTempSet;
 466
 467 typedef struct TCGOp {
 468     TCGOpcode opc   : 8;
 469
 470     /* The number of out and in parameter for a call.  */
 471     unsigned callo  : 2;
 472     unsigned calli  : 6;
 473
 474     /* Index of the arguments for this op, or -1 for zero-operand ops.  */
 475     signed args     : 16;
 476
 477     /* Index of the prex/next op, or -1 for the end of the list.  */
 478     signed prev     : 16;
 479     signed next     : 16;
 480 } TCGOp;
 481
 482 QEMU_BUILD_BUG_ON(NB_OPS > 0xff);
 483 QEMU_BUILD_BUG_ON(OPC_BUF_SIZE >= 0x7fff);
 484 QEMU_BUILD_BUG_ON(OPPARAM_BUF_SIZE >= 0x7fff);
 485
 486 struct TCGContext {
 487     uint8_t *pool_cur, *pool_end;
 488     TCGPool *pool_first, *pool_current, *pool_first_large;
 489     int nb_labels;
 490     int nb_globals;
 491     int nb_temps;
 492
 493     /* goto_tb support */
 494     tcg_insn_unit *code_buf;
 495     uintptr_t *tb_next;
 496     uint16_t *tb_next_offset;
 497     uint16_t *tb_jmp_offset; /* != NULL if USE_DIRECT_JUMP */
 498
 499     /* liveness analysis */
 500     uint16_t *op_dead_args; /* for each operation, each bit tells if the
 501                                corresponding argument is dead */
 502     uint8_t *op_sync_args;  /* for each operation, each bit tells if the
 503                                corresponding output argument needs to be
 504                                sync to memory. */
 505
 506     TCGRegSet reserved_regs;
 507     intptr_t current_frame_offset;
 508     intptr_t frame_start;
 509     intptr_t frame_end;
 510     int frame_reg;
 511
 512     tcg_insn_unit *code_ptr;
 513
 514     GHashTable *helpers;
 515
 516 #ifdef CONFIG_PROFILER
 517     /* profiling info */
 518     int64_t tb_count1;
 519     int64_t tb_count;
 520     int64_t op_count; /* total insn count */
 521     int op_count_max; /* max insn per TB */
 522     int64_t temp_count;
 523     int temp_count_max;
 524     int64_t del_op_count;
 525     int64_t code_in_len;
 526     int64_t code_out_len;
 527     int64_t interm_time;
 528     int64_t code_time;
 529     int64_t la_time;
 530     int64_t opt_time;
 531     int64_t restore_count;
 532     int64_t restore_time;
 533 #endif
 534
 535 #ifdef CONFIG_DEBUG_TCG
 536     int temps_in_use;
 537     int goto_tb_issue_mask;
 538 #endif
 539
 540     int gen_first_op_idx;
 541     int gen_last_op_idx;
 542     int gen_next_op_idx;
 543     int gen_next_parm_idx;
 544
 545     /* Code generation.  Note that we specifically do not use tcg_insn_unit
 546        here, because there's too much arithmetic throughout that relies
 547        on addition and subtraction working on bytes.  Rely on the GCC
 548        extension that allows arithmetic on void*.  */
 549     int code_gen_max_blocks;
 550     void *code_gen_prologue;
 551     void *code_gen_buffer;
 552     size_t code_gen_buffer_size;
 553     /* threshold to flush the translated code buffer */
 554     size_t code_gen_buffer_max_size;
 555     void *code_gen_ptr;
 556
 557     TBContext tb_ctx;
 558
 559     /* The TCGBackendData structure is private to tcg-target.c.  */
 560     struct TCGBackendData *be;
 561
 562     TCGTempSet free_temps[TCG_TYPE_COUNT * 2];
 563     TCGTemp temps[TCG_MAX_TEMPS]; /* globals first, temps after */
 564
 565     /* tells in which temporary a given register is. It does not take
 566        into account fixed registers */
 567     int reg_to_temp[TCG_TARGET_NB_REGS];
 568
 569     TCGOp gen_op_buf[OPC_BUF_SIZE];
 570     TCGArg gen_opparam_buf[OPPARAM_BUF_SIZE];
 571
 572     target_ulong gen_opc_pc[OPC_BUF_SIZE];
 573     uint16_t gen_opc_icount[OPC_BUF_SIZE];
 574     uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
 575 };
 576
 577 extern TCGContext tcg_ctx;
 578
 579 /* The number of opcodes emitted so far.  */
 580 static inline int tcg_op_buf_count(void)
 581 {
 582     return tcg_ctx.gen_next_op_idx;
 583 }
 584
 585 /* Test for whether to terminate the TB for using too many opcodes.  */
 586 static inline bool tcg_op_buf_full(void)
 587 {
 588     return tcg_op_buf_count() >= OPC_MAX_SIZE;
 589 }
 590
 591 /* pool based memory allocation */
 592
 593 void *tcg_malloc_internal(TCGContext *s, int size);
 594 void tcg_pool_reset(TCGContext *s);
 595 void tcg_pool_delete(TCGContext *s);
 596
 597 static inline void *tcg_malloc(int size)
 598 {
 599     TCGContext *s = &tcg_ctx;
 600     uint8_t *ptr, *ptr_end;
 601     size = (size + sizeof(long) - 1) & ~(sizeof(long) - 1);
 602     ptr = s->pool_cur;
 603     ptr_end = ptr + size;
 604     if (unlikely(ptr_end > s->pool_end)) {
 605         return tcg_malloc_internal(&tcg_ctx, size);
 606     } else {
 607         s->pool_cur = ptr_end;
 608         return ptr;
 609     }
 610 }
 611
 612 void tcg_context_init(TCGContext *s);
 613 void tcg_prologue_init(TCGContext *s);
 614 void tcg_func_start(TCGContext *s);
 615
 616 int tcg_gen_code(TCGContext *s, tcg_insn_unit *gen_code_buf);
 617 int tcg_gen_code_search_pc(TCGContext *s, tcg_insn_unit *gen_code_buf,
 618                            long offset);
 619
 620 void tcg_set_frame(TCGContext *s, int reg, intptr_t start, intptr_t size);
 621
 622 TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name);
 623 TCGv_i32 tcg_global_mem_new_i32(int reg, intptr_t offset, const char *name);
 624 TCGv_i32 tcg_temp_new_internal_i32(int temp_local);
 625 static inline TCGv_i32 tcg_temp_new_i32(void)
 626 {
 627     return tcg_temp_new_internal_i32(0);
 628 }
 629 static inline TCGv_i32 tcg_temp_local_new_i32(void)
 630 {
 631     return tcg_temp_new_internal_i32(1);
 632 }
 633 void tcg_temp_free_i32(TCGv_i32 arg);
 634 char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg);
 635
 636 TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name);
 637 TCGv_i64 tcg_global_mem_new_i64(int reg, intptr_t offset, const char *name);
 638 TCGv_i64 tcg_temp_new_internal_i64(int temp_local);
 639 static inline TCGv_i64 tcg_temp_new_i64(void)
 640 {
 641     return tcg_temp_new_internal_i64(0);
 642 }
 643 static inline TCGv_i64 tcg_temp_local_new_i64(void)
 644 {
 645     return tcg_temp_new_internal_i64(1);
 646 }
 647 void tcg_temp_free_i64(TCGv_i64 arg);
 648 char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg);
 649
 650 #if defined(CONFIG_DEBUG_TCG)
 651 /* If you call tcg_clear_temp_count() at the start of a section of
 652  * code which is not supposed to leak any TCG temporaries, then
 653  * calling tcg_check_temp_count() at the end of the section will
 654  * return 1 if the section did in fact leak a temporary.
 655  */
 656 void tcg_clear_temp_count(void);
 657 int tcg_check_temp_count(void);
 658 #else
 659 #define tcg_clear_temp_count() do { } while (0)
 660 #define tcg_check_temp_count() 0
 661 #endif
 662
 663 void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf);
 664 void tcg_dump_op_count(FILE *f, fprintf_function cpu_fprintf);
 665
 666 #define TCG_CT_ALIAS  0x80
 667 #define TCG_CT_IALIAS 0x40
 668 #define TCG_CT_REG    0x01
 669 #define TCG_CT_CONST  0x02 /* any constant of register size */
 670
 671 typedef struct TCGArgConstraint {
 672     uint16_t ct;
 673     uint8_t alias_index;
 674     union {
 675         TCGRegSet regs;
 676     } u;
 677 } TCGArgConstraint;
 678
 679 #define TCG_MAX_OP_ARGS 16
 680
 681 /* Bits for TCGOpDef->flags, 8 bits available.  */
 682 enum {
 683     /* Instruction defines the end of a basic block.  */
 684     TCG_OPF_BB_END       = 0x01,
 685     /* Instruction clobbers call registers and potentially update globals.  */
 686     TCG_OPF_CALL_CLOBBER = 0x02,
 687     /* Instruction has side effects: it cannot be removed if its outputs
 688        are not used, and might trigger exceptions.  */
 689     TCG_OPF_SIDE_EFFECTS = 0x04,
 690     /* Instruction operands are 64-bits (otherwise 32-bits).  */
 691     TCG_OPF_64BIT        = 0x08,
 692     /* Instruction is optional and not implemented by the host, or insn
 693        is generic and should not be implemened by the host.  */
 694     TCG_OPF_NOT_PRESENT  = 0x10,
 695 };
 696
 697 typedef struct TCGOpDef {
 698     const char *name;
 699     uint8_t nb_oargs, nb_iargs, nb_cargs, nb_args;
 700     uint8_t flags;
 701     TCGArgConstraint *args_ct;
 702     int *sorted_args;
 703 #if defined(CONFIG_DEBUG_TCG)
 704     int used;
 705 #endif
 706 } TCGOpDef;
 707
 708 extern TCGOpDef tcg_op_defs[];
 709 extern const size_t tcg_op_defs_max;
 710
 711 typedef struct TCGTargetOpDef {
 712     TCGOpcode op;
 713     const char *args_ct_str[TCG_MAX_OP_ARGS];
 714 } TCGTargetOpDef;
 715
 716 #define tcg_abort() \
 717 do {\
 718     fprintf(stderr, "%s:%d: tcg fatal error\n", __FILE__, __LINE__);\
 719     abort();\
 720 } while (0)
 721
 722 #ifdef CONFIG_DEBUG_TCG
 723 # define tcg_debug_assert(X) do { assert(X); } while (0)
 724 #elif QEMU_GNUC_PREREQ(4, 5)
 725 # define tcg_debug_assert(X) \
 726     do { if (!(X)) { __builtin_unreachable(); } } while (0)
 727 #else
 728 # define tcg_debug_assert(X) do { (void)(X); } while (0)
 729 #endif
 730
 731 void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs);
 732
 733 #if UINTPTR_MAX == UINT32_MAX
 734 #define TCGV_NAT_TO_PTR(n) MAKE_TCGV_PTR(GET_TCGV_I32(n))
 735 #define TCGV_PTR_TO_NAT(n) MAKE_TCGV_I32(GET_TCGV_PTR(n))
 736
 737 #define tcg_const_ptr(V) TCGV_NAT_TO_PTR(tcg_const_i32((intptr_t)(V)))
 738 #define tcg_global_reg_new_ptr(R, N) \
 739     TCGV_NAT_TO_PTR(tcg_global_reg_new_i32((R), (N)))
 740 #define tcg_global_mem_new_ptr(R, O, N) \
 741     TCGV_NAT_TO_PTR(tcg_global_mem_new_i32((R), (O), (N)))
 742 #define tcg_temp_new_ptr() TCGV_NAT_TO_PTR(tcg_temp_new_i32())
 743 #define tcg_temp_free_ptr(T) tcg_temp_free_i32(TCGV_PTR_TO_NAT(T))
 744 #else
 745 #define TCGV_NAT_TO_PTR(n) MAKE_TCGV_PTR(GET_TCGV_I64(n))
 746 #define TCGV_PTR_TO_NAT(n) MAKE_TCGV_I64(GET_TCGV_PTR(n))
 747
 748 #define tcg_const_ptr(V) TCGV_NAT_TO_PTR(tcg_const_i64((intptr_t)(V)))
 749 #define tcg_global_reg_new_ptr(R, N) \
 750     TCGV_NAT_TO_PTR(tcg_global_reg_new_i64((R), (N)))
 751 #define tcg_global_mem_new_ptr(R, O, N) \
 752     TCGV_NAT_TO_PTR(tcg_global_mem_new_i64((R), (O), (N)))
 753 #define tcg_temp_new_ptr() TCGV_NAT_TO_PTR(tcg_temp_new_i64())
 754 #define tcg_temp_free_ptr(T) tcg_temp_free_i64(TCGV_PTR_TO_NAT(T))
 755 #endif
 756
 757 void tcg_gen_callN(TCGContext *s, void *func,
 758                    TCGArg ret, int nargs, TCGArg *args);
 759
 760 void tcg_op_remove(TCGContext *s, TCGOp *op);
 761 void tcg_optimize(TCGContext *s);
 762
 763 /* only used for debugging purposes */
 764 void tcg_dump_ops(TCGContext *s);
 765
 766 void dump_ops(const uint16_t *opc_buf, const TCGArg *opparam_buf);
 767 TCGv_i32 tcg_const_i32(int32_t val);
 768 TCGv_i64 tcg_const_i64(int64_t val);
 769 TCGv_i32 tcg_const_local_i32(int32_t val);
 770 TCGv_i64 tcg_const_local_i64(int64_t val);
 771
 772 TCGLabel *gen_new_label(void);
 773
 774 /**
 775  * label_arg
 776  * @l: label
 777  *
 778  * Encode a label for storage in the TCG opcode stream.
 779  */
 780
 781 static inline TCGArg label_arg(TCGLabel *l)
 782 {
 783     return (uintptr_t)l;
 784 }
 785
 786 /**
 787  * arg_label
 788  * @i: value
 789  *
 790  * The opposite of label_arg.  Retrieve a label from the
 791  * encoding of the TCG opcode stream.
 792  */
 793
 794 static inline TCGLabel *arg_label(TCGArg i)
 795 {
 796     return (TCGLabel *)(uintptr_t)i;
 797 }
 798
 799 /**
 800  * tcg_ptr_byte_diff
 801  * @a, @b: addresses to be differenced
 802  *
 803  * There are many places within the TCG backends where we need a byte
 804  * difference between two pointers.  While this can be accomplished
 805  * with local casting, it's easy to get wrong -- especially if one is
 806  * concerned with the signedness of the result.
 807  *
 808  * This version relies on GCC's void pointer arithmetic to get the
 809  * correct result.
 810  */
 811
 812 static inline ptrdiff_t tcg_ptr_byte_diff(void *a, void *b)
 813 {
 814     return a - b;
 815 }
 816
 817 /**
 818  * tcg_pcrel_diff
 819  * @s: the tcg context
 820  * @target: address of the target
 821  *
 822  * Produce a pc-relative difference, from the current code_ptr
 823  * to the destination address.
 824  */
 825
 826 static inline ptrdiff_t tcg_pcrel_diff(TCGContext *s, void *target)
 827 {
 828     return tcg_ptr_byte_diff(target, s->code_ptr);
 829 }
 830
 831 /**
 832  * tcg_current_code_size
 833  * @s: the tcg context
 834  *
 835  * Compute the current code size within the translation block.
 836  * This is used to fill in qemu's data structures for goto_tb.
 837  */
 838
 839 static inline size_t tcg_current_code_size(TCGContext *s)
 840 {
 841     return tcg_ptr_byte_diff(s->code_ptr, s->code_buf);
 842 }
 843
 844 /* Combine the TCGMemOp and mmu_idx parameters into a single value.  */
 845 typedef uint32_t TCGMemOpIdx;
 846
 847 /**
 848  * make_memop_idx
 849  * @op: memory operation
 850  * @idx: mmu index
 851  *
 852  * Encode these values into a single parameter.
 853  */
 854 static inline TCGMemOpIdx make_memop_idx(TCGMemOp op, unsigned idx)
 855 {
 856     tcg_debug_assert(idx <= 15);
 857     return (op << 4) | idx;
 858 }
 859
 860 /**
 861  * get_memop
 862  * @oi: combined op/idx parameter
 863  *
 864  * Extract the memory operation from the combined value.
 865  */
 866 static inline TCGMemOp get_memop(TCGMemOpIdx oi)
 867 {
 868     return oi >> 4;
 869 }
 870
 871 /**
 872  * get_mmuidx
 873  * @oi: combined op/idx parameter
 874  *
 875  * Extract the mmu index from the combined value.
 876  */
 877 static inline unsigned get_mmuidx(TCGMemOpIdx oi)
 878 {
 879     return oi & 15;
 880 }
 881
 882 /**
 883  * tcg_qemu_tb_exec:
 884  * @env: CPUArchState * for the CPU
 885  * @tb_ptr: address of generated code for the TB to execute
 886  *
 887  * Start executing code from a given translation block.
 888  * Where translation blocks have been linked, execution
 889  * may proceed from the given TB into successive ones.
 890  * Control eventually returns only when some action is needed
 891  * from the top-level loop: either control must pass to a TB
 892  * which has not yet been directly linked, or an asynchronous
 893  * event such as an interrupt needs handling.
 894  *
 895  * The return value is a pointer to the next TB to execute
 896  * (if known; otherwise zero). This pointer is assumed to be
 897  * 4-aligned, and the bottom two bits are used to return further
 898  * information:
 899  *  0, 1: the link between this TB and the next is via the specified
 900  *        TB index (0 or 1). That is, we left the TB via (the equivalent
 901  *        of) "goto_tb <index>". The main loop uses this to determine
 902  *        how to link the TB just executed to the next.
 903  *  2:    we are using instruction counting code generation, and we
 904  *        did not start executing this TB because the instruction counter
 905  *        would hit zero midway through it. In this case the next-TB pointer
 906  *        returned is the TB we were about to execute, and the caller must
 907  *        arrange to execute the remaining count of instructions.
 908  *  3:    we stopped because the CPU's exit_request flag was set
 909  *        (usually meaning that there is an interrupt that needs to be
 910  *        handled). The next-TB pointer returned is the TB we were
 911  *        about to execute when we noticed the pending exit request.
 912  *
 913  * If the bottom two bits indicate an exit-via-index then the CPU
 914  * state is correctly synchronised and ready for execution of the next
 915  * TB (and in particular the guest PC is the address to execute next).
 916  * Otherwise, we gave up on execution of this TB before it started, and
 917  * the caller must fix up the CPU state by calling the CPU's
 918  * synchronize_from_tb() method with the next-TB pointer we return (falling
 919  * back to calling the CPU's set_pc method with tb->pb if no
 920  * synchronize_from_tb() method exists).
 921  *
 922  * Note that TCG targets may use a different definition of tcg_qemu_tb_exec
 923  * to this default (which just calls the prologue.code emitted by
 924  * tcg_target_qemu_prologue()).
 925  */
 926 #define TB_EXIT_MASK 3
 927 #define TB_EXIT_IDX0 0
 928 #define TB_EXIT_IDX1 1
 929 #define TB_EXIT_ICOUNT_EXPIRED 2
 930 #define TB_EXIT_REQUESTED 3
 931
 932 #ifdef HAVE_TCG_QEMU_TB_EXEC
 933 uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr);
 934 #else
 935 # define tcg_qemu_tb_exec(env, tb_ptr) \
 936     ((uintptr_t (*)(void *, void *))tcg_ctx.code_gen_prologue)(env, tb_ptr)
 937 #endif
 938
 939 void tcg_register_jit(void *buf, size_t buf_size);
 940
 941 /*
 942  * Memory helpers that will be used by TCG generated code.
 943  */
 944 #ifdef CONFIG_SOFTMMU
 945 /* Value zero-extended to tcg register size.  */
 946 tcg_target_ulong helper_ret_ldub_mmu(CPUArchState *env, target_ulong addr,
 947                                      TCGMemOpIdx oi, uintptr_t retaddr);
 948 tcg_target_ulong helper_le_lduw_mmu(CPUArchState *env, target_ulong addr,
 949                                     TCGMemOpIdx oi, uintptr_t retaddr);
 950 tcg_target_ulong helper_le_ldul_mmu(CPUArchState *env, target_ulong addr,
 951                                     TCGMemOpIdx oi, uintptr_t retaddr);
 952 uint64_t helper_le_ldq_mmu(CPUArchState *env, target_ulong addr,
 953                            TCGMemOpIdx oi, uintptr_t retaddr);
 954 tcg_target_ulong helper_be_lduw_mmu(CPUArchState *env, target_ulong addr,
 955                                     TCGMemOpIdx oi, uintptr_t retaddr);
 956 tcg_target_ulong helper_be_ldul_mmu(CPUArchState *env, target_ulong addr,
 957                                     TCGMemOpIdx oi, uintptr_t retaddr);
 958 uint64_t helper_be_ldq_mmu(CPUArchState *env, target_ulong addr,
 959                            TCGMemOpIdx oi, uintptr_t retaddr);
 960
 961 /* Value sign-extended to tcg register size.  */
 962 tcg_target_ulong helper_ret_ldsb_mmu(CPUArchState *env, target_ulong addr,
 963                                      TCGMemOpIdx oi, uintptr_t retaddr);
 964 tcg_target_ulong helper_le_ldsw_mmu(CPUArchState *env, target_ulong addr,
 965                                     TCGMemOpIdx oi, uintptr_t retaddr);
 966 tcg_target_ulong helper_le_ldsl_mmu(CPUArchState *env, target_ulong addr,
 967                                     TCGMemOpIdx oi, uintptr_t retaddr);
 968 tcg_target_ulong helper_be_ldsw_mmu(CPUArchState *env, target_ulong addr,
 969                                     TCGMemOpIdx oi, uintptr_t retaddr);
 970 tcg_target_ulong helper_be_ldsl_mmu(CPUArchState *env, target_ulong addr,
 971                                     TCGMemOpIdx oi, uintptr_t retaddr);
 972
 973 void helper_ret_stb_mmu(CPUArchState *env, target_ulong addr, uint8_t val,
 974                         TCGMemOpIdx oi, uintptr_t retaddr);
 975 void helper_le_stw_mmu(CPUArchState *env, target_ulong addr, uint16_t val,
 976                        TCGMemOpIdx oi, uintptr_t retaddr);
 977 void helper_le_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val,
 978                        TCGMemOpIdx oi, uintptr_t retaddr);
 979 void helper_le_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,
 980                        TCGMemOpIdx oi, uintptr_t retaddr);
 981 void helper_be_stw_mmu(CPUArchState *env, target_ulong addr, uint16_t val,
 982                        TCGMemOpIdx oi, uintptr_t retaddr);
 983 void helper_be_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val,
 984                        TCGMemOpIdx oi, uintptr_t retaddr);
 985 void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,
 986                        TCGMemOpIdx oi, uintptr_t retaddr);
 987
 988 /* Temporary aliases until backends are converted.  */
 989 #ifdef TARGET_WORDS_BIGENDIAN
 990 # define helper_ret_ldsw_mmu  helper_be_ldsw_mmu
 991 # define helper_ret_lduw_mmu  helper_be_lduw_mmu
 992 # define helper_ret_ldsl_mmu  helper_be_ldsl_mmu
 993 # define helper_ret_ldul_mmu  helper_be_ldul_mmu
 994 # define helper_ret_ldq_mmu   helper_be_ldq_mmu
 995 # define helper_ret_stw_mmu   helper_be_stw_mmu
 996 # define helper_ret_stl_mmu   helper_be_stl_mmu
 997 # define helper_ret_stq_mmu   helper_be_stq_mmu
 998 #else
 999 # define helper_ret_ldsw_mmu  helper_le_ldsw_mmu
1000 # define helper_ret_lduw_mmu  helper_le_lduw_mmu
1001 # define helper_ret_ldsl_mmu  helper_le_ldsl_mmu
1002 # define helper_ret_ldul_mmu  helper_le_ldul_mmu
1003 # define helper_ret_ldq_mmu   helper_le_ldq_mmu
1004 # define helper_ret_stw_mmu   helper_le_stw_mmu
1005 # define helper_ret_stl_mmu   helper_le_stl_mmu
1006 # define helper_ret_stq_mmu   helper_le_stq_mmu
1007 #endif
1008
1009 #endif /* CONFIG_SOFTMMU */
1010
1011 #endif /* TCG_H */