microvm/acpi: use seabios with acpi=on
[qemu/ar7.git] / target / moxie / cpu.h
blobd58761ccb196b7895b05f9b276ff2255b0429600
1 /*
2 * Moxie emulation
4 * Copyright (c) 2008, 2010, 2013 Anthony Green
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 #ifndef MOXIE_CPU_H
21 #define MOXIE_CPU_H
23 #include "exec/cpu-defs.h"
24 #include "qom/object.h"
26 #define MOXIE_EX_DIV0 0
27 #define MOXIE_EX_BAD 1
28 #define MOXIE_EX_IRQ 2
29 #define MOXIE_EX_SWI 3
30 #define MOXIE_EX_MMU_MISS 4
31 #define MOXIE_EX_BREAK 16
33 typedef struct CPUMoxieState {
35 uint32_t flags; /* general execution flags */
36 uint32_t gregs[16]; /* general registers */
37 uint32_t sregs[256]; /* special registers */
38 uint32_t pc; /* program counter */
39 /* Instead of saving the cc value, we save the cmp arguments
40 and compute cc on demand. */
41 uint32_t cc_a; /* reg a for condition code calculation */
42 uint32_t cc_b; /* reg b for condition code calculation */
44 void *irq[8];
46 /* Fields up to this point are cleared by a CPU reset */
47 struct {} end_reset_fields;
48 } CPUMoxieState;
50 #include "hw/core/cpu.h"
52 #define TYPE_MOXIE_CPU "moxie-cpu"
54 OBJECT_DECLARE_TYPE(MoxieCPU, MoxieCPUClass,
55 moxie_cpu, MOXIE_CPU)
57 /**
58 * MoxieCPUClass:
59 * @parent_reset: The parent class' reset handler.
61 * A Moxie CPU model.
63 struct MoxieCPUClass {
64 /*< private >*/
65 CPUClass parent_class;
66 /*< public >*/
68 DeviceRealize parent_realize;
69 DeviceReset parent_reset;
72 /**
73 * MoxieCPU:
74 * @env: #CPUMoxieState
76 * A Moxie CPU.
78 struct MoxieCPU {
79 /*< private >*/
80 CPUState parent_obj;
81 /*< public >*/
83 CPUNegativeOffsetState neg;
84 CPUMoxieState env;
88 void moxie_cpu_do_interrupt(CPUState *cs);
89 void moxie_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
90 hwaddr moxie_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
91 void moxie_translate_init(void);
92 int cpu_moxie_signal_handler(int host_signum, void *pinfo,
93 void *puc);
95 #define MOXIE_CPU_TYPE_SUFFIX "-" TYPE_MOXIE_CPU
96 #define MOXIE_CPU_TYPE_NAME(model) model MOXIE_CPU_TYPE_SUFFIX
97 #define CPU_RESOLVING_TYPE TYPE_MOXIE_CPU
99 #define cpu_signal_handler cpu_moxie_signal_handler
101 static inline int cpu_mmu_index(CPUMoxieState *env, bool ifetch)
103 return 0;
106 typedef CPUMoxieState CPUArchState;
107 typedef MoxieCPU ArchCPU;
109 #include "exec/cpu-all.h"
111 static inline void cpu_get_tb_cpu_state(CPUMoxieState *env, target_ulong *pc,
112 target_ulong *cs_base, uint32_t *flags)
114 *pc = env->pc;
115 *cs_base = 0;
116 *flags = 0;
119 bool moxie_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
120 MMUAccessType access_type, int mmu_idx,
121 bool probe, uintptr_t retaddr);
123 #endif /* MOXIE_CPU_H */