include/hw/ppc/spapr_xive.h

   1 /*
   2  * QEMU PowerPC sPAPR XIVE interrupt controller model
   3  *
   4  * Copyright (c) 2017-2018, IBM Corporation.
   5  *
   6  * This code is licensed under the GPL version 2 or later. See the
   7  * COPYING file in the top-level directory.
   8  */
   9
  10 #ifndef PPC_SPAPR_XIVE_H
  11 #define PPC_SPAPR_XIVE_H
  12
  13 #include "hw/ppc/xive.h"
  14
  15 #define TYPE_SPAPR_XIVE "spapr-xive"
  16 #define SPAPR_XIVE(obj) OBJECT_CHECK(sPAPRXive, (obj), TYPE_SPAPR_XIVE)
  17
  18 typedef struct sPAPRXive {
  19     XiveRouter    parent;
  20
  21     /* Internal interrupt source for IPIs and virtual devices */
  22     XiveSource    source;
  23     hwaddr        vc_base;
  24
  25     /* END ESB MMIOs */
  26     XiveENDSource end_source;
  27     hwaddr        end_base;
  28
  29     /* Routing table */
  30     XiveEAS       *eat;
  31     uint32_t      nr_irqs;
  32     XiveEND       *endt;
  33     uint32_t      nr_ends;
  34
  35     /* TIMA mapping address */
  36     hwaddr        tm_base;
  37     MemoryRegion  tm_mmio;
  38 } sPAPRXive;
  39
  40 bool spapr_xive_irq_claim(sPAPRXive *xive, uint32_t lisn, bool lsi);
  41 bool spapr_xive_irq_free(sPAPRXive *xive, uint32_t lisn);
  42 void spapr_xive_pic_print_info(sPAPRXive *xive, Monitor *mon);
  43
  44 typedef struct sPAPRMachineState sPAPRMachineState;
  45
  46 void spapr_xive_hcall_init(sPAPRMachineState *spapr);
  47 void spapr_dt_xive(sPAPRMachineState *spapr, uint32_t nr_servers, void *fdt,
  48                    uint32_t phandle);
  49 void spapr_xive_set_tctx_os_cam(XiveTCTX *tctx);
  50 void spapr_xive_mmio_set_enabled(sPAPRXive *xive, bool enable);
  51
  52 #endif /* PPC_SPAPR_XIVE_H */