2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
4 * PAPR Virtualized Interrupt System, aka ICS/ICP aka xics
6 * Copyright (c) 2010,2011 David Gibson, IBM Corporation.
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
28 #include "qemu/osdep.h"
32 #include "qemu/timer.h"
33 #include "hw/ppc/spapr.h"
34 #include "hw/ppc/xics.h"
35 #include "hw/ppc/fdt.h"
36 #include "qapi/visitor.h"
37 #include "qapi/error.h"
43 static target_ulong
h_cppr(PowerPCCPU
*cpu
, sPAPRMachineState
*spapr
,
44 target_ulong opcode
, target_ulong
*args
)
46 target_ulong cppr
= args
[0];
48 icp_set_cppr(ICP(cpu
->intc
), cppr
);
52 static target_ulong
h_ipi(PowerPCCPU
*cpu
, sPAPRMachineState
*spapr
,
53 target_ulong opcode
, target_ulong
*args
)
55 target_ulong mfrr
= args
[1];
56 ICPState
*icp
= xics_icp_get(XICS_FABRIC(spapr
), args
[0]);
62 icp_set_mfrr(icp
, mfrr
);
66 static target_ulong
h_xirr(PowerPCCPU
*cpu
, sPAPRMachineState
*spapr
,
67 target_ulong opcode
, target_ulong
*args
)
69 uint32_t xirr
= icp_accept(ICP(cpu
->intc
));
75 static target_ulong
h_xirr_x(PowerPCCPU
*cpu
, sPAPRMachineState
*spapr
,
76 target_ulong opcode
, target_ulong
*args
)
78 uint32_t xirr
= icp_accept(ICP(cpu
->intc
));
81 args
[1] = cpu_get_host_ticks();
85 static target_ulong
h_eoi(PowerPCCPU
*cpu
, sPAPRMachineState
*spapr
,
86 target_ulong opcode
, target_ulong
*args
)
88 target_ulong xirr
= args
[0];
90 icp_eoi(ICP(cpu
->intc
), xirr
);
94 static target_ulong
h_ipoll(PowerPCCPU
*cpu
, sPAPRMachineState
*spapr
,
95 target_ulong opcode
, target_ulong
*args
)
98 uint32_t xirr
= icp_ipoll(ICP(cpu
->intc
), &mfrr
);
106 static void rtas_set_xive(PowerPCCPU
*cpu
, sPAPRMachineState
*spapr
,
108 uint32_t nargs
, target_ulong args
,
109 uint32_t nret
, target_ulong rets
)
111 ICSState
*ics
= spapr
->ics
;
112 uint32_t nr
, srcno
, server
, priority
;
114 if ((nargs
!= 3) || (nret
!= 1)) {
115 rtas_st(rets
, 0, RTAS_OUT_PARAM_ERROR
);
119 rtas_st(rets
, 0, RTAS_OUT_HW_ERROR
);
123 nr
= rtas_ld(args
, 0);
124 server
= rtas_ld(args
, 1);
125 priority
= rtas_ld(args
, 2);
127 if (!ics_valid_irq(ics
, nr
) || !xics_icp_get(XICS_FABRIC(spapr
), server
)
128 || (priority
> 0xff)) {
129 rtas_st(rets
, 0, RTAS_OUT_PARAM_ERROR
);
133 srcno
= nr
- ics
->offset
;
134 ics_simple_write_xive(ics
, srcno
, server
, priority
, priority
);
136 rtas_st(rets
, 0, RTAS_OUT_SUCCESS
);
139 static void rtas_get_xive(PowerPCCPU
*cpu
, sPAPRMachineState
*spapr
,
141 uint32_t nargs
, target_ulong args
,
142 uint32_t nret
, target_ulong rets
)
144 ICSState
*ics
= spapr
->ics
;
147 if ((nargs
!= 1) || (nret
!= 3)) {
148 rtas_st(rets
, 0, RTAS_OUT_PARAM_ERROR
);
152 rtas_st(rets
, 0, RTAS_OUT_HW_ERROR
);
156 nr
= rtas_ld(args
, 0);
158 if (!ics_valid_irq(ics
, nr
)) {
159 rtas_st(rets
, 0, RTAS_OUT_PARAM_ERROR
);
163 rtas_st(rets
, 0, RTAS_OUT_SUCCESS
);
164 srcno
= nr
- ics
->offset
;
165 rtas_st(rets
, 1, ics
->irqs
[srcno
].server
);
166 rtas_st(rets
, 2, ics
->irqs
[srcno
].priority
);
169 static void rtas_int_off(PowerPCCPU
*cpu
, sPAPRMachineState
*spapr
,
171 uint32_t nargs
, target_ulong args
,
172 uint32_t nret
, target_ulong rets
)
174 ICSState
*ics
= spapr
->ics
;
177 if ((nargs
!= 1) || (nret
!= 1)) {
178 rtas_st(rets
, 0, RTAS_OUT_PARAM_ERROR
);
182 rtas_st(rets
, 0, RTAS_OUT_HW_ERROR
);
186 nr
= rtas_ld(args
, 0);
188 if (!ics_valid_irq(ics
, nr
)) {
189 rtas_st(rets
, 0, RTAS_OUT_PARAM_ERROR
);
193 srcno
= nr
- ics
->offset
;
194 ics_simple_write_xive(ics
, srcno
, ics
->irqs
[srcno
].server
, 0xff,
195 ics
->irqs
[srcno
].priority
);
197 rtas_st(rets
, 0, RTAS_OUT_SUCCESS
);
200 static void rtas_int_on(PowerPCCPU
*cpu
, sPAPRMachineState
*spapr
,
202 uint32_t nargs
, target_ulong args
,
203 uint32_t nret
, target_ulong rets
)
205 ICSState
*ics
= spapr
->ics
;
208 if ((nargs
!= 1) || (nret
!= 1)) {
209 rtas_st(rets
, 0, RTAS_OUT_PARAM_ERROR
);
213 rtas_st(rets
, 0, RTAS_OUT_HW_ERROR
);
217 nr
= rtas_ld(args
, 0);
219 if (!ics_valid_irq(ics
, nr
)) {
220 rtas_st(rets
, 0, RTAS_OUT_PARAM_ERROR
);
224 srcno
= nr
- ics
->offset
;
225 ics_simple_write_xive(ics
, srcno
, ics
->irqs
[srcno
].server
,
226 ics
->irqs
[srcno
].saved_priority
,
227 ics
->irqs
[srcno
].saved_priority
);
229 rtas_st(rets
, 0, RTAS_OUT_SUCCESS
);
232 void xics_spapr_init(sPAPRMachineState
*spapr
)
234 /* Registration of global state belongs into realize */
235 spapr_rtas_register(RTAS_IBM_SET_XIVE
, "ibm,set-xive", rtas_set_xive
);
236 spapr_rtas_register(RTAS_IBM_GET_XIVE
, "ibm,get-xive", rtas_get_xive
);
237 spapr_rtas_register(RTAS_IBM_INT_OFF
, "ibm,int-off", rtas_int_off
);
238 spapr_rtas_register(RTAS_IBM_INT_ON
, "ibm,int-on", rtas_int_on
);
240 spapr_register_hypercall(H_CPPR
, h_cppr
);
241 spapr_register_hypercall(H_IPI
, h_ipi
);
242 spapr_register_hypercall(H_XIRR
, h_xirr
);
243 spapr_register_hypercall(H_XIRR_X
, h_xirr_x
);
244 spapr_register_hypercall(H_EOI
, h_eoi
);
245 spapr_register_hypercall(H_IPOLL
, h_ipoll
);
248 void spapr_dt_xics(int nr_servers
, void *fdt
, uint32_t phandle
)
250 uint32_t interrupt_server_ranges_prop
[] = {
251 0, cpu_to_be32(nr_servers
),
255 _FDT(node
= fdt_add_subnode(fdt
, 0, "interrupt-controller"));
257 _FDT(fdt_setprop_string(fdt
, node
, "device_type",
258 "PowerPC-External-Interrupt-Presentation"));
259 _FDT(fdt_setprop_string(fdt
, node
, "compatible", "IBM,ppc-xicp"));
260 _FDT(fdt_setprop(fdt
, node
, "interrupt-controller", NULL
, 0));
261 _FDT(fdt_setprop(fdt
, node
, "ibm,interrupt-server-ranges",
262 interrupt_server_ranges_prop
,
263 sizeof(interrupt_server_ranges_prop
)));
264 _FDT(fdt_setprop_cell(fdt
, node
, "#interrupt-cells", 2));
265 _FDT(fdt_setprop_cell(fdt
, node
, "linux,phandle", phandle
));
266 _FDT(fdt_setprop_cell(fdt
, node
, "phandle", phandle
));