Include hw/hw.h exactly where needed
[qemu/ar7.git] / hw / mips / mips_mipssim.c
blob1ca7e909d14672c66fe5a86eee88037c138c38a3
1 /*
2 * QEMU/mipssim emulation
4 * Emulates a very simple machine model similar to the one used by the
5 * proprietary MIPS emulator.
6 *
7 * Copyright (c) 2007 Thiemo Seufer
9 * Permission is hereby granted, free of charge, to any person obtaining a copy
10 * of this software and associated documentation files (the "Software"), to deal
11 * in the Software without restriction, including without limitation the rights
12 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
13 * copies of the Software, and to permit persons to whom the Software is
14 * furnished to do so, subject to the following conditions:
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 * THE SOFTWARE.
28 #include "qemu/osdep.h"
29 #include "qapi/error.h"
30 #include "qemu-common.h"
31 #include "cpu.h"
32 #include "hw/mips/mips.h"
33 #include "hw/mips/cpudevs.h"
34 #include "hw/char/serial.h"
35 #include "hw/isa/isa.h"
36 #include "net/net.h"
37 #include "sysemu/sysemu.h"
38 #include "hw/boards.h"
39 #include "hw/mips/bios.h"
40 #include "hw/loader.h"
41 #include "elf.h"
42 #include "hw/sysbus.h"
43 #include "exec/address-spaces.h"
44 #include "qemu/error-report.h"
45 #include "sysemu/qtest.h"
46 #include "sysemu/reset.h"
48 static struct _loaderparams {
49 int ram_size;
50 const char *kernel_filename;
51 const char *kernel_cmdline;
52 const char *initrd_filename;
53 } loaderparams;
55 typedef struct ResetData {
56 MIPSCPU *cpu;
57 uint64_t vector;
58 } ResetData;
60 static int64_t load_kernel(void)
62 int64_t entry, kernel_high, initrd_size;
63 long kernel_size;
64 ram_addr_t initrd_offset;
65 int big_endian;
67 #ifdef TARGET_WORDS_BIGENDIAN
68 big_endian = 1;
69 #else
70 big_endian = 0;
71 #endif
73 kernel_size = load_elf(loaderparams.kernel_filename, NULL,
74 cpu_mips_kseg0_to_phys, NULL,
75 (uint64_t *)&entry, NULL,
76 (uint64_t *)&kernel_high, big_endian,
77 EM_MIPS, 1, 0);
78 if (kernel_size >= 0) {
79 if ((entry & ~0x7fffffffULL) == 0x80000000)
80 entry = (int32_t)entry;
81 } else {
82 error_report("could not load kernel '%s': %s",
83 loaderparams.kernel_filename,
84 load_elf_strerror(kernel_size));
85 exit(1);
88 /* load initrd */
89 initrd_size = 0;
90 initrd_offset = 0;
91 if (loaderparams.initrd_filename) {
92 initrd_size = get_image_size (loaderparams.initrd_filename);
93 if (initrd_size > 0) {
94 initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK;
95 if (initrd_offset + initrd_size > loaderparams.ram_size) {
96 error_report("memory too small for initial ram disk '%s'",
97 loaderparams.initrd_filename);
98 exit(1);
100 initrd_size = load_image_targphys(loaderparams.initrd_filename,
101 initrd_offset, loaderparams.ram_size - initrd_offset);
103 if (initrd_size == (target_ulong) -1) {
104 error_report("could not load initial ram disk '%s'",
105 loaderparams.initrd_filename);
106 exit(1);
109 return entry;
112 static void main_cpu_reset(void *opaque)
114 ResetData *s = (ResetData *)opaque;
115 CPUMIPSState *env = &s->cpu->env;
117 cpu_reset(CPU(s->cpu));
118 env->active_tc.PC = s->vector & ~(target_ulong)1;
119 if (s->vector & 1) {
120 env->hflags |= MIPS_HFLAG_M16;
124 static void mipsnet_init(int base, qemu_irq irq, NICInfo *nd)
126 DeviceState *dev;
127 SysBusDevice *s;
129 dev = qdev_create(NULL, "mipsnet");
130 qdev_set_nic_properties(dev, nd);
131 qdev_init_nofail(dev);
133 s = SYS_BUS_DEVICE(dev);
134 sysbus_connect_irq(s, 0, irq);
135 memory_region_add_subregion(get_system_io(),
136 base,
137 sysbus_mmio_get_region(s, 0));
140 static void
141 mips_mipssim_init(MachineState *machine)
143 ram_addr_t ram_size = machine->ram_size;
144 const char *kernel_filename = machine->kernel_filename;
145 const char *kernel_cmdline = machine->kernel_cmdline;
146 const char *initrd_filename = machine->initrd_filename;
147 char *filename;
148 MemoryRegion *address_space_mem = get_system_memory();
149 MemoryRegion *isa = g_new(MemoryRegion, 1);
150 MemoryRegion *ram = g_new(MemoryRegion, 1);
151 MemoryRegion *bios = g_new(MemoryRegion, 1);
152 MIPSCPU *cpu;
153 CPUMIPSState *env;
154 ResetData *reset_info;
155 int bios_size;
157 /* Init CPUs. */
158 cpu = MIPS_CPU(cpu_create(machine->cpu_type));
159 env = &cpu->env;
161 reset_info = g_malloc0(sizeof(ResetData));
162 reset_info->cpu = cpu;
163 reset_info->vector = env->active_tc.PC;
164 qemu_register_reset(main_cpu_reset, reset_info);
166 /* Allocate RAM. */
167 memory_region_allocate_system_memory(ram, NULL, "mips_mipssim.ram",
168 ram_size);
169 memory_region_init_ram(bios, NULL, "mips_mipssim.bios", BIOS_SIZE,
170 &error_fatal);
171 memory_region_set_readonly(bios, true);
173 memory_region_add_subregion(address_space_mem, 0, ram);
175 /* Map the BIOS / boot exception handler. */
176 memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
177 /* Load a BIOS / boot exception handler image. */
178 if (bios_name == NULL)
179 bios_name = BIOS_FILENAME;
180 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
181 if (filename) {
182 bios_size = load_image_targphys(filename, 0x1fc00000LL, BIOS_SIZE);
183 g_free(filename);
184 } else {
185 bios_size = -1;
187 if ((bios_size < 0 || bios_size > BIOS_SIZE) &&
188 !kernel_filename && !qtest_enabled()) {
189 /* Bail out if we have neither a kernel image nor boot vector code. */
190 error_report("Could not load MIPS bios '%s', and no "
191 "-kernel argument was specified", bios_name);
192 exit(1);
193 } else {
194 /* We have a boot vector start address. */
195 env->active_tc.PC = (target_long)(int32_t)0xbfc00000;
198 if (kernel_filename) {
199 loaderparams.ram_size = ram_size;
200 loaderparams.kernel_filename = kernel_filename;
201 loaderparams.kernel_cmdline = kernel_cmdline;
202 loaderparams.initrd_filename = initrd_filename;
203 reset_info->vector = load_kernel();
206 /* Init CPU internal devices. */
207 cpu_mips_irq_init_cpu(cpu);
208 cpu_mips_clock_init(cpu);
210 /* Register 64 KB of ISA IO space at 0x1fd00000. */
211 memory_region_init_alias(isa, NULL, "isa_mmio",
212 get_system_io(), 0, 0x00010000);
213 memory_region_add_subregion(get_system_memory(), 0x1fd00000, isa);
215 /* A single 16450 sits at offset 0x3f8. It is attached to
216 MIPS CPU INT2, which is interrupt 4. */
217 if (serial_hd(0))
218 serial_init(0x3f8, env->irq[4], 115200, serial_hd(0),
219 get_system_io());
221 if (nd_table[0].used)
222 /* MIPSnet uses the MIPS CPU INT0, which is interrupt 2. */
223 mipsnet_init(0x4200, env->irq[2], &nd_table[0]);
226 static void mips_mipssim_machine_init(MachineClass *mc)
228 mc->desc = "MIPS MIPSsim platform";
229 mc->init = mips_mipssim_init;
230 #ifdef TARGET_MIPS64
231 mc->default_cpu_type = MIPS_CPU_TYPE_NAME("5Kf");
232 #else
233 mc->default_cpu_type = MIPS_CPU_TYPE_NAME("24Kf");
234 #endif
237 DEFINE_MACHINE("mipssim", mips_mipssim_machine_init)