2 * Copyright (c) 2003-2004 Fabrice Bellard
3 * Copyright (c) 2019 Red Hat, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a copy
6 * of this software and associated documentation files (the "Software"), to deal
7 * in the Software without restriction, including without limitation the rights
8 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9 * copies of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 #include "qemu/osdep.h"
24 #include "qemu/error-report.h"
25 #include "qemu/option.h"
26 #include "qemu/cutils.h"
27 #include "qemu/units.h"
28 #include "qemu-common.h"
29 #include "qapi/error.h"
30 #include "qapi/qmp/qerror.h"
31 #include "qapi/qapi-visit-common.h"
32 #include "qapi/visitor.h"
33 #include "sysemu/qtest.h"
34 #include "sysemu/numa.h"
35 #include "sysemu/replay.h"
36 #include "sysemu/sysemu.h"
39 #include "hw/i386/x86.h"
40 #include "target/i386/cpu.h"
41 #include "hw/i386/topology.h"
42 #include "hw/i386/fw_cfg.h"
43 #include "hw/intc/i8259.h"
45 #include "hw/acpi/cpu_hotplug.h"
48 #include "hw/loader.h"
49 #include "multiboot.h"
51 #include "standard-headers/asm-x86/bootparam.h"
52 #include "config-devices.h"
55 #define BIOS_FILENAME "bios.bin"
57 /* Physical Address of PVH entry point read from kernel ELF NOTE */
58 static size_t pvh_start_addr
;
61 * Calculates initial APIC ID for a specific CPU index
63 * Currently we need to be able to calculate the APIC ID from the CPU index
64 * alone (without requiring a CPU object), as the QEMU<->Seabios interfaces have
65 * no concept of "CPU index", and the NUMA tables on fw_cfg need the APIC ID of
66 * all CPUs up to max_cpus.
68 uint32_t x86_cpu_apic_id_from_index(X86MachineState
*x86ms
,
69 unsigned int cpu_index
)
71 MachineState
*ms
= MACHINE(x86ms
);
72 X86MachineClass
*x86mc
= X86_MACHINE_GET_CLASS(x86ms
);
76 correct_id
= x86_apicid_from_cpu_idx(x86ms
->smp_dies
, ms
->smp
.cores
,
77 ms
->smp
.threads
, cpu_index
);
78 if (x86mc
->compat_apic_id_mode
) {
79 if (cpu_index
!= correct_id
&& !warned
&& !qtest_enabled()) {
80 error_report("APIC IDs set in compatibility mode, "
81 "CPU topology won't match the configuration");
91 void x86_cpu_new(X86MachineState
*x86ms
, int64_t apic_id
, Error
**errp
)
94 Error
*local_err
= NULL
;
95 CPUX86State
*env
= NULL
;
97 cpu
= object_new(MACHINE(x86ms
)->cpu_type
);
99 env
= &X86_CPU(cpu
)->env
;
100 env
->nr_dies
= x86ms
->smp_dies
;
102 object_property_set_uint(cpu
, apic_id
, "apic-id", &local_err
);
103 object_property_set_bool(cpu
, true, "realized", &local_err
);
106 error_propagate(errp
, local_err
);
109 void x86_cpus_init(X86MachineState
*x86ms
, int default_cpu_version
)
112 const CPUArchIdList
*possible_cpus
;
113 MachineState
*ms
= MACHINE(x86ms
);
114 MachineClass
*mc
= MACHINE_GET_CLASS(x86ms
);
116 x86_cpu_set_default_version(default_cpu_version
);
119 * Calculates the limit to CPU APIC ID values
121 * Limit for the APIC ID value, so that all
122 * CPU APIC IDs are < x86ms->apic_id_limit.
124 * This is used for FW_CFG_MAX_CPUS. See comments on fw_cfg_arch_create().
126 x86ms
->apic_id_limit
= x86_cpu_apic_id_from_index(x86ms
,
127 ms
->smp
.max_cpus
- 1) + 1;
128 possible_cpus
= mc
->possible_cpu_arch_ids(ms
);
129 for (i
= 0; i
< ms
->smp
.cpus
; i
++) {
130 x86_cpu_new(x86ms
, possible_cpus
->cpus
[i
].arch_id
, &error_fatal
);
134 CpuInstanceProperties
135 x86_cpu_index_to_props(MachineState
*ms
, unsigned cpu_index
)
137 MachineClass
*mc
= MACHINE_GET_CLASS(ms
);
138 const CPUArchIdList
*possible_cpus
= mc
->possible_cpu_arch_ids(ms
);
140 assert(cpu_index
< possible_cpus
->len
);
141 return possible_cpus
->cpus
[cpu_index
].props
;
144 int64_t x86_get_default_cpu_node_id(const MachineState
*ms
, int idx
)
147 X86MachineState
*x86ms
= X86_MACHINE(ms
);
149 assert(idx
< ms
->possible_cpus
->len
);
150 x86_topo_ids_from_apicid(ms
->possible_cpus
->cpus
[idx
].arch_id
,
151 x86ms
->smp_dies
, ms
->smp
.cores
,
152 ms
->smp
.threads
, &topo
);
153 return topo
.pkg_id
% ms
->numa_state
->num_nodes
;
156 const CPUArchIdList
*x86_possible_cpu_arch_ids(MachineState
*ms
)
158 X86MachineState
*x86ms
= X86_MACHINE(ms
);
160 unsigned int max_cpus
= ms
->smp
.max_cpus
;
162 if (ms
->possible_cpus
) {
164 * make sure that max_cpus hasn't changed since the first use, i.e.
165 * -smp hasn't been parsed after it
167 assert(ms
->possible_cpus
->len
== max_cpus
);
168 return ms
->possible_cpus
;
171 ms
->possible_cpus
= g_malloc0(sizeof(CPUArchIdList
) +
172 sizeof(CPUArchId
) * max_cpus
);
173 ms
->possible_cpus
->len
= max_cpus
;
174 for (i
= 0; i
< ms
->possible_cpus
->len
; i
++) {
177 ms
->possible_cpus
->cpus
[i
].type
= ms
->cpu_type
;
178 ms
->possible_cpus
->cpus
[i
].vcpus_count
= 1;
179 ms
->possible_cpus
->cpus
[i
].arch_id
=
180 x86_cpu_apic_id_from_index(x86ms
, i
);
181 x86_topo_ids_from_apicid(ms
->possible_cpus
->cpus
[i
].arch_id
,
182 x86ms
->smp_dies
, ms
->smp
.cores
,
183 ms
->smp
.threads
, &topo
);
184 ms
->possible_cpus
->cpus
[i
].props
.has_socket_id
= true;
185 ms
->possible_cpus
->cpus
[i
].props
.socket_id
= topo
.pkg_id
;
186 if (x86ms
->smp_dies
> 1) {
187 ms
->possible_cpus
->cpus
[i
].props
.has_die_id
= true;
188 ms
->possible_cpus
->cpus
[i
].props
.die_id
= topo
.die_id
;
190 ms
->possible_cpus
->cpus
[i
].props
.has_core_id
= true;
191 ms
->possible_cpus
->cpus
[i
].props
.core_id
= topo
.core_id
;
192 ms
->possible_cpus
->cpus
[i
].props
.has_thread_id
= true;
193 ms
->possible_cpus
->cpus
[i
].props
.thread_id
= topo
.smt_id
;
195 return ms
->possible_cpus
;
198 static void x86_nmi(NMIState
*n
, int cpu_index
, Error
**errp
)
200 /* cpu index isn't used */
204 X86CPU
*cpu
= X86_CPU(cs
);
206 if (!cpu
->apic_state
) {
207 cpu_interrupt(cs
, CPU_INTERRUPT_NMI
);
209 apic_deliver_nmi(cpu
->apic_state
);
214 static long get_file_size(FILE *f
)
218 /* XXX: on Unix systems, using fstat() probably makes more sense */
221 fseek(f
, 0, SEEK_END
);
223 fseek(f
, where
, SEEK_SET
);
229 uint64_t cpu_get_tsc(CPUX86State
*env
)
231 return cpu_get_ticks();
235 static void pic_irq_request(void *opaque
, int irq
, int level
)
237 CPUState
*cs
= first_cpu
;
238 X86CPU
*cpu
= X86_CPU(cs
);
240 trace_x86_pic_interrupt(irq
, level
);
241 if (cpu
->apic_state
&& !kvm_irqchip_in_kernel()) {
244 if (apic_accept_pic_intr(cpu
->apic_state
)) {
245 apic_deliver_pic_intr(cpu
->apic_state
, level
);
250 cpu_interrupt(cs
, CPU_INTERRUPT_HARD
);
252 cpu_reset_interrupt(cs
, CPU_INTERRUPT_HARD
);
257 qemu_irq
x86_allocate_cpu_irq(void)
259 return qemu_allocate_irq(pic_irq_request
, NULL
, 0);
262 int cpu_get_pic_interrupt(CPUX86State
*env
)
264 X86CPU
*cpu
= env_archcpu(env
);
267 if (!kvm_irqchip_in_kernel()) {
268 intno
= apic_get_interrupt(cpu
->apic_state
);
272 /* read the irq from the PIC */
273 if (!apic_accept_pic_intr(cpu
->apic_state
)) {
278 intno
= pic_read_irq(isa_pic
);
282 DeviceState
*cpu_get_current_apic(void)
285 X86CPU
*cpu
= X86_CPU(current_cpu
);
286 return cpu
->apic_state
;
292 void gsi_handler(void *opaque
, int n
, int level
)
294 GSIState
*s
= opaque
;
296 trace_x86_gsi_interrupt(n
, level
);
297 if (n
< ISA_NUM_IRQS
) {
298 /* Under KVM, Kernel will forward to both PIC and IOAPIC */
299 qemu_set_irq(s
->i8259_irq
[n
], level
);
301 qemu_set_irq(s
->ioapic_irq
[n
], level
);
304 void ioapic_init_gsi(GSIState
*gsi_state
, const char *parent_name
)
310 if (kvm_ioapic_in_kernel()) {
311 dev
= qdev_create(NULL
, TYPE_KVM_IOAPIC
);
313 dev
= qdev_create(NULL
, TYPE_IOAPIC
);
316 object_property_add_child(object_resolve_path(parent_name
, NULL
),
317 "ioapic", OBJECT(dev
), NULL
);
319 qdev_init_nofail(dev
);
320 d
= SYS_BUS_DEVICE(dev
);
321 sysbus_mmio_map(d
, 0, IO_APIC_DEFAULT_ADDRESS
);
323 for (i
= 0; i
< IOAPIC_NUM_PINS
; i
++) {
324 gsi_state
->ioapic_irq
[i
] = qdev_get_gpio_in(dev
, i
);
333 } __attribute__((packed
));
337 * The entry point into the kernel for PVH boot is different from
338 * the native entry point. The PVH entry is defined by the x86/HVM
339 * direct boot ABI and is available in an ELFNOTE in the kernel binary.
341 * This function is passed to load_elf() when it is called from
342 * load_elfboot() which then additionally checks for an ELF Note of
343 * type XEN_ELFNOTE_PHYS32_ENTRY and passes it to this function to
344 * parse the PVH entry address from the ELF Note.
346 * Due to trickery in elf_opts.h, load_elf() is actually available as
347 * load_elf32() or load_elf64() and this routine needs to be able
348 * to deal with being called as 32 or 64 bit.
350 * The address of the PVH entry point is saved to the 'pvh_start_addr'
351 * global variable. (although the entry point is 32-bit, the kernel
352 * binary can be either 32-bit or 64-bit).
354 static uint64_t read_pvh_start_addr(void *arg1
, void *arg2
, bool is64
)
356 size_t *elf_note_data_addr
;
358 /* Check if ELF Note header passed in is valid */
364 struct elf64_note
*nhdr64
= (struct elf64_note
*)arg1
;
365 uint64_t nhdr_size64
= sizeof(struct elf64_note
);
366 uint64_t phdr_align
= *(uint64_t *)arg2
;
367 uint64_t nhdr_namesz
= nhdr64
->n_namesz
;
370 ((void *)nhdr64
) + nhdr_size64
+
371 QEMU_ALIGN_UP(nhdr_namesz
, phdr_align
);
373 struct elf32_note
*nhdr32
= (struct elf32_note
*)arg1
;
374 uint32_t nhdr_size32
= sizeof(struct elf32_note
);
375 uint32_t phdr_align
= *(uint32_t *)arg2
;
376 uint32_t nhdr_namesz
= nhdr32
->n_namesz
;
379 ((void *)nhdr32
) + nhdr_size32
+
380 QEMU_ALIGN_UP(nhdr_namesz
, phdr_align
);
383 pvh_start_addr
= *elf_note_data_addr
;
385 return pvh_start_addr
;
388 static bool load_elfboot(const char *kernel_filename
,
389 int kernel_file_size
,
391 size_t pvh_xen_start_addr
,
395 uint32_t mh_load_addr
= 0;
396 uint32_t elf_kernel_size
= 0;
398 uint64_t elf_low
, elf_high
;
401 if (ldl_p(header
) != 0x464c457f) {
402 return false; /* no elfboot */
405 bool elf_is64
= header
[EI_CLASS
] == ELFCLASS64
;
407 ((Elf64_Ehdr
*)header
)->e_flags
: ((Elf32_Ehdr
*)header
)->e_flags
;
409 if (flags
& 0x00010004) { /* LOAD_ELF_HEADER_HAS_ADDR */
410 error_report("elfboot unsupported flags = %x", flags
);
414 uint64_t elf_note_type
= XEN_ELFNOTE_PHYS32_ENTRY
;
415 kernel_size
= load_elf(kernel_filename
, read_pvh_start_addr
,
416 NULL
, &elf_note_type
, &elf_entry
,
417 &elf_low
, &elf_high
, 0, I386_ELF_MACHINE
,
420 if (kernel_size
< 0) {
421 error_report("Error while loading elf kernel");
424 mh_load_addr
= elf_low
;
425 elf_kernel_size
= elf_high
- elf_low
;
427 if (pvh_start_addr
== 0) {
428 error_report("Error loading uncompressed kernel without PVH ELF Note");
431 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_ENTRY
, pvh_start_addr
);
432 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_ADDR
, mh_load_addr
);
433 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_SIZE
, elf_kernel_size
);
438 void x86_load_linux(X86MachineState
*x86ms
,
442 bool linuxboot_dma_enabled
)
445 int setup_size
, kernel_size
, cmdline_size
;
446 int dtb_size
, setup_data_offset
;
448 uint8_t header
[8192], *setup
, *kernel
;
449 hwaddr real_addr
, prot_addr
, cmdline_addr
, initrd_addr
= 0;
452 MachineState
*machine
= MACHINE(x86ms
);
453 struct setup_data
*setup_data
;
454 const char *kernel_filename
= machine
->kernel_filename
;
455 const char *initrd_filename
= machine
->initrd_filename
;
456 const char *dtb_filename
= machine
->dtb
;
457 const char *kernel_cmdline
= machine
->kernel_cmdline
;
459 /* Align to 16 bytes as a paranoia measure */
460 cmdline_size
= (strlen(kernel_cmdline
) + 16) & ~15;
462 /* load the kernel header */
463 f
= fopen(kernel_filename
, "rb");
465 fprintf(stderr
, "qemu: could not open kernel file '%s': %s\n",
466 kernel_filename
, strerror(errno
));
470 kernel_size
= get_file_size(f
);
472 fread(header
, 1, MIN(ARRAY_SIZE(header
), kernel_size
), f
) !=
473 MIN(ARRAY_SIZE(header
), kernel_size
)) {
474 fprintf(stderr
, "qemu: could not load kernel '%s': %s\n",
475 kernel_filename
, strerror(errno
));
479 /* kernel protocol version */
480 if (ldl_p(header
+ 0x202) == 0x53726448) {
481 protocol
= lduw_p(header
+ 0x206);
484 * This could be a multiboot kernel. If it is, let's stop treating it
485 * like a Linux kernel.
486 * Note: some multiboot images could be in the ELF format (the same of
487 * PVH), so we try multiboot first since we check the multiboot magic
488 * header before to load it.
490 if (load_multiboot(fw_cfg
, f
, kernel_filename
, initrd_filename
,
491 kernel_cmdline
, kernel_size
, header
)) {
495 * Check if the file is an uncompressed kernel file (ELF) and load it,
496 * saving the PVH entry point used by the x86/HVM direct boot ABI.
497 * If load_elfboot() is successful, populate the fw_cfg info.
500 load_elfboot(kernel_filename
, kernel_size
,
501 header
, pvh_start_addr
, fw_cfg
)) {
504 fw_cfg_add_i32(fw_cfg
, FW_CFG_CMDLINE_SIZE
,
505 strlen(kernel_cmdline
) + 1);
506 fw_cfg_add_string(fw_cfg
, FW_CFG_CMDLINE_DATA
, kernel_cmdline
);
508 fw_cfg_add_i32(fw_cfg
, FW_CFG_SETUP_SIZE
, sizeof(header
));
509 fw_cfg_add_bytes(fw_cfg
, FW_CFG_SETUP_DATA
,
510 header
, sizeof(header
));
513 if (initrd_filename
) {
514 GMappedFile
*mapped_file
;
519 mapped_file
= g_mapped_file_new(initrd_filename
, false, &gerr
);
521 fprintf(stderr
, "qemu: error reading initrd %s: %s\n",
522 initrd_filename
, gerr
->message
);
525 x86ms
->initrd_mapped_file
= mapped_file
;
527 initrd_data
= g_mapped_file_get_contents(mapped_file
);
528 initrd_size
= g_mapped_file_get_length(mapped_file
);
529 initrd_max
= x86ms
->below_4g_mem_size
- acpi_data_size
- 1;
530 if (initrd_size
>= initrd_max
) {
531 fprintf(stderr
, "qemu: initrd is too large, cannot support."
532 "(max: %"PRIu32
", need %"PRId64
")\n",
533 initrd_max
, (uint64_t)initrd_size
);
537 initrd_addr
= (initrd_max
- initrd_size
) & ~4095;
539 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_ADDR
, initrd_addr
);
540 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_SIZE
, initrd_size
);
541 fw_cfg_add_bytes(fw_cfg
, FW_CFG_INITRD_DATA
, initrd_data
,
545 option_rom
[nb_option_roms
].bootindex
= 0;
546 option_rom
[nb_option_roms
].name
= "pvh.bin";
554 if (protocol
< 0x200 || !(header
[0x211] & 0x01)) {
557 cmdline_addr
= 0x9a000 - cmdline_size
;
559 } else if (protocol
< 0x202) {
560 /* High but ancient kernel */
562 cmdline_addr
= 0x9a000 - cmdline_size
;
563 prot_addr
= 0x100000;
565 /* High and recent kernel */
567 cmdline_addr
= 0x20000;
568 prot_addr
= 0x100000;
571 /* highest address for loading the initrd */
572 if (protocol
>= 0x20c &&
573 lduw_p(header
+ 0x236) & XLF_CAN_BE_LOADED_ABOVE_4G
) {
575 * Linux has supported initrd up to 4 GB for a very long time (2007,
576 * long before XLF_CAN_BE_LOADED_ABOVE_4G which was added in 2013),
577 * though it only sets initrd_max to 2 GB to "work around bootloader
578 * bugs". Luckily, QEMU firmware(which does something like bootloader)
579 * has supported this.
581 * It's believed that if XLF_CAN_BE_LOADED_ABOVE_4G is set, initrd can
582 * be loaded into any address.
584 * In addition, initrd_max is uint32_t simply because QEMU doesn't
585 * support the 64-bit boot protocol (specifically the ext_ramdisk_image
588 * Therefore here just limit initrd_max to UINT32_MAX simply as well.
590 initrd_max
= UINT32_MAX
;
591 } else if (protocol
>= 0x203) {
592 initrd_max
= ldl_p(header
+ 0x22c);
594 initrd_max
= 0x37ffffff;
597 if (initrd_max
>= x86ms
->below_4g_mem_size
- acpi_data_size
) {
598 initrd_max
= x86ms
->below_4g_mem_size
- acpi_data_size
- 1;
601 fw_cfg_add_i32(fw_cfg
, FW_CFG_CMDLINE_ADDR
, cmdline_addr
);
602 fw_cfg_add_i32(fw_cfg
, FW_CFG_CMDLINE_SIZE
, strlen(kernel_cmdline
) + 1);
603 fw_cfg_add_string(fw_cfg
, FW_CFG_CMDLINE_DATA
, kernel_cmdline
);
605 if (protocol
>= 0x202) {
606 stl_p(header
+ 0x228, cmdline_addr
);
608 stw_p(header
+ 0x20, 0xA33F);
609 stw_p(header
+ 0x22, cmdline_addr
- real_addr
);
612 /* handle vga= parameter */
613 vmode
= strstr(kernel_cmdline
, "vga=");
615 unsigned int video_mode
;
619 if (!strncmp(vmode
, "normal", 6)) {
621 } else if (!strncmp(vmode
, "ext", 3)) {
623 } else if (!strncmp(vmode
, "ask", 3)) {
626 ret
= qemu_strtoui(vmode
, NULL
, 0, &video_mode
);
628 fprintf(stderr
, "qemu: can't parse 'vga' parameter: %s\n",
633 stw_p(header
+ 0x1fa, video_mode
);
638 * High nybble = B reserved for QEMU; low nybble is revision number.
639 * If this code is substantially changed, you may want to consider
640 * incrementing the revision.
642 if (protocol
>= 0x200) {
643 header
[0x210] = 0xB0;
646 if (protocol
>= 0x201) {
647 header
[0x211] |= 0x80; /* CAN_USE_HEAP */
648 stw_p(header
+ 0x224, cmdline_addr
- real_addr
- 0x200);
652 if (initrd_filename
) {
653 GMappedFile
*mapped_file
;
658 if (protocol
< 0x200) {
659 fprintf(stderr
, "qemu: linux kernel too old to load a ram disk\n");
663 mapped_file
= g_mapped_file_new(initrd_filename
, false, &gerr
);
665 fprintf(stderr
, "qemu: error reading initrd %s: %s\n",
666 initrd_filename
, gerr
->message
);
669 x86ms
->initrd_mapped_file
= mapped_file
;
671 initrd_data
= g_mapped_file_get_contents(mapped_file
);
672 initrd_size
= g_mapped_file_get_length(mapped_file
);
673 if (initrd_size
>= initrd_max
) {
674 fprintf(stderr
, "qemu: initrd is too large, cannot support."
675 "(max: %"PRIu32
", need %"PRId64
")\n",
676 initrd_max
, (uint64_t)initrd_size
);
680 initrd_addr
= (initrd_max
- initrd_size
) & ~4095;
682 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_ADDR
, initrd_addr
);
683 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_SIZE
, initrd_size
);
684 fw_cfg_add_bytes(fw_cfg
, FW_CFG_INITRD_DATA
, initrd_data
, initrd_size
);
686 stl_p(header
+ 0x218, initrd_addr
);
687 stl_p(header
+ 0x21c, initrd_size
);
690 /* load kernel and setup */
691 setup_size
= header
[0x1f1];
692 if (setup_size
== 0) {
695 setup_size
= (setup_size
+ 1) * 512;
696 if (setup_size
> kernel_size
) {
697 fprintf(stderr
, "qemu: invalid kernel header\n");
700 kernel_size
-= setup_size
;
702 setup
= g_malloc(setup_size
);
703 kernel
= g_malloc(kernel_size
);
704 fseek(f
, 0, SEEK_SET
);
705 if (fread(setup
, 1, setup_size
, f
) != setup_size
) {
706 fprintf(stderr
, "fread() failed\n");
709 if (fread(kernel
, 1, kernel_size
, f
) != kernel_size
) {
710 fprintf(stderr
, "fread() failed\n");
715 /* append dtb to kernel */
717 if (protocol
< 0x209) {
718 fprintf(stderr
, "qemu: Linux kernel too old to load a dtb\n");
722 dtb_size
= get_image_size(dtb_filename
);
724 fprintf(stderr
, "qemu: error reading dtb %s: %s\n",
725 dtb_filename
, strerror(errno
));
729 setup_data_offset
= QEMU_ALIGN_UP(kernel_size
, 16);
730 kernel_size
= setup_data_offset
+ sizeof(struct setup_data
) + dtb_size
;
731 kernel
= g_realloc(kernel
, kernel_size
);
733 stq_p(header
+ 0x250, prot_addr
+ setup_data_offset
);
735 setup_data
= (struct setup_data
*)(kernel
+ setup_data_offset
);
736 setup_data
->next
= 0;
737 setup_data
->type
= cpu_to_le32(SETUP_DTB
);
738 setup_data
->len
= cpu_to_le32(dtb_size
);
740 load_image_size(dtb_filename
, setup_data
->data
, dtb_size
);
743 memcpy(setup
, header
, MIN(sizeof(header
), setup_size
));
745 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_ADDR
, prot_addr
);
746 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_SIZE
, kernel_size
);
747 fw_cfg_add_bytes(fw_cfg
, FW_CFG_KERNEL_DATA
, kernel
, kernel_size
);
749 fw_cfg_add_i32(fw_cfg
, FW_CFG_SETUP_ADDR
, real_addr
);
750 fw_cfg_add_i32(fw_cfg
, FW_CFG_SETUP_SIZE
, setup_size
);
751 fw_cfg_add_bytes(fw_cfg
, FW_CFG_SETUP_DATA
, setup
, setup_size
);
753 option_rom
[nb_option_roms
].bootindex
= 0;
754 option_rom
[nb_option_roms
].name
= "linuxboot.bin";
755 if (linuxboot_dma_enabled
&& fw_cfg_dma_enabled(fw_cfg
)) {
756 option_rom
[nb_option_roms
].name
= "linuxboot_dma.bin";
761 void x86_bios_rom_init(MemoryRegion
*rom_memory
, bool isapc_ram_fw
)
764 MemoryRegion
*bios
, *isa_bios
;
765 int bios_size
, isa_bios_size
;
769 if (bios_name
== NULL
) {
770 bios_name
= BIOS_FILENAME
;
772 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
774 bios_size
= get_image_size(filename
);
778 if (bios_size
<= 0 ||
779 (bios_size
% 65536) != 0) {
782 bios
= g_malloc(sizeof(*bios
));
783 memory_region_init_ram(bios
, NULL
, "pc.bios", bios_size
, &error_fatal
);
785 memory_region_set_readonly(bios
, true);
787 ret
= rom_add_file_fixed(bios_name
, (uint32_t)(-bios_size
), -1);
790 fprintf(stderr
, "qemu: could not load PC BIOS '%s'\n", bios_name
);
795 /* map the last 128KB of the BIOS in ISA space */
796 isa_bios_size
= MIN(bios_size
, 128 * KiB
);
797 isa_bios
= g_malloc(sizeof(*isa_bios
));
798 memory_region_init_alias(isa_bios
, NULL
, "isa-bios", bios
,
799 bios_size
- isa_bios_size
, isa_bios_size
);
800 memory_region_add_subregion_overlap(rom_memory
,
801 0x100000 - isa_bios_size
,
805 memory_region_set_readonly(isa_bios
, true);
808 /* map all the bios at the top of memory */
809 memory_region_add_subregion(rom_memory
,
810 (uint32_t)(-bios_size
),
814 static void x86_machine_get_max_ram_below_4g(Object
*obj
, Visitor
*v
,
815 const char *name
, void *opaque
,
818 X86MachineState
*x86ms
= X86_MACHINE(obj
);
819 uint64_t value
= x86ms
->max_ram_below_4g
;
821 visit_type_size(v
, name
, &value
, errp
);
824 static void x86_machine_set_max_ram_below_4g(Object
*obj
, Visitor
*v
,
825 const char *name
, void *opaque
,
828 X86MachineState
*x86ms
= X86_MACHINE(obj
);
832 visit_type_size(v
, name
, &value
, &error
);
834 error_propagate(errp
, error
);
837 if (value
> 4 * GiB
) {
839 "Machine option 'max-ram-below-4g=%"PRIu64
840 "' expects size less than or equal to 4G", value
);
841 error_propagate(errp
, error
);
845 if (value
< 1 * MiB
) {
846 warn_report("Only %" PRIu64
" bytes of RAM below the 4GiB boundary,"
847 "BIOS may not work with less than 1MiB", value
);
850 x86ms
->max_ram_below_4g
= value
;
853 bool x86_machine_is_smm_enabled(X86MachineState
*x86ms
)
855 bool smm_available
= false;
857 if (x86ms
->smm
== ON_OFF_AUTO_OFF
) {
861 if (tcg_enabled() || qtest_enabled()) {
862 smm_available
= true;
863 } else if (kvm_enabled()) {
864 smm_available
= kvm_has_smm();
871 if (x86ms
->smm
== ON_OFF_AUTO_ON
) {
872 error_report("System Management Mode not supported by this hypervisor.");
878 static void x86_machine_get_smm(Object
*obj
, Visitor
*v
, const char *name
,
879 void *opaque
, Error
**errp
)
881 X86MachineState
*x86ms
= X86_MACHINE(obj
);
882 OnOffAuto smm
= x86ms
->smm
;
884 visit_type_OnOffAuto(v
, name
, &smm
, errp
);
887 static void x86_machine_set_smm(Object
*obj
, Visitor
*v
, const char *name
,
888 void *opaque
, Error
**errp
)
890 X86MachineState
*x86ms
= X86_MACHINE(obj
);
892 visit_type_OnOffAuto(v
, name
, &x86ms
->smm
, errp
);
895 static void x86_machine_initfn(Object
*obj
)
897 X86MachineState
*x86ms
= X86_MACHINE(obj
);
899 x86ms
->smm
= ON_OFF_AUTO_AUTO
;
900 x86ms
->max_ram_below_4g
= 0; /* use default */
904 static void x86_machine_class_init(ObjectClass
*oc
, void *data
)
906 MachineClass
*mc
= MACHINE_CLASS(oc
);
907 X86MachineClass
*x86mc
= X86_MACHINE_CLASS(oc
);
908 NMIClass
*nc
= NMI_CLASS(oc
);
910 mc
->cpu_index_to_instance_props
= x86_cpu_index_to_props
;
911 mc
->get_default_cpu_node_id
= x86_get_default_cpu_node_id
;
912 mc
->possible_cpu_arch_ids
= x86_possible_cpu_arch_ids
;
913 x86mc
->compat_apic_id_mode
= false;
914 x86mc
->save_tsc_khz
= true;
915 nc
->nmi_monitor_handler
= x86_nmi
;
917 object_class_property_add(oc
, X86_MACHINE_MAX_RAM_BELOW_4G
, "size",
918 x86_machine_get_max_ram_below_4g
, x86_machine_set_max_ram_below_4g
,
919 NULL
, NULL
, &error_abort
);
920 object_class_property_set_description(oc
, X86_MACHINE_MAX_RAM_BELOW_4G
,
921 "Maximum ram below the 4G boundary (32bit boundary)", &error_abort
);
923 object_class_property_add(oc
, X86_MACHINE_SMM
, "OnOffAuto",
924 x86_machine_get_smm
, x86_machine_set_smm
,
925 NULL
, NULL
, &error_abort
);
926 object_class_property_set_description(oc
, X86_MACHINE_SMM
,
927 "Enable SMM", &error_abort
);
930 static const TypeInfo x86_machine_info
= {
931 .name
= TYPE_X86_MACHINE
,
932 .parent
= TYPE_MACHINE
,
934 .instance_size
= sizeof(X86MachineState
),
935 .instance_init
= x86_machine_initfn
,
936 .class_size
= sizeof(X86MachineClass
),
937 .class_init
= x86_machine_class_init
,
938 .interfaces
= (InterfaceInfo
[]) {
944 static void x86_machine_register_types(void)
946 type_register_static(&x86_machine_info
);
949 type_init(x86_machine_register_types
)