Include hw/irq.h a lot less
[qemu/ar7.git] / hw / char / serial-pci.c
blob808d32b508b2a3d311158ac51a274896b07a779a
1 /*
2 * QEMU 16550A UART emulation
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 * Copyright (c) 2008 Citrix Systems, Inc.
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
26 /* see docs/specs/pci-serial.txt */
28 #include "qemu/osdep.h"
29 #include "qapi/error.h"
30 #include "qemu/module.h"
31 #include "hw/char/serial.h"
32 #include "hw/irq.h"
33 #include "hw/pci/pci.h"
35 typedef struct PCISerialState {
36 PCIDevice dev;
37 SerialState state;
38 uint8_t prog_if;
39 } PCISerialState;
42 static void serial_pci_realize(PCIDevice *dev, Error **errp)
44 PCISerialState *pci = DO_UPCAST(PCISerialState, dev, dev);
45 SerialState *s = &pci->state;
46 Error *err = NULL;
48 s->baudbase = 115200;
49 serial_realize_core(s, &err);
50 if (err != NULL) {
51 error_propagate(errp, err);
52 return;
55 pci->dev.config[PCI_CLASS_PROG] = pci->prog_if;
56 pci->dev.config[PCI_INTERRUPT_PIN] = 0x01;
57 s->irq = pci_allocate_irq(&pci->dev);
59 memory_region_init_io(&s->io, OBJECT(pci), &serial_io_ops, s, "serial", 8);
60 pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io);
63 static void serial_pci_exit(PCIDevice *dev)
65 PCISerialState *pci = DO_UPCAST(PCISerialState, dev, dev);
66 SerialState *s = &pci->state;
68 serial_exit_core(s);
69 qemu_free_irq(s->irq);
72 static const VMStateDescription vmstate_pci_serial = {
73 .name = "pci-serial",
74 .version_id = 1,
75 .minimum_version_id = 1,
76 .fields = (VMStateField[]) {
77 VMSTATE_PCI_DEVICE(dev, PCISerialState),
78 VMSTATE_STRUCT(state, PCISerialState, 0, vmstate_serial, SerialState),
79 VMSTATE_END_OF_LIST()
83 static Property serial_pci_properties[] = {
84 DEFINE_PROP_CHR("chardev", PCISerialState, state.chr),
85 DEFINE_PROP_UINT8("prog_if", PCISerialState, prog_if, 0x02),
86 DEFINE_PROP_END_OF_LIST(),
89 static void serial_pci_class_initfn(ObjectClass *klass, void *data)
91 DeviceClass *dc = DEVICE_CLASS(klass);
92 PCIDeviceClass *pc = PCI_DEVICE_CLASS(klass);
93 pc->realize = serial_pci_realize;
94 pc->exit = serial_pci_exit;
95 pc->vendor_id = PCI_VENDOR_ID_REDHAT;
96 pc->device_id = PCI_DEVICE_ID_REDHAT_SERIAL;
97 pc->revision = 1;
98 pc->class_id = PCI_CLASS_COMMUNICATION_SERIAL;
99 dc->vmsd = &vmstate_pci_serial;
100 dc->props = serial_pci_properties;
101 set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
104 static const TypeInfo serial_pci_info = {
105 .name = "pci-serial",
106 .parent = TYPE_PCI_DEVICE,
107 .instance_size = sizeof(PCISerialState),
108 .class_init = serial_pci_class_initfn,
109 .interfaces = (InterfaceInfo[]) {
110 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
111 { },
115 static void serial_pci_register_types(void)
117 type_register_static(&serial_pci_info);
120 type_init(serial_pci_register_types)