user-exec.c

   1 /*
   2  *  User emulator execution
   3  *
   4  *  Copyright (c) 2003-2005 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19 #include "qemu/osdep.h"
  20 #include "cpu.h"
  21 #include "disas/disas.h"
  22 #include "exec/exec-all.h"
  23 #include "tcg.h"
  24 #include "qemu/bitops.h"
  25 #include "exec/cpu_ldst.h"
  26 #include "translate-all.h"
  27
  28 #undef EAX
  29 #undef ECX
  30 #undef EDX
  31 #undef EBX
  32 #undef ESP
  33 #undef EBP
  34 #undef ESI
  35 #undef EDI
  36 #undef EIP
  37 #ifdef __linux__
  38 #include <sys/ucontext.h>
  39 #endif
  40
  41 //#define DEBUG_SIGNAL
  42
  43 /* exit the current TB from a signal handler. The host registers are
  44    restored in a state compatible with the CPU emulator
  45  */
  46 static void cpu_exit_tb_from_sighandler(CPUState *cpu, sigset_t *old_set)
  47 {
  48     /* XXX: use siglongjmp ? */
  49     sigprocmask(SIG_SETMASK, old_set, NULL);
  50     cpu_loop_exit_noexc(cpu);
  51 }
  52
  53 /* 'pc' is the host PC at which the exception was raised. 'address' is
  54    the effective address of the memory exception. 'is_write' is 1 if a
  55    write caused the exception and otherwise 0'. 'old_set' is the
  56    signal set which should be restored */
  57 static inline int handle_cpu_signal(uintptr_t pc, void *ptr,
  58                                     int is_write, sigset_t *old_set)
  59 {
  60     uintptr_t address = (uintptr_t)ptr;
  61     CPUState *cpu = current_cpu;
  62     CPUClass *cc;
  63     int ret;
  64
  65     /* For synchronous signals we expect to be coming from the vCPU
  66      * thread (so current_cpu should be valid) and either from running
  67      * code or during translation which can fault as we cross pages.
  68      *
  69      * If neither is true then something has gone wrong and we should
  70      * abort rather than try and restart the vCPU execution.
  71      */
  72     if (!cpu || !cpu->running) {
  73         printf("qemu:%s received signal outside vCPU context @ pc=0x%"
  74                PRIxPTR "\n",  __func__, pc);
  75         abort();
  76     }
  77
  78 #if defined(DEBUG_SIGNAL)
  79     printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n",
  80            pc, address, is_write, *(unsigned long *)old_set);
  81 #endif
  82     /* XXX: locking issue */
  83     if (is_write && h2g_valid(address)) {
  84         switch (page_unprotect(h2g(address), pc)) {
  85         case 0:
  86             /* Fault not caused by a page marked unwritable to protect
  87              * cached translations, must be the guest binary's problem
  88              */
  89             break;
  90         case 1:
  91             /* Fault caused by protection of cached translation; TBs
  92              * invalidated, so resume execution
  93              */
  94             return 1;
  95         case 2:
  96             /* Fault caused by protection of cached translation, and the
  97              * currently executing TB was modified and must be exited
  98              * immediately.
  99              */
 100             cpu_exit_tb_from_sighandler(cpu, old_set);
 101             g_assert_not_reached();
 102         default:
 103             g_assert_not_reached();
 104         }
 105     }
 106
 107     /* Convert forcefully to guest address space, invalid addresses
 108        are still valid segv ones */
 109     address = h2g_nocheck(address);
 110
 111     cc = CPU_GET_CLASS(cpu);
 112     /* see if it is an MMU fault */
 113     g_assert(cc->handle_mmu_fault);
 114     ret = cc->handle_mmu_fault(cpu, address, is_write, MMU_USER_IDX);
 115     if (ret < 0) {
 116         return 0; /* not an MMU fault */
 117     }
 118     if (ret == 0) {
 119         return 1; /* the MMU fault was handled without causing real CPU fault */
 120     }
 121
 122     /* Now we have a real cpu fault.  Since this is the exact location of
 123      * the exception, we must undo the adjustment done by cpu_restore_state
 124      * for handling call return addresses.  */
 125     cpu_restore_state(cpu, pc + GETPC_ADJ);
 126
 127     sigprocmask(SIG_SETMASK, old_set, NULL);
 128     cpu_loop_exit(cpu);
 129
 130     /* never comes here */
 131     return 1;
 132 }
 133
 134 #if defined(__i386__)
 135
 136 #if defined(__NetBSD__)
 137 #include <ucontext.h>
 138
 139 #define EIP_sig(context)     ((context)->uc_mcontext.__gregs[_REG_EIP])
 140 #define TRAP_sig(context)    ((context)->uc_mcontext.__gregs[_REG_TRAPNO])
 141 #define ERROR_sig(context)   ((context)->uc_mcontext.__gregs[_REG_ERR])
 142 #define MASK_sig(context)    ((context)->uc_sigmask)
 143 #elif defined(__FreeBSD__) || defined(__DragonFly__)
 144 #include <ucontext.h>
 145
 146 #define EIP_sig(context)  (*((unsigned long *)&(context)->uc_mcontext.mc_eip))
 147 #define TRAP_sig(context)    ((context)->uc_mcontext.mc_trapno)
 148 #define ERROR_sig(context)   ((context)->uc_mcontext.mc_err)
 149 #define MASK_sig(context)    ((context)->uc_sigmask)
 150 #elif defined(__OpenBSD__)
 151 #define EIP_sig(context)     ((context)->sc_eip)
 152 #define TRAP_sig(context)    ((context)->sc_trapno)
 153 #define ERROR_sig(context)   ((context)->sc_err)
 154 #define MASK_sig(context)    ((context)->sc_mask)
 155 #else
 156 #define EIP_sig(context)     ((context)->uc_mcontext.gregs[REG_EIP])
 157 #define TRAP_sig(context)    ((context)->uc_mcontext.gregs[REG_TRAPNO])
 158 #define ERROR_sig(context)   ((context)->uc_mcontext.gregs[REG_ERR])
 159 #define MASK_sig(context)    ((context)->uc_sigmask)
 160 #endif
 161
 162 int cpu_signal_handler(int host_signum, void *pinfo,
 163                        void *puc)
 164 {
 165     siginfo_t *info = pinfo;
 166 #if defined(__NetBSD__) || defined(__FreeBSD__) || defined(__DragonFly__)
 167     ucontext_t *uc = puc;
 168 #elif defined(__OpenBSD__)
 169     struct sigcontext *uc = puc;
 170 #else
 171     struct ucontext *uc = puc;
 172 #endif
 173     uintptr_t pc;
 174     int trapno;
 175
 176 #ifndef REG_EIP
 177 /* for glibc 2.1 */
 178 #define REG_EIP    EIP
 179 #define REG_ERR    ERR
 180 #define REG_TRAPNO TRAPNO
 181 #endif
 182     pc = EIP_sig(uc);
 183     trapno = TRAP_sig(uc);
 184     return handle_cpu_signal(pc, info->si_addr,
 185                              trapno == 0xe ?
 186                              (ERROR_sig(uc) >> 1) & 1 : 0,
 187                              &MASK_sig(uc));
 188 }
 189
 190 #elif defined(__x86_64__)
 191
 192 #ifdef __NetBSD__
 193 #define PC_sig(context)       _UC_MACHINE_PC(context)
 194 #define TRAP_sig(context)     ((context)->uc_mcontext.__gregs[_REG_TRAPNO])
 195 #define ERROR_sig(context)    ((context)->uc_mcontext.__gregs[_REG_ERR])
 196 #define MASK_sig(context)     ((context)->uc_sigmask)
 197 #elif defined(__OpenBSD__)
 198 #define PC_sig(context)       ((context)->sc_rip)
 199 #define TRAP_sig(context)     ((context)->sc_trapno)
 200 #define ERROR_sig(context)    ((context)->sc_err)
 201 #define MASK_sig(context)     ((context)->sc_mask)
 202 #elif defined(__FreeBSD__) || defined(__DragonFly__)
 203 #include <ucontext.h>
 204
 205 #define PC_sig(context)  (*((unsigned long *)&(context)->uc_mcontext.mc_rip))
 206 #define TRAP_sig(context)     ((context)->uc_mcontext.mc_trapno)
 207 #define ERROR_sig(context)    ((context)->uc_mcontext.mc_err)
 208 #define MASK_sig(context)     ((context)->uc_sigmask)
 209 #else
 210 #define PC_sig(context)       ((context)->uc_mcontext.gregs[REG_RIP])
 211 #define TRAP_sig(context)     ((context)->uc_mcontext.gregs[REG_TRAPNO])
 212 #define ERROR_sig(context)    ((context)->uc_mcontext.gregs[REG_ERR])
 213 #define MASK_sig(context)     ((context)->uc_sigmask)
 214 #endif
 215
 216 int cpu_signal_handler(int host_signum, void *pinfo,
 217                        void *puc)
 218 {
 219     siginfo_t *info = pinfo;
 220     uintptr_t pc;
 221 #if defined(__NetBSD__) || defined(__FreeBSD__) || defined(__DragonFly__)
 222     ucontext_t *uc = puc;
 223 #elif defined(__OpenBSD__)
 224     struct sigcontext *uc = puc;
 225 #else
 226     struct ucontext *uc = puc;
 227 #endif
 228
 229     pc = PC_sig(uc);
 230     return handle_cpu_signal(pc, info->si_addr,
 231                              TRAP_sig(uc) == 0xe ?
 232                              (ERROR_sig(uc) >> 1) & 1 : 0,
 233                              &MASK_sig(uc));
 234 }
 235
 236 #elif defined(_ARCH_PPC)
 237
 238 /***********************************************************************
 239  * signal context platform-specific definitions
 240  * From Wine
 241  */
 242 #ifdef linux
 243 /* All Registers access - only for local access */
 244 #define REG_sig(reg_name, context)              \
 245     ((context)->uc_mcontext.regs->reg_name)
 246 /* Gpr Registers access  */
 247 #define GPR_sig(reg_num, context)              REG_sig(gpr[reg_num], context)
 248 /* Program counter */
 249 #define IAR_sig(context)                       REG_sig(nip, context)
 250 /* Machine State Register (Supervisor) */
 251 #define MSR_sig(context)                       REG_sig(msr, context)
 252 /* Count register */
 253 #define CTR_sig(context)                       REG_sig(ctr, context)
 254 /* User's integer exception register */
 255 #define XER_sig(context)                       REG_sig(xer, context)
 256 /* Link register */
 257 #define LR_sig(context)                        REG_sig(link, context)
 258 /* Condition register */
 259 #define CR_sig(context)                        REG_sig(ccr, context)
 260
 261 /* Float Registers access  */
 262 #define FLOAT_sig(reg_num, context)                                     \
 263     (((double *)((char *)((context)->uc_mcontext.regs + 48 * 4)))[reg_num])
 264 #define FPSCR_sig(context) \
 265     (*(int *)((char *)((context)->uc_mcontext.regs + (48 + 32 * 2) * 4)))
 266 /* Exception Registers access */
 267 #define DAR_sig(context)                       REG_sig(dar, context)
 268 #define DSISR_sig(context)                     REG_sig(dsisr, context)
 269 #define TRAP_sig(context)                      REG_sig(trap, context)
 270 #endif /* linux */
 271
 272 #if defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
 273 #include <ucontext.h>
 274 #define IAR_sig(context)               ((context)->uc_mcontext.mc_srr0)
 275 #define MSR_sig(context)               ((context)->uc_mcontext.mc_srr1)
 276 #define CTR_sig(context)               ((context)->uc_mcontext.mc_ctr)
 277 #define XER_sig(context)               ((context)->uc_mcontext.mc_xer)
 278 #define LR_sig(context)                ((context)->uc_mcontext.mc_lr)
 279 #define CR_sig(context)                ((context)->uc_mcontext.mc_cr)
 280 /* Exception Registers access */
 281 #define DAR_sig(context)               ((context)->uc_mcontext.mc_dar)
 282 #define DSISR_sig(context)             ((context)->uc_mcontext.mc_dsisr)
 283 #define TRAP_sig(context)              ((context)->uc_mcontext.mc_exc)
 284 #endif /* __FreeBSD__|| __FreeBSD_kernel__ */
 285
 286 int cpu_signal_handler(int host_signum, void *pinfo,
 287                        void *puc)
 288 {
 289     siginfo_t *info = pinfo;
 290 #if defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
 291     ucontext_t *uc = puc;
 292 #else
 293     struct ucontext *uc = puc;
 294 #endif
 295     uintptr_t pc;
 296     int is_write;
 297
 298     pc = IAR_sig(uc);
 299     is_write = 0;
 300 #if 0
 301     /* ppc 4xx case */
 302     if (DSISR_sig(uc) & 0x00800000) {
 303         is_write = 1;
 304     }
 305 #else
 306     if (TRAP_sig(uc) != 0x400 && (DSISR_sig(uc) & 0x02000000)) {
 307         is_write = 1;
 308     }
 309 #endif
 310     return handle_cpu_signal(pc, info->si_addr, is_write, &uc->uc_sigmask);
 311 }
 312
 313 #elif defined(__alpha__)
 314
 315 int cpu_signal_handler(int host_signum, void *pinfo,
 316                            void *puc)
 317 {
 318     siginfo_t *info = pinfo;
 319     struct ucontext *uc = puc;
 320     uint32_t *pc = uc->uc_mcontext.sc_pc;
 321     uint32_t insn = *pc;
 322     int is_write = 0;
 323
 324     /* XXX: need kernel patch to get write flag faster */
 325     switch (insn >> 26) {
 326     case 0x0d: /* stw */
 327     case 0x0e: /* stb */
 328     case 0x0f: /* stq_u */
 329     case 0x24: /* stf */
 330     case 0x25: /* stg */
 331     case 0x26: /* sts */
 332     case 0x27: /* stt */
 333     case 0x2c: /* stl */
 334     case 0x2d: /* stq */
 335     case 0x2e: /* stl_c */
 336     case 0x2f: /* stq_c */
 337         is_write = 1;
 338     }
 339
 340     return handle_cpu_signal(pc, info->si_addr, is_write, &uc->uc_sigmask);
 341 }
 342 #elif defined(__sparc__)
 343
 344 int cpu_signal_handler(int host_signum, void *pinfo,
 345                        void *puc)
 346 {
 347     siginfo_t *info = pinfo;
 348     int is_write;
 349     uint32_t insn;
 350 #if !defined(__arch64__) || defined(CONFIG_SOLARIS)
 351     uint32_t *regs = (uint32_t *)(info + 1);
 352     void *sigmask = (regs + 20);
 353     /* XXX: is there a standard glibc define ? */
 354     uintptr_t pc = regs[1];
 355 #else
 356 #ifdef __linux__
 357     struct sigcontext *sc = puc;
 358     uintptr_t pc = sc->sigc_regs.tpc;
 359     void *sigmask = (void *)sc->sigc_mask;
 360 #elif defined(__OpenBSD__)
 361     struct sigcontext *uc = puc;
 362     uintptr_t pc = uc->sc_pc;
 363     void *sigmask = (void *)(long)uc->sc_mask;
 364 #elif defined(__NetBSD__)
 365     ucontext_t *uc = puc;
 366     unsigned long pc = _UC_MACHINE_PC(uc);
 367     void *sigmask = (void *)&uc->uc_sigmask;
 368 #endif
 369 #endif
 370
 371     /* XXX: need kernel patch to get write flag faster */
 372     is_write = 0;
 373     insn = *(uint32_t *)pc;
 374     if ((insn >> 30) == 3) {
 375         switch ((insn >> 19) & 0x3f) {
 376         case 0x05: /* stb */
 377         case 0x15: /* stba */
 378         case 0x06: /* sth */
 379         case 0x16: /* stha */
 380         case 0x04: /* st */
 381         case 0x14: /* sta */
 382         case 0x07: /* std */
 383         case 0x17: /* stda */
 384         case 0x0e: /* stx */
 385         case 0x1e: /* stxa */
 386         case 0x24: /* stf */
 387         case 0x34: /* stfa */
 388         case 0x27: /* stdf */
 389         case 0x37: /* stdfa */
 390         case 0x26: /* stqf */
 391         case 0x36: /* stqfa */
 392         case 0x25: /* stfsr */
 393         case 0x3c: /* casa */
 394         case 0x3e: /* casxa */
 395             is_write = 1;
 396             break;
 397         }
 398     }
 399     return handle_cpu_signal(pc, info->si_addr, is_write, sigmask);
 400 }
 401
 402 #elif defined(__arm__)
 403
 404 #if defined(__NetBSD__)
 405 #include <ucontext.h>
 406 #endif
 407
 408 int cpu_signal_handler(int host_signum, void *pinfo,
 409                        void *puc)
 410 {
 411     siginfo_t *info = pinfo;
 412 #if defined(__NetBSD__)
 413     ucontext_t *uc = puc;
 414 #else
 415     struct ucontext *uc = puc;
 416 #endif
 417     uintptr_t pc;
 418     int is_write;
 419
 420 #if defined(__NetBSD__)
 421     pc = uc->uc_mcontext.__gregs[_REG_R15];
 422 #elif defined(__GLIBC__) && (__GLIBC__ < 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ <= 3))
 423     pc = uc->uc_mcontext.gregs[R15];
 424 #else
 425     pc = uc->uc_mcontext.arm_pc;
 426 #endif
 427
 428     /* error_code is the FSR value, in which bit 11 is WnR (assuming a v6 or
 429      * later processor; on v5 we will always report this as a read).
 430      */
 431     is_write = extract32(uc->uc_mcontext.error_code, 11, 1);
 432     return handle_cpu_signal(pc, info->si_addr, is_write, &uc->uc_sigmask);
 433 }
 434
 435 #elif defined(__aarch64__)
 436
 437 int cpu_signal_handler(int host_signum, void *pinfo, void *puc)
 438 {
 439     siginfo_t *info = pinfo;
 440     struct ucontext *uc = puc;
 441     uintptr_t pc = uc->uc_mcontext.pc;
 442     uint32_t insn = *(uint32_t *)pc;
 443     bool is_write;
 444
 445     /* XXX: need kernel patch to get write flag faster.  */
 446     is_write = (   (insn & 0xbfff0000) == 0x0c000000   /* C3.3.1 */
 447                 || (insn & 0xbfe00000) == 0x0c800000   /* C3.3.2 */
 448                 || (insn & 0xbfdf0000) == 0x0d000000   /* C3.3.3 */
 449                 || (insn & 0xbfc00000) == 0x0d800000   /* C3.3.4 */
 450                 || (insn & 0x3f400000) == 0x08000000   /* C3.3.6 */
 451                 || (insn & 0x3bc00000) == 0x39000000   /* C3.3.13 */
 452                 || (insn & 0x3fc00000) == 0x3d800000   /* ... 128bit */
 453                 /* Ingore bits 10, 11 & 21, controlling indexing.  */
 454                 || (insn & 0x3bc00000) == 0x38000000   /* C3.3.8-12 */
 455                 || (insn & 0x3fe00000) == 0x3c800000   /* ... 128bit */
 456                 /* Ignore bits 23 & 24, controlling indexing.  */
 457                 || (insn & 0x3a400000) == 0x28000000); /* C3.3.7,14-16 */
 458
 459     return handle_cpu_signal(pc, (uintptr_t)info->si_addr,
 460                              is_write, &uc->uc_sigmask);
 461 }
 462
 463 #elif defined(__mc68000)
 464
 465 int cpu_signal_handler(int host_signum, void *pinfo,
 466                        void *puc)
 467 {
 468     siginfo_t *info = pinfo;
 469     struct ucontext *uc = puc;
 470     uintptr_t pc;
 471     int is_write;
 472
 473     pc = uc->uc_mcontext.gregs[16];
 474     /* XXX: compute is_write */
 475     is_write = 0;
 476     return handle_cpu_signal(pc, info->si_addr, is_write, &uc->uc_sigmask);
 477 }
 478
 479 #elif defined(__ia64)
 480
 481 #ifndef __ISR_VALID
 482   /* This ought to be in <bits/siginfo.h>... */
 483 # define __ISR_VALID    1
 484 #endif
 485
 486 int cpu_signal_handler(int host_signum, void *pinfo, void *puc)
 487 {
 488     siginfo_t *info = pinfo;
 489     struct ucontext *uc = puc;
 490     unsigned long ip;
 491     int is_write = 0;
 492
 493     ip = uc->uc_mcontext.sc_ip;
 494     switch (host_signum) {
 495     case SIGILL:
 496     case SIGFPE:
 497     case SIGSEGV:
 498     case SIGBUS:
 499     case SIGTRAP:
 500         if (info->si_code && (info->si_segvflags & __ISR_VALID)) {
 501             /* ISR.W (write-access) is bit 33:  */
 502             is_write = (info->si_isr >> 33) & 1;
 503         }
 504         break;
 505
 506     default:
 507         break;
 508     }
 509     return handle_cpu_signal(ip, info->si_addr, is_write,
 510                              (sigset_t *)&uc->uc_sigmask);
 511 }
 512
 513 #elif defined(__s390__)
 514
 515 int cpu_signal_handler(int host_signum, void *pinfo,
 516                        void *puc)
 517 {
 518     siginfo_t *info = pinfo;
 519     struct ucontext *uc = puc;
 520     uintptr_t pc;
 521     uint16_t *pinsn;
 522     int is_write = 0;
 523
 524     pc = uc->uc_mcontext.psw.addr;
 525
 526     /* ??? On linux, the non-rt signal handler has 4 (!) arguments instead
 527        of the normal 2 arguments.  The 3rd argument contains the "int_code"
 528        from the hardware which does in fact contain the is_write value.
 529        The rt signal handler, as far as I can tell, does not give this value
 530        at all.  Not that we could get to it from here even if it were.  */
 531     /* ??? This is not even close to complete, since it ignores all
 532        of the read-modify-write instructions.  */
 533     pinsn = (uint16_t *)pc;
 534     switch (pinsn[0] >> 8) {
 535     case 0x50: /* ST */
 536     case 0x42: /* STC */
 537     case 0x40: /* STH */
 538         is_write = 1;
 539         break;
 540     case 0xc4: /* RIL format insns */
 541         switch (pinsn[0] & 0xf) {
 542         case 0xf: /* STRL */
 543         case 0xb: /* STGRL */
 544         case 0x7: /* STHRL */
 545             is_write = 1;
 546         }
 547         break;
 548     case 0xe3: /* RXY format insns */
 549         switch (pinsn[2] & 0xff) {
 550         case 0x50: /* STY */
 551         case 0x24: /* STG */
 552         case 0x72: /* STCY */
 553         case 0x70: /* STHY */
 554         case 0x8e: /* STPQ */
 555         case 0x3f: /* STRVH */
 556         case 0x3e: /* STRV */
 557         case 0x2f: /* STRVG */
 558             is_write = 1;
 559         }
 560         break;
 561     }
 562     return handle_cpu_signal(pc, info->si_addr, is_write, &uc->uc_sigmask);
 563 }
 564
 565 #elif defined(__mips__)
 566
 567 int cpu_signal_handler(int host_signum, void *pinfo,
 568                        void *puc)
 569 {
 570     siginfo_t *info = pinfo;
 571     struct ucontext *uc = puc;
 572     greg_t pc = uc->uc_mcontext.pc;
 573     int is_write;
 574
 575     /* XXX: compute is_write */
 576     is_write = 0;
 577     return handle_cpu_signal(pc, info->si_addr, is_write, &uc->uc_sigmask);
 578 }
 579
 580 #elif defined(__hppa__)
 581
 582 int cpu_signal_handler(int host_signum, void *pinfo,
 583                        void *puc)
 584 {
 585     siginfo_t *info = pinfo;
 586     struct ucontext *uc = puc;
 587     uintptr_t pc = uc->uc_mcontext.sc_iaoq[0];
 588     uint32_t insn = *(uint32_t *)pc;
 589     int is_write = 0;
 590
 591     /* XXX: need kernel patch to get write flag faster.  */
 592     switch (insn >> 26) {
 593     case 0x1a: /* STW */
 594     case 0x19: /* STH */
 595     case 0x18: /* STB */
 596     case 0x1b: /* STWM */
 597         is_write = 1;
 598         break;
 599
 600     case 0x09: /* CSTWX, FSTWX, FSTWS */
 601     case 0x0b: /* CSTDX, FSTDX, FSTDS */
 602         /* Distinguish from coprocessor load ... */
 603         is_write = (insn >> 9) & 1;
 604         break;
 605
 606     case 0x03:
 607         switch ((insn >> 6) & 15) {
 608         case 0xa: /* STWS */
 609         case 0x9: /* STHS */
 610         case 0x8: /* STBS */
 611         case 0xe: /* STWAS */
 612         case 0xc: /* STBYS */
 613             is_write = 1;
 614         }
 615         break;
 616     }
 617
 618     return handle_cpu_signal(pc, info->si_addr, is_write, &uc->uc_sigmask);
 619 }
 620
 621 #else
 622
 623 #error host CPU specific signal handler needed
 624
 625 #endif