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virtio-blk: Cancel the pending BH when the dataplane is reset
[qemu/ar7.git] / hw / audio / fmopl.c
blob9f50a89b4a888962092e2f4daf8754eeff08e6a8
1 /*
2 **
3 ** File: fmopl.c -- software implementation of FM sound generator
4 **
5 ** Copyright (C) 1999,2000 Tatsuyuki Satoh , MultiArcadeMachineEmurator development
6 **
7 ** Version 0.37a
8 **
9 */
10
11 /*
12 preliminary :
13 Problem :
14 note:
15 */
16
17 /* This version of fmopl.c is a fork of the MAME one, relicensed under the LGPL.
18 *
19 * This library is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU Lesser General Public
21 * License as published by the Free Software Foundation; either
22 * version 2.1 of the License, or (at your option) any later version.
23 *
24 * This library is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
27 * Lesser General Public License for more details.
28 *
29 * You should have received a copy of the GNU Lesser General Public
30 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
31 */
32
33 #include "qemu/osdep.h"
34 #include <math.h>
35 //#include "driver.h" /* use M.A.M.E. */
36 #include "fmopl.h"
37 #ifndef PI
38 #define PI 3.14159265358979323846
39 #endif
40
41 /* -------------------- for debug --------------------- */
42 /* #define OPL_OUTPUT_LOG */
43 #ifdef OPL_OUTPUT_LOG
44 static FILE *opl_dbg_fp = NULL;
45 static FM_OPL *opl_dbg_opl[16];
46 static int opl_dbg_maxchip,opl_dbg_chip;
47 #endif
48
49 /* -------------------- preliminary define section --------------------- */
50 /* attack/decay rate time rate */
51 #define OPL_ARRATE 141280 /* RATE 4 = 2826.24ms @ 3.6MHz */
52 #define OPL_DRRATE 1956000 /* RATE 4 = 39280.64ms @ 3.6MHz */
53
54 #define DELTAT_MIXING_LEVEL (1) /* DELTA-T ADPCM MIXING LEVEL */
55
56 #define FREQ_BITS 24 /* frequency turn */
57
58 /* counter bits = 20 , octerve 7 */
59 #define FREQ_RATE (1<<(FREQ_BITS-20))
60 #define TL_BITS (FREQ_BITS+2)
61
62 /* final output shift , limit minimum and maximum */
63 #define OPL_OUTSB (TL_BITS+3-16) /* OPL output final shift 16bit */
64 #define OPL_MAXOUT (0x7fff<<OPL_OUTSB)
65 #define OPL_MINOUT (-0x8000<<OPL_OUTSB)
66
67 /* -------------------- quality selection --------------------- */
68
69 /* sinwave entries */
70 /* used static memory = SIN_ENT * 4 (byte) */
71 #define SIN_ENT 2048
72
73 /* output level entries (envelope,sinwave) */
74 /* envelope counter lower bits */
75 #define ENV_BITS 16
76 /* envelope output entries */
77 #define EG_ENT 4096
78 /* used dynamic memory = EG_ENT*4*4(byte)or EG_ENT*6*4(byte) */
79 /* used static memory = EG_ENT*4 (byte) */
80
81 #define EG_OFF ((2*EG_ENT)<<ENV_BITS) /* OFF */
82 #define EG_DED EG_OFF
83 #define EG_DST (EG_ENT<<ENV_BITS) /* DECAY START */
84 #define EG_AED EG_DST
85 #define EG_AST 0 /* ATTACK START */
86
87 #define EG_STEP (96.0/EG_ENT) /* OPL is 0.1875 dB step */
88
89 /* LFO table entries */
90 #define VIB_ENT 512
91 #define VIB_SHIFT (32-9)
92 #define AMS_ENT 512
93 #define AMS_SHIFT (32-9)
94
95 #define VIB_RATE 256
96
97 /* -------------------- local defines , macros --------------------- */
98
99 /* register number to channel number , slot offset */
100 #define SLOT1 0
101 #define SLOT2 1
102
103 /* envelope phase */
104 #define ENV_MOD_RR 0x00
105 #define ENV_MOD_DR 0x01
106 #define ENV_MOD_AR 0x02
107
108 /* -------------------- tables --------------------- */
109 static const int slot_array[32]=
110 {
111 0, 2, 4, 1, 3, 5,-1,-1,
112 6, 8,10, 7, 9,11,-1,-1,
113 12,14,16,13,15,17,-1,-1,
114 -1,-1,-1,-1,-1,-1,-1,-1
115 };
116
117 /* key scale level */
118 /* table is 3dB/OCT , DV converts this in TL step at 6dB/OCT */
119 #define DV (EG_STEP/2)
120 static const uint32_t KSL_TABLE[8*16]=
121 {
122 /* OCT 0 */
123 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
124 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
125 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
126 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
127 /* OCT 1 */
128 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
129 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
130 0.000/DV, 0.750/DV, 1.125/DV, 1.500/DV,
131 1.875/DV, 2.250/DV, 2.625/DV, 3.000/DV,
132 /* OCT 2 */
133 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
134 0.000/DV, 1.125/DV, 1.875/DV, 2.625/DV,
135 3.000/DV, 3.750/DV, 4.125/DV, 4.500/DV,
136 4.875/DV, 5.250/DV, 5.625/DV, 6.000/DV,
137 /* OCT 3 */
138 0.000/DV, 0.000/DV, 0.000/DV, 1.875/DV,
139 3.000/DV, 4.125/DV, 4.875/DV, 5.625/DV,
140 6.000/DV, 6.750/DV, 7.125/DV, 7.500/DV,
141 7.875/DV, 8.250/DV, 8.625/DV, 9.000/DV,
142 /* OCT 4 */
143 0.000/DV, 0.000/DV, 3.000/DV, 4.875/DV,
144 6.000/DV, 7.125/DV, 7.875/DV, 8.625/DV,
145 9.000/DV, 9.750/DV,10.125/DV,10.500/DV,
146 10.875/DV,11.250/DV,11.625/DV,12.000/DV,
147 /* OCT 5 */
148 0.000/DV, 3.000/DV, 6.000/DV, 7.875/DV,
149 9.000/DV,10.125/DV,10.875/DV,11.625/DV,
150 12.000/DV,12.750/DV,13.125/DV,13.500/DV,
151 13.875/DV,14.250/DV,14.625/DV,15.000/DV,
152 /* OCT 6 */
153 0.000/DV, 6.000/DV, 9.000/DV,10.875/DV,
154 12.000/DV,13.125/DV,13.875/DV,14.625/DV,
155 15.000/DV,15.750/DV,16.125/DV,16.500/DV,
156 16.875/DV,17.250/DV,17.625/DV,18.000/DV,
157 /* OCT 7 */
158 0.000/DV, 9.000/DV,12.000/DV,13.875/DV,
159 15.000/DV,16.125/DV,16.875/DV,17.625/DV,
160 18.000/DV,18.750/DV,19.125/DV,19.500/DV,
161 19.875/DV,20.250/DV,20.625/DV,21.000/DV
162 };
163 #undef DV
164
165 /* sustain lebel table (3db per step) */
166 /* 0 - 15: 0, 3, 6, 9,12,15,18,21,24,27,30,33,36,39,42,93 (dB)*/
167 #define SC(db) (db*((3/EG_STEP)*(1<<ENV_BITS)))+EG_DST
168 static const int32_t SL_TABLE[16]={
169 SC( 0),SC( 1),SC( 2),SC(3 ),SC(4 ),SC(5 ),SC(6 ),SC( 7),
170 SC( 8),SC( 9),SC(10),SC(11),SC(12),SC(13),SC(14),SC(31)
171 };
172 #undef SC
173
174 #define TL_MAX (EG_ENT*2) /* limit(tl + ksr + envelope) + sinwave */
175 /* TotalLevel : 48 24 12 6 3 1.5 0.75 (dB) */
176 /* TL_TABLE[ 0 to TL_MAX ] : plus section */
177 /* TL_TABLE[ TL_MAX to TL_MAX+TL_MAX-1 ] : minus section */
178 static int32_t *TL_TABLE;
179
180 /* pointers to TL_TABLE with sinwave output offset */
181 static int32_t **SIN_TABLE;
182
183 /* LFO table */
184 static int32_t *AMS_TABLE;
185 static int32_t *VIB_TABLE;
186
187 /* envelope output curve table */
188 /* attack + decay + OFF */
189 static int32_t ENV_CURVE[2*EG_ENT+1];
190
191 /* multiple table */
192 #define ML 2
193 static const uint32_t MUL_TABLE[16]= {
194 /* 1/2, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15 */
195 0.50*ML, 1.00*ML, 2.00*ML, 3.00*ML, 4.00*ML, 5.00*ML, 6.00*ML, 7.00*ML,
196 8.00*ML, 9.00*ML,10.00*ML,10.00*ML,12.00*ML,12.00*ML,15.00*ML,15.00*ML
197 };
198 #undef ML
199
200 /* dummy attack / decay rate ( when rate == 0 ) */
201 static int32_t RATE_0[16]=
202 {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};
203
204 /* -------------------- static state --------------------- */
205
206 /* lock level of common table */
207 static int num_lock = 0;
208
209 /* work table */
210 static void *cur_chip = NULL; /* current chip point */
211 /* currenct chip state */
212 /* static OPLSAMPLE *bufL,*bufR; */
213 static OPL_CH *S_CH;
214 static OPL_CH *E_CH;
215 static OPL_SLOT *SLOT7_1, *SLOT7_2, *SLOT8_1, *SLOT8_2;
216
217 static int32_t outd[1];
218 static int32_t ams;
219 static int32_t vib;
220 static int32_t *ams_table;
221 static int32_t *vib_table;
222 static int32_t amsIncr;
223 static int32_t vibIncr;
224 static int32_t feedback2; /* connect for SLOT 2 */
225
226 /* log output level */
227 #define LOG_ERR 3 /* ERROR */
228 #define LOG_WAR 2 /* WARNING */
229 #define LOG_INF 1 /* INFORMATION */
230
231 //#define LOG_LEVEL LOG_INF
232 #define LOG_LEVEL LOG_ERR
233
234 //#define LOG(n,x) if( (n)>=LOG_LEVEL ) logerror x
235 #define LOG(n,x)
236
237 /* --------------------- subroutines --------------------- */
238
239 static inline int Limit( int val, int max, int min ) {
240 if ( val > max )
241 val = max;
242 else if ( val < min )
243 val = min;
244
245 return val;
246 }
247
248 /* status set and IRQ handling */
249 static inline void OPL_STATUS_SET(FM_OPL *OPL,int flag)
250 {
251 /* set status flag */
252 OPL->status |= flag;
253 if(!(OPL->status & 0x80))
254 {
255 if(OPL->status & OPL->statusmask)
256 { /* IRQ on */
257 OPL->status |= 0x80;
258 }
259 }
260 }
261
262 /* status reset and IRQ handling */
263 static inline void OPL_STATUS_RESET(FM_OPL *OPL,int flag)
264 {
265 /* reset status flag */
266 OPL->status &=~flag;
267 if((OPL->status & 0x80))
268 {
269 if (!(OPL->status & OPL->statusmask) )
270 {
271 OPL->status &= 0x7f;
272 }
273 }
274 }
275
276 /* IRQ mask set */
277 static inline void OPL_STATUSMASK_SET(FM_OPL *OPL,int flag)
278 {
279 OPL->statusmask = flag;
280 /* IRQ handling check */
281 OPL_STATUS_SET(OPL,0);
282 OPL_STATUS_RESET(OPL,0);
283 }
284
285 /* ----- key on ----- */
286 static inline void OPL_KEYON(OPL_SLOT *SLOT)
287 {
288 /* sin wave restart */
289 SLOT->Cnt = 0;
290 /* set attack */
291 SLOT->evm = ENV_MOD_AR;
292 SLOT->evs = SLOT->evsa;
293 SLOT->evc = EG_AST;
294 SLOT->eve = EG_AED;
295 }
296 /* ----- key off ----- */
297 static inline void OPL_KEYOFF(OPL_SLOT *SLOT)
298 {
299 if( SLOT->evm > ENV_MOD_RR)
300 {
301 /* set envelope counter from envleope output */
302 SLOT->evm = ENV_MOD_RR;
303 if( !(SLOT->evc&EG_DST) )
304 //SLOT->evc = (ENV_CURVE[SLOT->evc>>ENV_BITS]<<ENV_BITS) + EG_DST;
305 SLOT->evc = EG_DST;
306 SLOT->eve = EG_DED;
307 SLOT->evs = SLOT->evsr;
308 }
309 }
310
311 /* ---------- calcrate Envelope Generator & Phase Generator ---------- */
312 /* return : envelope output */
313 static inline uint32_t OPL_CALC_SLOT( OPL_SLOT *SLOT )
314 {
315 /* calcrate envelope generator */
316 if( (SLOT->evc+=SLOT->evs) >= SLOT->eve )
317 {
318 switch( SLOT->evm ){
319 case ENV_MOD_AR: /* ATTACK -> DECAY1 */
320 /* next DR */
321 SLOT->evm = ENV_MOD_DR;
322 SLOT->evc = EG_DST;
323 SLOT->eve = SLOT->SL;
324 SLOT->evs = SLOT->evsd;
325 break;
326 case ENV_MOD_DR: /* DECAY -> SL or RR */
327 SLOT->evc = SLOT->SL;
328 SLOT->eve = EG_DED;
329 if(SLOT->eg_typ)
330 {
331 SLOT->evs = 0;
332 }
333 else
334 {
335 SLOT->evm = ENV_MOD_RR;
336 SLOT->evs = SLOT->evsr;
337 }
338 break;
339 case ENV_MOD_RR: /* RR -> OFF */
340 SLOT->evc = EG_OFF;
341 SLOT->eve = EG_OFF+1;
342 SLOT->evs = 0;
343 break;
344 }
345 }
346 /* calcrate envelope */
347 return SLOT->TLL+ENV_CURVE[SLOT->evc>>ENV_BITS]+(SLOT->ams ? ams : 0);
348 }
349
350 /* set algorithm connection */
351 static void set_algorithm( OPL_CH *CH)
352 {
353 int32_t *carrier = &outd[0];
354 CH->connect1 = CH->CON ? carrier : &feedback2;
355 CH->connect2 = carrier;
356 }
357
358 /* ---------- frequency counter for operater update ---------- */
359 static inline void CALC_FCSLOT(OPL_CH *CH,OPL_SLOT *SLOT)
360 {
361 int ksr;
362
363 /* frequency step counter */
364 SLOT->Incr = CH->fc * SLOT->mul;
365 ksr = CH->kcode >> SLOT->KSR;
366
367 if( SLOT->ksr != ksr )
368 {
369 SLOT->ksr = ksr;
370 /* attack , decay rate recalcration */
371 SLOT->evsa = SLOT->AR[ksr];
372 SLOT->evsd = SLOT->DR[ksr];
373 SLOT->evsr = SLOT->RR[ksr];
374 }
375 SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl);
376 }
377
378 /* set multi,am,vib,EG-TYP,KSR,mul */
379 static inline void set_mul(FM_OPL *OPL,int slot,int v)
380 {
381 OPL_CH *CH = &OPL->P_CH[slot/2];
382 OPL_SLOT *SLOT = &CH->SLOT[slot&1];
383
384 SLOT->mul = MUL_TABLE[v&0x0f];
385 SLOT->KSR = (v&0x10) ? 0 : 2;
386 SLOT->eg_typ = (v&0x20)>>5;
387 SLOT->vib = (v&0x40);
388 SLOT->ams = (v&0x80);
389 CALC_FCSLOT(CH,SLOT);
390 }
391
392 /* set ksl & tl */
393 static inline void set_ksl_tl(FM_OPL *OPL,int slot,int v)
394 {
395 OPL_CH *CH = &OPL->P_CH[slot/2];
396 OPL_SLOT *SLOT = &CH->SLOT[slot&1];
397 int ksl = v>>6; /* 0 / 1.5 / 3 / 6 db/OCT */
398
399 SLOT->ksl = ksl ? 3-ksl : 31;
400 SLOT->TL = (v&0x3f)*(0.75/EG_STEP); /* 0.75db step */
401
402 if( !(OPL->mode&0x80) )
403 { /* not CSM latch total level */
404 SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl);
405 }
406 }
407
408 /* set attack rate & decay rate */
409 static inline void set_ar_dr(FM_OPL *OPL,int slot,int v)
410 {
411 OPL_CH *CH = &OPL->P_CH[slot/2];
412 OPL_SLOT *SLOT = &CH->SLOT[slot&1];
413 int ar = v>>4;
414 int dr = v&0x0f;
415
416 SLOT->AR = ar ? &OPL->AR_TABLE[ar<<2] : RATE_0;
417 SLOT->evsa = SLOT->AR[SLOT->ksr];
418 if( SLOT->evm == ENV_MOD_AR ) SLOT->evs = SLOT->evsa;
419
420 SLOT->DR = dr ? &OPL->DR_TABLE[dr<<2] : RATE_0;
421 SLOT->evsd = SLOT->DR[SLOT->ksr];
422 if( SLOT->evm == ENV_MOD_DR ) SLOT->evs = SLOT->evsd;
423 }
424
425 /* set sustain level & release rate */
426 static inline void set_sl_rr(FM_OPL *OPL,int slot,int v)
427 {
428 OPL_CH *CH = &OPL->P_CH[slot/2];
429 OPL_SLOT *SLOT = &CH->SLOT[slot&1];
430 int sl = v>>4;
431 int rr = v & 0x0f;
432
433 SLOT->SL = SL_TABLE[sl];
434 if( SLOT->evm == ENV_MOD_DR ) SLOT->eve = SLOT->SL;
435 SLOT->RR = &OPL->DR_TABLE[rr<<2];
436 SLOT->evsr = SLOT->RR[SLOT->ksr];
437 if( SLOT->evm == ENV_MOD_RR ) SLOT->evs = SLOT->evsr;
438 }
439
440 /* operator output calcrator */
441 #define OP_OUT(slot,env,con) slot->wavetable[((slot->Cnt+con)/(0x1000000/SIN_ENT))&(SIN_ENT-1)][env]
442 /* ---------- calcrate one of channel ---------- */
443 static inline void OPL_CALC_CH( OPL_CH *CH )
444 {
445 uint32_t env_out;
446 OPL_SLOT *SLOT;
447
448 feedback2 = 0;
449 /* SLOT 1 */
450 SLOT = &CH->SLOT[SLOT1];
451 env_out=OPL_CALC_SLOT(SLOT);
452 if( env_out < EG_ENT-1 )
453 {
454 /* PG */
455 if(SLOT->vib) SLOT->Cnt += (SLOT->Incr*vib/VIB_RATE);
456 else SLOT->Cnt += SLOT->Incr;
457 /* connectoion */
458 if(CH->FB)
459 {
460 int feedback1 = (CH->op1_out[0]+CH->op1_out[1])>>CH->FB;
461 CH->op1_out[1] = CH->op1_out[0];
462 *CH->connect1 += CH->op1_out[0] = OP_OUT(SLOT,env_out,feedback1);
463 }
464 else
465 {
466 *CH->connect1 += OP_OUT(SLOT,env_out,0);
467 }
468 }else
469 {
470 CH->op1_out[1] = CH->op1_out[0];
471 CH->op1_out[0] = 0;
472 }
473 /* SLOT 2 */
474 SLOT = &CH->SLOT[SLOT2];
475 env_out=OPL_CALC_SLOT(SLOT);
476 if( env_out < EG_ENT-1 )
477 {
478 /* PG */
479 if(SLOT->vib) SLOT->Cnt += (SLOT->Incr*vib/VIB_RATE);
480 else SLOT->Cnt += SLOT->Incr;
481 /* connectoion */
482 outd[0] += OP_OUT(SLOT,env_out, feedback2);
483 }
484 }
485
486 /* ---------- calcrate rhythm block ---------- */
487 #define WHITE_NOISE_db 6.0
488 static inline void OPL_CALC_RH( OPL_CH *CH )
489 {
490 uint32_t env_tam,env_sd,env_top,env_hh;
491 int whitenoise = (rand()&1)*(WHITE_NOISE_db/EG_STEP);
492 int32_t tone8;
493
494 OPL_SLOT *SLOT;
495 int env_out;
496
497 /* BD : same as FM serial mode and output level is large */
498 feedback2 = 0;
499 /* SLOT 1 */
500 SLOT = &CH[6].SLOT[SLOT1];
501 env_out=OPL_CALC_SLOT(SLOT);
502 if( env_out < EG_ENT-1 )
503 {
504 /* PG */
505 if(SLOT->vib) SLOT->Cnt += (SLOT->Incr*vib/VIB_RATE);
506 else SLOT->Cnt += SLOT->Incr;
507 /* connectoion */
508 if(CH[6].FB)
509 {
510 int feedback1 = (CH[6].op1_out[0]+CH[6].op1_out[1])>>CH[6].FB;
511 CH[6].op1_out[1] = CH[6].op1_out[0];
512 feedback2 = CH[6].op1_out[0] = OP_OUT(SLOT,env_out,feedback1);
513 }
514 else
515 {
516 feedback2 = OP_OUT(SLOT,env_out,0);
517 }
518 }else
519 {
520 feedback2 = 0;
521 CH[6].op1_out[1] = CH[6].op1_out[0];
522 CH[6].op1_out[0] = 0;
523 }
524 /* SLOT 2 */
525 SLOT = &CH[6].SLOT[SLOT2];
526 env_out=OPL_CALC_SLOT(SLOT);
527 if( env_out < EG_ENT-1 )
528 {
529 /* PG */
530 if(SLOT->vib) SLOT->Cnt += (SLOT->Incr*vib/VIB_RATE);
531 else SLOT->Cnt += SLOT->Incr;
532 /* connectoion */
533 outd[0] += OP_OUT(SLOT,env_out, feedback2)*2;
534 }
535
536 // SD (17) = mul14[fnum7] + white noise
537 // TAM (15) = mul15[fnum8]
538 // TOP (18) = fnum6(mul18[fnum8]+whitenoise)
539 // HH (14) = fnum7(mul18[fnum8]+whitenoise) + white noise
540 env_sd =OPL_CALC_SLOT(SLOT7_2) + whitenoise;
541 env_tam=OPL_CALC_SLOT(SLOT8_1);
542 env_top=OPL_CALC_SLOT(SLOT8_2);
543 env_hh =OPL_CALC_SLOT(SLOT7_1) + whitenoise;
544
545 /* PG */
546 if(SLOT7_1->vib) SLOT7_1->Cnt += (2*SLOT7_1->Incr*vib/VIB_RATE);
547 else SLOT7_1->Cnt += 2*SLOT7_1->Incr;
548 if(SLOT7_2->vib) SLOT7_2->Cnt += ((CH[7].fc*8)*vib/VIB_RATE);
549 else SLOT7_2->Cnt += (CH[7].fc*8);
550 if(SLOT8_1->vib) SLOT8_1->Cnt += (SLOT8_1->Incr*vib/VIB_RATE);
551 else SLOT8_1->Cnt += SLOT8_1->Incr;
552 if(SLOT8_2->vib) SLOT8_2->Cnt += ((CH[8].fc*48)*vib/VIB_RATE);
553 else SLOT8_2->Cnt += (CH[8].fc*48);
554
555 tone8 = OP_OUT(SLOT8_2,whitenoise,0 );
556
557 /* SD */
558 if( env_sd < EG_ENT-1 )
559 outd[0] += OP_OUT(SLOT7_1,env_sd, 0)*8;
560 /* TAM */
561 if( env_tam < EG_ENT-1 )
562 outd[0] += OP_OUT(SLOT8_1,env_tam, 0)*2;
563 /* TOP-CY */
564 if( env_top < EG_ENT-1 )
565 outd[0] += OP_OUT(SLOT7_2,env_top,tone8)*2;
566 /* HH */
567 if( env_hh < EG_ENT-1 )
568 outd[0] += OP_OUT(SLOT7_2,env_hh,tone8)*2;
569 }
570
571 /* ----------- initialize time tabls ----------- */
572 static void init_timetables( FM_OPL *OPL , int ARRATE , int DRRATE )
573 {
574 int i;
575 double rate;
576
577 /* make attack rate & decay rate tables */
578 for (i = 0;i < 4;i++) OPL->AR_TABLE[i] = OPL->DR_TABLE[i] = 0;
579 for (i = 4;i <= 60;i++){
580 rate = OPL->freqbase; /* frequency rate */
581 if( i < 60 ) rate *= 1.0+(i&3)*0.25; /* b0-1 : x1 , x1.25 , x1.5 , x1.75 */
582 rate *= 1<<((i>>2)-1); /* b2-5 : shift bit */
583 rate *= (double)(EG_ENT<<ENV_BITS);
584 OPL->AR_TABLE[i] = rate / ARRATE;
585 OPL->DR_TABLE[i] = rate / DRRATE;
586 }
587 for (i = 60; i < ARRAY_SIZE(OPL->AR_TABLE); i++)
588 {
589 OPL->AR_TABLE[i] = EG_AED-1;
590 OPL->DR_TABLE[i] = OPL->DR_TABLE[60];
591 }
592 #if 0
593 for (i = 0;i < 64 ;i++){ /* make for overflow area */
594 LOG(LOG_WAR, ("rate %2d , ar %f ms , dr %f ms\n", i,
595 ((double)(EG_ENT<<ENV_BITS) / OPL->AR_TABLE[i]) * (1000.0 / OPL->rate),
596 ((double)(EG_ENT<<ENV_BITS) / OPL->DR_TABLE[i]) * (1000.0 / OPL->rate) ));
597 }
598 #endif
599 }
600
601 /* ---------- generic table initialize ---------- */
602 static int OPLOpenTable( void )
603 {
604 int s,t;
605 double rate;
606 int i,j;
607 double pom;
608
609 /* allocate dynamic tables */
610 if( (TL_TABLE = malloc(TL_MAX*2*sizeof(int32_t))) == NULL)
611 return 0;
612 if( (SIN_TABLE = malloc(SIN_ENT*4 *sizeof(int32_t *))) == NULL)
613 {
614 free(TL_TABLE);
615 return 0;
616 }
617 if( (AMS_TABLE = malloc(AMS_ENT*2 *sizeof(int32_t))) == NULL)
618 {
619 free(TL_TABLE);
620 free(SIN_TABLE);
621 return 0;
622 }
623 if( (VIB_TABLE = malloc(VIB_ENT*2 *sizeof(int32_t))) == NULL)
624 {
625 free(TL_TABLE);
626 free(SIN_TABLE);
627 free(AMS_TABLE);
628 return 0;
629 }
630 /* make total level table */
631 for (t = 0;t < EG_ENT-1 ;t++){
632 rate = ((1<<TL_BITS)-1)/pow(10,EG_STEP*t/20); /* dB -> voltage */
633 TL_TABLE[ t] = (int)rate;
634 TL_TABLE[TL_MAX+t] = -TL_TABLE[t];
635 /* LOG(LOG_INF,("TotalLevel(%3d) = %x\n",t,TL_TABLE[t]));*/
636 }
637 /* fill volume off area */
638 for ( t = EG_ENT-1; t < TL_MAX ;t++){
639 TL_TABLE[t] = TL_TABLE[TL_MAX+t] = 0;
640 }
641
642 /* make sinwave table (total level offet) */
643 /* degree 0 = degree 180 = off */
644 SIN_TABLE[0] = SIN_TABLE[SIN_ENT/2] = &TL_TABLE[EG_ENT-1];
645 for (s = 1;s <= SIN_ENT/4;s++){
646 pom = sin(2*PI*s/SIN_ENT); /* sin */
647 pom = 20*log10(1/pom); /* decibel */
648 j = pom / EG_STEP; /* TL_TABLE steps */
649
650 /* degree 0 - 90 , degree 180 - 90 : plus section */
651 SIN_TABLE[ s] = SIN_TABLE[SIN_ENT/2-s] = &TL_TABLE[j];
652 /* degree 180 - 270 , degree 360 - 270 : minus section */
653 SIN_TABLE[SIN_ENT/2+s] = SIN_TABLE[SIN_ENT -s] = &TL_TABLE[TL_MAX+j];
654 /* LOG(LOG_INF,("sin(%3d) = %f:%f db\n",s,pom,(double)j * EG_STEP));*/
655 }
656 for (s = 0;s < SIN_ENT;s++)
657 {
658 SIN_TABLE[SIN_ENT*1+s] = s<(SIN_ENT/2) ? SIN_TABLE[s] : &TL_TABLE[EG_ENT];
659 SIN_TABLE[SIN_ENT*2+s] = SIN_TABLE[s % (SIN_ENT/2)];
660 SIN_TABLE[SIN_ENT*3+s] = (s/(SIN_ENT/4))&1 ? &TL_TABLE[EG_ENT] : SIN_TABLE[SIN_ENT*2+s];
661 }
662
663 /* envelope counter -> envelope output table */
664 for (i=0; i<EG_ENT; i++)
665 {
666 /* ATTACK curve */
667 pom = pow( ((double)(EG_ENT-1-i)/EG_ENT) , 8 ) * EG_ENT;
668 /* if( pom >= EG_ENT ) pom = EG_ENT-1; */
669 ENV_CURVE[i] = (int)pom;
670 /* DECAY ,RELEASE curve */
671 ENV_CURVE[(EG_DST>>ENV_BITS)+i]= i;
672 }
673 /* off */
674 ENV_CURVE[EG_OFF>>ENV_BITS]= EG_ENT-1;
675 /* make LFO ams table */
676 for (i=0; i<AMS_ENT; i++)
677 {
678 pom = (1.0+sin(2*PI*i/AMS_ENT))/2; /* sin */
679 AMS_TABLE[i] = (1.0/EG_STEP)*pom; /* 1dB */
680 AMS_TABLE[AMS_ENT+i] = (4.8/EG_STEP)*pom; /* 4.8dB */
681 }
682 /* make LFO vibrate table */
683 for (i=0; i<VIB_ENT; i++)
684 {
685 /* 100cent = 1seminote = 6% ?? */
686 pom = (double)VIB_RATE*0.06*sin(2*PI*i/VIB_ENT); /* +-100sect step */
687 VIB_TABLE[i] = VIB_RATE + (pom*0.07); /* +- 7cent */
688 VIB_TABLE[VIB_ENT+i] = VIB_RATE + (pom*0.14); /* +-14cent */
689 /* LOG(LOG_INF,("vib %d=%d\n",i,VIB_TABLE[VIB_ENT+i])); */
690 }
691 return 1;
692 }
693
694
695 static void OPLCloseTable( void )
696 {
697 free(TL_TABLE);
698 free(SIN_TABLE);
699 free(AMS_TABLE);
700 free(VIB_TABLE);
701 }
702
703 /* CSM Key Control */
704 static inline void CSMKeyControll(OPL_CH *CH)
705 {
706 OPL_SLOT *slot1 = &CH->SLOT[SLOT1];
707 OPL_SLOT *slot2 = &CH->SLOT[SLOT2];
708 /* all key off */
709 OPL_KEYOFF(slot1);
710 OPL_KEYOFF(slot2);
711 /* total level latch */
712 slot1->TLL = slot1->TL + (CH->ksl_base>>slot1->ksl);
713 slot1->TLL = slot1->TL + (CH->ksl_base>>slot1->ksl);
714 /* key on */
715 CH->op1_out[0] = CH->op1_out[1] = 0;
716 OPL_KEYON(slot1);
717 OPL_KEYON(slot2);
718 }
719
720 /* ---------- opl initialize ---------- */
721 static void OPL_initialize(FM_OPL *OPL)
722 {
723 int fn;
724
725 /* frequency base */
726 OPL->freqbase = (OPL->rate) ? ((double)OPL->clock / OPL->rate) / 72 : 0;
727 /* Timer base time */
728 OPL->TimerBase = 1.0/((double)OPL->clock / 72.0 );
729 /* make time tables */
730 init_timetables( OPL , OPL_ARRATE , OPL_DRRATE );
731 /* make fnumber -> increment counter table */
732 for( fn=0 ; fn < 1024 ; fn++ )
733 {
734 OPL->FN_TABLE[fn] = OPL->freqbase * fn * FREQ_RATE * (1<<7) / 2;
735 }
736 /* LFO freq.table */
737 OPL->amsIncr = OPL->rate ? (double)AMS_ENT*(1<<AMS_SHIFT) / OPL->rate * 3.7 * ((double)OPL->clock/3600000) : 0;
738 OPL->vibIncr = OPL->rate ? (double)VIB_ENT*(1<<VIB_SHIFT) / OPL->rate * 6.4 * ((double)OPL->clock/3600000) : 0;
739 }
740
741 /* ---------- write a OPL registers ---------- */
742 static void OPLWriteReg(FM_OPL *OPL, int r, int v)
743 {
744 OPL_CH *CH;
745 int slot;
746 int block_fnum;
747
748 switch(r&0xe0)
749 {
750 case 0x00: /* 00-1f:control */
751 switch(r&0x1f)
752 {
753 case 0x01:
754 /* wave selector enable */
755 OPL->wavesel = v&0x20;
756 if(!OPL->wavesel)
757 {
758 /* preset compatible mode */
759 int c;
760 for(c=0;c<OPL->max_ch;c++)
761 {
762 OPL->P_CH[c].SLOT[SLOT1].wavetable = &SIN_TABLE[0];
763 OPL->P_CH[c].SLOT[SLOT2].wavetable = &SIN_TABLE[0];
764 }
765 }
766 return;
767 case 0x02: /* Timer 1 */
768 OPL->T[0] = (256-v)*4;
769 break;
770 case 0x03: /* Timer 2 */
771 OPL->T[1] = (256-v)*16;
772 return;
773 case 0x04: /* IRQ clear / mask and Timer enable */
774 if(v&0x80)
775 { /* IRQ flag clear */
776 OPL_STATUS_RESET(OPL,0x7f);
777 }
778 else
779 { /* set IRQ mask ,timer enable*/
780 uint8_t st1 = v&1;
781 uint8_t st2 = (v>>1)&1;
782 /* IRQRST,T1MSK,t2MSK,EOSMSK,BRMSK,x,ST2,ST1 */
783 OPL_STATUS_RESET(OPL,v&0x78);
784 OPL_STATUSMASK_SET(OPL,((~v)&0x78)|0x01);
785 /* timer 2 */
786 if(OPL->st[1] != st2)
787 {
788 double interval = st2 ? (double)OPL->T[1]*OPL->TimerBase : 0.0;
789 OPL->st[1] = st2;
790 if (OPL->TimerHandler) {
791 (OPL->TimerHandler)(OPL->TimerParam, 1, interval);
792 }
793 }
794 /* timer 1 */
795 if(OPL->st[0] != st1)
796 {
797 double interval = st1 ? (double)OPL->T[0]*OPL->TimerBase : 0.0;
798 OPL->st[0] = st1;
799 if (OPL->TimerHandler) {
800 (OPL->TimerHandler)(OPL->TimerParam, 0, interval);
801 }
802 }
803 }
804 return;
805 }
806 break;
807 case 0x20: /* am,vib,ksr,eg type,mul */
808 slot = slot_array[r&0x1f];
809 if(slot == -1) return;
810 set_mul(OPL,slot,v);
811 return;
812 case 0x40:
813 slot = slot_array[r&0x1f];
814 if(slot == -1) return;
815 set_ksl_tl(OPL,slot,v);
816 return;
817 case 0x60:
818 slot = slot_array[r&0x1f];
819 if(slot == -1) return;
820 set_ar_dr(OPL,slot,v);
821 return;
822 case 0x80:
823 slot = slot_array[r&0x1f];
824 if(slot == -1) return;
825 set_sl_rr(OPL,slot,v);
826 return;
827 case 0xa0:
828 switch(r)
829 {
830 case 0xbd:
831 /* amsep,vibdep,r,bd,sd,tom,tc,hh */
832 {
833 uint8_t rkey = OPL->rhythm^v;
834 OPL->ams_table = &AMS_TABLE[v&0x80 ? AMS_ENT : 0];
835 OPL->vib_table = &VIB_TABLE[v&0x40 ? VIB_ENT : 0];
836 OPL->rhythm = v&0x3f;
837 if(OPL->rhythm&0x20)
838 {
839 #if 0
840 usrintf_showmessage("OPL Rhythm mode select");
841 #endif
842 /* BD key on/off */
843 if(rkey&0x10)
844 {
845 if(v&0x10)
846 {
847 OPL->P_CH[6].op1_out[0] = OPL->P_CH[6].op1_out[1] = 0;
848 OPL_KEYON(&OPL->P_CH[6].SLOT[SLOT1]);
849 OPL_KEYON(&OPL->P_CH[6].SLOT[SLOT2]);
850 }
851 else
852 {
853 OPL_KEYOFF(&OPL->P_CH[6].SLOT[SLOT1]);
854 OPL_KEYOFF(&OPL->P_CH[6].SLOT[SLOT2]);
855 }
856 }
857 /* SD key on/off */
858 if(rkey&0x08)
859 {
860 if(v&0x08) OPL_KEYON(&OPL->P_CH[7].SLOT[SLOT2]);
861 else OPL_KEYOFF(&OPL->P_CH[7].SLOT[SLOT2]);
862 }/* TAM key on/off */
863 if(rkey&0x04)
864 {
865 if(v&0x04) OPL_KEYON(&OPL->P_CH[8].SLOT[SLOT1]);
866 else OPL_KEYOFF(&OPL->P_CH[8].SLOT[SLOT1]);
867 }
868 /* TOP-CY key on/off */
869 if(rkey&0x02)
870 {
871 if(v&0x02) OPL_KEYON(&OPL->P_CH[8].SLOT[SLOT2]);
872 else OPL_KEYOFF(&OPL->P_CH[8].SLOT[SLOT2]);
873 }
874 /* HH key on/off */
875 if(rkey&0x01)
876 {
877 if(v&0x01) OPL_KEYON(&OPL->P_CH[7].SLOT[SLOT1]);
878 else OPL_KEYOFF(&OPL->P_CH[7].SLOT[SLOT1]);
879 }
880 }
881 }
882 return;
883 }
884 /* keyon,block,fnum */
885 if( (r&0x0f) > 8) return;
886 CH = &OPL->P_CH[r&0x0f];
887 if(!(r&0x10))
888 { /* a0-a8 */
889 block_fnum = (CH->block_fnum&0x1f00) | v;
890 }
891 else
892 { /* b0-b8 */
893 int keyon = (v>>5)&1;
894 block_fnum = ((v&0x1f)<<8) | (CH->block_fnum&0xff);
895 if(CH->keyon != keyon)
896 {
897 if( (CH->keyon=keyon) )
898 {
899 CH->op1_out[0] = CH->op1_out[1] = 0;
900 OPL_KEYON(&CH->SLOT[SLOT1]);
901 OPL_KEYON(&CH->SLOT[SLOT2]);
902 }
903 else
904 {
905 OPL_KEYOFF(&CH->SLOT[SLOT1]);
906 OPL_KEYOFF(&CH->SLOT[SLOT2]);
907 }
908 }
909 }
910 /* update */
911 if(CH->block_fnum != block_fnum)
912 {
913 int blockRv = 7-(block_fnum>>10);
914 int fnum = block_fnum&0x3ff;
915 CH->block_fnum = block_fnum;
916
917 CH->ksl_base = KSL_TABLE[block_fnum>>6];
918 CH->fc = OPL->FN_TABLE[fnum]>>blockRv;
919 CH->kcode = CH->block_fnum>>9;
920 if( (OPL->mode&0x40) && CH->block_fnum&0x100) CH->kcode |=1;
921 CALC_FCSLOT(CH,&CH->SLOT[SLOT1]);
922 CALC_FCSLOT(CH,&CH->SLOT[SLOT2]);
923 }
924 return;
925 case 0xc0:
926 /* FB,C */
927 if( (r&0x0f) > 8) return;
928 CH = &OPL->P_CH[r&0x0f];
929 {
930 int feedback = (v>>1)&7;
931 CH->FB = feedback ? (8+1) - feedback : 0;
932 CH->CON = v&1;
933 set_algorithm(CH);
934 }
935 return;
936 case 0xe0: /* wave type */
937 slot = slot_array[r&0x1f];
938 if(slot == -1) return;
939 CH = &OPL->P_CH[slot/2];
940 if(OPL->wavesel)
941 {
942 /* LOG(LOG_INF,("OPL SLOT %d wave select %d\n",slot,v&3)); */
943 CH->SLOT[slot&1].wavetable = &SIN_TABLE[(v&0x03)*SIN_ENT];
944 }
945 return;
946 }
947 }
948
949 /* lock/unlock for common table */
950 static int OPL_LockTable(void)
951 {
952 num_lock++;
953 if(num_lock>1) return 0;
954 /* first time */
955 cur_chip = NULL;
956 /* allocate total level table (128kb space) */
957 if( !OPLOpenTable() )
958 {
959 num_lock--;
960 return -1;
961 }
962 return 0;
963 }
964
965 static void OPL_UnLockTable(void)
966 {
967 if(num_lock) num_lock--;
968 if(num_lock) return;
969 /* last time */
970 cur_chip = NULL;
971 OPLCloseTable();
972 }
973
974 /*******************************************************************************/
975 /* YM3812 local section */
976 /*******************************************************************************/
977
978 /* ---------- update one of chip ----------- */
979 void YM3812UpdateOne(FM_OPL *OPL, int16_t *buffer, int length)
980 {
981 int i;
982 int data;
983 int16_t *buf = buffer;
984 uint32_t amsCnt = OPL->amsCnt;
985 uint32_t vibCnt = OPL->vibCnt;
986 uint8_t rhythm = OPL->rhythm&0x20;
987 OPL_CH *CH,*R_CH;
988
989 if( (void *)OPL != cur_chip ){
990 cur_chip = (void *)OPL;
991 /* channel pointers */
992 S_CH = OPL->P_CH;
993 E_CH = &S_CH[9];
994 /* rhythm slot */
995 SLOT7_1 = &S_CH[7].SLOT[SLOT1];
996 SLOT7_2 = &S_CH[7].SLOT[SLOT2];
997 SLOT8_1 = &S_CH[8].SLOT[SLOT1];
998 SLOT8_2 = &S_CH[8].SLOT[SLOT2];
999 /* LFO state */
1000 amsIncr = OPL->amsIncr;
1001 vibIncr = OPL->vibIncr;
1002 ams_table = OPL->ams_table;
1003 vib_table = OPL->vib_table;
1004 }
1005 R_CH = rhythm ? &S_CH[6] : E_CH;
1006 for( i=0; i < length ; i++ )
1007 {
1008 /* channel A channel B channel C */
1009 /* LFO */
1010 ams = ams_table[(amsCnt+=amsIncr)>>AMS_SHIFT];
1011 vib = vib_table[(vibCnt+=vibIncr)>>VIB_SHIFT];
1012 outd[0] = 0;
1013 /* FM part */
1014 for(CH=S_CH ; CH < R_CH ; CH++)
1015 OPL_CALC_CH(CH);
1016 /* Rythn part */
1017 if(rhythm)
1018 OPL_CALC_RH(S_CH);
1019 /* limit check */
1020 data = Limit( outd[0] , OPL_MAXOUT, OPL_MINOUT );
1021 /* store to sound buffer */
1022 buf[i] = data >> OPL_OUTSB;
1023 }
1024
1025 OPL->amsCnt = amsCnt;
1026 OPL->vibCnt = vibCnt;
1027 #ifdef OPL_OUTPUT_LOG
1028 if(opl_dbg_fp)
1029 {
1030 for(opl_dbg_chip=0;opl_dbg_chip<opl_dbg_maxchip;opl_dbg_chip++)
1031 if( opl_dbg_opl[opl_dbg_chip] == OPL) break;
1032 fprintf(opl_dbg_fp,"%c%c%c",0x20+opl_dbg_chip,length&0xff,length/256);
1033 }
1034 #endif
1035 }
1036
1037 /* ---------- reset one of chip ---------- */
1038 static void OPLResetChip(FM_OPL *OPL)
1039 {
1040 int c,s;
1041 int i;
1042
1043 /* reset chip */
1044 OPL->mode = 0; /* normal mode */
1045 OPL_STATUS_RESET(OPL,0x7f);
1046 /* reset with register write */
1047 OPLWriteReg(OPL,0x01,0); /* wabesel disable */
1048 OPLWriteReg(OPL,0x02,0); /* Timer1 */
1049 OPLWriteReg(OPL,0x03,0); /* Timer2 */
1050 OPLWriteReg(OPL,0x04,0); /* IRQ mask clear */
1051 for(i = 0xff ; i >= 0x20 ; i-- ) OPLWriteReg(OPL,i,0);
1052 /* reset operator parameter */
1053 for( c = 0 ; c < OPL->max_ch ; c++ )
1054 {
1055 OPL_CH *CH = &OPL->P_CH[c];
1056 /* OPL->P_CH[c].PAN = OPN_CENTER; */
1057 for(s = 0 ; s < 2 ; s++ )
1058 {
1059 /* wave table */
1060 CH->SLOT[s].wavetable = &SIN_TABLE[0];
1061 /* CH->SLOT[s].evm = ENV_MOD_RR; */
1062 CH->SLOT[s].evc = EG_OFF;
1063 CH->SLOT[s].eve = EG_OFF+1;
1064 CH->SLOT[s].evs = 0;
1065 }
1066 }
1067 }
1068
1069 /* ---------- Create one of vietual YM3812 ---------- */
1070 /* 'rate' is sampling rate and 'bufsiz' is the size of the */
1071 FM_OPL *OPLCreate(int clock, int rate)
1072 {
1073 char *ptr;
1074 FM_OPL *OPL;
1075 int state_size;
1076 int max_ch = 9; /* normaly 9 channels */
1077
1078 if( OPL_LockTable() ==-1) return NULL;
1079 /* allocate OPL state space */
1080 state_size = sizeof(FM_OPL);
1081 state_size += sizeof(OPL_CH)*max_ch;
1082 /* allocate memory block */
1083 ptr = malloc(state_size);
1084 if(ptr==NULL) return NULL;
1085 /* clear */
1086 memset(ptr,0,state_size);
1087 OPL = (FM_OPL *)ptr; ptr+=sizeof(FM_OPL);
1088 OPL->P_CH = (OPL_CH *)ptr; ptr+=sizeof(OPL_CH)*max_ch;
1089 /* set channel state pointer */
1090 OPL->clock = clock;
1091 OPL->rate = rate;
1092 OPL->max_ch = max_ch;
1093 /* init grobal tables */
1094 OPL_initialize(OPL);
1095 /* reset chip */
1096 OPLResetChip(OPL);
1097 #ifdef OPL_OUTPUT_LOG
1098 if(!opl_dbg_fp)
1099 {
1100 opl_dbg_fp = fopen("opllog.opl","wb");
1101 opl_dbg_maxchip = 0;
1102 }
1103 if(opl_dbg_fp)
1104 {
1105 opl_dbg_opl[opl_dbg_maxchip] = OPL;
1106 fprintf(opl_dbg_fp,"%c%c%c%c%c%c",0x00+opl_dbg_maxchip,
1107 type,
1108 clock&0xff,
1109 (clock/0x100)&0xff,
1110 (clock/0x10000)&0xff,
1111 (clock/0x1000000)&0xff);
1112 opl_dbg_maxchip++;
1113 }
1114 #endif
1115 return OPL;
1116 }
1117
1118 /* ---------- Destroy one of vietual YM3812 ---------- */
1119 void OPLDestroy(FM_OPL *OPL)
1120 {
1121 #ifdef OPL_OUTPUT_LOG
1122 if(opl_dbg_fp)
1123 {
1124 fclose(opl_dbg_fp);
1125 opl_dbg_fp = NULL;
1126 }
1127 #endif
1128 OPL_UnLockTable();
1129 free(OPL);
1130 }
1131
1132 /* ---------- Option handlers ---------- */
1133
1134 void OPLSetTimerHandler(FM_OPL *OPL, OPL_TIMERHANDLER TimerHandler,
1135 void *param)
1136 {
1137 OPL->TimerHandler = TimerHandler;
1138 OPL->TimerParam = param;
1139 }
1140
1141 /* ---------- YM3812 I/O interface ---------- */
1142 int OPLWrite(FM_OPL *OPL,int a,int v)
1143 {
1144 if( !(a&1) )
1145 { /* address port */
1146 OPL->address = v & 0xff;
1147 }
1148 else
1149 { /* data port */
1150 #ifdef OPL_OUTPUT_LOG
1151 if(opl_dbg_fp)
1152 {
1153 for(opl_dbg_chip=0;opl_dbg_chip<opl_dbg_maxchip;opl_dbg_chip++)
1154 if( opl_dbg_opl[opl_dbg_chip] == OPL) break;
1155 fprintf(opl_dbg_fp,"%c%c%c",0x10+opl_dbg_chip,OPL->address,v);
1156 }
1157 #endif
1158 OPLWriteReg(OPL,OPL->address,v);
1159 }
1160 return OPL->status>>7;
1161 }
1162
1163 unsigned char OPLRead(FM_OPL *OPL,int a)
1164 {
1165 if( !(a&1) )
1166 { /* status port */
1167 return OPL->status & (OPL->statusmask|0x80);
1168 }
1169 /* data port */
1170 switch(OPL->address)
1171 {
1172 case 0x05: /* KeyBoard IN */
1173 return 0;
1174 #if 0
1175 case 0x0f: /* ADPCM-DATA */
1176 return 0;
1177 #endif
1178 case 0x19: /* I/O DATA */
1179 return 0;
1180 case 0x1a: /* PCM-DATA */
1181 return 0;
1182 }
1183 return 0;
1184 }
1185
1186 int OPLTimerOver(FM_OPL *OPL,int c)
1187 {
1188 if( c )
1189 { /* Timer B */
1190 OPL_STATUS_SET(OPL,0x20);
1191 }
1192 else
1193 { /* Timer A */
1194 OPL_STATUS_SET(OPL,0x40);
1195 /* CSM mode key,TL control */
1196 if( OPL->mode & 0x80 )
1197 { /* CSM mode total level latch and auto key on */
1198 int ch;
1199 for(ch=0;ch<9;ch++)
1200 CSMKeyControll( &OPL->P_CH[ch] );
1201 }
1202 }
1203 /* reload timer */
1204 if (OPL->TimerHandler) {
1205 (OPL->TimerHandler)(OPL->TimerParam, c,
1206 (double)OPL->T[c] * OPL->TimerBase);
1207 }
1208 return OPL->status>>7;
1209 }
AR7 emulation for QEMU