hw/arm/spitz.c

   1 /*
   2  * PXA270-based Clamshell PDA platforms.
   3  *
   4  * Copyright (c) 2006 Openedhand Ltd.
   5  * Written by Andrzej Zaborowski <balrog@zabor.org>
   6  *
   7  * This code is licensed under the GNU GPL v2.
   8  *
   9  * Contributions after 2012-01-13 are licensed under the terms of the
  10  * GNU GPL, version 2 or (at your option) any later version.
  11  */
  12
  13 #include "qemu/osdep.h"
  14 #include "qapi/error.h"
  15 #include "hw/hw.h"
  16 #include "hw/arm/pxa.h"
  17 #include "hw/arm/arm.h"
  18 #include "sysemu/sysemu.h"
  19 #include "hw/pcmcia.h"
  20 #include "hw/i2c/i2c.h"
  21 #include "hw/ssi/ssi.h"
  22 #include "hw/block/flash.h"
  23 #include "qemu/timer.h"
  24 #include "hw/devices.h"
  25 #include "hw/arm/sharpsl.h"
  26 #include "ui/console.h"
  27 #include "audio/audio.h"
  28 #include "hw/boards.h"
  29 #include "sysemu/block-backend.h"
  30 #include "hw/sysbus.h"
  31 #include "exec/address-spaces.h"
  32
  33 #undef REG_FMT
  34 #define REG_FMT                 "0x%02lx"
  35
  36 /* Spitz Flash */
  37 #define FLASH_BASE              0x0c000000
  38 #define FLASH_ECCLPLB           0x00    /* Line parity 7 - 0 bit */
  39 #define FLASH_ECCLPUB           0x04    /* Line parity 15 - 8 bit */
  40 #define FLASH_ECCCP             0x08    /* Column parity 5 - 0 bit */
  41 #define FLASH_ECCCNTR           0x0c    /* ECC byte counter */
  42 #define FLASH_ECCCLRR           0x10    /* Clear ECC */
  43 #define FLASH_FLASHIO           0x14    /* Flash I/O */
  44 #define FLASH_FLASHCTL          0x18    /* Flash Control */
  45
  46 #define FLASHCTL_CE0            (1 << 0)
  47 #define FLASHCTL_CLE            (1 << 1)
  48 #define FLASHCTL_ALE            (1 << 2)
  49 #define FLASHCTL_WP             (1 << 3)
  50 #define FLASHCTL_CE1            (1 << 4)
  51 #define FLASHCTL_RYBY           (1 << 5)
  52 #define FLASHCTL_NCE            (FLASHCTL_CE0 | FLASHCTL_CE1)
  53
  54 #define TYPE_SL_NAND "sl-nand"
  55 #define SL_NAND(obj) OBJECT_CHECK(SLNANDState, (obj), TYPE_SL_NAND)
  56
  57 typedef struct {
  58     SysBusDevice parent_obj;
  59
  60     MemoryRegion iomem;
  61     DeviceState *nand;
  62     uint8_t ctl;
  63     uint8_t manf_id;
  64     uint8_t chip_id;
  65     ECCState ecc;
  66 } SLNANDState;
  67
  68 static uint64_t sl_read(void *opaque, hwaddr addr, unsigned size)
  69 {
  70     SLNANDState *s = (SLNANDState *) opaque;
  71     int ryby;
  72
  73     switch (addr) {
  74 #define BSHR(byte, from, to)    ((s->ecc.lp[byte] >> (from - to)) & (1 << to))
  75     case FLASH_ECCLPLB:
  76         return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) |
  77                 BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7);
  78
  79 #define BSHL(byte, from, to)    ((s->ecc.lp[byte] << (to - from)) & (1 << to))
  80     case FLASH_ECCLPUB:
  81         return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) |
  82                 BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7);
  83
  84     case FLASH_ECCCP:
  85         return s->ecc.cp;
  86
  87     case FLASH_ECCCNTR:
  88         return s->ecc.count & 0xff;
  89
  90     case FLASH_FLASHCTL:
  91         nand_getpins(s->nand, &ryby);
  92         if (ryby)
  93             return s->ctl | FLASHCTL_RYBY;
  94         else
  95             return s->ctl;
  96
  97     case FLASH_FLASHIO:
  98         if (size == 4) {
  99             return ecc_digest(&s->ecc, nand_getio(s->nand)) |
 100                 (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
 101         }
 102         return ecc_digest(&s->ecc, nand_getio(s->nand));
 103
 104     default:
 105         zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
 106     }
 107     return 0;
 108 }
 109
 110 static void sl_write(void *opaque, hwaddr addr,
 111                      uint64_t value, unsigned size)
 112 {
 113     SLNANDState *s = (SLNANDState *) opaque;
 114
 115     switch (addr) {
 116     case FLASH_ECCCLRR:
 117         /* Value is ignored.  */
 118         ecc_reset(&s->ecc);
 119         break;
 120
 121     case FLASH_FLASHCTL:
 122         s->ctl = value & 0xff & ~FLASHCTL_RYBY;
 123         nand_setpins(s->nand,
 124                         s->ctl & FLASHCTL_CLE,
 125                         s->ctl & FLASHCTL_ALE,
 126                         s->ctl & FLASHCTL_NCE,
 127                         s->ctl & FLASHCTL_WP,
 128                         0);
 129         break;
 130
 131     case FLASH_FLASHIO:
 132         nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff));
 133         break;
 134
 135     default:
 136         zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
 137     }
 138 }
 139
 140 enum {
 141     FLASH_128M,
 142     FLASH_1024M,
 143 };
 144
 145 static const MemoryRegionOps sl_ops = {
 146     .read = sl_read,
 147     .write = sl_write,
 148     .endianness = DEVICE_NATIVE_ENDIAN,
 149 };
 150
 151 static void sl_flash_register(PXA2xxState *cpu, int size)
 152 {
 153     DeviceState *dev;
 154
 155     dev = qdev_create(NULL, TYPE_SL_NAND);
 156
 157     qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG);
 158     if (size == FLASH_128M)
 159         qdev_prop_set_uint8(dev, "chip_id", 0x73);
 160     else if (size == FLASH_1024M)
 161         qdev_prop_set_uint8(dev, "chip_id", 0xf1);
 162
 163     qdev_init_nofail(dev);
 164     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASE);
 165 }
 166
 167 static void sl_nand_init(Object *obj)
 168 {
 169     SLNANDState *s = SL_NAND(obj);
 170     SysBusDevice *dev = SYS_BUS_DEVICE(obj);
 171     DriveInfo *nand;
 172
 173     s->ctl = 0;
 174     /* FIXME use a qdev drive property instead of drive_get() */
 175     nand = drive_get(IF_MTD, 0, 0);
 176     s->nand = nand_init(nand ? blk_by_legacy_dinfo(nand) : NULL,
 177                         s->manf_id, s->chip_id);
 178
 179     memory_region_init_io(&s->iomem, obj, &sl_ops, s, "sl", 0x40);
 180     sysbus_init_mmio(dev, &s->iomem);
 181 }
 182
 183 /* Spitz Keyboard */
 184
 185 #define SPITZ_KEY_STROBE_NUM    11
 186 #define SPITZ_KEY_SENSE_NUM     7
 187
 188 static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = {
 189     12, 17, 91, 34, 36, 38, 39
 190 };
 191
 192 static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = {
 193     88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114
 194 };
 195
 196 /* Eighth additional row maps the special keys */
 197 static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = {
 198     { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 },
 199     {  -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 },
 200     { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25,  -1 ,  -1 ,  -1  },
 201     { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26,  -1 , 0x36,  -1  },
 202     { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34,  -1 , 0x1c, 0x2a,  -1  },
 203     { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33,  -1 , 0x48,  -1 ,  -1 , 0x38 },
 204     { 0x37, 0x3d,  -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d,  -1 ,  -1  },
 205     { 0x52, 0x43, 0x01, 0x47, 0x49,  -1 ,  -1 ,  -1 ,  -1 ,  -1 ,  -1  },
 206 };
 207
 208 #define SPITZ_GPIO_AK_INT       13      /* Remote control */
 209 #define SPITZ_GPIO_SYNC         16      /* Sync button */
 210 #define SPITZ_GPIO_ON_KEY       95      /* Power button */
 211 #define SPITZ_GPIO_SWA          97      /* Lid */
 212 #define SPITZ_GPIO_SWB          96      /* Tablet mode */
 213
 214 /* The special buttons are mapped to unused keys */
 215 static const int spitz_gpiomap[5] = {
 216     SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY,
 217     SPITZ_GPIO_SWA, SPITZ_GPIO_SWB,
 218 };
 219
 220 #define TYPE_SPITZ_KEYBOARD "spitz-keyboard"
 221 #define SPITZ_KEYBOARD(obj) \
 222     OBJECT_CHECK(SpitzKeyboardState, (obj), TYPE_SPITZ_KEYBOARD)
 223
 224 typedef struct {
 225     SysBusDevice parent_obj;
 226
 227     qemu_irq sense[SPITZ_KEY_SENSE_NUM];
 228     qemu_irq gpiomap[5];
 229     int keymap[0x80];
 230     uint16_t keyrow[SPITZ_KEY_SENSE_NUM];
 231     uint16_t strobe_state;
 232     uint16_t sense_state;
 233
 234     uint16_t pre_map[0x100];
 235     uint16_t modifiers;
 236     uint16_t imodifiers;
 237     uint8_t fifo[16];
 238     int fifopos, fifolen;
 239     QEMUTimer *kbdtimer;
 240 } SpitzKeyboardState;
 241
 242 static void spitz_keyboard_sense_update(SpitzKeyboardState *s)
 243 {
 244     int i;
 245     uint16_t strobe, sense = 0;
 246     for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) {
 247         strobe = s->keyrow[i] & s->strobe_state;
 248         if (strobe) {
 249             sense |= 1 << i;
 250             if (!(s->sense_state & (1 << i)))
 251                 qemu_irq_raise(s->sense[i]);
 252         } else if (s->sense_state & (1 << i))
 253             qemu_irq_lower(s->sense[i]);
 254     }
 255
 256     s->sense_state = sense;
 257 }
 258
 259 static void spitz_keyboard_strobe(void *opaque, int line, int level)
 260 {
 261     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 262
 263     if (level)
 264         s->strobe_state |= 1 << line;
 265     else
 266         s->strobe_state &= ~(1 << line);
 267     spitz_keyboard_sense_update(s);
 268 }
 269
 270 static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode)
 271 {
 272     int spitz_keycode = s->keymap[keycode & 0x7f];
 273     if (spitz_keycode == -1)
 274         return;
 275
 276     /* Handle the additional keys */
 277     if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) {
 278         qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80));
 279         return;
 280     }
 281
 282     if (keycode & 0x80)
 283         s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf));
 284     else
 285         s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf);
 286
 287     spitz_keyboard_sense_update(s);
 288 }
 289
 290 #define SPITZ_MOD_SHIFT   (1 << 7)
 291 #define SPITZ_MOD_CTRL    (1 << 8)
 292 #define SPITZ_MOD_FN      (1 << 9)
 293
 294 #define QUEUE_KEY(c)    s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c
 295
 296 static void spitz_keyboard_handler(void *opaque, int keycode)
 297 {
 298     SpitzKeyboardState *s = opaque;
 299     uint16_t code;
 300     int mapcode;
 301     switch (keycode) {
 302     case 0x2a:  /* Left Shift */
 303         s->modifiers |= 1;
 304         break;
 305     case 0xaa:
 306         s->modifiers &= ~1;
 307         break;
 308     case 0x36:  /* Right Shift */
 309         s->modifiers |= 2;
 310         break;
 311     case 0xb6:
 312         s->modifiers &= ~2;
 313         break;
 314     case 0x1d:  /* Control */
 315         s->modifiers |= 4;
 316         break;
 317     case 0x9d:
 318         s->modifiers &= ~4;
 319         break;
 320     case 0x38:  /* Alt */
 321         s->modifiers |= 8;
 322         break;
 323     case 0xb8:
 324         s->modifiers &= ~8;
 325         break;
 326     }
 327
 328     code = s->pre_map[mapcode = ((s->modifiers & 3) ?
 329             (keycode | SPITZ_MOD_SHIFT) :
 330             (keycode & ~SPITZ_MOD_SHIFT))];
 331
 332     if (code != mapcode) {
 333 #if 0
 334         if ((code & SPITZ_MOD_SHIFT) && !(s->modifiers & 1)) {
 335             QUEUE_KEY(0x2a | (keycode & 0x80));
 336         }
 337         if ((code & SPITZ_MOD_CTRL) && !(s->modifiers & 4)) {
 338             QUEUE_KEY(0x1d | (keycode & 0x80));
 339         }
 340         if ((code & SPITZ_MOD_FN) && !(s->modifiers & 8)) {
 341             QUEUE_KEY(0x38 | (keycode & 0x80));
 342         }
 343         if ((code & SPITZ_MOD_FN) && (s->modifiers & 1)) {
 344             QUEUE_KEY(0x2a | (~keycode & 0x80));
 345         }
 346         if ((code & SPITZ_MOD_FN) && (s->modifiers & 2)) {
 347             QUEUE_KEY(0x36 | (~keycode & 0x80));
 348         }
 349 #else
 350         if (keycode & 0x80) {
 351             if ((s->imodifiers & 1   ) && !(s->modifiers & 1))
 352                 QUEUE_KEY(0x2a | 0x80);
 353             if ((s->imodifiers & 4   ) && !(s->modifiers & 4))
 354                 QUEUE_KEY(0x1d | 0x80);
 355             if ((s->imodifiers & 8   ) && !(s->modifiers & 8))
 356                 QUEUE_KEY(0x38 | 0x80);
 357             if ((s->imodifiers & 0x10) && (s->modifiers & 1))
 358                 QUEUE_KEY(0x2a);
 359             if ((s->imodifiers & 0x20) && (s->modifiers & 2))
 360                 QUEUE_KEY(0x36);
 361             s->imodifiers = 0;
 362         } else {
 363             if ((code & SPITZ_MOD_SHIFT) &&
 364                 !((s->modifiers | s->imodifiers) & 1)) {
 365                 QUEUE_KEY(0x2a);
 366                 s->imodifiers |= 1;
 367             }
 368             if ((code & SPITZ_MOD_CTRL) &&
 369                 !((s->modifiers | s->imodifiers) & 4)) {
 370                 QUEUE_KEY(0x1d);
 371                 s->imodifiers |= 4;
 372             }
 373             if ((code & SPITZ_MOD_FN) &&
 374                 !((s->modifiers | s->imodifiers) & 8)) {
 375                 QUEUE_KEY(0x38);
 376                 s->imodifiers |= 8;
 377             }
 378             if ((code & SPITZ_MOD_FN) && (s->modifiers & 1) &&
 379                             !(s->imodifiers & 0x10)) {
 380                 QUEUE_KEY(0x2a | 0x80);
 381                 s->imodifiers |= 0x10;
 382             }
 383             if ((code & SPITZ_MOD_FN) && (s->modifiers & 2) &&
 384                             !(s->imodifiers & 0x20)) {
 385                 QUEUE_KEY(0x36 | 0x80);
 386                 s->imodifiers |= 0x20;
 387             }
 388         }
 389 #endif
 390     }
 391
 392     QUEUE_KEY((code & 0x7f) | (keycode & 0x80));
 393 }
 394
 395 static void spitz_keyboard_tick(void *opaque)
 396 {
 397     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 398
 399     if (s->fifolen) {
 400         spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]);
 401         s->fifolen --;
 402         if (s->fifopos >= 16)
 403             s->fifopos = 0;
 404     }
 405
 406     timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
 407                    NANOSECONDS_PER_SECOND / 32);
 408 }
 409
 410 static void spitz_keyboard_pre_map(SpitzKeyboardState *s)
 411 {
 412     int i;
 413     for (i = 0; i < 0x100; i ++)
 414         s->pre_map[i] = i;
 415     s->pre_map[0x02 | SPITZ_MOD_SHIFT] = 0x02 | SPITZ_MOD_SHIFT; /* exclam */
 416     s->pre_map[0x28 | SPITZ_MOD_SHIFT] = 0x03 | SPITZ_MOD_SHIFT; /* quotedbl */
 417     s->pre_map[0x04 | SPITZ_MOD_SHIFT] = 0x04 | SPITZ_MOD_SHIFT; /* # */
 418     s->pre_map[0x05 | SPITZ_MOD_SHIFT] = 0x05 | SPITZ_MOD_SHIFT; /* dollar */
 419     s->pre_map[0x06 | SPITZ_MOD_SHIFT] = 0x06 | SPITZ_MOD_SHIFT; /* percent */
 420     s->pre_map[0x08 | SPITZ_MOD_SHIFT] = 0x07 | SPITZ_MOD_SHIFT; /* ampersand */
 421     s->pre_map[0x28]                   = 0x08 | SPITZ_MOD_SHIFT; /* ' */
 422     s->pre_map[0x0a | SPITZ_MOD_SHIFT] = 0x09 | SPITZ_MOD_SHIFT; /* ( */
 423     s->pre_map[0x0b | SPITZ_MOD_SHIFT] = 0x0a | SPITZ_MOD_SHIFT; /* ) */
 424     s->pre_map[0x29 | SPITZ_MOD_SHIFT] = 0x0b | SPITZ_MOD_SHIFT; /* tilde */
 425     s->pre_map[0x03 | SPITZ_MOD_SHIFT] = 0x0c | SPITZ_MOD_SHIFT; /* at */
 426     s->pre_map[0xd3]                   = 0x0e | SPITZ_MOD_FN;    /* Delete */
 427     s->pre_map[0x3a]                   = 0x0f | SPITZ_MOD_FN;    /* Caps_Lock */
 428     s->pre_map[0x07 | SPITZ_MOD_SHIFT] = 0x11 | SPITZ_MOD_FN;    /* ^ */
 429     s->pre_map[0x0d]                   = 0x12 | SPITZ_MOD_FN;    /* equal */
 430     s->pre_map[0x0d | SPITZ_MOD_SHIFT] = 0x13 | SPITZ_MOD_FN;    /* plus */
 431     s->pre_map[0x1a]                   = 0x14 | SPITZ_MOD_FN;    /* [ */
 432     s->pre_map[0x1b]                   = 0x15 | SPITZ_MOD_FN;    /* ] */
 433     s->pre_map[0x1a | SPITZ_MOD_SHIFT] = 0x16 | SPITZ_MOD_FN;    /* { */
 434     s->pre_map[0x1b | SPITZ_MOD_SHIFT] = 0x17 | SPITZ_MOD_FN;    /* } */
 435     s->pre_map[0x27]                   = 0x22 | SPITZ_MOD_FN;    /* semicolon */
 436     s->pre_map[0x27 | SPITZ_MOD_SHIFT] = 0x23 | SPITZ_MOD_FN;    /* colon */
 437     s->pre_map[0x09 | SPITZ_MOD_SHIFT] = 0x24 | SPITZ_MOD_FN;    /* asterisk */
 438     s->pre_map[0x2b]                   = 0x25 | SPITZ_MOD_FN;    /* backslash */
 439     s->pre_map[0x2b | SPITZ_MOD_SHIFT] = 0x26 | SPITZ_MOD_FN;    /* bar */
 440     s->pre_map[0x0c | SPITZ_MOD_SHIFT] = 0x30 | SPITZ_MOD_FN;    /* _ */
 441     s->pre_map[0x33 | SPITZ_MOD_SHIFT] = 0x33 | SPITZ_MOD_FN;    /* less */
 442     s->pre_map[0x35]                   = 0x33 | SPITZ_MOD_SHIFT; /* slash */
 443     s->pre_map[0x34 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_FN;    /* greater */
 444     s->pre_map[0x35 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_SHIFT; /* question */
 445     s->pre_map[0x49]                   = 0x48 | SPITZ_MOD_FN;    /* Page_Up */
 446     s->pre_map[0x51]                   = 0x50 | SPITZ_MOD_FN;    /* Page_Down */
 447
 448     s->modifiers = 0;
 449     s->imodifiers = 0;
 450     s->fifopos = 0;
 451     s->fifolen = 0;
 452 }
 453
 454 #undef SPITZ_MOD_SHIFT
 455 #undef SPITZ_MOD_CTRL
 456 #undef SPITZ_MOD_FN
 457
 458 static int spitz_keyboard_post_load(void *opaque, int version_id)
 459 {
 460     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 461
 462     /* Release all pressed keys */
 463     memset(s->keyrow, 0, sizeof(s->keyrow));
 464     spitz_keyboard_sense_update(s);
 465     s->modifiers = 0;
 466     s->imodifiers = 0;
 467     s->fifopos = 0;
 468     s->fifolen = 0;
 469
 470     return 0;
 471 }
 472
 473 static void spitz_keyboard_register(PXA2xxState *cpu)
 474 {
 475     int i;
 476     DeviceState *dev;
 477     SpitzKeyboardState *s;
 478
 479     dev = sysbus_create_simple(TYPE_SPITZ_KEYBOARD, -1, NULL);
 480     s = SPITZ_KEYBOARD(dev);
 481
 482     for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++)
 483         qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i]));
 484
 485     for (i = 0; i < 5; i ++)
 486         s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]);
 487
 488     if (!graphic_rotate)
 489         s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]);
 490
 491     for (i = 0; i < 5; i++)
 492         qemu_set_irq(s->gpiomap[i], 0);
 493
 494     for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++)
 495         qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i],
 496                 qdev_get_gpio_in(dev, i));
 497
 498     timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
 499
 500     qemu_add_kbd_event_handler(spitz_keyboard_handler, s);
 501 }
 502
 503 static void spitz_keyboard_init(Object *obj)
 504 {
 505     DeviceState *dev = DEVICE(obj);
 506     SpitzKeyboardState *s = SPITZ_KEYBOARD(obj);
 507     int i, j;
 508
 509     for (i = 0; i < 0x80; i ++)
 510         s->keymap[i] = -1;
 511     for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++)
 512         for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++)
 513             if (spitz_keymap[i][j] != -1)
 514                 s->keymap[spitz_keymap[i][j]] = (i << 4) | j;
 515
 516     spitz_keyboard_pre_map(s);
 517
 518     s->kbdtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL, spitz_keyboard_tick, s);
 519     qdev_init_gpio_in(dev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM);
 520     qdev_init_gpio_out(dev, s->sense, SPITZ_KEY_SENSE_NUM);
 521 }
 522
 523 /* LCD backlight controller */
 524
 525 #define LCDTG_RESCTL    0x00
 526 #define LCDTG_PHACTRL   0x01
 527 #define LCDTG_DUTYCTRL  0x02
 528 #define LCDTG_POWERREG0 0x03
 529 #define LCDTG_POWERREG1 0x04
 530 #define LCDTG_GPOR3     0x05
 531 #define LCDTG_PICTRL    0x06
 532 #define LCDTG_POLCTRL   0x07
 533
 534 typedef struct {
 535     SSISlave ssidev;
 536     uint32_t bl_intensity;
 537     uint32_t bl_power;
 538 } SpitzLCDTG;
 539
 540 static void spitz_bl_update(SpitzLCDTG *s)
 541 {
 542     if (s->bl_power && s->bl_intensity)
 543         zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity);
 544     else
 545         zaurus_printf("LCD Backlight now off\n");
 546 }
 547
 548 /* FIXME: Implement GPIO properly and remove this hack.  */
 549 static SpitzLCDTG *spitz_lcdtg;
 550
 551 static inline void spitz_bl_bit5(void *opaque, int line, int level)
 552 {
 553     SpitzLCDTG *s = spitz_lcdtg;
 554     int prev = s->bl_intensity;
 555
 556     if (level)
 557         s->bl_intensity &= ~0x20;
 558     else
 559         s->bl_intensity |= 0x20;
 560
 561     if (s->bl_power && prev != s->bl_intensity)
 562         spitz_bl_update(s);
 563 }
 564
 565 static inline void spitz_bl_power(void *opaque, int line, int level)
 566 {
 567     SpitzLCDTG *s = spitz_lcdtg;
 568     s->bl_power = !!level;
 569     spitz_bl_update(s);
 570 }
 571
 572 static uint32_t spitz_lcdtg_transfer(SSISlave *dev, uint32_t value)
 573 {
 574     SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
 575     int addr;
 576     addr = value >> 5;
 577     value &= 0x1f;
 578
 579     switch (addr) {
 580     case LCDTG_RESCTL:
 581         if (value)
 582             zaurus_printf("LCD in QVGA mode\n");
 583         else
 584             zaurus_printf("LCD in VGA mode\n");
 585         break;
 586
 587     case LCDTG_DUTYCTRL:
 588         s->bl_intensity &= ~0x1f;
 589         s->bl_intensity |= value;
 590         if (s->bl_power)
 591             spitz_bl_update(s);
 592         break;
 593
 594     case LCDTG_POWERREG0:
 595         /* Set common voltage to M62332FP */
 596         break;
 597     }
 598     return 0;
 599 }
 600
 601 static void spitz_lcdtg_realize(SSISlave *dev, Error **errp)
 602 {
 603     SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
 604
 605     spitz_lcdtg = s;
 606     s->bl_power = 0;
 607     s->bl_intensity = 0x20;
 608 }
 609
 610 /* SSP devices */
 611
 612 #define CORGI_SSP_PORT          2
 613
 614 #define SPITZ_GPIO_LCDCON_CS    53
 615 #define SPITZ_GPIO_ADS7846_CS   14
 616 #define SPITZ_GPIO_MAX1111_CS   20
 617 #define SPITZ_GPIO_TP_INT       11
 618
 619 static DeviceState *max1111;
 620
 621 /* "Demux" the signal based on current chipselect */
 622 typedef struct {
 623     SSISlave ssidev;
 624     SSIBus *bus[3];
 625     uint32_t enable[3];
 626 } CorgiSSPState;
 627
 628 static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value)
 629 {
 630     CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev);
 631     int i;
 632
 633     for (i = 0; i < 3; i++) {
 634         if (s->enable[i]) {
 635             return ssi_transfer(s->bus[i], value);
 636         }
 637     }
 638     return 0;
 639 }
 640
 641 static void corgi_ssp_gpio_cs(void *opaque, int line, int level)
 642 {
 643     CorgiSSPState *s = (CorgiSSPState *)opaque;
 644     assert(line >= 0 && line < 3);
 645     s->enable[line] = !level;
 646 }
 647
 648 #define MAX1111_BATT_VOLT       1
 649 #define MAX1111_BATT_TEMP       2
 650 #define MAX1111_ACIN_VOLT       3
 651
 652 #define SPITZ_BATTERY_TEMP      0xe0    /* About 2.9V */
 653 #define SPITZ_BATTERY_VOLT      0xd0    /* About 4.0V */
 654 #define SPITZ_CHARGEON_ACIN     0x80    /* About 5.0V */
 655
 656 static void spitz_adc_temp_on(void *opaque, int line, int level)
 657 {
 658     if (!max1111)
 659         return;
 660
 661     if (level)
 662         max111x_set_input(max1111, MAX1111_BATT_TEMP, SPITZ_BATTERY_TEMP);
 663     else
 664         max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
 665 }
 666
 667 static void corgi_ssp_realize(SSISlave *d, Error **errp)
 668 {
 669     DeviceState *dev = DEVICE(d);
 670     CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, d);
 671
 672     qdev_init_gpio_in(dev, corgi_ssp_gpio_cs, 3);
 673     s->bus[0] = ssi_create_bus(dev, "ssi0");
 674     s->bus[1] = ssi_create_bus(dev, "ssi1");
 675     s->bus[2] = ssi_create_bus(dev, "ssi2");
 676 }
 677
 678 static void spitz_ssp_attach(PXA2xxState *cpu)
 679 {
 680     DeviceState *mux;
 681     DeviceState *dev;
 682     void *bus;
 683
 684     mux = ssi_create_slave(cpu->ssp[CORGI_SSP_PORT - 1], "corgi-ssp");
 685
 686     bus = qdev_get_child_bus(mux, "ssi0");
 687     ssi_create_slave(bus, "spitz-lcdtg");
 688
 689     bus = qdev_get_child_bus(mux, "ssi1");
 690     dev = ssi_create_slave(bus, "ads7846");
 691     qdev_connect_gpio_out(dev, 0,
 692                           qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_TP_INT));
 693
 694     bus = qdev_get_child_bus(mux, "ssi2");
 695     max1111 = ssi_create_slave(bus, "max1111");
 696     max111x_set_input(max1111, MAX1111_BATT_VOLT, SPITZ_BATTERY_VOLT);
 697     max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
 698     max111x_set_input(max1111, MAX1111_ACIN_VOLT, SPITZ_CHARGEON_ACIN);
 699
 700     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_LCDCON_CS,
 701                         qdev_get_gpio_in(mux, 0));
 702     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ADS7846_CS,
 703                         qdev_get_gpio_in(mux, 1));
 704     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_MAX1111_CS,
 705                         qdev_get_gpio_in(mux, 2));
 706 }
 707
 708 /* CF Microdrive */
 709
 710 static void spitz_microdrive_attach(PXA2xxState *cpu, int slot)
 711 {
 712     PCMCIACardState *md;
 713     DriveInfo *dinfo;
 714
 715     dinfo = drive_get(IF_IDE, 0, 0);
 716     if (!dinfo || dinfo->media_cd)
 717         return;
 718     md = dscm1xxxx_init(dinfo);
 719     pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md);
 720 }
 721
 722 /* Wm8750 and Max7310 on I2C */
 723
 724 #define AKITA_MAX_ADDR  0x18
 725 #define SPITZ_WM_ADDRL  0x1b
 726 #define SPITZ_WM_ADDRH  0x1a
 727
 728 #define SPITZ_GPIO_WM   5
 729
 730 static void spitz_wm8750_addr(void *opaque, int line, int level)
 731 {
 732     I2CSlave *wm = (I2CSlave *) opaque;
 733     if (level)
 734         i2c_set_slave_address(wm, SPITZ_WM_ADDRH);
 735     else
 736         i2c_set_slave_address(wm, SPITZ_WM_ADDRL);
 737 }
 738
 739 static void spitz_i2c_setup(PXA2xxState *cpu)
 740 {
 741     /* Attach the CPU on one end of our I2C bus.  */
 742     I2CBus *bus = pxa2xx_i2c_bus(cpu->i2c[0]);
 743
 744     DeviceState *wm;
 745
 746     /* Attach a WM8750 to the bus */
 747     wm = i2c_create_slave(bus, "wm8750", 0);
 748
 749     spitz_wm8750_addr(wm, 0, 0);
 750     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM,
 751                           qemu_allocate_irq(spitz_wm8750_addr, wm, 0));
 752     /* .. and to the sound interface.  */
 753     cpu->i2s->opaque = wm;
 754     cpu->i2s->codec_out = wm8750_dac_dat;
 755     cpu->i2s->codec_in = wm8750_adc_dat;
 756     wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s);
 757 }
 758
 759 static void spitz_akita_i2c_setup(PXA2xxState *cpu)
 760 {
 761     /* Attach a Max7310 to Akita I2C bus.  */
 762     i2c_create_slave(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310",
 763                      AKITA_MAX_ADDR);
 764 }
 765
 766 /* Other peripherals */
 767
 768 static void spitz_out_switch(void *opaque, int line, int level)
 769 {
 770     switch (line) {
 771     case 0:
 772         zaurus_printf("Charging %s.\n", level ? "off" : "on");
 773         break;
 774     case 1:
 775         zaurus_printf("Discharging %s.\n", level ? "on" : "off");
 776         break;
 777     case 2:
 778         zaurus_printf("Green LED %s.\n", level ? "on" : "off");
 779         break;
 780     case 3:
 781         zaurus_printf("Orange LED %s.\n", level ? "on" : "off");
 782         break;
 783     case 4:
 784         spitz_bl_bit5(opaque, line, level);
 785         break;
 786     case 5:
 787         spitz_bl_power(opaque, line, level);
 788         break;
 789     case 6:
 790         spitz_adc_temp_on(opaque, line, level);
 791         break;
 792     }
 793 }
 794
 795 #define SPITZ_SCP_LED_GREEN             1
 796 #define SPITZ_SCP_JK_B                  2
 797 #define SPITZ_SCP_CHRG_ON               3
 798 #define SPITZ_SCP_MUTE_L                4
 799 #define SPITZ_SCP_MUTE_R                5
 800 #define SPITZ_SCP_CF_POWER              6
 801 #define SPITZ_SCP_LED_ORANGE            7
 802 #define SPITZ_SCP_JK_A                  8
 803 #define SPITZ_SCP_ADC_TEMP_ON           9
 804 #define SPITZ_SCP2_IR_ON                1
 805 #define SPITZ_SCP2_AKIN_PULLUP          2
 806 #define SPITZ_SCP2_BACKLIGHT_CONT       7
 807 #define SPITZ_SCP2_BACKLIGHT_ON         8
 808 #define SPITZ_SCP2_MIC_BIAS             9
 809
 810 static void spitz_scoop_gpio_setup(PXA2xxState *cpu,
 811                 DeviceState *scp0, DeviceState *scp1)
 812 {
 813     qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, cpu, 8);
 814
 815     qdev_connect_gpio_out(scp0, SPITZ_SCP_CHRG_ON, outsignals[0]);
 816     qdev_connect_gpio_out(scp0, SPITZ_SCP_JK_B, outsignals[1]);
 817     qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_GREEN, outsignals[2]);
 818     qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_ORANGE, outsignals[3]);
 819
 820     if (scp1) {
 821         qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_CONT, outsignals[4]);
 822         qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_ON, outsignals[5]);
 823     }
 824
 825     qdev_connect_gpio_out(scp0, SPITZ_SCP_ADC_TEMP_ON, outsignals[6]);
 826 }
 827
 828 #define SPITZ_GPIO_HSYNC                22
 829 #define SPITZ_GPIO_SD_DETECT            9
 830 #define SPITZ_GPIO_SD_WP                81
 831 #define SPITZ_GPIO_ON_RESET             89
 832 #define SPITZ_GPIO_BAT_COVER            90
 833 #define SPITZ_GPIO_CF1_IRQ              105
 834 #define SPITZ_GPIO_CF1_CD               94
 835 #define SPITZ_GPIO_CF2_IRQ              106
 836 #define SPITZ_GPIO_CF2_CD               93
 837
 838 static int spitz_hsync;
 839
 840 static void spitz_lcd_hsync_handler(void *opaque, int line, int level)
 841 {
 842     PXA2xxState *cpu = (PXA2xxState *) opaque;
 843     qemu_set_irq(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_HSYNC), spitz_hsync);
 844     spitz_hsync ^= 1;
 845 }
 846
 847 static void spitz_gpio_setup(PXA2xxState *cpu, int slots)
 848 {
 849     qemu_irq lcd_hsync;
 850     /*
 851      * Bad hack: We toggle the LCD hsync GPIO on every GPIO status
 852      * read to satisfy broken guests that poll-wait for hsync.
 853      * Simulating a real hsync event would be less practical and
 854      * wouldn't guarantee that a guest ever exits the loop.
 855      */
 856     spitz_hsync = 0;
 857     lcd_hsync = qemu_allocate_irq(spitz_lcd_hsync_handler, cpu, 0);
 858     pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync);
 859     pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync);
 860
 861     /* MMC/SD host */
 862     pxa2xx_mmci_handlers(cpu->mmc,
 863                     qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP),
 864                     qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT));
 865
 866     /* Battery lock always closed */
 867     qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER));
 868
 869     /* Handle reset */
 870     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ON_RESET, cpu->reset);
 871
 872     /* PCMCIA signals: card's IRQ and Card-Detect */
 873     if (slots >= 1)
 874         pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
 875                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_IRQ),
 876                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_CD));
 877     if (slots >= 2)
 878         pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
 879                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_IRQ),
 880                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_CD));
 881 }
 882
 883 /* Board init.  */
 884 enum spitz_model_e { spitz, akita, borzoi, terrier };
 885
 886 #define SPITZ_RAM       0x04000000
 887 #define SPITZ_ROM       0x00800000
 888
 889 static struct arm_boot_info spitz_binfo = {
 890     .loader_start = PXA2XX_SDRAM_BASE,
 891     .ram_size = 0x04000000,
 892 };
 893
 894 static void spitz_common_init(MachineState *machine,
 895                               enum spitz_model_e model, int arm_id)
 896 {
 897     PXA2xxState *mpu;
 898     DeviceState *scp0, *scp1 = NULL;
 899     MemoryRegion *address_space_mem = get_system_memory();
 900     MemoryRegion *rom = g_new(MemoryRegion, 1);
 901     const char *cpu_model = machine->cpu_model;
 902
 903     if (!cpu_model)
 904         cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0";
 905
 906     /* Setup CPU & memory */
 907     mpu = pxa270_init(address_space_mem, spitz_binfo.ram_size, cpu_model);
 908
 909     sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
 910
 911     memory_region_init_ram(rom, NULL, "spitz.rom", SPITZ_ROM, &error_fatal);
 912     vmstate_register_ram_global(rom);
 913     memory_region_set_readonly(rom, true);
 914     memory_region_add_subregion(address_space_mem, 0, rom);
 915
 916     /* Setup peripherals */
 917     spitz_keyboard_register(mpu);
 918
 919     spitz_ssp_attach(mpu);
 920
 921     scp0 = sysbus_create_simple("scoop", 0x10800000, NULL);
 922     if (model != akita) {
 923         scp1 = sysbus_create_simple("scoop", 0x08800040, NULL);
 924     }
 925
 926     spitz_scoop_gpio_setup(mpu, scp0, scp1);
 927
 928     spitz_gpio_setup(mpu, (model == akita) ? 1 : 2);
 929
 930     spitz_i2c_setup(mpu);
 931
 932     if (model == akita)
 933         spitz_akita_i2c_setup(mpu);
 934
 935     if (model == terrier)
 936         /* A 6.0 GB microdrive is permanently sitting in CF slot 1.  */
 937         spitz_microdrive_attach(mpu, 1);
 938     else if (model != akita)
 939         /* A 4.0 GB microdrive is permanently sitting in CF slot 0.  */
 940         spitz_microdrive_attach(mpu, 0);
 941
 942     spitz_binfo.kernel_filename = machine->kernel_filename;
 943     spitz_binfo.kernel_cmdline = machine->kernel_cmdline;
 944     spitz_binfo.initrd_filename = machine->initrd_filename;
 945     spitz_binfo.board_id = arm_id;
 946     arm_load_kernel(mpu->cpu, &spitz_binfo);
 947     sl_bootparam_write(SL_PXA_PARAM_BASE);
 948 }
 949
 950 static void spitz_init(MachineState *machine)
 951 {
 952     spitz_common_init(machine, spitz, 0x2c9);
 953 }
 954
 955 static void borzoi_init(MachineState *machine)
 956 {
 957     spitz_common_init(machine, borzoi, 0x33f);
 958 }
 959
 960 static void akita_init(MachineState *machine)
 961 {
 962     spitz_common_init(machine, akita, 0x2e8);
 963 }
 964
 965 static void terrier_init(MachineState *machine)
 966 {
 967     spitz_common_init(machine, terrier, 0x33f);
 968 }
 969
 970 static void akitapda_class_init(ObjectClass *oc, void *data)
 971 {
 972     MachineClass *mc = MACHINE_CLASS(oc);
 973
 974     mc->desc = "Sharp SL-C1000 (Akita) PDA (PXA270)";
 975     mc->init = akita_init;
 976 }
 977
 978 static const TypeInfo akitapda_type = {
 979     .name = MACHINE_TYPE_NAME("akita"),
 980     .parent = TYPE_MACHINE,
 981     .class_init = akitapda_class_init,
 982 };
 983
 984 static void spitzpda_class_init(ObjectClass *oc, void *data)
 985 {
 986     MachineClass *mc = MACHINE_CLASS(oc);
 987
 988     mc->desc = "Sharp SL-C3000 (Spitz) PDA (PXA270)";
 989     mc->init = spitz_init;
 990 }
 991
 992 static const TypeInfo spitzpda_type = {
 993     .name = MACHINE_TYPE_NAME("spitz"),
 994     .parent = TYPE_MACHINE,
 995     .class_init = spitzpda_class_init,
 996 };
 997
 998 static void borzoipda_class_init(ObjectClass *oc, void *data)
 999 {
1000     MachineClass *mc = MACHINE_CLASS(oc);
1001
1002     mc->desc = "Sharp SL-C3100 (Borzoi) PDA (PXA270)";
1003     mc->init = borzoi_init;
1004 }
1005
1006 static const TypeInfo borzoipda_type = {
1007     .name = MACHINE_TYPE_NAME("borzoi"),
1008     .parent = TYPE_MACHINE,
1009     .class_init = borzoipda_class_init,
1010 };
1011
1012 static void terrierpda_class_init(ObjectClass *oc, void *data)
1013 {
1014     MachineClass *mc = MACHINE_CLASS(oc);
1015
1016     mc->desc = "Sharp SL-C3200 (Terrier) PDA (PXA270)";
1017     mc->init = terrier_init;
1018 }
1019
1020 static const TypeInfo terrierpda_type = {
1021     .name = MACHINE_TYPE_NAME("terrier"),
1022     .parent = TYPE_MACHINE,
1023     .class_init = terrierpda_class_init,
1024 };
1025
1026 static void spitz_machine_init(void)
1027 {
1028     type_register_static(&akitapda_type);
1029     type_register_static(&spitzpda_type);
1030     type_register_static(&borzoipda_type);
1031     type_register_static(&terrierpda_type);
1032 }
1033
1034 type_init(spitz_machine_init)
1035
1036 static bool is_version_0(void *opaque, int version_id)
1037 {
1038     return version_id == 0;
1039 }
1040
1041 static VMStateDescription vmstate_sl_nand_info = {
1042     .name = "sl-nand",
1043     .version_id = 0,
1044     .minimum_version_id = 0,
1045     .fields = (VMStateField[]) {
1046         VMSTATE_UINT8(ctl, SLNANDState),
1047         VMSTATE_STRUCT(ecc, SLNANDState, 0, vmstate_ecc_state, ECCState),
1048         VMSTATE_END_OF_LIST(),
1049     },
1050 };
1051
1052 static Property sl_nand_properties[] = {
1053     DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG),
1054     DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1),
1055     DEFINE_PROP_END_OF_LIST(),
1056 };
1057
1058 static void sl_nand_class_init(ObjectClass *klass, void *data)
1059 {
1060     DeviceClass *dc = DEVICE_CLASS(klass);
1061
1062     dc->vmsd = &vmstate_sl_nand_info;
1063     dc->props = sl_nand_properties;
1064     /* Reason: init() method uses drive_get() */
1065     dc->cannot_instantiate_with_device_add_yet = true;
1066 }
1067
1068 static const TypeInfo sl_nand_info = {
1069     .name          = TYPE_SL_NAND,
1070     .parent        = TYPE_SYS_BUS_DEVICE,
1071     .instance_size = sizeof(SLNANDState),
1072     .instance_init = sl_nand_init,
1073     .class_init    = sl_nand_class_init,
1074 };
1075
1076 static VMStateDescription vmstate_spitz_kbd = {
1077     .name = "spitz-keyboard",
1078     .version_id = 1,
1079     .minimum_version_id = 0,
1080     .post_load = spitz_keyboard_post_load,
1081     .fields = (VMStateField[]) {
1082         VMSTATE_UINT16(sense_state, SpitzKeyboardState),
1083         VMSTATE_UINT16(strobe_state, SpitzKeyboardState),
1084         VMSTATE_UNUSED_TEST(is_version_0, 5),
1085         VMSTATE_END_OF_LIST(),
1086     },
1087 };
1088
1089 static void spitz_keyboard_class_init(ObjectClass *klass, void *data)
1090 {
1091     DeviceClass *dc = DEVICE_CLASS(klass);
1092
1093     dc->vmsd = &vmstate_spitz_kbd;
1094 }
1095
1096 static const TypeInfo spitz_keyboard_info = {
1097     .name          = TYPE_SPITZ_KEYBOARD,
1098     .parent        = TYPE_SYS_BUS_DEVICE,
1099     .instance_size = sizeof(SpitzKeyboardState),
1100     .instance_init = spitz_keyboard_init,
1101     .class_init    = spitz_keyboard_class_init,
1102 };
1103
1104 static const VMStateDescription vmstate_corgi_ssp_regs = {
1105     .name = "corgi-ssp",
1106     .version_id = 2,
1107     .minimum_version_id = 2,
1108     .fields = (VMStateField[]) {
1109         VMSTATE_SSI_SLAVE(ssidev, CorgiSSPState),
1110         VMSTATE_UINT32_ARRAY(enable, CorgiSSPState, 3),
1111         VMSTATE_END_OF_LIST(),
1112     }
1113 };
1114
1115 static void corgi_ssp_class_init(ObjectClass *klass, void *data)
1116 {
1117     DeviceClass *dc = DEVICE_CLASS(klass);
1118     SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1119
1120     k->realize = corgi_ssp_realize;
1121     k->transfer = corgi_ssp_transfer;
1122     dc->vmsd = &vmstate_corgi_ssp_regs;
1123 }
1124
1125 static const TypeInfo corgi_ssp_info = {
1126     .name          = "corgi-ssp",
1127     .parent        = TYPE_SSI_SLAVE,
1128     .instance_size = sizeof(CorgiSSPState),
1129     .class_init    = corgi_ssp_class_init,
1130 };
1131
1132 static const VMStateDescription vmstate_spitz_lcdtg_regs = {
1133     .name = "spitz-lcdtg",
1134     .version_id = 1,
1135     .minimum_version_id = 1,
1136     .fields = (VMStateField[]) {
1137         VMSTATE_SSI_SLAVE(ssidev, SpitzLCDTG),
1138         VMSTATE_UINT32(bl_intensity, SpitzLCDTG),
1139         VMSTATE_UINT32(bl_power, SpitzLCDTG),
1140         VMSTATE_END_OF_LIST(),
1141     }
1142 };
1143
1144 static void spitz_lcdtg_class_init(ObjectClass *klass, void *data)
1145 {
1146     DeviceClass *dc = DEVICE_CLASS(klass);
1147     SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1148
1149     k->realize = spitz_lcdtg_realize;
1150     k->transfer = spitz_lcdtg_transfer;
1151     dc->vmsd = &vmstate_spitz_lcdtg_regs;
1152 }
1153
1154 static const TypeInfo spitz_lcdtg_info = {
1155     .name          = "spitz-lcdtg",
1156     .parent        = TYPE_SSI_SLAVE,
1157     .instance_size = sizeof(SpitzLCDTG),
1158     .class_init    = spitz_lcdtg_class_init,
1159 };
1160
1161 static void spitz_register_types(void)
1162 {
1163     type_register_static(&corgi_ssp_info);
1164     type_register_static(&spitz_lcdtg_info);
1165     type_register_static(&spitz_keyboard_info);
1166     type_register_static(&sl_nand_info);
1167 }
1168
1169 type_init(spitz_register_types)