hw/acpi/ich9.c

   1 /*
   2  * ACPI implementation
   3  *
   4  * Copyright (c) 2006 Fabrice Bellard
   5  * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
   6  *                    VA Linux Systems Japan K.K.
   7  * Copyright (C) 2012 Jason Baron <jbaron@redhat.com>
   8  *
   9  * This is based on acpi.c.
  10  *
  11  * This library is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU Lesser General Public
  13  * License version 2.1 as published by the Free Software Foundation.
  14  *
  15  * This library is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18  * Lesser General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU Lesser General Public
  21  * License along with this library; if not, see <http://www.gnu.org/licenses/>
  22  *
  23  * Contributions after 2012-01-13 are licensed under the terms of the
  24  * GNU GPL, version 2 or (at your option) any later version.
  25  */
  26
  27 #include "qemu/osdep.h"
  28 #include "qapi/error.h"
  29 #include "qapi/visitor.h"
  30 #include "hw/pci/pci.h"
  31 #include "migration/vmstate.h"
  32 #include "qemu/timer.h"
  33 #include "hw/core/cpu.h"
  34 #include "sysemu/reset.h"
  35 #include "sysemu/runstate.h"
  36 #include "hw/acpi/acpi.h"
  37 #include "hw/acpi/tco.h"
  38 #include "exec/address-spaces.h"
  39
  40 #include "hw/i386/ich9.h"
  41 #include "hw/mem/pc-dimm.h"
  42 #include "hw/mem/nvdimm.h"
  43
  44 //#define DEBUG
  45
  46 #ifdef DEBUG
  47 #define ICH9_DEBUG(fmt, ...) \
  48 do { printf("%s "fmt, __func__, ## __VA_ARGS__); } while (0)
  49 #else
  50 #define ICH9_DEBUG(fmt, ...)    do { } while (0)
  51 #endif
  52
  53 static void ich9_pm_update_sci_fn(ACPIREGS *regs)
  54 {
  55     ICH9LPCPMRegs *pm = container_of(regs, ICH9LPCPMRegs, acpi_regs);
  56     acpi_update_sci(&pm->acpi_regs, pm->irq);
  57 }
  58
  59 static uint64_t ich9_gpe_readb(void *opaque, hwaddr addr, unsigned width)
  60 {
  61     ICH9LPCPMRegs *pm = opaque;
  62     return acpi_gpe_ioport_readb(&pm->acpi_regs, addr);
  63 }
  64
  65 static void ich9_gpe_writeb(void *opaque, hwaddr addr, uint64_t val,
  66                             unsigned width)
  67 {
  68     ICH9LPCPMRegs *pm = opaque;
  69     acpi_gpe_ioport_writeb(&pm->acpi_regs, addr, val);
  70     acpi_update_sci(&pm->acpi_regs, pm->irq);
  71 }
  72
  73 static const MemoryRegionOps ich9_gpe_ops = {
  74     .read = ich9_gpe_readb,
  75     .write = ich9_gpe_writeb,
  76     .valid.min_access_size = 1,
  77     .valid.max_access_size = 4,
  78     .impl.min_access_size = 1,
  79     .impl.max_access_size = 1,
  80     .endianness = DEVICE_LITTLE_ENDIAN,
  81 };
  82
  83 static uint64_t ich9_smi_readl(void *opaque, hwaddr addr, unsigned width)
  84 {
  85     ICH9LPCPMRegs *pm = opaque;
  86     switch (addr) {
  87     case 0:
  88         return pm->smi_en;
  89     case 4:
  90         return pm->smi_sts;
  91     default:
  92         return 0;
  93     }
  94 }
  95
  96 static void ich9_smi_writel(void *opaque, hwaddr addr, uint64_t val,
  97                             unsigned width)
  98 {
  99     ICH9LPCPMRegs *pm = opaque;
 100     TCOIORegs *tr = &pm->tco_regs;
 101     uint64_t tco_en;
 102
 103     switch (addr) {
 104     case 0:
 105         tco_en = pm->smi_en & ICH9_PMIO_SMI_EN_TCO_EN;
 106         /* once TCO_LOCK bit is set, TCO_EN bit cannot be overwritten */
 107         if (tr->tco.cnt1 & TCO_LOCK) {
 108             val = (val & ~ICH9_PMIO_SMI_EN_TCO_EN) | tco_en;
 109         }
 110         pm->smi_en &= ~pm->smi_en_wmask;
 111         pm->smi_en |= (val & pm->smi_en_wmask);
 112         break;
 113     }
 114 }
 115
 116 static const MemoryRegionOps ich9_smi_ops = {
 117     .read = ich9_smi_readl,
 118     .write = ich9_smi_writel,
 119     .valid.min_access_size = 4,
 120     .valid.max_access_size = 4,
 121     .endianness = DEVICE_LITTLE_ENDIAN,
 122 };
 123
 124 void ich9_pm_iospace_update(ICH9LPCPMRegs *pm, uint32_t pm_io_base)
 125 {
 126     ICH9_DEBUG("to 0x%x\n", pm_io_base);
 127
 128     assert((pm_io_base & ICH9_PMIO_MASK) == 0);
 129
 130     pm->pm_io_base = pm_io_base;
 131     memory_region_transaction_begin();
 132     memory_region_set_enabled(&pm->io, pm->pm_io_base != 0);
 133     memory_region_set_address(&pm->io, pm->pm_io_base);
 134     memory_region_transaction_commit();
 135 }
 136
 137 static int ich9_pm_post_load(void *opaque, int version_id)
 138 {
 139     ICH9LPCPMRegs *pm = opaque;
 140     uint32_t pm_io_base = pm->pm_io_base;
 141     pm->pm_io_base = 0;
 142     ich9_pm_iospace_update(pm, pm_io_base);
 143     return 0;
 144 }
 145
 146 #define VMSTATE_GPE_ARRAY(_field, _state)                            \
 147  {                                                                   \
 148      .name       = (stringify(_field)),                              \
 149      .version_id = 0,                                                \
 150      .num        = ICH9_PMIO_GPE0_LEN,                               \
 151      .info       = &vmstate_info_uint8,                              \
 152      .size       = sizeof(uint8_t),                                  \
 153      .flags      = VMS_ARRAY | VMS_POINTER,                          \
 154      .offset     = vmstate_offset_pointer(_state, _field, uint8_t),  \
 155  }
 156
 157 static bool vmstate_test_use_memhp(void *opaque)
 158 {
 159     ICH9LPCPMRegs *s = opaque;
 160     return s->acpi_memory_hotplug.is_enabled;
 161 }
 162
 163 static const VMStateDescription vmstate_memhp_state = {
 164     .name = "ich9_pm/memhp",
 165     .version_id = 1,
 166     .minimum_version_id = 1,
 167     .minimum_version_id_old = 1,
 168     .needed = vmstate_test_use_memhp,
 169     .fields      = (VMStateField[]) {
 170         VMSTATE_MEMORY_HOTPLUG(acpi_memory_hotplug, ICH9LPCPMRegs),
 171         VMSTATE_END_OF_LIST()
 172     }
 173 };
 174
 175 static bool vmstate_test_use_tco(void *opaque)
 176 {
 177     ICH9LPCPMRegs *s = opaque;
 178     return s->enable_tco;
 179 }
 180
 181 static const VMStateDescription vmstate_tco_io_state = {
 182     .name = "ich9_pm/tco",
 183     .version_id = 1,
 184     .minimum_version_id = 1,
 185     .minimum_version_id_old = 1,
 186     .needed = vmstate_test_use_tco,
 187     .fields      = (VMStateField[]) {
 188         VMSTATE_STRUCT(tco_regs, ICH9LPCPMRegs, 1, vmstate_tco_io_sts,
 189                        TCOIORegs),
 190         VMSTATE_END_OF_LIST()
 191     }
 192 };
 193
 194 static bool vmstate_test_use_cpuhp(void *opaque)
 195 {
 196     ICH9LPCPMRegs *s = opaque;
 197     return !s->cpu_hotplug_legacy;
 198 }
 199
 200 static int vmstate_cpuhp_pre_load(void *opaque)
 201 {
 202     ICH9LPCPMRegs *s = opaque;
 203     Object *obj = OBJECT(s->gpe_cpu.device);
 204     object_property_set_bool(obj, "cpu-hotplug-legacy", false, &error_abort);
 205     return 0;
 206 }
 207
 208 static const VMStateDescription vmstate_cpuhp_state = {
 209     .name = "ich9_pm/cpuhp",
 210     .version_id = 1,
 211     .minimum_version_id = 1,
 212     .minimum_version_id_old = 1,
 213     .needed = vmstate_test_use_cpuhp,
 214     .pre_load = vmstate_cpuhp_pre_load,
 215     .fields      = (VMStateField[]) {
 216         VMSTATE_CPU_HOTPLUG(cpuhp_state, ICH9LPCPMRegs),
 217         VMSTATE_END_OF_LIST()
 218     }
 219 };
 220
 221 const VMStateDescription vmstate_ich9_pm = {
 222     .name = "ich9_pm",
 223     .version_id = 1,
 224     .minimum_version_id = 1,
 225     .post_load = ich9_pm_post_load,
 226     .fields = (VMStateField[]) {
 227         VMSTATE_UINT16(acpi_regs.pm1.evt.sts, ICH9LPCPMRegs),
 228         VMSTATE_UINT16(acpi_regs.pm1.evt.en, ICH9LPCPMRegs),
 229         VMSTATE_UINT16(acpi_regs.pm1.cnt.cnt, ICH9LPCPMRegs),
 230         VMSTATE_TIMER_PTR(acpi_regs.tmr.timer, ICH9LPCPMRegs),
 231         VMSTATE_INT64(acpi_regs.tmr.overflow_time, ICH9LPCPMRegs),
 232         VMSTATE_GPE_ARRAY(acpi_regs.gpe.sts, ICH9LPCPMRegs),
 233         VMSTATE_GPE_ARRAY(acpi_regs.gpe.en, ICH9LPCPMRegs),
 234         VMSTATE_UINT32(smi_en, ICH9LPCPMRegs),
 235         VMSTATE_UINT32(smi_sts, ICH9LPCPMRegs),
 236         VMSTATE_END_OF_LIST()
 237     },
 238     .subsections = (const VMStateDescription*[]) {
 239         &vmstate_memhp_state,
 240         &vmstate_tco_io_state,
 241         &vmstate_cpuhp_state,
 242         NULL
 243     }
 244 };
 245
 246 static void pm_reset(void *opaque)
 247 {
 248     ICH9LPCPMRegs *pm = opaque;
 249     ich9_pm_iospace_update(pm, 0);
 250
 251     acpi_pm1_evt_reset(&pm->acpi_regs);
 252     acpi_pm1_cnt_reset(&pm->acpi_regs);
 253     acpi_pm_tmr_reset(&pm->acpi_regs);
 254     acpi_gpe_reset(&pm->acpi_regs);
 255
 256     pm->smi_en = 0;
 257     if (!pm->smm_enabled) {
 258         /* Mark SMM as already inited to prevent SMM from running. */
 259         pm->smi_en |= ICH9_PMIO_SMI_EN_APMC_EN;
 260     }
 261     pm->smi_en_wmask = ~0;
 262
 263     acpi_update_sci(&pm->acpi_regs, pm->irq);
 264 }
 265
 266 static void pm_powerdown_req(Notifier *n, void *opaque)
 267 {
 268     ICH9LPCPMRegs *pm = container_of(n, ICH9LPCPMRegs, powerdown_notifier);
 269
 270     acpi_pm1_evt_power_down(&pm->acpi_regs);
 271 }
 272
 273 void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm,
 274                   bool smm_enabled,
 275                   qemu_irq sci_irq)
 276 {
 277     memory_region_init(&pm->io, OBJECT(lpc_pci), "ich9-pm", ICH9_PMIO_SIZE);
 278     memory_region_set_enabled(&pm->io, false);
 279     memory_region_add_subregion(pci_address_space_io(lpc_pci),
 280                                 0, &pm->io);
 281
 282     acpi_pm_tmr_init(&pm->acpi_regs, ich9_pm_update_sci_fn, &pm->io);
 283     acpi_pm1_evt_init(&pm->acpi_regs, ich9_pm_update_sci_fn, &pm->io);
 284     acpi_pm1_cnt_init(&pm->acpi_regs, &pm->io, pm->disable_s3, pm->disable_s4,
 285                       pm->s4_val);
 286
 287     acpi_gpe_init(&pm->acpi_regs, ICH9_PMIO_GPE0_LEN);
 288     memory_region_init_io(&pm->io_gpe, OBJECT(lpc_pci), &ich9_gpe_ops, pm,
 289                           "acpi-gpe0", ICH9_PMIO_GPE0_LEN);
 290     memory_region_add_subregion(&pm->io, ICH9_PMIO_GPE0_STS, &pm->io_gpe);
 291
 292     memory_region_init_io(&pm->io_smi, OBJECT(lpc_pci), &ich9_smi_ops, pm,
 293                           "acpi-smi", 8);
 294     memory_region_add_subregion(&pm->io, ICH9_PMIO_SMI_EN, &pm->io_smi);
 295
 296     pm->smm_enabled = smm_enabled;
 297
 298     pm->enable_tco = true;
 299     acpi_pm_tco_init(&pm->tco_regs, &pm->io);
 300
 301     pm->irq = sci_irq;
 302     qemu_register_reset(pm_reset, pm);
 303     pm->powerdown_notifier.notify = pm_powerdown_req;
 304     qemu_register_powerdown_notifier(&pm->powerdown_notifier);
 305
 306     legacy_acpi_cpu_hotplug_init(pci_address_space_io(lpc_pci),
 307         OBJECT(lpc_pci), &pm->gpe_cpu, ICH9_CPU_HOTPLUG_IO_BASE);
 308
 309     if (pm->acpi_memory_hotplug.is_enabled) {
 310         acpi_memory_hotplug_init(pci_address_space_io(lpc_pci), OBJECT(lpc_pci),
 311                                  &pm->acpi_memory_hotplug,
 312                                  ACPI_MEMORY_HOTPLUG_BASE);
 313     }
 314 }
 315
 316 static void ich9_pm_get_gpe0_blk(Object *obj, Visitor *v, const char *name,
 317                                  void *opaque, Error **errp)
 318 {
 319     ICH9LPCPMRegs *pm = opaque;
 320     uint32_t value = pm->pm_io_base + ICH9_PMIO_GPE0_STS;
 321
 322     visit_type_uint32(v, name, &value, errp);
 323 }
 324
 325 static bool ich9_pm_get_memory_hotplug_support(Object *obj, Error **errp)
 326 {
 327     ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
 328
 329     return s->pm.acpi_memory_hotplug.is_enabled;
 330 }
 331
 332 static void ich9_pm_set_memory_hotplug_support(Object *obj, bool value,
 333                                                Error **errp)
 334 {
 335     ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
 336
 337     s->pm.acpi_memory_hotplug.is_enabled = value;
 338 }
 339
 340 static bool ich9_pm_get_cpu_hotplug_legacy(Object *obj, Error **errp)
 341 {
 342     ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
 343
 344     return s->pm.cpu_hotplug_legacy;
 345 }
 346
 347 static void ich9_pm_set_cpu_hotplug_legacy(Object *obj, bool value,
 348                                            Error **errp)
 349 {
 350     ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
 351
 352     assert(!value);
 353     if (s->pm.cpu_hotplug_legacy && value == false) {
 354         acpi_switch_to_modern_cphp(&s->pm.gpe_cpu, &s->pm.cpuhp_state,
 355                                    ICH9_CPU_HOTPLUG_IO_BASE);
 356     }
 357     s->pm.cpu_hotplug_legacy = value;
 358 }
 359
 360 static bool ich9_pm_get_enable_tco(Object *obj, Error **errp)
 361 {
 362     ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
 363     return s->pm.enable_tco;
 364 }
 365
 366 static void ich9_pm_set_enable_tco(Object *obj, bool value, Error **errp)
 367 {
 368     ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
 369     s->pm.enable_tco = value;
 370 }
 371
 372 void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm)
 373 {
 374     static const uint32_t gpe0_len = ICH9_PMIO_GPE0_LEN;
 375     pm->acpi_memory_hotplug.is_enabled = true;
 376     pm->cpu_hotplug_legacy = true;
 377     pm->disable_s3 = 0;
 378     pm->disable_s4 = 0;
 379     pm->s4_val = 2;
 380
 381     object_property_add_uint32_ptr(obj, ACPI_PM_PROP_PM_IO_BASE,
 382                                    &pm->pm_io_base, OBJ_PROP_FLAG_READ);
 383     object_property_add(obj, ACPI_PM_PROP_GPE0_BLK, "uint32",
 384                         ich9_pm_get_gpe0_blk,
 385                         NULL, NULL, pm);
 386     object_property_add_uint32_ptr(obj, ACPI_PM_PROP_GPE0_BLK_LEN,
 387                                    &gpe0_len, OBJ_PROP_FLAG_READ);
 388     object_property_add_bool(obj, "memory-hotplug-support",
 389                              ich9_pm_get_memory_hotplug_support,
 390                              ich9_pm_set_memory_hotplug_support);
 391     object_property_add_bool(obj, "cpu-hotplug-legacy",
 392                              ich9_pm_get_cpu_hotplug_legacy,
 393                              ich9_pm_set_cpu_hotplug_legacy);
 394     object_property_add_uint8_ptr(obj, ACPI_PM_PROP_S3_DISABLED,
 395                                   &pm->disable_s3, OBJ_PROP_FLAG_READWRITE);
 396     object_property_add_uint8_ptr(obj, ACPI_PM_PROP_S4_DISABLED,
 397                                   &pm->disable_s4, OBJ_PROP_FLAG_READWRITE);
 398     object_property_add_uint8_ptr(obj, ACPI_PM_PROP_S4_VAL,
 399                                   &pm->s4_val, OBJ_PROP_FLAG_READWRITE);
 400     object_property_add_bool(obj, ACPI_PM_PROP_TCO_ENABLED,
 401                              ich9_pm_get_enable_tco,
 402                              ich9_pm_set_enable_tco);
 403 }
 404
 405 void ich9_pm_device_pre_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
 406                                 Error **errp)
 407 {
 408     ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev);
 409
 410     if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) &&
 411         !lpc->pm.acpi_memory_hotplug.is_enabled) {
 412         error_setg(errp,
 413                    "memory hotplug is not enabled: %s.memory-hotplug-support "
 414                    "is not set", object_get_typename(OBJECT(lpc)));
 415     } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
 416         uint64_t negotiated = lpc->smi_negotiated_features;
 417
 418         if (negotiated & BIT_ULL(ICH9_LPC_SMI_F_BROADCAST_BIT) &&
 419             !(negotiated & BIT_ULL(ICH9_LPC_SMI_F_CPU_HOTPLUG_BIT))) {
 420             error_setg(errp, "cpu hotplug with SMI wasn't enabled by firmware");
 421             error_append_hint(errp, "update machine type to newer than 5.1 "
 422                 "and firmware that suppors CPU hotplug with SMM");
 423         }
 424     }
 425 }
 426
 427 void ich9_pm_device_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
 428                             Error **errp)
 429 {
 430     ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev);
 431
 432     if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
 433         if (object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM)) {
 434             nvdimm_acpi_plug_cb(hotplug_dev, dev);
 435         } else {
 436             acpi_memory_plug_cb(hotplug_dev, &lpc->pm.acpi_memory_hotplug,
 437                                 dev, errp);
 438         }
 439     } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
 440         if (lpc->pm.cpu_hotplug_legacy) {
 441             legacy_acpi_cpu_plug_cb(hotplug_dev, &lpc->pm.gpe_cpu, dev, errp);
 442         } else {
 443             acpi_cpu_plug_cb(hotplug_dev, &lpc->pm.cpuhp_state, dev, errp);
 444         }
 445     } else {
 446         error_setg(errp, "acpi: device plug request for not supported device"
 447                    " type: %s", object_get_typename(OBJECT(dev)));
 448     }
 449 }
 450
 451 void ich9_pm_device_unplug_request_cb(HotplugHandler *hotplug_dev,
 452                                       DeviceState *dev, Error **errp)
 453 {
 454     ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev);
 455
 456     if (lpc->pm.acpi_memory_hotplug.is_enabled &&
 457         object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
 458         acpi_memory_unplug_request_cb(hotplug_dev,
 459                                       &lpc->pm.acpi_memory_hotplug, dev,
 460                                       errp);
 461     } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU) &&
 462                !lpc->pm.cpu_hotplug_legacy) {
 463         uint64_t negotiated = lpc->smi_negotiated_features;
 464
 465         if (negotiated & BIT_ULL(ICH9_LPC_SMI_F_BROADCAST_BIT) &&
 466             !(negotiated & BIT_ULL(ICH9_LPC_SMI_F_CPU_HOT_UNPLUG_BIT))) {
 467             error_setg(errp, "cpu hot-unplug with SMI wasn't enabled "
 468                              "by firmware");
 469             error_append_hint(errp, "update machine type to a version having "
 470                                     "x-smi-cpu-hotunplug=on and firmware that "
 471                                     "supports CPU hot-unplug with SMM");
 472             return;
 473         }
 474
 475         acpi_cpu_unplug_request_cb(hotplug_dev, &lpc->pm.cpuhp_state,
 476                                    dev, errp);
 477     } else {
 478         error_setg(errp, "acpi: device unplug request for not supported device"
 479                    " type: %s", object_get_typename(OBJECT(dev)));
 480     }
 481 }
 482
 483 void ich9_pm_device_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
 484                               Error **errp)
 485 {
 486     ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev);
 487
 488     if (lpc->pm.acpi_memory_hotplug.is_enabled &&
 489         object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
 490         acpi_memory_unplug_cb(&lpc->pm.acpi_memory_hotplug, dev, errp);
 491     } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU) &&
 492                !lpc->pm.cpu_hotplug_legacy) {
 493         acpi_cpu_unplug_cb(&lpc->pm.cpuhp_state, dev, errp);
 494     } else {
 495         error_setg(errp, "acpi: device unplug for not supported device"
 496                    " type: %s", object_get_typename(OBJECT(dev)));
 497     }
 498 }
 499
 500 void ich9_pm_ospm_status(AcpiDeviceIf *adev, ACPIOSTInfoList ***list)
 501 {
 502     ICH9LPCState *s = ICH9_LPC_DEVICE(adev);
 503
 504     acpi_memory_ospm_status(&s->pm.acpi_memory_hotplug, list);
 505     if (!s->pm.cpu_hotplug_legacy) {
 506         acpi_cpu_ospm_status(&s->pm.cpuhp_state, list);
 507     }
 508 }