target-arm: A64: Generalize update_spsel for the various ELs
[qemu/ar7.git] / disas / i386.c
blob00ceca9c51be27a4543206bf0d5e345cb40970d3
1 /* opcodes/i386-dis.c r1.126 */
2 /* Print i386 instructions for GDB, the GNU debugger.
3 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
4 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, see <http://www.gnu.org/licenses/>. */
21 /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
22 July 1988
23 modified by John Hassey (hassey@dg-rtp.dg.com)
24 x86-64 support added by Jan Hubicka (jh@suse.cz)
25 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
27 /* The main tables describing the instructions is essentially a copy
28 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
29 Programmers Manual. Usually, there is a capital letter, followed
30 by a small letter. The capital letter tell the addressing mode,
31 and the small letter tells about the operand size. Refer to
32 the Intel manual for details. */
34 #include <stdlib.h>
35 #include "disas/bfd.h"
36 /* include/opcode/i386.h r1.78 */
38 /* opcode/i386.h -- Intel 80386 opcode macros
39 Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
40 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
41 Free Software Foundation, Inc.
43 This file is part of GAS, the GNU Assembler, and GDB, the GNU Debugger.
45 This program is free software; you can redistribute it and/or modify
46 it under the terms of the GNU General Public License as published by
47 the Free Software Foundation; either version 2 of the License, or
48 (at your option) any later version.
50 This program is distributed in the hope that it will be useful,
51 but WITHOUT ANY WARRANTY; without even the implied warranty of
52 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
53 GNU General Public License for more details.
55 You should have received a copy of the GNU General Public License
56 along with this program; if not, see <http://www.gnu.org/licenses/>. */
58 /* The SystemV/386 SVR3.2 assembler, and probably all AT&T derived
59 ix86 Unix assemblers, generate floating point instructions with
60 reversed source and destination registers in certain cases.
61 Unfortunately, gcc and possibly many other programs use this
62 reversed syntax, so we're stuck with it.
64 eg. `fsub %st(3),%st' results in st = st - st(3) as expected, but
65 `fsub %st,%st(3)' results in st(3) = st - st(3), rather than
66 the expected st(3) = st(3) - st
68 This happens with all the non-commutative arithmetic floating point
69 operations with two register operands, where the source register is
70 %st, and destination register is %st(i).
72 The affected opcode map is dceX, dcfX, deeX, defX. */
74 #ifndef SYSV386_COMPAT
75 /* Set non-zero for broken, compatible instructions. Set to zero for
76 non-broken opcodes at your peril. gcc generates SystemV/386
77 compatible instructions. */
78 #define SYSV386_COMPAT 1
79 #endif
80 #ifndef OLDGCC_COMPAT
81 /* Set non-zero to cater for old (<= 2.8.1) versions of gcc that could
82 generate nonsense fsubp, fsubrp, fdivp and fdivrp with operands
83 reversed. */
84 #define OLDGCC_COMPAT SYSV386_COMPAT
85 #endif
87 #define MOV_AX_DISP32 0xa0
88 #define POP_SEG_SHORT 0x07
89 #define JUMP_PC_RELATIVE 0xeb
90 #define INT_OPCODE 0xcd
91 #define INT3_OPCODE 0xcc
92 /* The opcode for the fwait instruction, which disassembler treats as a
93 prefix when it can. */
94 #define FWAIT_OPCODE 0x9b
95 #define ADDR_PREFIX_OPCODE 0x67
96 #define DATA_PREFIX_OPCODE 0x66
97 #define LOCK_PREFIX_OPCODE 0xf0
98 #define CS_PREFIX_OPCODE 0x2e
99 #define DS_PREFIX_OPCODE 0x3e
100 #define ES_PREFIX_OPCODE 0x26
101 #define FS_PREFIX_OPCODE 0x64
102 #define GS_PREFIX_OPCODE 0x65
103 #define SS_PREFIX_OPCODE 0x36
104 #define REPNE_PREFIX_OPCODE 0xf2
105 #define REPE_PREFIX_OPCODE 0xf3
107 #define TWO_BYTE_OPCODE_ESCAPE 0x0f
108 #define NOP_OPCODE (char) 0x90
110 /* register numbers */
111 #define EBP_REG_NUM 5
112 #define ESP_REG_NUM 4
114 /* modrm_byte.regmem for twobyte escape */
115 #define ESCAPE_TO_TWO_BYTE_ADDRESSING ESP_REG_NUM
116 /* index_base_byte.index for no index register addressing */
117 #define NO_INDEX_REGISTER ESP_REG_NUM
118 /* index_base_byte.base for no base register addressing */
119 #define NO_BASE_REGISTER EBP_REG_NUM
120 #define NO_BASE_REGISTER_16 6
122 /* modrm.mode = REGMEM_FIELD_HAS_REG when a register is in there */
123 #define REGMEM_FIELD_HAS_REG 0x3/* always = 0x3 */
124 #define REGMEM_FIELD_HAS_MEM (~REGMEM_FIELD_HAS_REG)
126 /* x86-64 extension prefix. */
127 #define REX_OPCODE 0x40
129 /* Indicates 64 bit operand size. */
130 #define REX_W 8
131 /* High extension to reg field of modrm byte. */
132 #define REX_R 4
133 /* High extension to SIB index field. */
134 #define REX_X 2
135 /* High extension to base field of modrm or SIB, or reg field of opcode. */
136 #define REX_B 1
138 /* max operands per insn */
139 #define MAX_OPERANDS 4
141 /* max immediates per insn (lcall, ljmp, insertq, extrq) */
142 #define MAX_IMMEDIATE_OPERANDS 2
144 /* max memory refs per insn (string ops) */
145 #define MAX_MEMORY_OPERANDS 2
147 /* max size of insn mnemonics. */
148 #define MAX_MNEM_SIZE 16
150 /* max size of register name in insn mnemonics. */
151 #define MAX_REG_NAME_SIZE 8
153 /* opcodes/i386-dis.c r1.126 */
154 #include "qemu-common.h"
156 #include <setjmp.h>
158 static int fetch_data2(struct disassemble_info *, bfd_byte *);
159 static int fetch_data(struct disassemble_info *, bfd_byte *);
160 static void ckprefix (void);
161 static const char *prefix_name (int, int);
162 static int print_insn (bfd_vma, disassemble_info *);
163 static void dofloat (int);
164 static void OP_ST (int, int);
165 static void OP_STi (int, int);
166 static int putop (const char *, int);
167 static void oappend (const char *);
168 static void append_seg (void);
169 static void OP_indirE (int, int);
170 static void print_operand_value (char *buf, size_t bufsize, int hex, bfd_vma disp);
171 static void print_displacement (char *, bfd_vma);
172 static void OP_E (int, int);
173 static void OP_G (int, int);
174 static void OP_vvvv (int, int);
175 static bfd_vma get64 (void);
176 static bfd_signed_vma get32 (void);
177 static bfd_signed_vma get32s (void);
178 static int get16 (void);
179 static void set_op (bfd_vma, int);
180 static void OP_REG (int, int);
181 static void OP_IMREG (int, int);
182 static void OP_I (int, int);
183 static void OP_I64 (int, int);
184 static void OP_sI (int, int);
185 static void OP_J (int, int);
186 static void OP_SEG (int, int);
187 static void OP_DIR (int, int);
188 static void OP_OFF (int, int);
189 static void OP_OFF64 (int, int);
190 static void ptr_reg (int, int);
191 static void OP_ESreg (int, int);
192 static void OP_DSreg (int, int);
193 static void OP_C (int, int);
194 static void OP_D (int, int);
195 static void OP_T (int, int);
196 static void OP_R (int, int);
197 static void OP_MMX (int, int);
198 static void OP_XMM (int, int);
199 static void OP_EM (int, int);
200 static void OP_EX (int, int);
201 static void OP_EMC (int,int);
202 static void OP_MXC (int,int);
203 static void OP_MS (int, int);
204 static void OP_XS (int, int);
205 static void OP_M (int, int);
206 static void OP_VMX (int, int);
207 static void OP_0fae (int, int);
208 static void OP_0f07 (int, int);
209 static void NOP_Fixup1 (int, int);
210 static void NOP_Fixup2 (int, int);
211 static void OP_3DNowSuffix (int, int);
212 static void OP_SIMD_Suffix (int, int);
213 static void SIMD_Fixup (int, int);
214 static void PNI_Fixup (int, int);
215 static void SVME_Fixup (int, int);
216 static void INVLPG_Fixup (int, int);
217 static void BadOp (void);
218 static void VMX_Fixup (int, int);
219 static void REP_Fixup (int, int);
220 static void CMPXCHG8B_Fixup (int, int);
221 static void XMM_Fixup (int, int);
222 static void CRC32_Fixup (int, int);
224 struct dis_private {
225 /* Points to first byte not fetched. */
226 bfd_byte *max_fetched;
227 bfd_byte the_buffer[MAX_MNEM_SIZE];
228 bfd_vma insn_start;
229 int orig_sizeflag;
230 sigjmp_buf bailout;
233 enum address_mode
235 mode_16bit,
236 mode_32bit,
237 mode_64bit
240 static enum address_mode address_mode;
242 /* Flags for the prefixes for the current instruction. See below. */
243 static int prefixes;
245 /* REX prefix the current instruction. See below. */
246 static int rex;
247 /* Bits of REX we've already used. */
248 static int rex_used;
249 /* Mark parts used in the REX prefix. When we are testing for
250 empty prefix (for 8bit register REX extension), just mask it
251 out. Otherwise test for REX bit is excuse for existence of REX
252 only in case value is nonzero. */
253 #define USED_REX(value) \
255 if (value) \
257 if ((rex & value)) \
258 rex_used |= (value) | REX_OPCODE; \
260 else \
261 rex_used |= REX_OPCODE; \
264 /* Flags for prefixes which we somehow handled when printing the
265 current instruction. */
266 static int used_prefixes;
268 /* The VEX.vvvv register, unencoded. */
269 static int vex_reg;
271 /* Flags stored in PREFIXES. */
272 #define PREFIX_REPZ 1
273 #define PREFIX_REPNZ 2
274 #define PREFIX_LOCK 4
275 #define PREFIX_CS 8
276 #define PREFIX_SS 0x10
277 #define PREFIX_DS 0x20
278 #define PREFIX_ES 0x40
279 #define PREFIX_FS 0x80
280 #define PREFIX_GS 0x100
281 #define PREFIX_DATA 0x200
282 #define PREFIX_ADDR 0x400
283 #define PREFIX_FWAIT 0x800
285 #define PREFIX_VEX_0F 0x1000
286 #define PREFIX_VEX_0F38 0x2000
287 #define PREFIX_VEX_0F3A 0x4000
289 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
290 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
291 on error. */
292 static int
293 fetch_data2(struct disassemble_info *info, bfd_byte *addr)
295 int status;
296 struct dis_private *priv = (struct dis_private *) info->private_data;
297 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
299 if (addr <= priv->the_buffer + MAX_MNEM_SIZE)
300 status = (*info->read_memory_func) (start,
301 priv->max_fetched,
302 addr - priv->max_fetched,
303 info);
304 else
305 status = -1;
306 if (status != 0)
308 /* If we did manage to read at least one byte, then
309 print_insn_i386 will do something sensible. Otherwise, print
310 an error. We do that here because this is where we know
311 STATUS. */
312 if (priv->max_fetched == priv->the_buffer)
313 (*info->memory_error_func) (status, start, info);
314 siglongjmp(priv->bailout, 1);
316 else
317 priv->max_fetched = addr;
318 return 1;
321 static int
322 fetch_data(struct disassemble_info *info, bfd_byte *addr)
324 if (addr <= ((struct dis_private *) (info->private_data))->max_fetched) {
325 return 1;
326 } else {
327 return fetch_data2(info, addr);
332 #define XX { NULL, 0 }
334 #define Bv { OP_vvvv, v_mode }
335 #define Eb { OP_E, b_mode }
336 #define Ev { OP_E, v_mode }
337 #define Ed { OP_E, d_mode }
338 #define Edq { OP_E, dq_mode }
339 #define Edqw { OP_E, dqw_mode }
340 #define Edqb { OP_E, dqb_mode }
341 #define Edqd { OP_E, dqd_mode }
342 #define indirEv { OP_indirE, stack_v_mode }
343 #define indirEp { OP_indirE, f_mode }
344 #define stackEv { OP_E, stack_v_mode }
345 #define Em { OP_E, m_mode }
346 #define Ew { OP_E, w_mode }
347 #define M { OP_M, 0 } /* lea, lgdt, etc. */
348 #define Ma { OP_M, v_mode }
349 #define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */
350 #define Mq { OP_M, q_mode }
351 #define Gb { OP_G, b_mode }
352 #define Gv { OP_G, v_mode }
353 #define Gd { OP_G, d_mode }
354 #define Gdq { OP_G, dq_mode }
355 #define Gm { OP_G, m_mode }
356 #define Gw { OP_G, w_mode }
357 #define Rd { OP_R, d_mode }
358 #define Rm { OP_R, m_mode }
359 #define Ib { OP_I, b_mode }
360 #define sIb { OP_sI, b_mode } /* sign extened byte */
361 #define Iv { OP_I, v_mode }
362 #define Iq { OP_I, q_mode }
363 #define Iv64 { OP_I64, v_mode }
364 #define Iw { OP_I, w_mode }
365 #define I1 { OP_I, const_1_mode }
366 #define Jb { OP_J, b_mode }
367 #define Jv { OP_J, v_mode }
368 #define Cm { OP_C, m_mode }
369 #define Dm { OP_D, m_mode }
370 #define Td { OP_T, d_mode }
372 #define RMeAX { OP_REG, eAX_reg }
373 #define RMeBX { OP_REG, eBX_reg }
374 #define RMeCX { OP_REG, eCX_reg }
375 #define RMeDX { OP_REG, eDX_reg }
376 #define RMeSP { OP_REG, eSP_reg }
377 #define RMeBP { OP_REG, eBP_reg }
378 #define RMeSI { OP_REG, eSI_reg }
379 #define RMeDI { OP_REG, eDI_reg }
380 #define RMrAX { OP_REG, rAX_reg }
381 #define RMrBX { OP_REG, rBX_reg }
382 #define RMrCX { OP_REG, rCX_reg }
383 #define RMrDX { OP_REG, rDX_reg }
384 #define RMrSP { OP_REG, rSP_reg }
385 #define RMrBP { OP_REG, rBP_reg }
386 #define RMrSI { OP_REG, rSI_reg }
387 #define RMrDI { OP_REG, rDI_reg }
388 #define RMAL { OP_REG, al_reg }
389 #define RMAL { OP_REG, al_reg }
390 #define RMCL { OP_REG, cl_reg }
391 #define RMDL { OP_REG, dl_reg }
392 #define RMBL { OP_REG, bl_reg }
393 #define RMAH { OP_REG, ah_reg }
394 #define RMCH { OP_REG, ch_reg }
395 #define RMDH { OP_REG, dh_reg }
396 #define RMBH { OP_REG, bh_reg }
397 #define RMAX { OP_REG, ax_reg }
398 #define RMDX { OP_REG, dx_reg }
400 #define eAX { OP_IMREG, eAX_reg }
401 #define eBX { OP_IMREG, eBX_reg }
402 #define eCX { OP_IMREG, eCX_reg }
403 #define eDX { OP_IMREG, eDX_reg }
404 #define eSP { OP_IMREG, eSP_reg }
405 #define eBP { OP_IMREG, eBP_reg }
406 #define eSI { OP_IMREG, eSI_reg }
407 #define eDI { OP_IMREG, eDI_reg }
408 #define AL { OP_IMREG, al_reg }
409 #define CL { OP_IMREG, cl_reg }
410 #define DL { OP_IMREG, dl_reg }
411 #define BL { OP_IMREG, bl_reg }
412 #define AH { OP_IMREG, ah_reg }
413 #define CH { OP_IMREG, ch_reg }
414 #define DH { OP_IMREG, dh_reg }
415 #define BH { OP_IMREG, bh_reg }
416 #define AX { OP_IMREG, ax_reg }
417 #define DX { OP_IMREG, dx_reg }
418 #define zAX { OP_IMREG, z_mode_ax_reg }
419 #define indirDX { OP_IMREG, indir_dx_reg }
421 #define Sw { OP_SEG, w_mode }
422 #define Sv { OP_SEG, v_mode }
423 #define Ap { OP_DIR, 0 }
424 #define Ob { OP_OFF64, b_mode }
425 #define Ov { OP_OFF64, v_mode }
426 #define Xb { OP_DSreg, eSI_reg }
427 #define Xv { OP_DSreg, eSI_reg }
428 #define Xz { OP_DSreg, eSI_reg }
429 #define Yb { OP_ESreg, eDI_reg }
430 #define Yv { OP_ESreg, eDI_reg }
431 #define DSBX { OP_DSreg, eBX_reg }
433 #define es { OP_REG, es_reg }
434 #define ss { OP_REG, ss_reg }
435 #define cs { OP_REG, cs_reg }
436 #define ds { OP_REG, ds_reg }
437 #define fs { OP_REG, fs_reg }
438 #define gs { OP_REG, gs_reg }
440 #define MX { OP_MMX, 0 }
441 #define XM { OP_XMM, 0 }
442 #define EM { OP_EM, v_mode }
443 #define EMd { OP_EM, d_mode }
444 #define EMq { OP_EM, q_mode }
445 #define EXd { OP_EX, d_mode }
446 #define EXq { OP_EX, q_mode }
447 #define EXx { OP_EX, x_mode }
448 #define MS { OP_MS, v_mode }
449 #define XS { OP_XS, v_mode }
450 #define EMC { OP_EMC, v_mode }
451 #define MXC { OP_MXC, 0 }
452 #define VM { OP_VMX, q_mode }
453 #define OPSUF { OP_3DNowSuffix, 0 }
454 #define OPSIMD { OP_SIMD_Suffix, 0 }
455 #define XMM0 { XMM_Fixup, 0 }
457 /* Used handle "rep" prefix for string instructions. */
458 #define Xbr { REP_Fixup, eSI_reg }
459 #define Xvr { REP_Fixup, eSI_reg }
460 #define Ybr { REP_Fixup, eDI_reg }
461 #define Yvr { REP_Fixup, eDI_reg }
462 #define Yzr { REP_Fixup, eDI_reg }
463 #define indirDXr { REP_Fixup, indir_dx_reg }
464 #define ALr { REP_Fixup, al_reg }
465 #define eAXr { REP_Fixup, eAX_reg }
467 #define cond_jump_flag { NULL, cond_jump_mode }
468 #define loop_jcxz_flag { NULL, loop_jcxz_mode }
470 /* bits in sizeflag */
471 #define SUFFIX_ALWAYS 4
472 #define AFLAG 2
473 #define DFLAG 1
475 #define b_mode 1 /* byte operand */
476 #define v_mode 2 /* operand size depends on prefixes */
477 #define w_mode 3 /* word operand */
478 #define d_mode 4 /* double word operand */
479 #define q_mode 5 /* quad word operand */
480 #define t_mode 6 /* ten-byte operand */
481 #define x_mode 7 /* 16-byte XMM operand */
482 #define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
483 #define cond_jump_mode 9
484 #define loop_jcxz_mode 10
485 #define dq_mode 11 /* operand size depends on REX prefixes. */
486 #define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
487 #define f_mode 13 /* 4- or 6-byte pointer operand */
488 #define const_1_mode 14
489 #define stack_v_mode 15 /* v_mode for stack-related opcodes. */
490 #define z_mode 16 /* non-quad operand size depends on prefixes */
491 #define o_mode 17 /* 16-byte operand */
492 #define dqb_mode 18 /* registers like dq_mode, memory like b_mode. */
493 #define dqd_mode 19 /* registers like dq_mode, memory like d_mode. */
495 #define es_reg 100
496 #define cs_reg 101
497 #define ss_reg 102
498 #define ds_reg 103
499 #define fs_reg 104
500 #define gs_reg 105
502 #define eAX_reg 108
503 #define eCX_reg 109
504 #define eDX_reg 110
505 #define eBX_reg 111
506 #define eSP_reg 112
507 #define eBP_reg 113
508 #define eSI_reg 114
509 #define eDI_reg 115
511 #define al_reg 116
512 #define cl_reg 117
513 #define dl_reg 118
514 #define bl_reg 119
515 #define ah_reg 120
516 #define ch_reg 121
517 #define dh_reg 122
518 #define bh_reg 123
520 #define ax_reg 124
521 #define cx_reg 125
522 #define dx_reg 126
523 #define bx_reg 127
524 #define sp_reg 128
525 #define bp_reg 129
526 #define si_reg 130
527 #define di_reg 131
529 #define rAX_reg 132
530 #define rCX_reg 133
531 #define rDX_reg 134
532 #define rBX_reg 135
533 #define rSP_reg 136
534 #define rBP_reg 137
535 #define rSI_reg 138
536 #define rDI_reg 139
538 #define z_mode_ax_reg 149
539 #define indir_dx_reg 150
541 #define FLOATCODE 1
542 #define USE_GROUPS 2
543 #define USE_PREFIX_USER_TABLE 3
544 #define X86_64_SPECIAL 4
545 #define IS_3BYTE_OPCODE 5
547 #define FLOAT NULL, { { NULL, FLOATCODE } }
549 #define GRP1a NULL, { { NULL, USE_GROUPS }, { NULL, 0 } }
550 #define GRP1b NULL, { { NULL, USE_GROUPS }, { NULL, 1 } }
551 #define GRP1S NULL, { { NULL, USE_GROUPS }, { NULL, 2 } }
552 #define GRP1Ss NULL, { { NULL, USE_GROUPS }, { NULL, 3 } }
553 #define GRP2b NULL, { { NULL, USE_GROUPS }, { NULL, 4 } }
554 #define GRP2S NULL, { { NULL, USE_GROUPS }, { NULL, 5 } }
555 #define GRP2b_one NULL, { { NULL, USE_GROUPS }, { NULL, 6 } }
556 #define GRP2S_one NULL, { { NULL, USE_GROUPS }, { NULL, 7 } }
557 #define GRP2b_cl NULL, { { NULL, USE_GROUPS }, { NULL, 8 } }
558 #define GRP2S_cl NULL, { { NULL, USE_GROUPS }, { NULL, 9 } }
559 #define GRP3b NULL, { { NULL, USE_GROUPS }, { NULL, 10 } }
560 #define GRP3S NULL, { { NULL, USE_GROUPS }, { NULL, 11 } }
561 #define GRP4 NULL, { { NULL, USE_GROUPS }, { NULL, 12 } }
562 #define GRP5 NULL, { { NULL, USE_GROUPS }, { NULL, 13 } }
563 #define GRP6 NULL, { { NULL, USE_GROUPS }, { NULL, 14 } }
564 #define GRP7 NULL, { { NULL, USE_GROUPS }, { NULL, 15 } }
565 #define GRP8 NULL, { { NULL, USE_GROUPS }, { NULL, 16 } }
566 #define GRP9 NULL, { { NULL, USE_GROUPS }, { NULL, 17 } }
567 #define GRP11_C6 NULL, { { NULL, USE_GROUPS }, { NULL, 18 } }
568 #define GRP11_C7 NULL, { { NULL, USE_GROUPS }, { NULL, 19 } }
569 #define GRP12 NULL, { { NULL, USE_GROUPS }, { NULL, 20 } }
570 #define GRP13 NULL, { { NULL, USE_GROUPS }, { NULL, 21 } }
571 #define GRP14 NULL, { { NULL, USE_GROUPS }, { NULL, 22 } }
572 #define GRP15 NULL, { { NULL, USE_GROUPS }, { NULL, 23 } }
573 #define GRP16 NULL, { { NULL, USE_GROUPS }, { NULL, 24 } }
574 #define GRPAMD NULL, { { NULL, USE_GROUPS }, { NULL, 25 } }
575 #define GRPPADLCK1 NULL, { { NULL, USE_GROUPS }, { NULL, 26 } }
576 #define GRPPADLCK2 NULL, { { NULL, USE_GROUPS }, { NULL, 27 } }
578 #define PREGRP0 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 0 } }
579 #define PREGRP1 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 1 } }
580 #define PREGRP2 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 2 } }
581 #define PREGRP3 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 3 } }
582 #define PREGRP4 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 4 } }
583 #define PREGRP5 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 5 } }
584 #define PREGRP6 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 6 } }
585 #define PREGRP7 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 7 } }
586 #define PREGRP8 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 8 } }
587 #define PREGRP9 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 9 } }
588 #define PREGRP10 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 10 } }
589 #define PREGRP11 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 11 } }
590 #define PREGRP12 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 12 } }
591 #define PREGRP13 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 13 } }
592 #define PREGRP14 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 14 } }
593 #define PREGRP15 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 15 } }
594 #define PREGRP16 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 16 } }
595 #define PREGRP17 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 17 } }
596 #define PREGRP18 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 18 } }
597 #define PREGRP19 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 19 } }
598 #define PREGRP20 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 20 } }
599 #define PREGRP21 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 21 } }
600 #define PREGRP22 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 22 } }
601 #define PREGRP23 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 23 } }
602 #define PREGRP24 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 24 } }
603 #define PREGRP25 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 25 } }
604 #define PREGRP26 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 26 } }
605 #define PREGRP27 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 27 } }
606 #define PREGRP28 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 28 } }
607 #define PREGRP29 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 29 } }
608 #define PREGRP30 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 30 } }
609 #define PREGRP31 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 31 } }
610 #define PREGRP32 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 32 } }
611 #define PREGRP33 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 33 } }
612 #define PREGRP34 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 34 } }
613 #define PREGRP35 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 35 } }
614 #define PREGRP36 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 36 } }
615 #define PREGRP37 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 37 } }
616 #define PREGRP38 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 38 } }
617 #define PREGRP39 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 39 } }
618 #define PREGRP40 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 40 } }
619 #define PREGRP41 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 41 } }
620 #define PREGRP42 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 42 } }
621 #define PREGRP43 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 43 } }
622 #define PREGRP44 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 44 } }
623 #define PREGRP45 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 45 } }
624 #define PREGRP46 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 46 } }
625 #define PREGRP47 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 47 } }
626 #define PREGRP48 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 48 } }
627 #define PREGRP49 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 49 } }
628 #define PREGRP50 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 50 } }
629 #define PREGRP51 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 51 } }
630 #define PREGRP52 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 52 } }
631 #define PREGRP53 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 53 } }
632 #define PREGRP54 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 54 } }
633 #define PREGRP55 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 55 } }
634 #define PREGRP56 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 56 } }
635 #define PREGRP57 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 57 } }
636 #define PREGRP58 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 58 } }
637 #define PREGRP59 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 59 } }
638 #define PREGRP60 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 60 } }
639 #define PREGRP61 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 61 } }
640 #define PREGRP62 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 62 } }
641 #define PREGRP63 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 63 } }
642 #define PREGRP64 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 64 } }
643 #define PREGRP65 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 65 } }
644 #define PREGRP66 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 66 } }
645 #define PREGRP67 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 67 } }
646 #define PREGRP68 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 68 } }
647 #define PREGRP69 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 69 } }
648 #define PREGRP70 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 70 } }
649 #define PREGRP71 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 71 } }
650 #define PREGRP72 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 72 } }
651 #define PREGRP73 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 73 } }
652 #define PREGRP74 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 74 } }
653 #define PREGRP75 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 75 } }
654 #define PREGRP76 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 76 } }
655 #define PREGRP77 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 77 } }
656 #define PREGRP78 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 78 } }
657 #define PREGRP79 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 79 } }
658 #define PREGRP80 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 80 } }
659 #define PREGRP81 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 81 } }
660 #define PREGRP82 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 82 } }
661 #define PREGRP83 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 83 } }
662 #define PREGRP84 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 84 } }
663 #define PREGRP85 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 85 } }
664 #define PREGRP86 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 86 } }
665 #define PREGRP87 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 87 } }
666 #define PREGRP88 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 88 } }
667 #define PREGRP89 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 89 } }
668 #define PREGRP90 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 90 } }
669 #define PREGRP91 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 91 } }
670 #define PREGRP92 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 92 } }
671 #define PREGRP93 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 93 } }
672 #define PREGRP94 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 94 } }
673 #define PREGRP95 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 95 } }
674 #define PREGRP96 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 96 } }
675 #define PREGRP97 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 97 } }
676 #define PREGRP98 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 98 } }
677 #define PREGRP99 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 99 } }
678 #define PREGRP100 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 100 } }
679 #define PREGRP101 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 101 } }
680 #define PREGRP102 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 102 } }
681 #define PREGRP103 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 103 } }
682 #define PREGRP104 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 104 } }
683 #define PREGRP105 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 105 } }
684 #define PREGRP106 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 106 } }
686 #define X86_64_0 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } }
687 #define X86_64_1 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 1 } }
688 #define X86_64_2 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 2 } }
689 #define X86_64_3 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 3 } }
691 #define THREE_BYTE_0 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 0 } }
692 #define THREE_BYTE_1 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 1 } }
694 typedef void (*op_rtn) (int bytemode, int sizeflag);
696 struct dis386 {
697 const char *name;
698 struct
700 op_rtn rtn;
701 int bytemode;
702 } op[MAX_OPERANDS];
705 /* Upper case letters in the instruction names here are macros.
706 'A' => print 'b' if no register operands or suffix_always is true
707 'B' => print 'b' if suffix_always is true
708 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
709 . size prefix
710 'D' => print 'w' if no register operands or 'w', 'l' or 'q', if
711 . suffix_always is true
712 'E' => print 'e' if 32-bit form of jcxz
713 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
714 'G' => print 'w' or 'l' depending on operand size prefix (i/o insns)
715 'H' => print ",pt" or ",pn" branch hint
716 'I' => honor following macro letter even in Intel mode (implemented only
717 . for some of the macro letters)
718 'J' => print 'l'
719 'K' => print 'd' or 'q' if rex prefix is present.
720 'L' => print 'l' if suffix_always is true
721 'N' => print 'n' if instruction has no wait "prefix"
722 'O' => print 'd' or 'o' (or 'q' in Intel mode)
723 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
724 . or suffix_always is true. print 'q' if rex prefix is present.
725 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
726 . is true
727 'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
728 'S' => print 'w', 'l' or 'q' if suffix_always is true
729 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
730 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
731 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
732 'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
733 'X' => print 's', 'd' depending on data16 prefix (for XMM)
734 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
735 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
737 Many of the above letters print nothing in Intel mode. See "putop"
738 for the details.
740 Braces '{' and '}', and vertical bars '|', indicate alternative
741 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
742 modes. In cases where there are only two alternatives, the X86_64
743 instruction is reserved, and "(bad)" is printed.
746 static const struct dis386 dis386[] = {
747 /* 00 */
748 { "addB", { Eb, Gb } },
749 { "addS", { Ev, Gv } },
750 { "addB", { Gb, Eb } },
751 { "addS", { Gv, Ev } },
752 { "addB", { AL, Ib } },
753 { "addS", { eAX, Iv } },
754 { "push{T|}", { es } },
755 { "pop{T|}", { es } },
756 /* 08 */
757 { "orB", { Eb, Gb } },
758 { "orS", { Ev, Gv } },
759 { "orB", { Gb, Eb } },
760 { "orS", { Gv, Ev } },
761 { "orB", { AL, Ib } },
762 { "orS", { eAX, Iv } },
763 { "push{T|}", { cs } },
764 { "(bad)", { XX } }, /* 0x0f extended opcode escape */
765 /* 10 */
766 { "adcB", { Eb, Gb } },
767 { "adcS", { Ev, Gv } },
768 { "adcB", { Gb, Eb } },
769 { "adcS", { Gv, Ev } },
770 { "adcB", { AL, Ib } },
771 { "adcS", { eAX, Iv } },
772 { "push{T|}", { ss } },
773 { "pop{T|}", { ss } },
774 /* 18 */
775 { "sbbB", { Eb, Gb } },
776 { "sbbS", { Ev, Gv } },
777 { "sbbB", { Gb, Eb } },
778 { "sbbS", { Gv, Ev } },
779 { "sbbB", { AL, Ib } },
780 { "sbbS", { eAX, Iv } },
781 { "push{T|}", { ds } },
782 { "pop{T|}", { ds } },
783 /* 20 */
784 { "andB", { Eb, Gb } },
785 { "andS", { Ev, Gv } },
786 { "andB", { Gb, Eb } },
787 { "andS", { Gv, Ev } },
788 { "andB", { AL, Ib } },
789 { "andS", { eAX, Iv } },
790 { "(bad)", { XX } }, /* SEG ES prefix */
791 { "daa{|}", { XX } },
792 /* 28 */
793 { "subB", { Eb, Gb } },
794 { "subS", { Ev, Gv } },
795 { "subB", { Gb, Eb } },
796 { "subS", { Gv, Ev } },
797 { "subB", { AL, Ib } },
798 { "subS", { eAX, Iv } },
799 { "(bad)", { XX } }, /* SEG CS prefix */
800 { "das{|}", { XX } },
801 /* 30 */
802 { "xorB", { Eb, Gb } },
803 { "xorS", { Ev, Gv } },
804 { "xorB", { Gb, Eb } },
805 { "xorS", { Gv, Ev } },
806 { "xorB", { AL, Ib } },
807 { "xorS", { eAX, Iv } },
808 { "(bad)", { XX } }, /* SEG SS prefix */
809 { "aaa{|}", { XX } },
810 /* 38 */
811 { "cmpB", { Eb, Gb } },
812 { "cmpS", { Ev, Gv } },
813 { "cmpB", { Gb, Eb } },
814 { "cmpS", { Gv, Ev } },
815 { "cmpB", { AL, Ib } },
816 { "cmpS", { eAX, Iv } },
817 { "(bad)", { XX } }, /* SEG DS prefix */
818 { "aas{|}", { XX } },
819 /* 40 */
820 { "inc{S|}", { RMeAX } },
821 { "inc{S|}", { RMeCX } },
822 { "inc{S|}", { RMeDX } },
823 { "inc{S|}", { RMeBX } },
824 { "inc{S|}", { RMeSP } },
825 { "inc{S|}", { RMeBP } },
826 { "inc{S|}", { RMeSI } },
827 { "inc{S|}", { RMeDI } },
828 /* 48 */
829 { "dec{S|}", { RMeAX } },
830 { "dec{S|}", { RMeCX } },
831 { "dec{S|}", { RMeDX } },
832 { "dec{S|}", { RMeBX } },
833 { "dec{S|}", { RMeSP } },
834 { "dec{S|}", { RMeBP } },
835 { "dec{S|}", { RMeSI } },
836 { "dec{S|}", { RMeDI } },
837 /* 50 */
838 { "pushV", { RMrAX } },
839 { "pushV", { RMrCX } },
840 { "pushV", { RMrDX } },
841 { "pushV", { RMrBX } },
842 { "pushV", { RMrSP } },
843 { "pushV", { RMrBP } },
844 { "pushV", { RMrSI } },
845 { "pushV", { RMrDI } },
846 /* 58 */
847 { "popV", { RMrAX } },
848 { "popV", { RMrCX } },
849 { "popV", { RMrDX } },
850 { "popV", { RMrBX } },
851 { "popV", { RMrSP } },
852 { "popV", { RMrBP } },
853 { "popV", { RMrSI } },
854 { "popV", { RMrDI } },
855 /* 60 */
856 { X86_64_0 },
857 { X86_64_1 },
858 { X86_64_2 },
859 { X86_64_3 },
860 { "(bad)", { XX } }, /* seg fs */
861 { "(bad)", { XX } }, /* seg gs */
862 { "(bad)", { XX } }, /* op size prefix */
863 { "(bad)", { XX } }, /* adr size prefix */
864 /* 68 */
865 { "pushT", { Iq } },
866 { "imulS", { Gv, Ev, Iv } },
867 { "pushT", { sIb } },
868 { "imulS", { Gv, Ev, sIb } },
869 { "ins{b||b|}", { Ybr, indirDX } },
870 { "ins{R||G|}", { Yzr, indirDX } },
871 { "outs{b||b|}", { indirDXr, Xb } },
872 { "outs{R||G|}", { indirDXr, Xz } },
873 /* 70 */
874 { "joH", { Jb, XX, cond_jump_flag } },
875 { "jnoH", { Jb, XX, cond_jump_flag } },
876 { "jbH", { Jb, XX, cond_jump_flag } },
877 { "jaeH", { Jb, XX, cond_jump_flag } },
878 { "jeH", { Jb, XX, cond_jump_flag } },
879 { "jneH", { Jb, XX, cond_jump_flag } },
880 { "jbeH", { Jb, XX, cond_jump_flag } },
881 { "jaH", { Jb, XX, cond_jump_flag } },
882 /* 78 */
883 { "jsH", { Jb, XX, cond_jump_flag } },
884 { "jnsH", { Jb, XX, cond_jump_flag } },
885 { "jpH", { Jb, XX, cond_jump_flag } },
886 { "jnpH", { Jb, XX, cond_jump_flag } },
887 { "jlH", { Jb, XX, cond_jump_flag } },
888 { "jgeH", { Jb, XX, cond_jump_flag } },
889 { "jleH", { Jb, XX, cond_jump_flag } },
890 { "jgH", { Jb, XX, cond_jump_flag } },
891 /* 80 */
892 { GRP1b },
893 { GRP1S },
894 { "(bad)", { XX } },
895 { GRP1Ss },
896 { "testB", { Eb, Gb } },
897 { "testS", { Ev, Gv } },
898 { "xchgB", { Eb, Gb } },
899 { "xchgS", { Ev, Gv } },
900 /* 88 */
901 { "movB", { Eb, Gb } },
902 { "movS", { Ev, Gv } },
903 { "movB", { Gb, Eb } },
904 { "movS", { Gv, Ev } },
905 { "movD", { Sv, Sw } },
906 { "leaS", { Gv, M } },
907 { "movD", { Sw, Sv } },
908 { GRP1a },
909 /* 90 */
910 { PREGRP38 },
911 { "xchgS", { RMeCX, eAX } },
912 { "xchgS", { RMeDX, eAX } },
913 { "xchgS", { RMeBX, eAX } },
914 { "xchgS", { RMeSP, eAX } },
915 { "xchgS", { RMeBP, eAX } },
916 { "xchgS", { RMeSI, eAX } },
917 { "xchgS", { RMeDI, eAX } },
918 /* 98 */
919 { "cW{t||t|}R", { XX } },
920 { "cR{t||t|}O", { XX } },
921 { "Jcall{T|}", { Ap } },
922 { "(bad)", { XX } }, /* fwait */
923 { "pushfT", { XX } },
924 { "popfT", { XX } },
925 { "sahf{|}", { XX } },
926 { "lahf{|}", { XX } },
927 /* a0 */
928 { "movB", { AL, Ob } },
929 { "movS", { eAX, Ov } },
930 { "movB", { Ob, AL } },
931 { "movS", { Ov, eAX } },
932 { "movs{b||b|}", { Ybr, Xb } },
933 { "movs{R||R|}", { Yvr, Xv } },
934 { "cmps{b||b|}", { Xb, Yb } },
935 { "cmps{R||R|}", { Xv, Yv } },
936 /* a8 */
937 { "testB", { AL, Ib } },
938 { "testS", { eAX, Iv } },
939 { "stosB", { Ybr, AL } },
940 { "stosS", { Yvr, eAX } },
941 { "lodsB", { ALr, Xb } },
942 { "lodsS", { eAXr, Xv } },
943 { "scasB", { AL, Yb } },
944 { "scasS", { eAX, Yv } },
945 /* b0 */
946 { "movB", { RMAL, Ib } },
947 { "movB", { RMCL, Ib } },
948 { "movB", { RMDL, Ib } },
949 { "movB", { RMBL, Ib } },
950 { "movB", { RMAH, Ib } },
951 { "movB", { RMCH, Ib } },
952 { "movB", { RMDH, Ib } },
953 { "movB", { RMBH, Ib } },
954 /* b8 */
955 { "movS", { RMeAX, Iv64 } },
956 { "movS", { RMeCX, Iv64 } },
957 { "movS", { RMeDX, Iv64 } },
958 { "movS", { RMeBX, Iv64 } },
959 { "movS", { RMeSP, Iv64 } },
960 { "movS", { RMeBP, Iv64 } },
961 { "movS", { RMeSI, Iv64 } },
962 { "movS", { RMeDI, Iv64 } },
963 /* c0 */
964 { GRP2b },
965 { GRP2S },
966 { "retT", { Iw } },
967 { "retT", { XX } },
968 { "les{S|}", { Gv, Mp } },
969 { "ldsS", { Gv, Mp } },
970 { GRP11_C6 },
971 { GRP11_C7 },
972 /* c8 */
973 { "enterT", { Iw, Ib } },
974 { "leaveT", { XX } },
975 { "lretP", { Iw } },
976 { "lretP", { XX } },
977 { "int3", { XX } },
978 { "int", { Ib } },
979 { "into{|}", { XX } },
980 { "iretP", { XX } },
981 /* d0 */
982 { GRP2b_one },
983 { GRP2S_one },
984 { GRP2b_cl },
985 { GRP2S_cl },
986 { "aam{|}", { sIb } },
987 { "aad{|}", { sIb } },
988 { "(bad)", { XX } },
989 { "xlat", { DSBX } },
990 /* d8 */
991 { FLOAT },
992 { FLOAT },
993 { FLOAT },
994 { FLOAT },
995 { FLOAT },
996 { FLOAT },
997 { FLOAT },
998 { FLOAT },
999 /* e0 */
1000 { "loopneFH", { Jb, XX, loop_jcxz_flag } },
1001 { "loopeFH", { Jb, XX, loop_jcxz_flag } },
1002 { "loopFH", { Jb, XX, loop_jcxz_flag } },
1003 { "jEcxzH", { Jb, XX, loop_jcxz_flag } },
1004 { "inB", { AL, Ib } },
1005 { "inG", { zAX, Ib } },
1006 { "outB", { Ib, AL } },
1007 { "outG", { Ib, zAX } },
1008 /* e8 */
1009 { "callT", { Jv } },
1010 { "jmpT", { Jv } },
1011 { "Jjmp{T|}", { Ap } },
1012 { "jmp", { Jb } },
1013 { "inB", { AL, indirDX } },
1014 { "inG", { zAX, indirDX } },
1015 { "outB", { indirDX, AL } },
1016 { "outG", { indirDX, zAX } },
1017 /* f0 */
1018 { "(bad)", { XX } }, /* lock prefix */
1019 { "icebp", { XX } },
1020 { "(bad)", { XX } }, /* repne */
1021 { "(bad)", { XX } }, /* repz */
1022 { "hlt", { XX } },
1023 { "cmc", { XX } },
1024 { GRP3b },
1025 { GRP3S },
1026 /* f8 */
1027 { "clc", { XX } },
1028 { "stc", { XX } },
1029 { "cli", { XX } },
1030 { "sti", { XX } },
1031 { "cld", { XX } },
1032 { "std", { XX } },
1033 { GRP4 },
1034 { GRP5 },
1037 static const struct dis386 dis386_twobyte[] = {
1038 /* 00 */
1039 { GRP6 },
1040 { GRP7 },
1041 { "larS", { Gv, Ew } },
1042 { "lslS", { Gv, Ew } },
1043 { "(bad)", { XX } },
1044 { "syscall", { XX } },
1045 { "clts", { XX } },
1046 { "sysretP", { XX } },
1047 /* 08 */
1048 { "invd", { XX } },
1049 { "wbinvd", { XX } },
1050 { "(bad)", { XX } },
1051 { "ud2a", { XX } },
1052 { "(bad)", { XX } },
1053 { GRPAMD },
1054 { "femms", { XX } },
1055 { "", { MX, EM, OPSUF } }, /* See OP_3DNowSuffix. */
1056 /* 10 */
1057 { PREGRP8 },
1058 { PREGRP9 },
1059 { PREGRP30 },
1060 { "movlpX", { EXq, XM, { SIMD_Fixup, 'h' } } },
1061 { "unpcklpX", { XM, EXq } },
1062 { "unpckhpX", { XM, EXq } },
1063 { PREGRP31 },
1064 { "movhpX", { EXq, XM, { SIMD_Fixup, 'l' } } },
1065 /* 18 */
1066 { GRP16 },
1067 { "(bad)", { XX } },
1068 { "(bad)", { XX } },
1069 { "(bad)", { XX } },
1070 { "(bad)", { XX } },
1071 { "(bad)", { XX } },
1072 { "(bad)", { XX } },
1073 { "nopQ", { Ev } },
1074 /* 20 */
1075 { "movZ", { Rm, Cm } },
1076 { "movZ", { Rm, Dm } },
1077 { "movZ", { Cm, Rm } },
1078 { "movZ", { Dm, Rm } },
1079 { "movL", { Rd, Td } },
1080 { "(bad)", { XX } },
1081 { "movL", { Td, Rd } },
1082 { "(bad)", { XX } },
1083 /* 28 */
1084 { "movapX", { XM, EXx } },
1085 { "movapX", { EXx, XM } },
1086 { PREGRP2 },
1087 { PREGRP33 },
1088 { PREGRP4 },
1089 { PREGRP3 },
1090 { PREGRP93 },
1091 { PREGRP94 },
1092 /* 30 */
1093 { "wrmsr", { XX } },
1094 { "rdtsc", { XX } },
1095 { "rdmsr", { XX } },
1096 { "rdpmc", { XX } },
1097 { "sysenter", { XX } },
1098 { "sysexit", { XX } },
1099 { "(bad)", { XX } },
1100 { "(bad)", { XX } },
1101 /* 38 */
1102 { THREE_BYTE_0 },
1103 { "(bad)", { XX } },
1104 { THREE_BYTE_1 },
1105 { "(bad)", { XX } },
1106 { "(bad)", { XX } },
1107 { "(bad)", { XX } },
1108 { "(bad)", { XX } },
1109 { "(bad)", { XX } },
1110 /* 40 */
1111 { "cmovo", { Gv, Ev } },
1112 { "cmovno", { Gv, Ev } },
1113 { "cmovb", { Gv, Ev } },
1114 { "cmovae", { Gv, Ev } },
1115 { "cmove", { Gv, Ev } },
1116 { "cmovne", { Gv, Ev } },
1117 { "cmovbe", { Gv, Ev } },
1118 { "cmova", { Gv, Ev } },
1119 /* 48 */
1120 { "cmovs", { Gv, Ev } },
1121 { "cmovns", { Gv, Ev } },
1122 { "cmovp", { Gv, Ev } },
1123 { "cmovnp", { Gv, Ev } },
1124 { "cmovl", { Gv, Ev } },
1125 { "cmovge", { Gv, Ev } },
1126 { "cmovle", { Gv, Ev } },
1127 { "cmovg", { Gv, Ev } },
1128 /* 50 */
1129 { "movmskpX", { Gdq, XS } },
1130 { PREGRP13 },
1131 { PREGRP12 },
1132 { PREGRP11 },
1133 { "andpX", { XM, EXx } },
1134 { "andnpX", { XM, EXx } },
1135 { "orpX", { XM, EXx } },
1136 { "xorpX", { XM, EXx } },
1137 /* 58 */
1138 { PREGRP0 },
1139 { PREGRP10 },
1140 { PREGRP17 },
1141 { PREGRP16 },
1142 { PREGRP14 },
1143 { PREGRP7 },
1144 { PREGRP5 },
1145 { PREGRP6 },
1146 /* 60 */
1147 { PREGRP95 },
1148 { PREGRP96 },
1149 { PREGRP97 },
1150 { "packsswb", { MX, EM } },
1151 { "pcmpgtb", { MX, EM } },
1152 { "pcmpgtw", { MX, EM } },
1153 { "pcmpgtd", { MX, EM } },
1154 { "packuswb", { MX, EM } },
1155 /* 68 */
1156 { "punpckhbw", { MX, EM } },
1157 { "punpckhwd", { MX, EM } },
1158 { "punpckhdq", { MX, EM } },
1159 { "packssdw", { MX, EM } },
1160 { PREGRP26 },
1161 { PREGRP24 },
1162 { "movd", { MX, Edq } },
1163 { PREGRP19 },
1164 /* 70 */
1165 { PREGRP22 },
1166 { GRP12 },
1167 { GRP13 },
1168 { GRP14 },
1169 { "pcmpeqb", { MX, EM } },
1170 { "pcmpeqw", { MX, EM } },
1171 { "pcmpeqd", { MX, EM } },
1172 { "emms", { XX } },
1173 /* 78 */
1174 { PREGRP34 },
1175 { PREGRP35 },
1176 { "(bad)", { XX } },
1177 { "(bad)", { XX } },
1178 { PREGRP28 },
1179 { PREGRP29 },
1180 { PREGRP23 },
1181 { PREGRP20 },
1182 /* 80 */
1183 { "joH", { Jv, XX, cond_jump_flag } },
1184 { "jnoH", { Jv, XX, cond_jump_flag } },
1185 { "jbH", { Jv, XX, cond_jump_flag } },
1186 { "jaeH", { Jv, XX, cond_jump_flag } },
1187 { "jeH", { Jv, XX, cond_jump_flag } },
1188 { "jneH", { Jv, XX, cond_jump_flag } },
1189 { "jbeH", { Jv, XX, cond_jump_flag } },
1190 { "jaH", { Jv, XX, cond_jump_flag } },
1191 /* 88 */
1192 { "jsH", { Jv, XX, cond_jump_flag } },
1193 { "jnsH", { Jv, XX, cond_jump_flag } },
1194 { "jpH", { Jv, XX, cond_jump_flag } },
1195 { "jnpH", { Jv, XX, cond_jump_flag } },
1196 { "jlH", { Jv, XX, cond_jump_flag } },
1197 { "jgeH", { Jv, XX, cond_jump_flag } },
1198 { "jleH", { Jv, XX, cond_jump_flag } },
1199 { "jgH", { Jv, XX, cond_jump_flag } },
1200 /* 90 */
1201 { "seto", { Eb } },
1202 { "setno", { Eb } },
1203 { "setb", { Eb } },
1204 { "setae", { Eb } },
1205 { "sete", { Eb } },
1206 { "setne", { Eb } },
1207 { "setbe", { Eb } },
1208 { "seta", { Eb } },
1209 /* 98 */
1210 { "sets", { Eb } },
1211 { "setns", { Eb } },
1212 { "setp", { Eb } },
1213 { "setnp", { Eb } },
1214 { "setl", { Eb } },
1215 { "setge", { Eb } },
1216 { "setle", { Eb } },
1217 { "setg", { Eb } },
1218 /* a0 */
1219 { "pushT", { fs } },
1220 { "popT", { fs } },
1221 { "cpuid", { XX } },
1222 { "btS", { Ev, Gv } },
1223 { "shldS", { Ev, Gv, Ib } },
1224 { "shldS", { Ev, Gv, CL } },
1225 { GRPPADLCK2 },
1226 { GRPPADLCK1 },
1227 /* a8 */
1228 { "pushT", { gs } },
1229 { "popT", { gs } },
1230 { "rsm", { XX } },
1231 { "btsS", { Ev, Gv } },
1232 { "shrdS", { Ev, Gv, Ib } },
1233 { "shrdS", { Ev, Gv, CL } },
1234 { GRP15 },
1235 { "imulS", { Gv, Ev } },
1236 /* b0 */
1237 { "cmpxchgB", { Eb, Gb } },
1238 { "cmpxchgS", { Ev, Gv } },
1239 { "lssS", { Gv, Mp } },
1240 { "btrS", { Ev, Gv } },
1241 { "lfsS", { Gv, Mp } },
1242 { "lgsS", { Gv, Mp } },
1243 { "movz{bR|x|bR|x}", { Gv, Eb } },
1244 { "movz{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movzww ! */
1245 /* b8 */
1246 { PREGRP37 },
1247 { "ud2b", { XX } },
1248 { GRP8 },
1249 { "btcS", { Ev, Gv } },
1250 { "bsfS", { Gv, Ev } },
1251 { PREGRP36 },
1252 { "movs{bR|x|bR|x}", { Gv, Eb } },
1253 { "movs{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movsww ! */
1254 /* c0 */
1255 { "xaddB", { Eb, Gb } },
1256 { "xaddS", { Ev, Gv } },
1257 { PREGRP1 },
1258 { "movntiS", { Ev, Gv } },
1259 { "pinsrw", { MX, Edqw, Ib } },
1260 { "pextrw", { Gdq, MS, Ib } },
1261 { "shufpX", { XM, EXx, Ib } },
1262 { GRP9 },
1263 /* c8 */
1264 { "bswap", { RMeAX } },
1265 { "bswap", { RMeCX } },
1266 { "bswap", { RMeDX } },
1267 { "bswap", { RMeBX } },
1268 { "bswap", { RMeSP } },
1269 { "bswap", { RMeBP } },
1270 { "bswap", { RMeSI } },
1271 { "bswap", { RMeDI } },
1272 /* d0 */
1273 { PREGRP27 },
1274 { "psrlw", { MX, EM } },
1275 { "psrld", { MX, EM } },
1276 { "psrlq", { MX, EM } },
1277 { "paddq", { MX, EM } },
1278 { "pmullw", { MX, EM } },
1279 { PREGRP21 },
1280 { "pmovmskb", { Gdq, MS } },
1281 /* d8 */
1282 { "psubusb", { MX, EM } },
1283 { "psubusw", { MX, EM } },
1284 { "pminub", { MX, EM } },
1285 { "pand", { MX, EM } },
1286 { "paddusb", { MX, EM } },
1287 { "paddusw", { MX, EM } },
1288 { "pmaxub", { MX, EM } },
1289 { "pandn", { MX, EM } },
1290 /* e0 */
1291 { "pavgb", { MX, EM } },
1292 { "psraw", { MX, EM } },
1293 { "psrad", { MX, EM } },
1294 { "pavgw", { MX, EM } },
1295 { "pmulhuw", { MX, EM } },
1296 { "pmulhw", { MX, EM } },
1297 { PREGRP15 },
1298 { PREGRP25 },
1299 /* e8 */
1300 { "psubsb", { MX, EM } },
1301 { "psubsw", { MX, EM } },
1302 { "pminsw", { MX, EM } },
1303 { "por", { MX, EM } },
1304 { "paddsb", { MX, EM } },
1305 { "paddsw", { MX, EM } },
1306 { "pmaxsw", { MX, EM } },
1307 { "pxor", { MX, EM } },
1308 /* f0 */
1309 { PREGRP32 },
1310 { "psllw", { MX, EM } },
1311 { "pslld", { MX, EM } },
1312 { "psllq", { MX, EM } },
1313 { "pmuludq", { MX, EM } },
1314 { "pmaddwd", { MX, EM } },
1315 { "psadbw", { MX, EM } },
1316 { PREGRP18 },
1317 /* f8 */
1318 { "psubb", { MX, EM } },
1319 { "psubw", { MX, EM } },
1320 { "psubd", { MX, EM } },
1321 { "psubq", { MX, EM } },
1322 { "paddb", { MX, EM } },
1323 { "paddw", { MX, EM } },
1324 { "paddd", { MX, EM } },
1325 { "(bad)", { XX } },
1328 static const unsigned char onebyte_has_modrm[256] = {
1329 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1330 /* ------------------------------- */
1331 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1332 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1333 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1334 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1335 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1336 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1337 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1338 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1339 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1340 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1341 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1342 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1343 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1344 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1345 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1346 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1347 /* ------------------------------- */
1348 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1351 static const unsigned char twobyte_has_modrm[256] = {
1352 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1353 /* ------------------------------- */
1354 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1355 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
1356 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1357 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1358 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1359 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1360 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1361 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
1362 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1363 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1364 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1365 /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
1366 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1367 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1368 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1369 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1370 /* ------------------------------- */
1371 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1374 static const unsigned char twobyte_uses_DATA_prefix[256] = {
1375 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1376 /* ------------------------------- */
1377 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1378 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1379 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1380 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1381 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1382 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1383 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1384 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,1,1, /* 7f */
1385 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1386 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1387 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1388 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1389 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1390 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1391 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1392 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
1393 /* ------------------------------- */
1394 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1397 static const unsigned char twobyte_uses_REPNZ_prefix[256] = {
1398 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1399 /* ------------------------------- */
1400 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1401 /* 10 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1402 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1403 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1404 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1405 /* 50 */ 0,1,0,0,0,0,0,0,1,1,1,0,1,1,1,1, /* 5f */
1406 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1407 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,0,0, /* 7f */
1408 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1409 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1410 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1411 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1412 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1413 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1414 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1415 /* f0 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1416 /* ------------------------------- */
1417 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1420 static const unsigned char twobyte_uses_REPZ_prefix[256] = {
1421 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1422 /* ------------------------------- */
1423 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1424 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1425 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1426 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1427 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1428 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1429 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* 6f */
1430 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */
1431 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1432 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1433 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1434 /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,0,1,0,0, /* bf */
1435 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1436 /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1437 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1438 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1439 /* ------------------------------- */
1440 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1443 /* This is used to determine if opcode 0f 38 XX uses DATA prefix. */
1444 static const unsigned char threebyte_0x38_uses_DATA_prefix[256] = {
1445 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1446 /* ------------------------------- */
1447 /* 00 */ 1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0, /* 0f */
1448 /* 10 */ 1,0,0,0,1,1,0,1,0,0,0,0,1,1,1,0, /* 1f */
1449 /* 20 */ 1,1,1,1,1,1,0,0,1,1,1,1,0,0,0,0, /* 2f */
1450 /* 30 */ 1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1, /* 3f */
1451 /* 40 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1452 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1453 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1454 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1455 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1456 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1457 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1458 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1459 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1460 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1, /* df */
1461 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1462 /* f0 */ 0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0, /* ff */
1463 /* ------------------------------- */
1464 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1467 /* This is used to determine if opcode 0f 38 XX uses REPNZ prefix. */
1468 static const unsigned char threebyte_0x38_uses_REPNZ_prefix[256] = {
1469 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1470 /* ------------------------------- */
1471 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1472 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1473 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1474 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1475 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1476 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1477 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1478 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1479 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1480 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1481 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1482 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1483 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1484 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1485 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1486 /* f0 */ 1,1,0,0,0,0,0,1,0,0,0,0,0,0,0,0, /* ff */
1487 /* ------------------------------- */
1488 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1491 /* This is used to determine if opcode 0f 38 XX uses REPZ prefix. */
1492 static const unsigned char threebyte_0x38_uses_REPZ_prefix[256] = {
1493 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1494 /* ------------------------------- */
1495 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1496 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1497 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1498 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1499 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1500 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1501 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1502 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1503 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1504 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1505 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1506 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1507 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1508 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1509 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1510 /* f0 */ 0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0, /* ff */
1511 /* ------------------------------- */
1512 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1515 /* This is used to determine if opcode 0f 3a XX uses DATA prefix. */
1516 static const unsigned char threebyte_0x3a_uses_DATA_prefix[256] = {
1517 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1518 /* ------------------------------- */
1519 /* 00 */ 0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1, /* 0f */
1520 /* 10 */ 0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* 1f */
1521 /* 20 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1522 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1523 /* 40 */ 1,1,1,0,1,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1524 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1525 /* 60 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1526 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1527 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1528 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1529 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1530 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1531 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1532 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* df */
1533 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1534 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1535 /* ------------------------------- */
1536 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1539 /* This is used to determine if opcode 0f 3a XX uses REPNZ prefix. */
1540 static const unsigned char threebyte_0x3a_uses_REPNZ_prefix[256] = {
1541 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1542 /* ------------------------------- */
1543 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1544 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1545 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1546 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1547 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1548 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1549 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1550 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1551 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1552 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1553 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1554 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1555 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1556 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1557 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1558 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1559 /* ------------------------------- */
1560 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1563 /* This is used to determine if opcode 0f 3a XX uses REPZ prefix. */
1564 static const unsigned char threebyte_0x3a_uses_REPZ_prefix[256] = {
1565 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1566 /* ------------------------------- */
1567 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1568 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1569 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1570 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1571 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1572 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1573 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1574 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1575 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1576 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1577 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1578 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1579 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1580 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1581 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1582 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1583 /* ------------------------------- */
1584 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1587 static char obuf[100];
1588 static char *obufp;
1589 static char scratchbuf[100];
1590 static unsigned char *start_codep;
1591 static unsigned char *insn_codep;
1592 static unsigned char *codep;
1593 static disassemble_info *the_info;
1594 static struct
1596 int mod;
1597 int reg;
1598 int rm;
1600 modrm;
1601 static unsigned char need_modrm;
1603 /* If we are accessing mod/rm/reg without need_modrm set, then the
1604 values are stale. Hitting this abort likely indicates that you
1605 need to update onebyte_has_modrm or twobyte_has_modrm. */
1606 #define MODRM_CHECK if (!need_modrm) abort ()
1608 static const char * const *names64;
1609 static const char * const *names32;
1610 static const char * const *names16;
1611 static const char * const *names8;
1612 static const char * const *names8rex;
1613 static const char * const *names_seg;
1614 static const char * const *index16;
1616 static const char * const intel_names64[] = {
1617 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1618 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1620 static const char * const intel_names32[] = {
1621 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1622 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1624 static const char * const intel_names16[] = {
1625 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1626 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1628 static const char * const intel_names8[] = {
1629 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1631 static const char * const intel_names8rex[] = {
1632 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1633 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1635 static const char * const intel_names_seg[] = {
1636 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1638 static const char * const intel_index16[] = {
1639 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1642 static const char * const att_names64[] = {
1643 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1644 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1646 static const char * const att_names32[] = {
1647 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1648 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1650 static const char * const att_names16[] = {
1651 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1652 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1654 static const char * const att_names8[] = {
1655 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1657 static const char * const att_names8rex[] = {
1658 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1659 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1661 static const char * const att_names_seg[] = {
1662 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1664 static const char * const att_index16[] = {
1665 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1668 static const struct dis386 grps[][8] = {
1669 /* GRP1a */
1671 { "popU", { stackEv } },
1672 { "(bad)", { XX } },
1673 { "(bad)", { XX } },
1674 { "(bad)", { XX } },
1675 { "(bad)", { XX } },
1676 { "(bad)", { XX } },
1677 { "(bad)", { XX } },
1678 { "(bad)", { XX } },
1680 /* GRP1b */
1682 { "addA", { Eb, Ib } },
1683 { "orA", { Eb, Ib } },
1684 { "adcA", { Eb, Ib } },
1685 { "sbbA", { Eb, Ib } },
1686 { "andA", { Eb, Ib } },
1687 { "subA", { Eb, Ib } },
1688 { "xorA", { Eb, Ib } },
1689 { "cmpA", { Eb, Ib } },
1691 /* GRP1S */
1693 { "addQ", { Ev, Iv } },
1694 { "orQ", { Ev, Iv } },
1695 { "adcQ", { Ev, Iv } },
1696 { "sbbQ", { Ev, Iv } },
1697 { "andQ", { Ev, Iv } },
1698 { "subQ", { Ev, Iv } },
1699 { "xorQ", { Ev, Iv } },
1700 { "cmpQ", { Ev, Iv } },
1702 /* GRP1Ss */
1704 { "addQ", { Ev, sIb } },
1705 { "orQ", { Ev, sIb } },
1706 { "adcQ", { Ev, sIb } },
1707 { "sbbQ", { Ev, sIb } },
1708 { "andQ", { Ev, sIb } },
1709 { "subQ", { Ev, sIb } },
1710 { "xorQ", { Ev, sIb } },
1711 { "cmpQ", { Ev, sIb } },
1713 /* GRP2b */
1715 { "rolA", { Eb, Ib } },
1716 { "rorA", { Eb, Ib } },
1717 { "rclA", { Eb, Ib } },
1718 { "rcrA", { Eb, Ib } },
1719 { "shlA", { Eb, Ib } },
1720 { "shrA", { Eb, Ib } },
1721 { "(bad)", { XX } },
1722 { "sarA", { Eb, Ib } },
1724 /* GRP2S */
1726 { "rolQ", { Ev, Ib } },
1727 { "rorQ", { Ev, Ib } },
1728 { "rclQ", { Ev, Ib } },
1729 { "rcrQ", { Ev, Ib } },
1730 { "shlQ", { Ev, Ib } },
1731 { "shrQ", { Ev, Ib } },
1732 { "(bad)", { XX } },
1733 { "sarQ", { Ev, Ib } },
1735 /* GRP2b_one */
1737 { "rolA", { Eb, I1 } },
1738 { "rorA", { Eb, I1 } },
1739 { "rclA", { Eb, I1 } },
1740 { "rcrA", { Eb, I1 } },
1741 { "shlA", { Eb, I1 } },
1742 { "shrA", { Eb, I1 } },
1743 { "(bad)", { XX } },
1744 { "sarA", { Eb, I1 } },
1746 /* GRP2S_one */
1748 { "rolQ", { Ev, I1 } },
1749 { "rorQ", { Ev, I1 } },
1750 { "rclQ", { Ev, I1 } },
1751 { "rcrQ", { Ev, I1 } },
1752 { "shlQ", { Ev, I1 } },
1753 { "shrQ", { Ev, I1 } },
1754 { "(bad)", { XX } },
1755 { "sarQ", { Ev, I1 } },
1757 /* GRP2b_cl */
1759 { "rolA", { Eb, CL } },
1760 { "rorA", { Eb, CL } },
1761 { "rclA", { Eb, CL } },
1762 { "rcrA", { Eb, CL } },
1763 { "shlA", { Eb, CL } },
1764 { "shrA", { Eb, CL } },
1765 { "(bad)", { XX } },
1766 { "sarA", { Eb, CL } },
1768 /* GRP2S_cl */
1770 { "rolQ", { Ev, CL } },
1771 { "rorQ", { Ev, CL } },
1772 { "rclQ", { Ev, CL } },
1773 { "rcrQ", { Ev, CL } },
1774 { "shlQ", { Ev, CL } },
1775 { "shrQ", { Ev, CL } },
1776 { "(bad)", { XX } },
1777 { "sarQ", { Ev, CL } },
1779 /* GRP3b */
1781 { "testA", { Eb, Ib } },
1782 { "(bad)", { Eb } },
1783 { "notA", { Eb } },
1784 { "negA", { Eb } },
1785 { "mulA", { Eb } }, /* Don't print the implicit %al register, */
1786 { "imulA", { Eb } }, /* to distinguish these opcodes from other */
1787 { "divA", { Eb } }, /* mul/imul opcodes. Do the same for div */
1788 { "idivA", { Eb } }, /* and idiv for consistency. */
1790 /* GRP3S */
1792 { "testQ", { Ev, Iv } },
1793 { "(bad)", { XX } },
1794 { "notQ", { Ev } },
1795 { "negQ", { Ev } },
1796 { "mulQ", { Ev } }, /* Don't print the implicit register. */
1797 { "imulQ", { Ev } },
1798 { "divQ", { Ev } },
1799 { "idivQ", { Ev } },
1801 /* GRP4 */
1803 { "incA", { Eb } },
1804 { "decA", { Eb } },
1805 { "(bad)", { XX } },
1806 { "(bad)", { XX } },
1807 { "(bad)", { XX } },
1808 { "(bad)", { XX } },
1809 { "(bad)", { XX } },
1810 { "(bad)", { XX } },
1812 /* GRP5 */
1814 { "incQ", { Ev } },
1815 { "decQ", { Ev } },
1816 { "callT", { indirEv } },
1817 { "JcallT", { indirEp } },
1818 { "jmpT", { indirEv } },
1819 { "JjmpT", { indirEp } },
1820 { "pushU", { stackEv } },
1821 { "(bad)", { XX } },
1823 /* GRP6 */
1825 { "sldtD", { Sv } },
1826 { "strD", { Sv } },
1827 { "lldt", { Ew } },
1828 { "ltr", { Ew } },
1829 { "verr", { Ew } },
1830 { "verw", { Ew } },
1831 { "(bad)", { XX } },
1832 { "(bad)", { XX } },
1834 /* GRP7 */
1836 { "sgdt{Q|IQ||}", { { VMX_Fixup, 0 } } },
1837 { "sidt{Q|IQ||}", { { PNI_Fixup, 0 } } },
1838 { "lgdt{Q|Q||}", { M } },
1839 { "lidt{Q|Q||}", { { SVME_Fixup, 0 } } },
1840 { "smswD", { Sv } },
1841 { "(bad)", { XX } },
1842 { "lmsw", { Ew } },
1843 { "invlpg", { { INVLPG_Fixup, w_mode } } },
1845 /* GRP8 */
1847 { "(bad)", { XX } },
1848 { "(bad)", { XX } },
1849 { "(bad)", { XX } },
1850 { "(bad)", { XX } },
1851 { "btQ", { Ev, Ib } },
1852 { "btsQ", { Ev, Ib } },
1853 { "btrQ", { Ev, Ib } },
1854 { "btcQ", { Ev, Ib } },
1856 /* GRP9 */
1858 { "(bad)", { XX } },
1859 { "cmpxchg8b", { { CMPXCHG8B_Fixup, q_mode } } },
1860 { "(bad)", { XX } },
1861 { "(bad)", { XX } },
1862 { "(bad)", { XX } },
1863 { "(bad)", { XX } },
1864 { "", { VM } }, /* See OP_VMX. */
1865 { "vmptrst", { Mq } },
1867 /* GRP11_C6 */
1869 { "movA", { Eb, Ib } },
1870 { "(bad)", { XX } },
1871 { "(bad)", { XX } },
1872 { "(bad)", { XX } },
1873 { "(bad)", { XX } },
1874 { "(bad)", { XX } },
1875 { "(bad)", { XX } },
1876 { "(bad)", { XX } },
1878 /* GRP11_C7 */
1880 { "movQ", { Ev, Iv } },
1881 { "(bad)", { XX } },
1882 { "(bad)", { XX } },
1883 { "(bad)", { XX } },
1884 { "(bad)", { XX } },
1885 { "(bad)", { XX } },
1886 { "(bad)", { XX } },
1887 { "(bad)", { XX } },
1889 /* GRP12 */
1891 { "(bad)", { XX } },
1892 { "(bad)", { XX } },
1893 { "psrlw", { MS, Ib } },
1894 { "(bad)", { XX } },
1895 { "psraw", { MS, Ib } },
1896 { "(bad)", { XX } },
1897 { "psllw", { MS, Ib } },
1898 { "(bad)", { XX } },
1900 /* GRP13 */
1902 { "(bad)", { XX } },
1903 { "(bad)", { XX } },
1904 { "psrld", { MS, Ib } },
1905 { "(bad)", { XX } },
1906 { "psrad", { MS, Ib } },
1907 { "(bad)", { XX } },
1908 { "pslld", { MS, Ib } },
1909 { "(bad)", { XX } },
1911 /* GRP14 */
1913 { "(bad)", { XX } },
1914 { "(bad)", { XX } },
1915 { "psrlq", { MS, Ib } },
1916 { "psrldq", { MS, Ib } },
1917 { "(bad)", { XX } },
1918 { "(bad)", { XX } },
1919 { "psllq", { MS, Ib } },
1920 { "pslldq", { MS, Ib } },
1922 /* GRP15 */
1924 { "fxsave", { Ev } },
1925 { "fxrstor", { Ev } },
1926 { "ldmxcsr", { Ev } },
1927 { "stmxcsr", { Ev } },
1928 { "(bad)", { XX } },
1929 { "lfence", { { OP_0fae, 0 } } },
1930 { "mfence", { { OP_0fae, 0 } } },
1931 { "clflush", { { OP_0fae, 0 } } },
1933 /* GRP16 */
1935 { "prefetchnta", { Ev } },
1936 { "prefetcht0", { Ev } },
1937 { "prefetcht1", { Ev } },
1938 { "prefetcht2", { Ev } },
1939 { "(bad)", { XX } },
1940 { "(bad)", { XX } },
1941 { "(bad)", { XX } },
1942 { "(bad)", { XX } },
1944 /* GRPAMD */
1946 { "prefetch", { Eb } },
1947 { "prefetchw", { Eb } },
1948 { "(bad)", { XX } },
1949 { "(bad)", { XX } },
1950 { "(bad)", { XX } },
1951 { "(bad)", { XX } },
1952 { "(bad)", { XX } },
1953 { "(bad)", { XX } },
1955 /* GRPPADLCK1 */
1957 { "xstore-rng", { { OP_0f07, 0 } } },
1958 { "xcrypt-ecb", { { OP_0f07, 0 } } },
1959 { "xcrypt-cbc", { { OP_0f07, 0 } } },
1960 { "xcrypt-ctr", { { OP_0f07, 0 } } },
1961 { "xcrypt-cfb", { { OP_0f07, 0 } } },
1962 { "xcrypt-ofb", { { OP_0f07, 0 } } },
1963 { "(bad)", { { OP_0f07, 0 } } },
1964 { "(bad)", { { OP_0f07, 0 } } },
1966 /* GRPPADLCK2 */
1968 { "montmul", { { OP_0f07, 0 } } },
1969 { "xsha1", { { OP_0f07, 0 } } },
1970 { "xsha256", { { OP_0f07, 0 } } },
1971 { "(bad)", { { OP_0f07, 0 } } },
1972 { "(bad)", { { OP_0f07, 0 } } },
1973 { "(bad)", { { OP_0f07, 0 } } },
1974 { "(bad)", { { OP_0f07, 0 } } },
1975 { "(bad)", { { OP_0f07, 0 } } },
1979 static const struct dis386 prefix_user_table[][4] = {
1980 /* PREGRP0 */
1982 { "addps", { XM, EXx } },
1983 { "addss", { XM, EXd } },
1984 { "addpd", { XM, EXx } },
1985 { "addsd", { XM, EXq } },
1987 /* PREGRP1 */
1989 { "", { XM, EXx, OPSIMD } }, /* See OP_SIMD_SUFFIX. */
1990 { "", { XM, EXx, OPSIMD } },
1991 { "", { XM, EXx, OPSIMD } },
1992 { "", { XM, EXx, OPSIMD } },
1994 /* PREGRP2 */
1996 { "cvtpi2ps", { XM, EMC } },
1997 { "cvtsi2ssY", { XM, Ev } },
1998 { "cvtpi2pd", { XM, EMC } },
1999 { "cvtsi2sdY", { XM, Ev } },
2001 /* PREGRP3 */
2003 { "cvtps2pi", { MXC, EXx } },
2004 { "cvtss2siY", { Gv, EXx } },
2005 { "cvtpd2pi", { MXC, EXx } },
2006 { "cvtsd2siY", { Gv, EXx } },
2008 /* PREGRP4 */
2010 { "cvttps2pi", { MXC, EXx } },
2011 { "cvttss2siY", { Gv, EXx } },
2012 { "cvttpd2pi", { MXC, EXx } },
2013 { "cvttsd2siY", { Gv, EXx } },
2015 /* PREGRP5 */
2017 { "divps", { XM, EXx } },
2018 { "divss", { XM, EXx } },
2019 { "divpd", { XM, EXx } },
2020 { "divsd", { XM, EXx } },
2022 /* PREGRP6 */
2024 { "maxps", { XM, EXx } },
2025 { "maxss", { XM, EXx } },
2026 { "maxpd", { XM, EXx } },
2027 { "maxsd", { XM, EXx } },
2029 /* PREGRP7 */
2031 { "minps", { XM, EXx } },
2032 { "minss", { XM, EXx } },
2033 { "minpd", { XM, EXx } },
2034 { "minsd", { XM, EXx } },
2036 /* PREGRP8 */
2038 { "movups", { XM, EXx } },
2039 { "movss", { XM, EXx } },
2040 { "movupd", { XM, EXx } },
2041 { "movsd", { XM, EXx } },
2043 /* PREGRP9 */
2045 { "movups", { EXx, XM } },
2046 { "movss", { EXx, XM } },
2047 { "movupd", { EXx, XM } },
2048 { "movsd", { EXx, XM } },
2050 /* PREGRP10 */
2052 { "mulps", { XM, EXx } },
2053 { "mulss", { XM, EXx } },
2054 { "mulpd", { XM, EXx } },
2055 { "mulsd", { XM, EXx } },
2057 /* PREGRP11 */
2059 { "rcpps", { XM, EXx } },
2060 { "rcpss", { XM, EXx } },
2061 { "(bad)", { XM, EXx } },
2062 { "(bad)", { XM, EXx } },
2064 /* PREGRP12 */
2066 { "rsqrtps",{ XM, EXx } },
2067 { "rsqrtss",{ XM, EXx } },
2068 { "(bad)", { XM, EXx } },
2069 { "(bad)", { XM, EXx } },
2071 /* PREGRP13 */
2073 { "sqrtps", { XM, EXx } },
2074 { "sqrtss", { XM, EXx } },
2075 { "sqrtpd", { XM, EXx } },
2076 { "sqrtsd", { XM, EXx } },
2078 /* PREGRP14 */
2080 { "subps", { XM, EXx } },
2081 { "subss", { XM, EXx } },
2082 { "subpd", { XM, EXx } },
2083 { "subsd", { XM, EXx } },
2085 /* PREGRP15 */
2087 { "(bad)", { XM, EXx } },
2088 { "cvtdq2pd", { XM, EXq } },
2089 { "cvttpd2dq", { XM, EXx } },
2090 { "cvtpd2dq", { XM, EXx } },
2092 /* PREGRP16 */
2094 { "cvtdq2ps", { XM, EXx } },
2095 { "cvttps2dq", { XM, EXx } },
2096 { "cvtps2dq", { XM, EXx } },
2097 { "(bad)", { XM, EXx } },
2099 /* PREGRP17 */
2101 { "cvtps2pd", { XM, EXq } },
2102 { "cvtss2sd", { XM, EXx } },
2103 { "cvtpd2ps", { XM, EXx } },
2104 { "cvtsd2ss", { XM, EXx } },
2106 /* PREGRP18 */
2108 { "maskmovq", { MX, MS } },
2109 { "(bad)", { XM, EXx } },
2110 { "maskmovdqu", { XM, XS } },
2111 { "(bad)", { XM, EXx } },
2113 /* PREGRP19 */
2115 { "movq", { MX, EM } },
2116 { "movdqu", { XM, EXx } },
2117 { "movdqa", { XM, EXx } },
2118 { "(bad)", { XM, EXx } },
2120 /* PREGRP20 */
2122 { "movq", { EM, MX } },
2123 { "movdqu", { EXx, XM } },
2124 { "movdqa", { EXx, XM } },
2125 { "(bad)", { EXx, XM } },
2127 /* PREGRP21 */
2129 { "(bad)", { EXx, XM } },
2130 { "movq2dq",{ XM, MS } },
2131 { "movq", { EXx, XM } },
2132 { "movdq2q",{ MX, XS } },
2134 /* PREGRP22 */
2136 { "pshufw", { MX, EM, Ib } },
2137 { "pshufhw",{ XM, EXx, Ib } },
2138 { "pshufd", { XM, EXx, Ib } },
2139 { "pshuflw",{ XM, EXx, Ib } },
2141 /* PREGRP23 */
2143 { "movd", { Edq, MX } },
2144 { "movq", { XM, EXx } },
2145 { "movd", { Edq, XM } },
2146 { "(bad)", { Ed, XM } },
2148 /* PREGRP24 */
2150 { "(bad)", { MX, EXx } },
2151 { "(bad)", { XM, EXx } },
2152 { "punpckhqdq", { XM, EXx } },
2153 { "(bad)", { XM, EXx } },
2155 /* PREGRP25 */
2157 { "movntq", { EM, MX } },
2158 { "(bad)", { EM, XM } },
2159 { "movntdq",{ EM, XM } },
2160 { "(bad)", { EM, XM } },
2162 /* PREGRP26 */
2164 { "(bad)", { MX, EXx } },
2165 { "(bad)", { XM, EXx } },
2166 { "punpcklqdq", { XM, EXx } },
2167 { "(bad)", { XM, EXx } },
2169 /* PREGRP27 */
2171 { "(bad)", { MX, EXx } },
2172 { "(bad)", { XM, EXx } },
2173 { "addsubpd", { XM, EXx } },
2174 { "addsubps", { XM, EXx } },
2176 /* PREGRP28 */
2178 { "(bad)", { MX, EXx } },
2179 { "(bad)", { XM, EXx } },
2180 { "haddpd", { XM, EXx } },
2181 { "haddps", { XM, EXx } },
2183 /* PREGRP29 */
2185 { "(bad)", { MX, EXx } },
2186 { "(bad)", { XM, EXx } },
2187 { "hsubpd", { XM, EXx } },
2188 { "hsubps", { XM, EXx } },
2190 /* PREGRP30 */
2192 { "movlpX", { XM, EXq, { SIMD_Fixup, 'h' } } }, /* really only 2 operands */
2193 { "movsldup", { XM, EXx } },
2194 { "movlpd", { XM, EXq } },
2195 { "movddup", { XM, EXq } },
2197 /* PREGRP31 */
2199 { "movhpX", { XM, EXq, { SIMD_Fixup, 'l' } } },
2200 { "movshdup", { XM, EXx } },
2201 { "movhpd", { XM, EXq } },
2202 { "(bad)", { XM, EXq } },
2204 /* PREGRP32 */
2206 { "(bad)", { XM, EXx } },
2207 { "(bad)", { XM, EXx } },
2208 { "(bad)", { XM, EXx } },
2209 { "lddqu", { XM, M } },
2211 /* PREGRP33 */
2213 {"movntps", { Ev, XM } },
2214 {"movntss", { Ev, XM } },
2215 {"movntpd", { Ev, XM } },
2216 {"movntsd", { Ev, XM } },
2219 /* PREGRP34 */
2221 {"vmread", { Em, Gm } },
2222 {"(bad)", { XX } },
2223 {"extrq", { XS, Ib, Ib } },
2224 {"insertq", { XM, XS, Ib, Ib } },
2227 /* PREGRP35 */
2229 {"vmwrite", { Gm, Em } },
2230 {"(bad)", { XX } },
2231 {"extrq", { XM, XS } },
2232 {"insertq", { XM, XS } },
2235 /* PREGRP36 */
2237 { "bsrS", { Gv, Ev } },
2238 { "lzcntS", { Gv, Ev } },
2239 { "bsrS", { Gv, Ev } },
2240 { "(bad)", { XX } },
2243 /* PREGRP37 */
2245 { "(bad)", { XX } },
2246 { "popcntS", { Gv, Ev } },
2247 { "(bad)", { XX } },
2248 { "(bad)", { XX } },
2251 /* PREGRP38 */
2253 { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
2254 { "pause", { XX } },
2255 { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
2256 { "(bad)", { XX } },
2259 /* PREGRP39 */
2261 { "(bad)", { XX } },
2262 { "(bad)", { XX } },
2263 { "pblendvb", {XM, EXx, XMM0 } },
2264 { "(bad)", { XX } },
2267 /* PREGRP40 */
2269 { "(bad)", { XX } },
2270 { "(bad)", { XX } },
2271 { "blendvps", {XM, EXx, XMM0 } },
2272 { "(bad)", { XX } },
2275 /* PREGRP41 */
2277 { "(bad)", { XX } },
2278 { "(bad)", { XX } },
2279 { "blendvpd", { XM, EXx, XMM0 } },
2280 { "(bad)", { XX } },
2283 /* PREGRP42 */
2285 { "(bad)", { XX } },
2286 { "(bad)", { XX } },
2287 { "ptest", { XM, EXx } },
2288 { "(bad)", { XX } },
2291 /* PREGRP43 */
2293 { "(bad)", { XX } },
2294 { "(bad)", { XX } },
2295 { "pmovsxbw", { XM, EXx } },
2296 { "(bad)", { XX } },
2299 /* PREGRP44 */
2301 { "(bad)", { XX } },
2302 { "(bad)", { XX } },
2303 { "pmovsxbd", { XM, EXx } },
2304 { "(bad)", { XX } },
2307 /* PREGRP45 */
2309 { "(bad)", { XX } },
2310 { "(bad)", { XX } },
2311 { "pmovsxbq", { XM, EXx } },
2312 { "(bad)", { XX } },
2315 /* PREGRP46 */
2317 { "(bad)", { XX } },
2318 { "(bad)", { XX } },
2319 { "pmovsxwd", { XM, EXx } },
2320 { "(bad)", { XX } },
2323 /* PREGRP47 */
2325 { "(bad)", { XX } },
2326 { "(bad)", { XX } },
2327 { "pmovsxwq", { XM, EXx } },
2328 { "(bad)", { XX } },
2331 /* PREGRP48 */
2333 { "(bad)", { XX } },
2334 { "(bad)", { XX } },
2335 { "pmovsxdq", { XM, EXx } },
2336 { "(bad)", { XX } },
2339 /* PREGRP49 */
2341 { "(bad)", { XX } },
2342 { "(bad)", { XX } },
2343 { "pmuldq", { XM, EXx } },
2344 { "(bad)", { XX } },
2347 /* PREGRP50 */
2349 { "(bad)", { XX } },
2350 { "(bad)", { XX } },
2351 { "pcmpeqq", { XM, EXx } },
2352 { "(bad)", { XX } },
2355 /* PREGRP51 */
2357 { "(bad)", { XX } },
2358 { "(bad)", { XX } },
2359 { "movntdqa", { XM, EM } },
2360 { "(bad)", { XX } },
2363 /* PREGRP52 */
2365 { "(bad)", { XX } },
2366 { "(bad)", { XX } },
2367 { "packusdw", { XM, EXx } },
2368 { "(bad)", { XX } },
2371 /* PREGRP53 */
2373 { "(bad)", { XX } },
2374 { "(bad)", { XX } },
2375 { "pmovzxbw", { XM, EXx } },
2376 { "(bad)", { XX } },
2379 /* PREGRP54 */
2381 { "(bad)", { XX } },
2382 { "(bad)", { XX } },
2383 { "pmovzxbd", { XM, EXx } },
2384 { "(bad)", { XX } },
2387 /* PREGRP55 */
2389 { "(bad)", { XX } },
2390 { "(bad)", { XX } },
2391 { "pmovzxbq", { XM, EXx } },
2392 { "(bad)", { XX } },
2395 /* PREGRP56 */
2397 { "(bad)", { XX } },
2398 { "(bad)", { XX } },
2399 { "pmovzxwd", { XM, EXx } },
2400 { "(bad)", { XX } },
2403 /* PREGRP57 */
2405 { "(bad)", { XX } },
2406 { "(bad)", { XX } },
2407 { "pmovzxwq", { XM, EXx } },
2408 { "(bad)", { XX } },
2411 /* PREGRP58 */
2413 { "(bad)", { XX } },
2414 { "(bad)", { XX } },
2415 { "pmovzxdq", { XM, EXx } },
2416 { "(bad)", { XX } },
2419 /* PREGRP59 */
2421 { "(bad)", { XX } },
2422 { "(bad)", { XX } },
2423 { "pminsb", { XM, EXx } },
2424 { "(bad)", { XX } },
2427 /* PREGRP60 */
2429 { "(bad)", { XX } },
2430 { "(bad)", { XX } },
2431 { "pminsd", { XM, EXx } },
2432 { "(bad)", { XX } },
2435 /* PREGRP61 */
2437 { "(bad)", { XX } },
2438 { "(bad)", { XX } },
2439 { "pminuw", { XM, EXx } },
2440 { "(bad)", { XX } },
2443 /* PREGRP62 */
2445 { "(bad)", { XX } },
2446 { "(bad)", { XX } },
2447 { "pminud", { XM, EXx } },
2448 { "(bad)", { XX } },
2451 /* PREGRP63 */
2453 { "(bad)", { XX } },
2454 { "(bad)", { XX } },
2455 { "pmaxsb", { XM, EXx } },
2456 { "(bad)", { XX } },
2459 /* PREGRP64 */
2461 { "(bad)", { XX } },
2462 { "(bad)", { XX } },
2463 { "pmaxsd", { XM, EXx } },
2464 { "(bad)", { XX } },
2467 /* PREGRP65 */
2469 { "(bad)", { XX } },
2470 { "(bad)", { XX } },
2471 { "pmaxuw", { XM, EXx } },
2472 { "(bad)", { XX } },
2475 /* PREGRP66 */
2477 { "(bad)", { XX } },
2478 { "(bad)", { XX } },
2479 { "pmaxud", { XM, EXx } },
2480 { "(bad)", { XX } },
2483 /* PREGRP67 */
2485 { "(bad)", { XX } },
2486 { "(bad)", { XX } },
2487 { "pmulld", { XM, EXx } },
2488 { "(bad)", { XX } },
2491 /* PREGRP68 */
2493 { "(bad)", { XX } },
2494 { "(bad)", { XX } },
2495 { "phminposuw", { XM, EXx } },
2496 { "(bad)", { XX } },
2499 /* PREGRP69 */
2501 { "(bad)", { XX } },
2502 { "(bad)", { XX } },
2503 { "roundps", { XM, EXx, Ib } },
2504 { "(bad)", { XX } },
2507 /* PREGRP70 */
2509 { "(bad)", { XX } },
2510 { "(bad)", { XX } },
2511 { "roundpd", { XM, EXx, Ib } },
2512 { "(bad)", { XX } },
2515 /* PREGRP71 */
2517 { "(bad)", { XX } },
2518 { "(bad)", { XX } },
2519 { "roundss", { XM, EXx, Ib } },
2520 { "(bad)", { XX } },
2523 /* PREGRP72 */
2525 { "(bad)", { XX } },
2526 { "(bad)", { XX } },
2527 { "roundsd", { XM, EXx, Ib } },
2528 { "(bad)", { XX } },
2531 /* PREGRP73 */
2533 { "(bad)", { XX } },
2534 { "(bad)", { XX } },
2535 { "blendps", { XM, EXx, Ib } },
2536 { "(bad)", { XX } },
2539 /* PREGRP74 */
2541 { "(bad)", { XX } },
2542 { "(bad)", { XX } },
2543 { "blendpd", { XM, EXx, Ib } },
2544 { "(bad)", { XX } },
2547 /* PREGRP75 */
2549 { "(bad)", { XX } },
2550 { "(bad)", { XX } },
2551 { "pblendw", { XM, EXx, Ib } },
2552 { "(bad)", { XX } },
2555 /* PREGRP76 */
2557 { "(bad)", { XX } },
2558 { "(bad)", { XX } },
2559 { "pextrb", { Edqb, XM, Ib } },
2560 { "(bad)", { XX } },
2563 /* PREGRP77 */
2565 { "(bad)", { XX } },
2566 { "(bad)", { XX } },
2567 { "pextrw", { Edqw, XM, Ib } },
2568 { "(bad)", { XX } },
2571 /* PREGRP78 */
2573 { "(bad)", { XX } },
2574 { "(bad)", { XX } },
2575 { "pextrK", { Edq, XM, Ib } },
2576 { "(bad)", { XX } },
2579 /* PREGRP79 */
2581 { "(bad)", { XX } },
2582 { "(bad)", { XX } },
2583 { "extractps", { Edqd, XM, Ib } },
2584 { "(bad)", { XX } },
2587 /* PREGRP80 */
2589 { "(bad)", { XX } },
2590 { "(bad)", { XX } },
2591 { "pinsrb", { XM, Edqb, Ib } },
2592 { "(bad)", { XX } },
2595 /* PREGRP81 */
2597 { "(bad)", { XX } },
2598 { "(bad)", { XX } },
2599 { "insertps", { XM, EXx, Ib } },
2600 { "(bad)", { XX } },
2603 /* PREGRP82 */
2605 { "(bad)", { XX } },
2606 { "(bad)", { XX } },
2607 { "pinsrK", { XM, Edq, Ib } },
2608 { "(bad)", { XX } },
2611 /* PREGRP83 */
2613 { "(bad)", { XX } },
2614 { "(bad)", { XX } },
2615 { "dpps", { XM, EXx, Ib } },
2616 { "(bad)", { XX } },
2619 /* PREGRP84 */
2621 { "(bad)", { XX } },
2622 { "(bad)", { XX } },
2623 { "dppd", { XM, EXx, Ib } },
2624 { "(bad)", { XX } },
2627 /* PREGRP85 */
2629 { "(bad)", { XX } },
2630 { "(bad)", { XX } },
2631 { "mpsadbw", { XM, EXx, Ib } },
2632 { "(bad)", { XX } },
2635 /* PREGRP86 */
2637 { "(bad)", { XX } },
2638 { "(bad)", { XX } },
2639 { "pcmpgtq", { XM, EXx } },
2640 { "(bad)", { XX } },
2643 /* PREGRP87 */
2645 { "movbe", { Gv, Ev } },
2646 { "(bad)", { XX } },
2647 { "movbe", { Gv, Ev } },
2648 { "crc32", { Gdq, { CRC32_Fixup, b_mode } } },
2651 /* PREGRP88 */
2653 { "movbe", { Ev, Gv } },
2654 { "(bad)", { XX } },
2655 { "movbe", { Ev, Gv } },
2656 { "crc32", { Gdq, { CRC32_Fixup, v_mode } } },
2659 /* PREGRP89 */
2661 { "(bad)", { XX } },
2662 { "(bad)", { XX } },
2663 { "pcmpestrm", { XM, EXx, Ib } },
2664 { "(bad)", { XX } },
2667 /* PREGRP90 */
2669 { "(bad)", { XX } },
2670 { "(bad)", { XX } },
2671 { "pcmpestri", { XM, EXx, Ib } },
2672 { "(bad)", { XX } },
2675 /* PREGRP91 */
2677 { "(bad)", { XX } },
2678 { "(bad)", { XX } },
2679 { "pcmpistrm", { XM, EXx, Ib } },
2680 { "(bad)", { XX } },
2683 /* PREGRP92 */
2685 { "(bad)", { XX } },
2686 { "(bad)", { XX } },
2687 { "pcmpistri", { XM, EXx, Ib } },
2688 { "(bad)", { XX } },
2691 /* PREGRP93 */
2693 { "ucomiss",{ XM, EXd } },
2694 { "(bad)", { XX } },
2695 { "ucomisd",{ XM, EXq } },
2696 { "(bad)", { XX } },
2699 /* PREGRP94 */
2701 { "comiss", { XM, EXd } },
2702 { "(bad)", { XX } },
2703 { "comisd", { XM, EXq } },
2704 { "(bad)", { XX } },
2707 /* PREGRP95 */
2709 { "punpcklbw",{ MX, EMd } },
2710 { "(bad)", { XX } },
2711 { "punpcklbw",{ MX, EMq } },
2712 { "(bad)", { XX } },
2715 /* PREGRP96 */
2717 { "punpcklwd",{ MX, EMd } },
2718 { "(bad)", { XX } },
2719 { "punpcklwd",{ MX, EMq } },
2720 { "(bad)", { XX } },
2723 /* PREGRP97 */
2725 { "punpckldq",{ MX, EMd } },
2726 { "(bad)", { XX } },
2727 { "punpckldq",{ MX, EMq } },
2728 { "(bad)", { XX } },
2731 /* PREGRP98 */
2733 { "(bad)", { XX } },
2734 { "(bad)", { XX } },
2735 { "pclmulqdq", { XM, EXx, Ib } },
2736 { "(bad)", { XX } },
2739 /* PREGRP99 */
2741 { "(bad)", { XX } },
2742 { "(bad)", { XX } },
2743 { "aesimc", { XM, EXx } },
2744 { "(bad)", { XX } },
2747 /* PREGRP100 */
2749 { "(bad)", { XX } },
2750 { "(bad)", { XX } },
2751 { "aesenc", { XM, EXx } },
2752 { "(bad)", { XX } },
2755 /* PREGRP101 */
2757 { "(bad)", { XX } },
2758 { "(bad)", { XX } },
2759 { "aesenclast", { XM, EXx } },
2760 { "(bad)", { XX } },
2763 /* PREGRP102 */
2765 { "(bad)", { XX } },
2766 { "(bad)", { XX } },
2767 { "aesdec", { XM, EXx } },
2768 { "(bad)", { XX } },
2771 /* PREGRP103 */
2773 { "(bad)", { XX } },
2774 { "(bad)", { XX } },
2775 { "aesdeclast", { XM, EXx } },
2776 { "(bad)", { XX } },
2779 /* PREGRP104 */
2781 { "(bad)", { XX } },
2782 { "(bad)", { XX } },
2783 { "aeskeygenassist", { XM, EXx, Ib } },
2784 { "(bad)", { XX } },
2787 /* PREGRP105 */
2789 { "andnS", { Gv, Bv, Ev } },
2790 { "(bad)", { XX } },
2791 { "(bad)", { XX } },
2792 { "(bad)", { XX } },
2795 /* PREGRP106 */
2797 { "bextrS", { Gv, Ev, Bv } },
2798 { "sarxS", { Gv, Ev, Bv } },
2799 { "shlxS", { Gv, Ev, Bv } },
2800 { "shrxS", { Gv, Ev, Bv } },
2805 static const struct dis386 x86_64_table[][2] = {
2807 { "pusha{P|}", { XX } },
2808 { "(bad)", { XX } },
2811 { "popa{P|}", { XX } },
2812 { "(bad)", { XX } },
2815 { "bound{S|}", { Gv, Ma } },
2816 { "(bad)", { XX } },
2819 { "arpl", { Ew, Gw } },
2820 { "movs{||lq|xd}", { Gv, Ed } },
2824 static const struct dis386 three_byte_table[][256] = {
2825 /* THREE_BYTE_0 */
2827 /* 00 */
2828 { "pshufb", { MX, EM } },
2829 { "phaddw", { MX, EM } },
2830 { "phaddd", { MX, EM } },
2831 { "phaddsw", { MX, EM } },
2832 { "pmaddubsw", { MX, EM } },
2833 { "phsubw", { MX, EM } },
2834 { "phsubd", { MX, EM } },
2835 { "phsubsw", { MX, EM } },
2836 /* 08 */
2837 { "psignb", { MX, EM } },
2838 { "psignw", { MX, EM } },
2839 { "psignd", { MX, EM } },
2840 { "pmulhrsw", { MX, EM } },
2841 { "(bad)", { XX } },
2842 { "(bad)", { XX } },
2843 { "(bad)", { XX } },
2844 { "(bad)", { XX } },
2845 /* 10 */
2846 { PREGRP39 },
2847 { "(bad)", { XX } },
2848 { "(bad)", { XX } },
2849 { "(bad)", { XX } },
2850 { PREGRP40 },
2851 { PREGRP41 },
2852 { "(bad)", { XX } },
2853 { PREGRP42 },
2854 /* 18 */
2855 { "(bad)", { XX } },
2856 { "(bad)", { XX } },
2857 { "(bad)", { XX } },
2858 { "(bad)", { XX } },
2859 { "pabsb", { MX, EM } },
2860 { "pabsw", { MX, EM } },
2861 { "pabsd", { MX, EM } },
2862 { "(bad)", { XX } },
2863 /* 20 */
2864 { PREGRP43 },
2865 { PREGRP44 },
2866 { PREGRP45 },
2867 { PREGRP46 },
2868 { PREGRP47 },
2869 { PREGRP48 },
2870 { "(bad)", { XX } },
2871 { "(bad)", { XX } },
2872 /* 28 */
2873 { PREGRP49 },
2874 { PREGRP50 },
2875 { PREGRP51 },
2876 { PREGRP52 },
2877 { "(bad)", { XX } },
2878 { "(bad)", { XX } },
2879 { "(bad)", { XX } },
2880 { "(bad)", { XX } },
2881 /* 30 */
2882 { PREGRP53 },
2883 { PREGRP54 },
2884 { PREGRP55 },
2885 { PREGRP56 },
2886 { PREGRP57 },
2887 { PREGRP58 },
2888 { "(bad)", { XX } },
2889 { PREGRP86 },
2890 /* 38 */
2891 { PREGRP59 },
2892 { PREGRP60 },
2893 { PREGRP61 },
2894 { PREGRP62 },
2895 { PREGRP63 },
2896 { PREGRP64 },
2897 { PREGRP65 },
2898 { PREGRP66 },
2899 /* 40 */
2900 { PREGRP67 },
2901 { PREGRP68 },
2902 { "(bad)", { XX } },
2903 { "(bad)", { XX } },
2904 { "(bad)", { XX } },
2905 { "(bad)", { XX } },
2906 { "(bad)", { XX } },
2907 { "(bad)", { XX } },
2908 /* 48 */
2909 { "(bad)", { XX } },
2910 { "(bad)", { XX } },
2911 { "(bad)", { XX } },
2912 { "(bad)", { XX } },
2913 { "(bad)", { XX } },
2914 { "(bad)", { XX } },
2915 { "(bad)", { XX } },
2916 { "(bad)", { XX } },
2917 /* 50 */
2918 { "(bad)", { XX } },
2919 { "(bad)", { XX } },
2920 { "(bad)", { XX } },
2921 { "(bad)", { XX } },
2922 { "(bad)", { XX } },
2923 { "(bad)", { XX } },
2924 { "(bad)", { XX } },
2925 { "(bad)", { XX } },
2926 /* 58 */
2927 { "(bad)", { XX } },
2928 { "(bad)", { XX } },
2929 { "(bad)", { XX } },
2930 { "(bad)", { XX } },
2931 { "(bad)", { XX } },
2932 { "(bad)", { XX } },
2933 { "(bad)", { XX } },
2934 { "(bad)", { XX } },
2935 /* 60 */
2936 { "(bad)", { XX } },
2937 { "(bad)", { XX } },
2938 { "(bad)", { XX } },
2939 { "(bad)", { XX } },
2940 { "(bad)", { XX } },
2941 { "(bad)", { XX } },
2942 { "(bad)", { XX } },
2943 { "(bad)", { XX } },
2944 /* 68 */
2945 { "(bad)", { XX } },
2946 { "(bad)", { XX } },
2947 { "(bad)", { XX } },
2948 { "(bad)", { XX } },
2949 { "(bad)", { XX } },
2950 { "(bad)", { XX } },
2951 { "(bad)", { XX } },
2952 { "(bad)", { XX } },
2953 /* 70 */
2954 { "(bad)", { XX } },
2955 { "(bad)", { XX } },
2956 { "(bad)", { XX } },
2957 { "(bad)", { XX } },
2958 { "(bad)", { XX } },
2959 { "(bad)", { XX } },
2960 { "(bad)", { XX } },
2961 { "(bad)", { XX } },
2962 /* 78 */
2963 { "(bad)", { XX } },
2964 { "(bad)", { XX } },
2965 { "(bad)", { XX } },
2966 { "(bad)", { XX } },
2967 { "(bad)", { XX } },
2968 { "(bad)", { XX } },
2969 { "(bad)", { XX } },
2970 { "(bad)", { XX } },
2971 /* 80 */
2972 { "(bad)", { XX } },
2973 { "(bad)", { XX } },
2974 { "(bad)", { XX } },
2975 { "(bad)", { XX } },
2976 { "(bad)", { XX } },
2977 { "(bad)", { XX } },
2978 { "(bad)", { XX } },
2979 { "(bad)", { XX } },
2980 /* 88 */
2981 { "(bad)", { XX } },
2982 { "(bad)", { XX } },
2983 { "(bad)", { XX } },
2984 { "(bad)", { XX } },
2985 { "(bad)", { XX } },
2986 { "(bad)", { XX } },
2987 { "(bad)", { XX } },
2988 { "(bad)", { XX } },
2989 /* 90 */
2990 { "(bad)", { XX } },
2991 { "(bad)", { XX } },
2992 { "(bad)", { XX } },
2993 { "(bad)", { XX } },
2994 { "(bad)", { XX } },
2995 { "(bad)", { XX } },
2996 { "(bad)", { XX } },
2997 { "(bad)", { XX } },
2998 /* 98 */
2999 { "(bad)", { XX } },
3000 { "(bad)", { XX } },
3001 { "(bad)", { XX } },
3002 { "(bad)", { XX } },
3003 { "(bad)", { XX } },
3004 { "(bad)", { XX } },
3005 { "(bad)", { XX } },
3006 { "(bad)", { XX } },
3007 /* a0 */
3008 { "(bad)", { XX } },
3009 { "(bad)", { XX } },
3010 { "(bad)", { XX } },
3011 { "(bad)", { XX } },
3012 { "(bad)", { XX } },
3013 { "(bad)", { XX } },
3014 { "(bad)", { XX } },
3015 { "(bad)", { XX } },
3016 /* a8 */
3017 { "(bad)", { XX } },
3018 { "(bad)", { XX } },
3019 { "(bad)", { XX } },
3020 { "(bad)", { XX } },
3021 { "(bad)", { XX } },
3022 { "(bad)", { XX } },
3023 { "(bad)", { XX } },
3024 { "(bad)", { XX } },
3025 /* b0 */
3026 { "(bad)", { XX } },
3027 { "(bad)", { XX } },
3028 { "(bad)", { XX } },
3029 { "(bad)", { XX } },
3030 { "(bad)", { XX } },
3031 { "(bad)", { XX } },
3032 { "(bad)", { XX } },
3033 { "(bad)", { XX } },
3034 /* b8 */
3035 { "(bad)", { XX } },
3036 { "(bad)", { XX } },
3037 { "(bad)", { XX } },
3038 { "(bad)", { XX } },
3039 { "(bad)", { XX } },
3040 { "(bad)", { XX } },
3041 { "(bad)", { XX } },
3042 { "(bad)", { XX } },
3043 /* c0 */
3044 { "(bad)", { XX } },
3045 { "(bad)", { XX } },
3046 { "(bad)", { XX } },
3047 { "(bad)", { XX } },
3048 { "(bad)", { XX } },
3049 { "(bad)", { XX } },
3050 { "(bad)", { XX } },
3051 { "(bad)", { XX } },
3052 /* c8 */
3053 { "(bad)", { XX } },
3054 { "(bad)", { XX } },
3055 { "(bad)", { XX } },
3056 { "(bad)", { XX } },
3057 { "(bad)", { XX } },
3058 { "(bad)", { XX } },
3059 { "(bad)", { XX } },
3060 { "(bad)", { XX } },
3061 /* d0 */
3062 { "(bad)", { XX } },
3063 { "(bad)", { XX } },
3064 { "(bad)", { XX } },
3065 { "(bad)", { XX } },
3066 { "(bad)", { XX } },
3067 { "(bad)", { XX } },
3068 { "(bad)", { XX } },
3069 { "(bad)", { XX } },
3070 /* d8 */
3071 { "(bad)", { XX } },
3072 { "(bad)", { XX } },
3073 { "(bad)", { XX } },
3074 { PREGRP99 },
3075 { PREGRP100 },
3076 { PREGRP101 },
3077 { PREGRP102 },
3078 { PREGRP103 },
3079 /* e0 */
3080 { "(bad)", { XX } },
3081 { "(bad)", { XX } },
3082 { "(bad)", { XX } },
3083 { "(bad)", { XX } },
3084 { "(bad)", { XX } },
3085 { "(bad)", { XX } },
3086 { "(bad)", { XX } },
3087 { "(bad)", { XX } },
3088 /* e8 */
3089 { "(bad)", { XX } },
3090 { "(bad)", { XX } },
3091 { "(bad)", { XX } },
3092 { "(bad)", { XX } },
3093 { "(bad)", { XX } },
3094 { "(bad)", { XX } },
3095 { "(bad)", { XX } },
3096 { "(bad)", { XX } },
3097 /* f0 */
3098 { PREGRP87 },
3099 { PREGRP88 },
3100 { PREGRP105 },
3101 { "(bad)", { XX } },
3102 { "(bad)", { XX } },
3103 { "(bad)", { XX } },
3104 { "(bad)", { XX } },
3105 { PREGRP106 },
3106 /* f8 */
3107 { "(bad)", { XX } },
3108 { "(bad)", { XX } },
3109 { "(bad)", { XX } },
3110 { "(bad)", { XX } },
3111 { "(bad)", { XX } },
3112 { "(bad)", { XX } },
3113 { "(bad)", { XX } },
3114 { "(bad)", { XX } },
3116 /* THREE_BYTE_1 */
3118 /* 00 */
3119 { "(bad)", { XX } },
3120 { "(bad)", { XX } },
3121 { "(bad)", { XX } },
3122 { "(bad)", { XX } },
3123 { "(bad)", { XX } },
3124 { "(bad)", { XX } },
3125 { "(bad)", { XX } },
3126 { "(bad)", { XX } },
3127 /* 08 */
3128 { PREGRP69 },
3129 { PREGRP70 },
3130 { PREGRP71 },
3131 { PREGRP72 },
3132 { PREGRP73 },
3133 { PREGRP74 },
3134 { PREGRP75 },
3135 { "palignr", { MX, EM, Ib } },
3136 /* 10 */
3137 { "(bad)", { XX } },
3138 { "(bad)", { XX } },
3139 { "(bad)", { XX } },
3140 { "(bad)", { XX } },
3141 { PREGRP76 },
3142 { PREGRP77 },
3143 { PREGRP78 },
3144 { PREGRP79 },
3145 /* 18 */
3146 { "(bad)", { XX } },
3147 { "(bad)", { XX } },
3148 { "(bad)", { XX } },
3149 { "(bad)", { XX } },
3150 { "(bad)", { XX } },
3151 { "(bad)", { XX } },
3152 { "(bad)", { XX } },
3153 { "(bad)", { XX } },
3154 /* 20 */
3155 { PREGRP80 },
3156 { PREGRP81 },
3157 { PREGRP82 },
3158 { "(bad)", { XX } },
3159 { "(bad)", { XX } },
3160 { "(bad)", { XX } },
3161 { "(bad)", { XX } },
3162 { "(bad)", { XX } },
3163 /* 28 */
3164 { "(bad)", { XX } },
3165 { "(bad)", { XX } },
3166 { "(bad)", { XX } },
3167 { "(bad)", { XX } },
3168 { "(bad)", { XX } },
3169 { "(bad)", { XX } },
3170 { "(bad)", { XX } },
3171 { "(bad)", { XX } },
3172 /* 30 */
3173 { "(bad)", { XX } },
3174 { "(bad)", { XX } },
3175 { "(bad)", { XX } },
3176 { "(bad)", { XX } },
3177 { "(bad)", { XX } },
3178 { "(bad)", { XX } },
3179 { "(bad)", { XX } },
3180 { "(bad)", { XX } },
3181 /* 38 */
3182 { "(bad)", { XX } },
3183 { "(bad)", { XX } },
3184 { "(bad)", { XX } },
3185 { "(bad)", { XX } },
3186 { "(bad)", { XX } },
3187 { "(bad)", { XX } },
3188 { "(bad)", { XX } },
3189 { "(bad)", { XX } },
3190 /* 40 */
3191 { PREGRP83 },
3192 { PREGRP84 },
3193 { PREGRP85 },
3194 { "(bad)", { XX } },
3195 { PREGRP98 },
3196 { "(bad)", { XX } },
3197 { "(bad)", { XX } },
3198 { "(bad)", { XX } },
3199 /* 48 */
3200 { "(bad)", { XX } },
3201 { "(bad)", { XX } },
3202 { "(bad)", { XX } },
3203 { "(bad)", { XX } },
3204 { "(bad)", { XX } },
3205 { "(bad)", { XX } },
3206 { "(bad)", { XX } },
3207 { "(bad)", { XX } },
3208 /* 50 */
3209 { "(bad)", { XX } },
3210 { "(bad)", { XX } },
3211 { "(bad)", { XX } },
3212 { "(bad)", { XX } },
3213 { "(bad)", { XX } },
3214 { "(bad)", { XX } },
3215 { "(bad)", { XX } },
3216 { "(bad)", { XX } },
3217 /* 58 */
3218 { "(bad)", { XX } },
3219 { "(bad)", { XX } },
3220 { "(bad)", { XX } },
3221 { "(bad)", { XX } },
3222 { "(bad)", { XX } },
3223 { "(bad)", { XX } },
3224 { "(bad)", { XX } },
3225 { "(bad)", { XX } },
3226 /* 60 */
3227 { PREGRP89 },
3228 { PREGRP90 },
3229 { PREGRP91 },
3230 { PREGRP92 },
3231 { "(bad)", { XX } },
3232 { "(bad)", { XX } },
3233 { "(bad)", { XX } },
3234 { "(bad)", { XX } },
3235 /* 68 */
3236 { "(bad)", { XX } },
3237 { "(bad)", { XX } },
3238 { "(bad)", { XX } },
3239 { "(bad)", { XX } },
3240 { "(bad)", { XX } },
3241 { "(bad)", { XX } },
3242 { "(bad)", { XX } },
3243 { "(bad)", { XX } },
3244 /* 70 */
3245 { "(bad)", { XX } },
3246 { "(bad)", { XX } },
3247 { "(bad)", { XX } },
3248 { "(bad)", { XX } },
3249 { "(bad)", { XX } },
3250 { "(bad)", { XX } },
3251 { "(bad)", { XX } },
3252 { "(bad)", { XX } },
3253 /* 78 */
3254 { "(bad)", { XX } },
3255 { "(bad)", { XX } },
3256 { "(bad)", { XX } },
3257 { "(bad)", { XX } },
3258 { "(bad)", { XX } },
3259 { "(bad)", { XX } },
3260 { "(bad)", { XX } },
3261 { "(bad)", { XX } },
3262 /* 80 */
3263 { "(bad)", { XX } },
3264 { "(bad)", { XX } },
3265 { "(bad)", { XX } },
3266 { "(bad)", { XX } },
3267 { "(bad)", { XX } },
3268 { "(bad)", { XX } },
3269 { "(bad)", { XX } },
3270 { "(bad)", { XX } },
3271 /* 88 */
3272 { "(bad)", { XX } },
3273 { "(bad)", { XX } },
3274 { "(bad)", { XX } },
3275 { "(bad)", { XX } },
3276 { "(bad)", { XX } },
3277 { "(bad)", { XX } },
3278 { "(bad)", { XX } },
3279 { "(bad)", { XX } },
3280 /* 90 */
3281 { "(bad)", { XX } },
3282 { "(bad)", { XX } },
3283 { "(bad)", { XX } },
3284 { "(bad)", { XX } },
3285 { "(bad)", { XX } },
3286 { "(bad)", { XX } },
3287 { "(bad)", { XX } },
3288 { "(bad)", { XX } },
3289 /* 98 */
3290 { "(bad)", { XX } },
3291 { "(bad)", { XX } },
3292 { "(bad)", { XX } },
3293 { "(bad)", { XX } },
3294 { "(bad)", { XX } },
3295 { "(bad)", { XX } },
3296 { "(bad)", { XX } },
3297 { "(bad)", { XX } },
3298 /* a0 */
3299 { "(bad)", { XX } },
3300 { "(bad)", { XX } },
3301 { "(bad)", { XX } },
3302 { "(bad)", { XX } },
3303 { "(bad)", { XX } },
3304 { "(bad)", { XX } },
3305 { "(bad)", { XX } },
3306 { "(bad)", { XX } },
3307 /* a8 */
3308 { "(bad)", { XX } },
3309 { "(bad)", { XX } },
3310 { "(bad)", { XX } },
3311 { "(bad)", { XX } },
3312 { "(bad)", { XX } },
3313 { "(bad)", { XX } },
3314 { "(bad)", { XX } },
3315 { "(bad)", { XX } },
3316 /* b0 */
3317 { "(bad)", { XX } },
3318 { "(bad)", { XX } },
3319 { "(bad)", { XX } },
3320 { "(bad)", { XX } },
3321 { "(bad)", { XX } },
3322 { "(bad)", { XX } },
3323 { "(bad)", { XX } },
3324 { "(bad)", { XX } },
3325 /* b8 */
3326 { "(bad)", { XX } },
3327 { "(bad)", { XX } },
3328 { "(bad)", { XX } },
3329 { "(bad)", { XX } },
3330 { "(bad)", { XX } },
3331 { "(bad)", { XX } },
3332 { "(bad)", { XX } },
3333 { "(bad)", { XX } },
3334 /* c0 */
3335 { "(bad)", { XX } },
3336 { "(bad)", { XX } },
3337 { "(bad)", { XX } },
3338 { "(bad)", { XX } },
3339 { "(bad)", { XX } },
3340 { "(bad)", { XX } },
3341 { "(bad)", { XX } },
3342 { "(bad)", { XX } },
3343 /* c8 */
3344 { "(bad)", { XX } },
3345 { "(bad)", { XX } },
3346 { "(bad)", { XX } },
3347 { "(bad)", { XX } },
3348 { "(bad)", { XX } },
3349 { "(bad)", { XX } },
3350 { "(bad)", { XX } },
3351 { "(bad)", { XX } },
3352 /* d0 */
3353 { "(bad)", { XX } },
3354 { "(bad)", { XX } },
3355 { "(bad)", { XX } },
3356 { "(bad)", { XX } },
3357 { "(bad)", { XX } },
3358 { "(bad)", { XX } },
3359 { "(bad)", { XX } },
3360 { "(bad)", { XX } },
3361 /* d8 */
3362 { "(bad)", { XX } },
3363 { "(bad)", { XX } },
3364 { "(bad)", { XX } },
3365 { "(bad)", { XX } },
3366 { "(bad)", { XX } },
3367 { "(bad)", { XX } },
3368 { "(bad)", { XX } },
3369 { PREGRP104 },
3370 /* e0 */
3371 { "(bad)", { XX } },
3372 { "(bad)", { XX } },
3373 { "(bad)", { XX } },
3374 { "(bad)", { XX } },
3375 { "(bad)", { XX } },
3376 { "(bad)", { XX } },
3377 { "(bad)", { XX } },
3378 { "(bad)", { XX } },
3379 /* e8 */
3380 { "(bad)", { XX } },
3381 { "(bad)", { XX } },
3382 { "(bad)", { XX } },
3383 { "(bad)", { XX } },
3384 { "(bad)", { XX } },
3385 { "(bad)", { XX } },
3386 { "(bad)", { XX } },
3387 { "(bad)", { XX } },
3388 /* f0 */
3389 { "(bad)", { XX } },
3390 { "(bad)", { XX } },
3391 { "(bad)", { XX } },
3392 { "(bad)", { XX } },
3393 { "(bad)", { XX } },
3394 { "(bad)", { XX } },
3395 { "(bad)", { XX } },
3396 { "(bad)", { XX } },
3397 /* f8 */
3398 { "(bad)", { XX } },
3399 { "(bad)", { XX } },
3400 { "(bad)", { XX } },
3401 { "(bad)", { XX } },
3402 { "(bad)", { XX } },
3403 { "(bad)", { XX } },
3404 { "(bad)", { XX } },
3405 { "(bad)", { XX } },
3409 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
3411 static void
3412 ckprefix (void)
3414 int newrex;
3415 rex = 0;
3416 prefixes = 0;
3417 used_prefixes = 0;
3418 rex_used = 0;
3419 while (1)
3421 fetch_data(the_info, codep + 1);
3422 newrex = 0;
3423 switch (*codep)
3425 /* REX prefixes family. */
3426 case 0x40:
3427 case 0x41:
3428 case 0x42:
3429 case 0x43:
3430 case 0x44:
3431 case 0x45:
3432 case 0x46:
3433 case 0x47:
3434 case 0x48:
3435 case 0x49:
3436 case 0x4a:
3437 case 0x4b:
3438 case 0x4c:
3439 case 0x4d:
3440 case 0x4e:
3441 case 0x4f:
3442 if (address_mode == mode_64bit)
3443 newrex = *codep;
3444 else
3445 return;
3446 break;
3447 case 0xf3:
3448 prefixes |= PREFIX_REPZ;
3449 break;
3450 case 0xf2:
3451 prefixes |= PREFIX_REPNZ;
3452 break;
3453 case 0xf0:
3454 prefixes |= PREFIX_LOCK;
3455 break;
3456 case 0x2e:
3457 prefixes |= PREFIX_CS;
3458 break;
3459 case 0x36:
3460 prefixes |= PREFIX_SS;
3461 break;
3462 case 0x3e:
3463 prefixes |= PREFIX_DS;
3464 break;
3465 case 0x26:
3466 prefixes |= PREFIX_ES;
3467 break;
3468 case 0x64:
3469 prefixes |= PREFIX_FS;
3470 break;
3471 case 0x65:
3472 prefixes |= PREFIX_GS;
3473 break;
3474 case 0x66:
3475 prefixes |= PREFIX_DATA;
3476 break;
3477 case 0x67:
3478 prefixes |= PREFIX_ADDR;
3479 break;
3480 case FWAIT_OPCODE:
3481 /* fwait is really an instruction. If there are prefixes
3482 before the fwait, they belong to the fwait, *not* to the
3483 following instruction. */
3484 if (prefixes || rex)
3486 prefixes |= PREFIX_FWAIT;
3487 codep++;
3488 return;
3490 prefixes = PREFIX_FWAIT;
3491 break;
3492 default:
3493 return;
3495 /* Rex is ignored when followed by another prefix. */
3496 if (rex)
3498 rex_used = rex;
3499 return;
3501 rex = newrex;
3502 codep++;
3506 static void
3507 ckvexprefix (void)
3509 int op, vex2, vex3, newrex = 0, newpfx = prefixes;
3511 if (address_mode == mode_16bit) {
3512 return;
3515 fetch_data(the_info, codep + 1);
3516 op = *codep;
3518 if (op != 0xc4 && op != 0xc5) {
3519 return;
3522 fetch_data(the_info, codep + 2);
3523 vex2 = codep[1];
3525 if (address_mode == mode_32bit && (vex2 & 0xc0) != 0xc0) {
3526 return;
3529 if (op == 0xc4) {
3530 /* Three byte VEX prefix. */
3531 fetch_data(the_info, codep + 3);
3532 vex3 = codep[2];
3534 newrex |= (vex2 & 0x80 ? 0 : REX_R);
3535 newrex |= (vex2 & 0x40 ? 0 : REX_X);
3536 newrex |= (vex2 & 0x20 ? 0 : REX_B);
3537 newrex |= (vex3 & 0x80 ? REX_W : 0);
3538 switch (vex2 & 0x1f) { /* VEX.m-mmmm */
3539 case 1:
3540 newpfx |= PREFIX_VEX_0F;
3541 break;
3542 case 2:
3543 newpfx |= PREFIX_VEX_0F | PREFIX_VEX_0F38;
3544 break;
3545 case 3:
3546 newpfx |= PREFIX_VEX_0F | PREFIX_VEX_0F3A;
3547 break;
3549 vex2 = vex3;
3550 codep += 3;
3551 } else {
3552 /* Two byte VEX prefix. */
3553 newrex |= (vex2 & 0x80 ? 0 : REX_R);
3554 codep += 2;
3557 vex_reg = (~vex2 >> 3) & 15; /* VEX.vvvv */
3558 switch (vex2 & 3) { /* VEX.pp */
3559 case 1:
3560 newpfx |= PREFIX_DATA; /* 0x66 */
3561 break;
3562 case 2:
3563 newpfx |= PREFIX_REPZ; /* 0xf3 */
3564 break;
3565 case 3:
3566 newpfx |= PREFIX_REPNZ; /* 0xf2 */
3567 break;
3570 rex = newrex;
3571 prefixes = newpfx;
3574 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
3575 prefix byte. */
3577 static const char *
3578 prefix_name (int pref, int sizeflag)
3580 static const char * const rexes [16] =
3582 "rex", /* 0x40 */
3583 "rex.B", /* 0x41 */
3584 "rex.X", /* 0x42 */
3585 "rex.XB", /* 0x43 */
3586 "rex.R", /* 0x44 */
3587 "rex.RB", /* 0x45 */
3588 "rex.RX", /* 0x46 */
3589 "rex.RXB", /* 0x47 */
3590 "rex.W", /* 0x48 */
3591 "rex.WB", /* 0x49 */
3592 "rex.WX", /* 0x4a */
3593 "rex.WXB", /* 0x4b */
3594 "rex.WR", /* 0x4c */
3595 "rex.WRB", /* 0x4d */
3596 "rex.WRX", /* 0x4e */
3597 "rex.WRXB", /* 0x4f */
3600 switch (pref)
3602 /* REX prefixes family. */
3603 case 0x40:
3604 case 0x41:
3605 case 0x42:
3606 case 0x43:
3607 case 0x44:
3608 case 0x45:
3609 case 0x46:
3610 case 0x47:
3611 case 0x48:
3612 case 0x49:
3613 case 0x4a:
3614 case 0x4b:
3615 case 0x4c:
3616 case 0x4d:
3617 case 0x4e:
3618 case 0x4f:
3619 return rexes [pref - 0x40];
3620 case 0xf3:
3621 return "repz";
3622 case 0xf2:
3623 return "repnz";
3624 case 0xf0:
3625 return "lock";
3626 case 0x2e:
3627 return "cs";
3628 case 0x36:
3629 return "ss";
3630 case 0x3e:
3631 return "ds";
3632 case 0x26:
3633 return "es";
3634 case 0x64:
3635 return "fs";
3636 case 0x65:
3637 return "gs";
3638 case 0x66:
3639 return (sizeflag & DFLAG) ? "data16" : "data32";
3640 case 0x67:
3641 if (address_mode == mode_64bit)
3642 return (sizeflag & AFLAG) ? "addr32" : "addr64";
3643 else
3644 return (sizeflag & AFLAG) ? "addr16" : "addr32";
3645 case FWAIT_OPCODE:
3646 return "fwait";
3647 default:
3648 return NULL;
3652 static char op_out[MAX_OPERANDS][100];
3653 static int op_ad, op_index[MAX_OPERANDS];
3654 static int two_source_ops;
3655 static bfd_vma op_address[MAX_OPERANDS];
3656 static bfd_vma op_riprel[MAX_OPERANDS];
3657 static bfd_vma start_pc;
3660 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
3661 * (see topic "Redundant prefixes" in the "Differences from 8086"
3662 * section of the "Virtual 8086 Mode" chapter.)
3663 * 'pc' should be the address of this instruction, it will
3664 * be used to print the target address if this is a relative jump or call
3665 * The function returns the length of this instruction in bytes.
3668 static char intel_syntax;
3669 static char open_char;
3670 static char close_char;
3671 static char separator_char;
3672 static char scale_char;
3675 print_insn_i386 (bfd_vma pc, disassemble_info *info)
3677 intel_syntax = -1;
3679 return print_insn (pc, info);
3682 static int
3683 print_insn (bfd_vma pc, disassemble_info *info)
3685 const struct dis386 *dp;
3686 int i;
3687 char *op_txt[MAX_OPERANDS];
3688 int needcomma;
3689 unsigned char uses_DATA_prefix, uses_LOCK_prefix;
3690 unsigned char uses_REPNZ_prefix, uses_REPZ_prefix;
3691 int sizeflag;
3692 const char *p;
3693 struct dis_private priv;
3694 unsigned char op;
3695 unsigned char threebyte;
3697 if (info->mach == bfd_mach_x86_64_intel_syntax
3698 || info->mach == bfd_mach_x86_64)
3699 address_mode = mode_64bit;
3700 else
3701 address_mode = mode_32bit;
3703 if (intel_syntax == (char) -1)
3704 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
3705 || info->mach == bfd_mach_x86_64_intel_syntax);
3707 if (info->mach == bfd_mach_i386_i386
3708 || info->mach == bfd_mach_x86_64
3709 || info->mach == bfd_mach_i386_i386_intel_syntax
3710 || info->mach == bfd_mach_x86_64_intel_syntax)
3711 priv.orig_sizeflag = AFLAG | DFLAG;
3712 else if (info->mach == bfd_mach_i386_i8086)
3713 priv.orig_sizeflag = 0;
3714 else
3715 abort ();
3717 for (p = info->disassembler_options; p != NULL; )
3719 if (strncmp (p, "x86-64", 6) == 0)
3721 address_mode = mode_64bit;
3722 priv.orig_sizeflag = AFLAG | DFLAG;
3724 else if (strncmp (p, "i386", 4) == 0)
3726 address_mode = mode_32bit;
3727 priv.orig_sizeflag = AFLAG | DFLAG;
3729 else if (strncmp (p, "i8086", 5) == 0)
3731 address_mode = mode_16bit;
3732 priv.orig_sizeflag = 0;
3734 else if (strncmp (p, "intel", 5) == 0)
3736 intel_syntax = 1;
3738 else if (strncmp (p, "att", 3) == 0)
3740 intel_syntax = 0;
3742 else if (strncmp (p, "addr", 4) == 0)
3744 if (address_mode == mode_64bit)
3746 if (p[4] == '3' && p[5] == '2')
3747 priv.orig_sizeflag &= ~AFLAG;
3748 else if (p[4] == '6' && p[5] == '4')
3749 priv.orig_sizeflag |= AFLAG;
3751 else
3753 if (p[4] == '1' && p[5] == '6')
3754 priv.orig_sizeflag &= ~AFLAG;
3755 else if (p[4] == '3' && p[5] == '2')
3756 priv.orig_sizeflag |= AFLAG;
3759 else if (strncmp (p, "data", 4) == 0)
3761 if (p[4] == '1' && p[5] == '6')
3762 priv.orig_sizeflag &= ~DFLAG;
3763 else if (p[4] == '3' && p[5] == '2')
3764 priv.orig_sizeflag |= DFLAG;
3766 else if (strncmp (p, "suffix", 6) == 0)
3767 priv.orig_sizeflag |= SUFFIX_ALWAYS;
3769 p = strchr (p, ',');
3770 if (p != NULL)
3771 p++;
3774 if (intel_syntax)
3776 names64 = intel_names64;
3777 names32 = intel_names32;
3778 names16 = intel_names16;
3779 names8 = intel_names8;
3780 names8rex = intel_names8rex;
3781 names_seg = intel_names_seg;
3782 index16 = intel_index16;
3783 open_char = '[';
3784 close_char = ']';
3785 separator_char = '+';
3786 scale_char = '*';
3788 else
3790 names64 = att_names64;
3791 names32 = att_names32;
3792 names16 = att_names16;
3793 names8 = att_names8;
3794 names8rex = att_names8rex;
3795 names_seg = att_names_seg;
3796 index16 = att_index16;
3797 open_char = '(';
3798 close_char = ')';
3799 separator_char = ',';
3800 scale_char = ',';
3803 /* The output looks better if we put 7 bytes on a line, since that
3804 puts most long word instructions on a single line. */
3805 info->bytes_per_line = 7;
3807 info->private_data = &priv;
3808 priv.max_fetched = priv.the_buffer;
3809 priv.insn_start = pc;
3811 obuf[0] = 0;
3812 for (i = 0; i < MAX_OPERANDS; ++i)
3814 op_out[i][0] = 0;
3815 op_index[i] = -1;
3818 the_info = info;
3819 start_pc = pc;
3820 start_codep = priv.the_buffer;
3821 codep = priv.the_buffer;
3823 if (sigsetjmp(priv.bailout, 0) != 0)
3825 const char *name;
3827 /* Getting here means we tried for data but didn't get it. That
3828 means we have an incomplete instruction of some sort. Just
3829 print the first byte as a prefix or a .byte pseudo-op. */
3830 if (codep > priv.the_buffer)
3832 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
3833 if (name != NULL)
3834 (*info->fprintf_func) (info->stream, "%s", name);
3835 else
3837 /* Just print the first byte as a .byte instruction. */
3838 (*info->fprintf_func) (info->stream, ".byte 0x%x",
3839 (unsigned int) priv.the_buffer[0]);
3842 return 1;
3845 return -1;
3848 obufp = obuf;
3849 ckprefix ();
3850 ckvexprefix ();
3852 insn_codep = codep;
3853 sizeflag = priv.orig_sizeflag;
3855 fetch_data(info, codep + 1);
3856 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
3858 if (((prefixes & PREFIX_FWAIT)
3859 && ((*codep < 0xd8) || (*codep > 0xdf)))
3860 || (rex && rex_used))
3862 const char *name;
3864 /* fwait not followed by floating point instruction, or rex followed
3865 by other prefixes. Print the first prefix. */
3866 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
3867 if (name == NULL)
3868 name = INTERNAL_DISASSEMBLER_ERROR;
3869 (*info->fprintf_func) (info->stream, "%s", name);
3870 return 1;
3873 op = 0;
3874 if (prefixes & PREFIX_VEX_0F)
3876 used_prefixes |= PREFIX_VEX_0F | PREFIX_VEX_0F38 | PREFIX_VEX_0F3A;
3877 if (prefixes & PREFIX_VEX_0F38)
3878 threebyte = 0x38;
3879 else if (prefixes & PREFIX_VEX_0F3A)
3880 threebyte = 0x3a;
3881 else
3882 threebyte = *codep++;
3883 goto vex_opcode;
3885 if (*codep == 0x0f)
3887 fetch_data(info, codep + 2);
3888 threebyte = codep[1];
3889 codep += 2;
3890 vex_opcode:
3891 dp = &dis386_twobyte[threebyte];
3892 need_modrm = twobyte_has_modrm[threebyte];
3893 uses_DATA_prefix = twobyte_uses_DATA_prefix[threebyte];
3894 uses_REPNZ_prefix = twobyte_uses_REPNZ_prefix[threebyte];
3895 uses_REPZ_prefix = twobyte_uses_REPZ_prefix[threebyte];
3896 uses_LOCK_prefix = (threebyte & ~0x02) == 0x20;
3897 if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE)
3899 fetch_data(info, codep + 2);
3900 op = *codep++;
3901 switch (threebyte)
3903 case 0x38:
3904 uses_DATA_prefix = threebyte_0x38_uses_DATA_prefix[op];
3905 uses_REPNZ_prefix = threebyte_0x38_uses_REPNZ_prefix[op];
3906 uses_REPZ_prefix = threebyte_0x38_uses_REPZ_prefix[op];
3907 break;
3908 case 0x3a:
3909 uses_DATA_prefix = threebyte_0x3a_uses_DATA_prefix[op];
3910 uses_REPNZ_prefix = threebyte_0x3a_uses_REPNZ_prefix[op];
3911 uses_REPZ_prefix = threebyte_0x3a_uses_REPZ_prefix[op];
3912 break;
3913 default:
3914 break;
3918 else
3920 dp = &dis386[*codep];
3921 need_modrm = onebyte_has_modrm[*codep];
3922 uses_DATA_prefix = 0;
3923 uses_REPNZ_prefix = 0;
3924 /* pause is 0xf3 0x90. */
3925 uses_REPZ_prefix = *codep == 0x90;
3926 uses_LOCK_prefix = 0;
3927 codep++;
3930 if (!uses_REPZ_prefix && (prefixes & PREFIX_REPZ))
3932 oappend ("repz ");
3933 used_prefixes |= PREFIX_REPZ;
3935 if (!uses_REPNZ_prefix && (prefixes & PREFIX_REPNZ))
3937 oappend ("repnz ");
3938 used_prefixes |= PREFIX_REPNZ;
3941 if (!uses_LOCK_prefix && (prefixes & PREFIX_LOCK))
3943 oappend ("lock ");
3944 used_prefixes |= PREFIX_LOCK;
3947 if (prefixes & PREFIX_ADDR)
3949 sizeflag ^= AFLAG;
3950 if (dp->op[2].bytemode != loop_jcxz_mode || intel_syntax)
3952 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
3953 oappend ("addr32 ");
3954 else
3955 oappend ("addr16 ");
3956 used_prefixes |= PREFIX_ADDR;
3960 if (!uses_DATA_prefix && (prefixes & PREFIX_DATA))
3962 sizeflag ^= DFLAG;
3963 if (dp->op[2].bytemode == cond_jump_mode
3964 && dp->op[0].bytemode == v_mode
3965 && !intel_syntax)
3967 if (sizeflag & DFLAG)
3968 oappend ("data32 ");
3969 else
3970 oappend ("data16 ");
3971 used_prefixes |= PREFIX_DATA;
3975 if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE)
3977 dp = &three_byte_table[dp->op[1].bytemode][op];
3978 modrm.mod = (*codep >> 6) & 3;
3979 modrm.reg = (*codep >> 3) & 7;
3980 modrm.rm = *codep & 7;
3982 else if (need_modrm)
3984 fetch_data(info, codep + 1);
3985 modrm.mod = (*codep >> 6) & 3;
3986 modrm.reg = (*codep >> 3) & 7;
3987 modrm.rm = *codep & 7;
3990 if (dp->name == NULL && dp->op[0].bytemode == FLOATCODE)
3992 dofloat (sizeflag);
3994 else
3996 int index;
3997 if (dp->name == NULL)
3999 switch (dp->op[0].bytemode)
4001 case USE_GROUPS:
4002 dp = &grps[dp->op[1].bytemode][modrm.reg];
4003 break;
4005 case USE_PREFIX_USER_TABLE:
4006 index = 0;
4007 used_prefixes |= (prefixes & PREFIX_REPZ);
4008 if (prefixes & PREFIX_REPZ)
4009 index = 1;
4010 else
4012 /* We should check PREFIX_REPNZ and PREFIX_REPZ
4013 before PREFIX_DATA. */
4014 used_prefixes |= (prefixes & PREFIX_REPNZ);
4015 if (prefixes & PREFIX_REPNZ)
4016 index = 3;
4017 else
4019 used_prefixes |= (prefixes & PREFIX_DATA);
4020 if (prefixes & PREFIX_DATA)
4021 index = 2;
4024 dp = &prefix_user_table[dp->op[1].bytemode][index];
4025 break;
4027 case X86_64_SPECIAL:
4028 index = address_mode == mode_64bit ? 1 : 0;
4029 dp = &x86_64_table[dp->op[1].bytemode][index];
4030 break;
4032 default:
4033 oappend (INTERNAL_DISASSEMBLER_ERROR);
4034 break;
4038 if (putop (dp->name, sizeflag) == 0)
4040 for (i = 0; i < MAX_OPERANDS; ++i)
4042 obufp = op_out[i];
4043 op_ad = MAX_OPERANDS - 1 - i;
4044 if (dp->op[i].rtn)
4045 (*dp->op[i].rtn) (dp->op[i].bytemode, sizeflag);
4050 /* See if any prefixes were not used. If so, print the first one
4051 separately. If we don't do this, we'll wind up printing an
4052 instruction stream which does not precisely correspond to the
4053 bytes we are disassembling. */
4054 if ((prefixes & ~used_prefixes) != 0)
4056 const char *name;
4058 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
4059 if (name == NULL)
4060 name = INTERNAL_DISASSEMBLER_ERROR;
4061 (*info->fprintf_func) (info->stream, "%s", name);
4062 return 1;
4064 if (rex & ~rex_used)
4066 const char *name;
4067 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
4068 if (name == NULL)
4069 name = INTERNAL_DISASSEMBLER_ERROR;
4070 (*info->fprintf_func) (info->stream, "%s ", name);
4073 obufp = obuf + strlen (obuf);
4074 for (i = strlen (obuf); i < 6; i++)
4075 oappend (" ");
4076 oappend (" ");
4077 (*info->fprintf_func) (info->stream, "%s", obuf);
4079 /* The enter and bound instructions are printed with operands in the same
4080 order as the intel book; everything else is printed in reverse order. */
4081 if (intel_syntax || two_source_ops)
4083 bfd_vma riprel;
4085 for (i = 0; i < MAX_OPERANDS; ++i)
4086 op_txt[i] = op_out[i];
4088 for (i = 0; i < (MAX_OPERANDS >> 1); ++i)
4090 op_ad = op_index[i];
4091 op_index[i] = op_index[MAX_OPERANDS - 1 - i];
4092 op_index[MAX_OPERANDS - 1 - i] = op_ad;
4093 riprel = op_riprel[i];
4094 op_riprel[i] = op_riprel [MAX_OPERANDS - 1 - i];
4095 op_riprel[MAX_OPERANDS - 1 - i] = riprel;
4098 else
4100 for (i = 0; i < MAX_OPERANDS; ++i)
4101 op_txt[MAX_OPERANDS - 1 - i] = op_out[i];
4104 needcomma = 0;
4105 for (i = 0; i < MAX_OPERANDS; ++i)
4106 if (*op_txt[i])
4108 if (needcomma)
4109 (*info->fprintf_func) (info->stream, ",");
4110 if (op_index[i] != -1 && !op_riprel[i])
4111 (*info->print_address_func) ((bfd_vma) op_address[op_index[i]], info);
4112 else
4113 (*info->fprintf_func) (info->stream, "%s", op_txt[i]);
4114 needcomma = 1;
4117 for (i = 0; i < MAX_OPERANDS; i++)
4118 if (op_index[i] != -1 && op_riprel[i])
4120 (*info->fprintf_func) (info->stream, " # ");
4121 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
4122 + op_address[op_index[i]]), info);
4123 break;
4125 return codep - priv.the_buffer;
4128 static const char *float_mem[] = {
4129 /* d8 */
4130 "fadd{s||s|}",
4131 "fmul{s||s|}",
4132 "fcom{s||s|}",
4133 "fcomp{s||s|}",
4134 "fsub{s||s|}",
4135 "fsubr{s||s|}",
4136 "fdiv{s||s|}",
4137 "fdivr{s||s|}",
4138 /* d9 */
4139 "fld{s||s|}",
4140 "(bad)",
4141 "fst{s||s|}",
4142 "fstp{s||s|}",
4143 "fldenvIC",
4144 "fldcw",
4145 "fNstenvIC",
4146 "fNstcw",
4147 /* da */
4148 "fiadd{l||l|}",
4149 "fimul{l||l|}",
4150 "ficom{l||l|}",
4151 "ficomp{l||l|}",
4152 "fisub{l||l|}",
4153 "fisubr{l||l|}",
4154 "fidiv{l||l|}",
4155 "fidivr{l||l|}",
4156 /* db */
4157 "fild{l||l|}",
4158 "fisttp{l||l|}",
4159 "fist{l||l|}",
4160 "fistp{l||l|}",
4161 "(bad)",
4162 "fld{t||t|}",
4163 "(bad)",
4164 "fstp{t||t|}",
4165 /* dc */
4166 "fadd{l||l|}",
4167 "fmul{l||l|}",
4168 "fcom{l||l|}",
4169 "fcomp{l||l|}",
4170 "fsub{l||l|}",
4171 "fsubr{l||l|}",
4172 "fdiv{l||l|}",
4173 "fdivr{l||l|}",
4174 /* dd */
4175 "fld{l||l|}",
4176 "fisttp{ll||ll|}",
4177 "fst{l||l|}",
4178 "fstp{l||l|}",
4179 "frstorIC",
4180 "(bad)",
4181 "fNsaveIC",
4182 "fNstsw",
4183 /* de */
4184 "fiadd",
4185 "fimul",
4186 "ficom",
4187 "ficomp",
4188 "fisub",
4189 "fisubr",
4190 "fidiv",
4191 "fidivr",
4192 /* df */
4193 "fild",
4194 "fisttp",
4195 "fist",
4196 "fistp",
4197 "fbld",
4198 "fild{ll||ll|}",
4199 "fbstp",
4200 "fistp{ll||ll|}",
4203 static const unsigned char float_mem_mode[] = {
4204 /* d8 */
4205 d_mode,
4206 d_mode,
4207 d_mode,
4208 d_mode,
4209 d_mode,
4210 d_mode,
4211 d_mode,
4212 d_mode,
4213 /* d9 */
4214 d_mode,
4216 d_mode,
4217 d_mode,
4219 w_mode,
4221 w_mode,
4222 /* da */
4223 d_mode,
4224 d_mode,
4225 d_mode,
4226 d_mode,
4227 d_mode,
4228 d_mode,
4229 d_mode,
4230 d_mode,
4231 /* db */
4232 d_mode,
4233 d_mode,
4234 d_mode,
4235 d_mode,
4237 t_mode,
4239 t_mode,
4240 /* dc */
4241 q_mode,
4242 q_mode,
4243 q_mode,
4244 q_mode,
4245 q_mode,
4246 q_mode,
4247 q_mode,
4248 q_mode,
4249 /* dd */
4250 q_mode,
4251 q_mode,
4252 q_mode,
4253 q_mode,
4257 w_mode,
4258 /* de */
4259 w_mode,
4260 w_mode,
4261 w_mode,
4262 w_mode,
4263 w_mode,
4264 w_mode,
4265 w_mode,
4266 w_mode,
4267 /* df */
4268 w_mode,
4269 w_mode,
4270 w_mode,
4271 w_mode,
4272 t_mode,
4273 q_mode,
4274 t_mode,
4275 q_mode
4278 #define ST { OP_ST, 0 }
4279 #define STi { OP_STi, 0 }
4281 #define FGRPd9_2 NULL, { { NULL, 0 } }
4282 #define FGRPd9_4 NULL, { { NULL, 1 } }
4283 #define FGRPd9_5 NULL, { { NULL, 2 } }
4284 #define FGRPd9_6 NULL, { { NULL, 3 } }
4285 #define FGRPd9_7 NULL, { { NULL, 4 } }
4286 #define FGRPda_5 NULL, { { NULL, 5 } }
4287 #define FGRPdb_4 NULL, { { NULL, 6 } }
4288 #define FGRPde_3 NULL, { { NULL, 7 } }
4289 #define FGRPdf_4 NULL, { { NULL, 8 } }
4291 static const struct dis386 float_reg[][8] = {
4292 /* d8 */
4294 { "fadd", { ST, STi } },
4295 { "fmul", { ST, STi } },
4296 { "fcom", { STi } },
4297 { "fcomp", { STi } },
4298 { "fsub", { ST, STi } },
4299 { "fsubr", { ST, STi } },
4300 { "fdiv", { ST, STi } },
4301 { "fdivr", { ST, STi } },
4303 /* d9 */
4305 { "fld", { STi } },
4306 { "fxch", { STi } },
4307 { FGRPd9_2 },
4308 { "(bad)", { XX } },
4309 { FGRPd9_4 },
4310 { FGRPd9_5 },
4311 { FGRPd9_6 },
4312 { FGRPd9_7 },
4314 /* da */
4316 { "fcmovb", { ST, STi } },
4317 { "fcmove", { ST, STi } },
4318 { "fcmovbe",{ ST, STi } },
4319 { "fcmovu", { ST, STi } },
4320 { "(bad)", { XX } },
4321 { FGRPda_5 },
4322 { "(bad)", { XX } },
4323 { "(bad)", { XX } },
4325 /* db */
4327 { "fcmovnb",{ ST, STi } },
4328 { "fcmovne",{ ST, STi } },
4329 { "fcmovnbe",{ ST, STi } },
4330 { "fcmovnu",{ ST, STi } },
4331 { FGRPdb_4 },
4332 { "fucomi", { ST, STi } },
4333 { "fcomi", { ST, STi } },
4334 { "(bad)", { XX } },
4336 /* dc */
4338 { "fadd", { STi, ST } },
4339 { "fmul", { STi, ST } },
4340 { "(bad)", { XX } },
4341 { "(bad)", { XX } },
4342 #if SYSV386_COMPAT
4343 { "fsub", { STi, ST } },
4344 { "fsubr", { STi, ST } },
4345 { "fdiv", { STi, ST } },
4346 { "fdivr", { STi, ST } },
4347 #else
4348 { "fsubr", { STi, ST } },
4349 { "fsub", { STi, ST } },
4350 { "fdivr", { STi, ST } },
4351 { "fdiv", { STi, ST } },
4352 #endif
4354 /* dd */
4356 { "ffree", { STi } },
4357 { "(bad)", { XX } },
4358 { "fst", { STi } },
4359 { "fstp", { STi } },
4360 { "fucom", { STi } },
4361 { "fucomp", { STi } },
4362 { "(bad)", { XX } },
4363 { "(bad)", { XX } },
4365 /* de */
4367 { "faddp", { STi, ST } },
4368 { "fmulp", { STi, ST } },
4369 { "(bad)", { XX } },
4370 { FGRPde_3 },
4371 #if SYSV386_COMPAT
4372 { "fsubp", { STi, ST } },
4373 { "fsubrp", { STi, ST } },
4374 { "fdivp", { STi, ST } },
4375 { "fdivrp", { STi, ST } },
4376 #else
4377 { "fsubrp", { STi, ST } },
4378 { "fsubp", { STi, ST } },
4379 { "fdivrp", { STi, ST } },
4380 { "fdivp", { STi, ST } },
4381 #endif
4383 /* df */
4385 { "ffreep", { STi } },
4386 { "(bad)", { XX } },
4387 { "(bad)", { XX } },
4388 { "(bad)", { XX } },
4389 { FGRPdf_4 },
4390 { "fucomip", { ST, STi } },
4391 { "fcomip", { ST, STi } },
4392 { "(bad)", { XX } },
4396 static const char *fgrps[][8] = {
4397 /* d9_2 0 */
4399 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4402 /* d9_4 1 */
4404 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
4407 /* d9_5 2 */
4409 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
4412 /* d9_6 3 */
4414 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
4417 /* d9_7 4 */
4419 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
4422 /* da_5 5 */
4424 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4427 /* db_4 6 */
4429 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
4430 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
4433 /* de_3 7 */
4435 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4438 /* df_4 8 */
4440 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4444 static void
4445 dofloat (int sizeflag)
4447 const struct dis386 *dp;
4448 unsigned char floatop;
4450 floatop = codep[-1];
4452 if (modrm.mod != 3)
4454 int fp_indx = (floatop - 0xd8) * 8 + modrm.reg;
4456 putop (float_mem[fp_indx], sizeflag);
4457 obufp = op_out[0];
4458 op_ad = 2;
4459 OP_E (float_mem_mode[fp_indx], sizeflag);
4460 return;
4462 /* Skip mod/rm byte. */
4463 MODRM_CHECK;
4464 codep++;
4466 dp = &float_reg[floatop - 0xd8][modrm.reg];
4467 if (dp->name == NULL)
4469 putop (fgrps[dp->op[0].bytemode][modrm.rm], sizeflag);
4471 /* Instruction fnstsw is only one with strange arg. */
4472 if (floatop == 0xdf && codep[-1] == 0xe0)
4473 pstrcpy (op_out[0], sizeof(op_out[0]), names16[0]);
4475 else
4477 putop (dp->name, sizeflag);
4479 obufp = op_out[0];
4480 op_ad = 2;
4481 if (dp->op[0].rtn)
4482 (*dp->op[0].rtn) (dp->op[0].bytemode, sizeflag);
4484 obufp = op_out[1];
4485 op_ad = 1;
4486 if (dp->op[1].rtn)
4487 (*dp->op[1].rtn) (dp->op[1].bytemode, sizeflag);
4491 static void
4492 OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4494 oappend ("%st" + intel_syntax);
4497 static void
4498 OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4500 snprintf (scratchbuf, sizeof(scratchbuf), "%%st(%d)", modrm.rm);
4501 oappend (scratchbuf + intel_syntax);
4504 /* Capital letters in template are macros. */
4505 static int
4506 putop (const char *template, int sizeflag)
4508 const char *p;
4509 int alt = 0;
4511 for (p = template; *p; p++)
4513 switch (*p)
4515 default:
4516 *obufp++ = *p;
4517 break;
4518 case '{':
4519 alt = 0;
4520 if (intel_syntax)
4521 alt += 1;
4522 if (address_mode == mode_64bit)
4523 alt += 2;
4524 while (alt != 0)
4526 while (*++p != '|')
4528 if (*p == '}')
4530 /* Alternative not valid. */
4531 pstrcpy (obuf, sizeof(obuf), "(bad)");
4532 obufp = obuf + 5;
4533 return 1;
4535 else if (*p == '\0')
4536 abort ();
4538 alt--;
4540 /* Fall through. */
4541 case 'I':
4542 alt = 1;
4543 continue;
4544 case '|':
4545 while (*++p != '}')
4547 if (*p == '\0')
4548 abort ();
4550 break;
4551 case '}':
4552 break;
4553 case 'A':
4554 if (intel_syntax)
4555 break;
4556 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
4557 *obufp++ = 'b';
4558 break;
4559 case 'B':
4560 if (intel_syntax)
4561 break;
4562 if (sizeflag & SUFFIX_ALWAYS)
4563 *obufp++ = 'b';
4564 break;
4565 case 'C':
4566 if (intel_syntax && !alt)
4567 break;
4568 if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
4570 if (sizeflag & DFLAG)
4571 *obufp++ = intel_syntax ? 'd' : 'l';
4572 else
4573 *obufp++ = intel_syntax ? 'w' : 's';
4574 used_prefixes |= (prefixes & PREFIX_DATA);
4576 break;
4577 case 'D':
4578 if (intel_syntax || !(sizeflag & SUFFIX_ALWAYS))
4579 break;
4580 USED_REX (REX_W);
4581 if (modrm.mod == 3)
4583 if (rex & REX_W)
4584 *obufp++ = 'q';
4585 else if (sizeflag & DFLAG)
4586 *obufp++ = intel_syntax ? 'd' : 'l';
4587 else
4588 *obufp++ = 'w';
4589 used_prefixes |= (prefixes & PREFIX_DATA);
4591 else
4592 *obufp++ = 'w';
4593 break;
4594 case 'E': /* For jcxz/jecxz */
4595 if (address_mode == mode_64bit)
4597 if (sizeflag & AFLAG)
4598 *obufp++ = 'r';
4599 else
4600 *obufp++ = 'e';
4602 else
4603 if (sizeflag & AFLAG)
4604 *obufp++ = 'e';
4605 used_prefixes |= (prefixes & PREFIX_ADDR);
4606 break;
4607 case 'F':
4608 if (intel_syntax)
4609 break;
4610 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
4612 if (sizeflag & AFLAG)
4613 *obufp++ = address_mode == mode_64bit ? 'q' : 'l';
4614 else
4615 *obufp++ = address_mode == mode_64bit ? 'l' : 'w';
4616 used_prefixes |= (prefixes & PREFIX_ADDR);
4618 break;
4619 case 'G':
4620 if (intel_syntax || (obufp[-1] != 's' && !(sizeflag & SUFFIX_ALWAYS)))
4621 break;
4622 if ((rex & REX_W) || (sizeflag & DFLAG))
4623 *obufp++ = 'l';
4624 else
4625 *obufp++ = 'w';
4626 if (!(rex & REX_W))
4627 used_prefixes |= (prefixes & PREFIX_DATA);
4628 break;
4629 case 'H':
4630 if (intel_syntax)
4631 break;
4632 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
4633 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
4635 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
4636 *obufp++ = ',';
4637 *obufp++ = 'p';
4638 if (prefixes & PREFIX_DS)
4639 *obufp++ = 't';
4640 else
4641 *obufp++ = 'n';
4643 break;
4644 case 'J':
4645 if (intel_syntax)
4646 break;
4647 *obufp++ = 'l';
4648 break;
4649 case 'K':
4650 USED_REX (REX_W);
4651 if (rex & REX_W)
4652 *obufp++ = 'q';
4653 else
4654 *obufp++ = 'd';
4655 break;
4656 case 'Z':
4657 if (intel_syntax)
4658 break;
4659 if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS))
4661 *obufp++ = 'q';
4662 break;
4664 /* Fall through. */
4665 case 'L':
4666 if (intel_syntax)
4667 break;
4668 if (sizeflag & SUFFIX_ALWAYS)
4669 *obufp++ = 'l';
4670 break;
4671 case 'N':
4672 if ((prefixes & PREFIX_FWAIT) == 0)
4673 *obufp++ = 'n';
4674 else
4675 used_prefixes |= PREFIX_FWAIT;
4676 break;
4677 case 'O':
4678 USED_REX (REX_W);
4679 if (rex & REX_W)
4680 *obufp++ = 'o';
4681 else if (intel_syntax && (sizeflag & DFLAG))
4682 *obufp++ = 'q';
4683 else
4684 *obufp++ = 'd';
4685 if (!(rex & REX_W))
4686 used_prefixes |= (prefixes & PREFIX_DATA);
4687 break;
4688 case 'T':
4689 if (intel_syntax)
4690 break;
4691 if (address_mode == mode_64bit && (sizeflag & DFLAG))
4693 *obufp++ = 'q';
4694 break;
4696 /* Fall through. */
4697 case 'P':
4698 if (intel_syntax)
4699 break;
4700 if ((prefixes & PREFIX_DATA)
4701 || (rex & REX_W)
4702 || (sizeflag & SUFFIX_ALWAYS))
4704 USED_REX (REX_W);
4705 if (rex & REX_W)
4706 *obufp++ = 'q';
4707 else
4709 if (sizeflag & DFLAG)
4710 *obufp++ = 'l';
4711 else
4712 *obufp++ = 'w';
4714 used_prefixes |= (prefixes & PREFIX_DATA);
4716 break;
4717 case 'U':
4718 if (intel_syntax)
4719 break;
4720 if (address_mode == mode_64bit && (sizeflag & DFLAG))
4722 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
4723 *obufp++ = 'q';
4724 break;
4726 /* Fall through. */
4727 case 'Q':
4728 if (intel_syntax && !alt)
4729 break;
4730 USED_REX (REX_W);
4731 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
4733 if (rex & REX_W)
4734 *obufp++ = 'q';
4735 else
4737 if (sizeflag & DFLAG)
4738 *obufp++ = intel_syntax ? 'd' : 'l';
4739 else
4740 *obufp++ = 'w';
4742 used_prefixes |= (prefixes & PREFIX_DATA);
4744 break;
4745 case 'R':
4746 USED_REX (REX_W);
4747 if (rex & REX_W)
4748 *obufp++ = 'q';
4749 else if (sizeflag & DFLAG)
4751 if (intel_syntax)
4752 *obufp++ = 'd';
4753 else
4754 *obufp++ = 'l';
4756 else
4757 *obufp++ = 'w';
4758 if (intel_syntax && !p[1]
4759 && ((rex & REX_W) || (sizeflag & DFLAG)))
4760 *obufp++ = 'e';
4761 if (!(rex & REX_W))
4762 used_prefixes |= (prefixes & PREFIX_DATA);
4763 break;
4764 case 'V':
4765 if (intel_syntax)
4766 break;
4767 if (address_mode == mode_64bit && (sizeflag & DFLAG))
4769 if (sizeflag & SUFFIX_ALWAYS)
4770 *obufp++ = 'q';
4771 break;
4773 /* Fall through. */
4774 case 'S':
4775 if (intel_syntax)
4776 break;
4777 if (sizeflag & SUFFIX_ALWAYS)
4779 if (rex & REX_W)
4780 *obufp++ = 'q';
4781 else
4783 if (sizeflag & DFLAG)
4784 *obufp++ = 'l';
4785 else
4786 *obufp++ = 'w';
4787 used_prefixes |= (prefixes & PREFIX_DATA);
4790 break;
4791 case 'X':
4792 if (prefixes & PREFIX_DATA)
4793 *obufp++ = 'd';
4794 else
4795 *obufp++ = 's';
4796 used_prefixes |= (prefixes & PREFIX_DATA);
4797 break;
4798 case 'Y':
4799 if (intel_syntax)
4800 break;
4801 if (rex & REX_W)
4803 USED_REX (REX_W);
4804 *obufp++ = 'q';
4806 break;
4807 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
4808 case 'W':
4809 /* operand size flag for cwtl, cbtw */
4810 USED_REX (REX_W);
4811 if (rex & REX_W)
4813 if (intel_syntax)
4814 *obufp++ = 'd';
4815 else
4816 *obufp++ = 'l';
4818 else if (sizeflag & DFLAG)
4819 *obufp++ = 'w';
4820 else
4821 *obufp++ = 'b';
4822 if (!(rex & REX_W))
4823 used_prefixes |= (prefixes & PREFIX_DATA);
4824 break;
4826 alt = 0;
4828 *obufp = 0;
4829 return 0;
4832 static void
4833 oappend (const char *s)
4835 strcpy (obufp, s);
4836 obufp += strlen (s);
4839 static void
4840 append_seg (void)
4842 if (prefixes & PREFIX_CS)
4844 used_prefixes |= PREFIX_CS;
4845 oappend ("%cs:" + intel_syntax);
4847 if (prefixes & PREFIX_DS)
4849 used_prefixes |= PREFIX_DS;
4850 oappend ("%ds:" + intel_syntax);
4852 if (prefixes & PREFIX_SS)
4854 used_prefixes |= PREFIX_SS;
4855 oappend ("%ss:" + intel_syntax);
4857 if (prefixes & PREFIX_ES)
4859 used_prefixes |= PREFIX_ES;
4860 oappend ("%es:" + intel_syntax);
4862 if (prefixes & PREFIX_FS)
4864 used_prefixes |= PREFIX_FS;
4865 oappend ("%fs:" + intel_syntax);
4867 if (prefixes & PREFIX_GS)
4869 used_prefixes |= PREFIX_GS;
4870 oappend ("%gs:" + intel_syntax);
4874 static void
4875 OP_indirE (int bytemode, int sizeflag)
4877 if (!intel_syntax)
4878 oappend ("*");
4879 OP_E (bytemode, sizeflag);
4882 static void
4883 print_operand_value (char *buf, size_t bufsize, int hex, bfd_vma disp)
4885 if (address_mode == mode_64bit)
4887 if (hex)
4889 char tmp[30];
4890 int i;
4891 buf[0] = '0';
4892 buf[1] = 'x';
4893 snprintf_vma (tmp, sizeof(tmp), disp);
4894 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++) {
4896 pstrcpy (buf + 2, bufsize - 2, tmp + i);
4898 else
4900 bfd_signed_vma v = disp;
4901 char tmp[30];
4902 int i;
4903 if (v < 0)
4905 *(buf++) = '-';
4906 v = -disp;
4907 /* Check for possible overflow on 0x8000000000000000. */
4908 if (v < 0)
4910 pstrcpy (buf, bufsize, "9223372036854775808");
4911 return;
4914 if (!v)
4916 pstrcpy (buf, bufsize, "0");
4917 return;
4920 i = 0;
4921 tmp[29] = 0;
4922 while (v)
4924 tmp[28 - i] = (v % 10) + '0';
4925 v /= 10;
4926 i++;
4928 pstrcpy (buf, bufsize, tmp + 29 - i);
4931 else
4933 if (hex)
4934 snprintf (buf, bufsize, "0x%x", (unsigned int) disp);
4935 else
4936 snprintf (buf, bufsize, "%d", (int) disp);
4940 /* Put DISP in BUF as signed hex number. */
4942 static void
4943 print_displacement (char *buf, bfd_vma disp)
4945 bfd_signed_vma val = disp;
4946 char tmp[30];
4947 int i, j = 0;
4949 if (val < 0)
4951 buf[j++] = '-';
4952 val = -disp;
4954 /* Check for possible overflow. */
4955 if (val < 0)
4957 switch (address_mode)
4959 case mode_64bit:
4960 strcpy (buf + j, "0x8000000000000000");
4961 break;
4962 case mode_32bit:
4963 strcpy (buf + j, "0x80000000");
4964 break;
4965 case mode_16bit:
4966 strcpy (buf + j, "0x8000");
4967 break;
4969 return;
4973 buf[j++] = '0';
4974 buf[j++] = 'x';
4976 snprintf_vma (tmp, sizeof(tmp), val);
4977 for (i = 0; tmp[i] == '0'; i++)
4978 continue;
4979 if (tmp[i] == '\0')
4980 i--;
4981 strcpy (buf + j, tmp + i);
4984 static void
4985 intel_operand_size (int bytemode, int sizeflag)
4987 switch (bytemode)
4989 case b_mode:
4990 case dqb_mode:
4991 oappend ("BYTE PTR ");
4992 break;
4993 case w_mode:
4994 case dqw_mode:
4995 oappend ("WORD PTR ");
4996 break;
4997 case stack_v_mode:
4998 if (address_mode == mode_64bit && (sizeflag & DFLAG))
5000 oappend ("QWORD PTR ");
5001 used_prefixes |= (prefixes & PREFIX_DATA);
5002 break;
5004 /* FALLTHRU */
5005 case v_mode:
5006 case dq_mode:
5007 USED_REX (REX_W);
5008 if (rex & REX_W)
5009 oappend ("QWORD PTR ");
5010 else if ((sizeflag & DFLAG) || bytemode == dq_mode)
5011 oappend ("DWORD PTR ");
5012 else
5013 oappend ("WORD PTR ");
5014 used_prefixes |= (prefixes & PREFIX_DATA);
5015 break;
5016 case z_mode:
5017 if ((rex & REX_W) || (sizeflag & DFLAG))
5018 *obufp++ = 'D';
5019 oappend ("WORD PTR ");
5020 if (!(rex & REX_W))
5021 used_prefixes |= (prefixes & PREFIX_DATA);
5022 break;
5023 case d_mode:
5024 case dqd_mode:
5025 oappend ("DWORD PTR ");
5026 break;
5027 case q_mode:
5028 oappend ("QWORD PTR ");
5029 break;
5030 case m_mode:
5031 if (address_mode == mode_64bit)
5032 oappend ("QWORD PTR ");
5033 else
5034 oappend ("DWORD PTR ");
5035 break;
5036 case f_mode:
5037 if (sizeflag & DFLAG)
5038 oappend ("FWORD PTR ");
5039 else
5040 oappend ("DWORD PTR ");
5041 used_prefixes |= (prefixes & PREFIX_DATA);
5042 break;
5043 case t_mode:
5044 oappend ("TBYTE PTR ");
5045 break;
5046 case x_mode:
5047 oappend ("XMMWORD PTR ");
5048 break;
5049 case o_mode:
5050 oappend ("OWORD PTR ");
5051 break;
5052 default:
5053 break;
5057 static void
5058 OP_E (int bytemode, int sizeflag)
5060 bfd_vma disp;
5061 int add = 0;
5062 int riprel = 0;
5063 USED_REX (REX_B);
5064 if (rex & REX_B)
5065 add += 8;
5067 /* Skip mod/rm byte. */
5068 MODRM_CHECK;
5069 codep++;
5071 if (modrm.mod == 3)
5073 switch (bytemode)
5075 case b_mode:
5076 USED_REX (0);
5077 if (rex)
5078 oappend (names8rex[modrm.rm + add]);
5079 else
5080 oappend (names8[modrm.rm + add]);
5081 break;
5082 case w_mode:
5083 oappend (names16[modrm.rm + add]);
5084 break;
5085 case d_mode:
5086 oappend (names32[modrm.rm + add]);
5087 break;
5088 case q_mode:
5089 oappend (names64[modrm.rm + add]);
5090 break;
5091 case m_mode:
5092 if (address_mode == mode_64bit)
5093 oappend (names64[modrm.rm + add]);
5094 else
5095 oappend (names32[modrm.rm + add]);
5096 break;
5097 case stack_v_mode:
5098 if (address_mode == mode_64bit && (sizeflag & DFLAG))
5100 oappend (names64[modrm.rm + add]);
5101 used_prefixes |= (prefixes & PREFIX_DATA);
5102 break;
5104 bytemode = v_mode;
5105 /* FALLTHRU */
5106 case v_mode:
5107 case dq_mode:
5108 case dqb_mode:
5109 case dqd_mode:
5110 case dqw_mode:
5111 USED_REX (REX_W);
5112 if (rex & REX_W)
5113 oappend (names64[modrm.rm + add]);
5114 else if ((sizeflag & DFLAG) || bytemode != v_mode)
5115 oappend (names32[modrm.rm + add]);
5116 else
5117 oappend (names16[modrm.rm + add]);
5118 used_prefixes |= (prefixes & PREFIX_DATA);
5119 break;
5120 case 0:
5121 break;
5122 default:
5123 oappend (INTERNAL_DISASSEMBLER_ERROR);
5124 break;
5126 return;
5129 disp = 0;
5130 if (intel_syntax)
5131 intel_operand_size (bytemode, sizeflag);
5132 append_seg ();
5134 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
5136 /* 32/64 bit address mode */
5137 int havedisp;
5138 int havesib;
5139 int havebase;
5140 int base;
5141 int index = 0;
5142 int scale = 0;
5144 havesib = 0;
5145 havebase = 1;
5146 base = modrm.rm;
5148 if (base == 4)
5150 havesib = 1;
5151 fetch_data(the_info, codep + 1);
5152 index = (*codep >> 3) & 7;
5153 if (address_mode == mode_64bit || index != 0x4)
5154 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
5155 scale = (*codep >> 6) & 3;
5156 base = *codep & 7;
5157 USED_REX (REX_X);
5158 if (rex & REX_X)
5159 index += 8;
5160 codep++;
5162 base += add;
5164 switch (modrm.mod)
5166 case 0:
5167 if ((base & 7) == 5)
5169 havebase = 0;
5170 if (address_mode == mode_64bit && !havesib)
5171 riprel = 1;
5172 disp = get32s ();
5174 break;
5175 case 1:
5176 fetch_data (the_info, codep + 1);
5177 disp = *codep++;
5178 if ((disp & 0x80) != 0)
5179 disp -= 0x100;
5180 break;
5181 case 2:
5182 disp = get32s ();
5183 break;
5186 havedisp = havebase || (havesib && (index != 4 || scale != 0));
5188 if (!intel_syntax)
5189 if (modrm.mod != 0 || (base & 7) == 5)
5191 if (havedisp || riprel)
5192 print_displacement (scratchbuf, disp);
5193 else
5194 print_operand_value (scratchbuf, sizeof(scratchbuf), 1, disp);
5195 oappend (scratchbuf);
5196 if (riprel)
5198 set_op (disp, 1);
5199 oappend ("(%rip)");
5203 if (havedisp || (intel_syntax && riprel))
5205 *obufp++ = open_char;
5206 if (intel_syntax && riprel)
5208 set_op (disp, 1);
5209 oappend ("rip");
5211 *obufp = '\0';
5212 if (havebase)
5213 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
5214 ? names64[base] : names32[base]);
5215 if (havesib)
5217 if (index != 4)
5219 if (!intel_syntax || havebase)
5221 *obufp++ = separator_char;
5222 *obufp = '\0';
5224 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
5225 ? names64[index] : names32[index]);
5227 if (scale != 0 || (!intel_syntax && index != 4))
5229 *obufp++ = scale_char;
5230 *obufp = '\0';
5231 snprintf (scratchbuf, sizeof(scratchbuf), "%d", 1 << scale);
5232 oappend (scratchbuf);
5235 if (intel_syntax
5236 && (disp || modrm.mod != 0 || (base & 7) == 5))
5238 if ((bfd_signed_vma) disp >= 0)
5240 *obufp++ = '+';
5241 *obufp = '\0';
5243 else if (modrm.mod != 1)
5245 *obufp++ = '-';
5246 *obufp = '\0';
5247 disp = - (bfd_signed_vma) disp;
5250 print_displacement (scratchbuf, disp);
5251 oappend (scratchbuf);
5254 *obufp++ = close_char;
5255 *obufp = '\0';
5257 else if (intel_syntax)
5259 if (modrm.mod != 0 || (base & 7) == 5)
5261 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5262 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
5264 else
5266 oappend (names_seg[ds_reg - es_reg]);
5267 oappend (":");
5269 print_operand_value (scratchbuf, sizeof(scratchbuf), 1, disp);
5270 oappend (scratchbuf);
5274 else
5275 { /* 16 bit address mode */
5276 switch (modrm.mod)
5278 case 0:
5279 if (modrm.rm == 6)
5281 disp = get16 ();
5282 if ((disp & 0x8000) != 0)
5283 disp -= 0x10000;
5285 break;
5286 case 1:
5287 fetch_data(the_info, codep + 1);
5288 disp = *codep++;
5289 if ((disp & 0x80) != 0)
5290 disp -= 0x100;
5291 break;
5292 case 2:
5293 disp = get16 ();
5294 if ((disp & 0x8000) != 0)
5295 disp -= 0x10000;
5296 break;
5299 if (!intel_syntax)
5300 if (modrm.mod != 0 || modrm.rm == 6)
5302 print_displacement (scratchbuf, disp);
5303 oappend (scratchbuf);
5306 if (modrm.mod != 0 || modrm.rm != 6)
5308 *obufp++ = open_char;
5309 *obufp = '\0';
5310 oappend (index16[modrm.rm]);
5311 if (intel_syntax
5312 && (disp || modrm.mod != 0 || modrm.rm == 6))
5314 if ((bfd_signed_vma) disp >= 0)
5316 *obufp++ = '+';
5317 *obufp = '\0';
5319 else if (modrm.mod != 1)
5321 *obufp++ = '-';
5322 *obufp = '\0';
5323 disp = - (bfd_signed_vma) disp;
5326 print_displacement (scratchbuf, disp);
5327 oappend (scratchbuf);
5330 *obufp++ = close_char;
5331 *obufp = '\0';
5333 else if (intel_syntax)
5335 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5336 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
5338 else
5340 oappend (names_seg[ds_reg - es_reg]);
5341 oappend (":");
5343 print_operand_value (scratchbuf, sizeof(scratchbuf), 1,
5344 disp & 0xffff);
5345 oappend (scratchbuf);
5350 static void
5351 OP_G (int bytemode, int sizeflag)
5353 int add = 0;
5354 USED_REX (REX_R);
5355 if (rex & REX_R)
5356 add += 8;
5357 switch (bytemode)
5359 case b_mode:
5360 USED_REX (0);
5361 if (rex)
5362 oappend (names8rex[modrm.reg + add]);
5363 else
5364 oappend (names8[modrm.reg + add]);
5365 break;
5366 case w_mode:
5367 oappend (names16[modrm.reg + add]);
5368 break;
5369 case d_mode:
5370 oappend (names32[modrm.reg + add]);
5371 break;
5372 case q_mode:
5373 oappend (names64[modrm.reg + add]);
5374 break;
5375 case v_mode:
5376 case dq_mode:
5377 case dqb_mode:
5378 case dqd_mode:
5379 case dqw_mode:
5380 USED_REX (REX_W);
5381 if (rex & REX_W)
5382 oappend (names64[modrm.reg + add]);
5383 else if ((sizeflag & DFLAG) || bytemode != v_mode)
5384 oappend (names32[modrm.reg + add]);
5385 else
5386 oappend (names16[modrm.reg + add]);
5387 used_prefixes |= (prefixes & PREFIX_DATA);
5388 break;
5389 case m_mode:
5390 if (address_mode == mode_64bit)
5391 oappend (names64[modrm.reg + add]);
5392 else
5393 oappend (names32[modrm.reg + add]);
5394 break;
5395 default:
5396 oappend (INTERNAL_DISASSEMBLER_ERROR);
5397 break;
5401 static void
5402 OP_vvvv (int bytemode, int sizeflags)
5404 USED_REX (REX_W);
5405 if (rex & REX_W) {
5406 oappend(names64[vex_reg]);
5407 } else {
5408 oappend(names32[vex_reg]);
5412 static bfd_vma
5413 get64 (void)
5415 bfd_vma x;
5416 #ifdef BFD64
5417 unsigned int a;
5418 unsigned int b;
5420 fetch_data(the_info, codep + 8);
5421 a = *codep++ & 0xff;
5422 a |= (*codep++ & 0xff) << 8;
5423 a |= (*codep++ & 0xff) << 16;
5424 a |= (*codep++ & 0xff) << 24;
5425 b = *codep++ & 0xff;
5426 b |= (*codep++ & 0xff) << 8;
5427 b |= (*codep++ & 0xff) << 16;
5428 b |= (*codep++ & 0xff) << 24;
5429 x = a + ((bfd_vma) b << 32);
5430 #else
5431 abort ();
5432 x = 0;
5433 #endif
5434 return x;
5437 static bfd_signed_vma
5438 get32 (void)
5440 bfd_signed_vma x = 0;
5442 fetch_data(the_info, codep + 4);
5443 x = *codep++ & (bfd_signed_vma) 0xff;
5444 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
5445 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
5446 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
5447 return x;
5450 static bfd_signed_vma
5451 get32s (void)
5453 bfd_signed_vma x = 0;
5455 fetch_data(the_info, codep + 4);
5456 x = *codep++ & (bfd_signed_vma) 0xff;
5457 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
5458 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
5459 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
5461 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
5463 return x;
5466 static int
5467 get16 (void)
5469 int x = 0;
5471 fetch_data(the_info, codep + 2);
5472 x = *codep++ & 0xff;
5473 x |= (*codep++ & 0xff) << 8;
5474 return x;
5477 static void
5478 set_op (bfd_vma op, int riprel)
5480 op_index[op_ad] = op_ad;
5481 if (address_mode == mode_64bit)
5483 op_address[op_ad] = op;
5484 op_riprel[op_ad] = riprel;
5486 else
5488 /* Mask to get a 32-bit address. */
5489 op_address[op_ad] = op & 0xffffffff;
5490 op_riprel[op_ad] = riprel & 0xffffffff;
5494 static void
5495 OP_REG (int code, int sizeflag)
5497 const char *s;
5498 int add = 0;
5499 USED_REX (REX_B);
5500 if (rex & REX_B)
5501 add = 8;
5503 switch (code)
5505 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
5506 case sp_reg: case bp_reg: case si_reg: case di_reg:
5507 s = names16[code - ax_reg + add];
5508 break;
5509 case es_reg: case ss_reg: case cs_reg:
5510 case ds_reg: case fs_reg: case gs_reg:
5511 s = names_seg[code - es_reg + add];
5512 break;
5513 case al_reg: case ah_reg: case cl_reg: case ch_reg:
5514 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
5515 USED_REX (0);
5516 if (rex)
5517 s = names8rex[code - al_reg + add];
5518 else
5519 s = names8[code - al_reg];
5520 break;
5521 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
5522 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
5523 if (address_mode == mode_64bit && (sizeflag & DFLAG))
5525 s = names64[code - rAX_reg + add];
5526 break;
5528 code += eAX_reg - rAX_reg;
5529 /* Fall through. */
5530 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
5531 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
5532 USED_REX (REX_W);
5533 if (rex & REX_W)
5534 s = names64[code - eAX_reg + add];
5535 else if (sizeflag & DFLAG)
5536 s = names32[code - eAX_reg + add];
5537 else
5538 s = names16[code - eAX_reg + add];
5539 used_prefixes |= (prefixes & PREFIX_DATA);
5540 break;
5541 default:
5542 s = INTERNAL_DISASSEMBLER_ERROR;
5543 break;
5545 oappend (s);
5548 static void
5549 OP_IMREG (int code, int sizeflag)
5551 const char *s;
5553 switch (code)
5555 case indir_dx_reg:
5556 if (intel_syntax)
5557 s = "dx";
5558 else
5559 s = "(%dx)";
5560 break;
5561 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
5562 case sp_reg: case bp_reg: case si_reg: case di_reg:
5563 s = names16[code - ax_reg];
5564 break;
5565 case es_reg: case ss_reg: case cs_reg:
5566 case ds_reg: case fs_reg: case gs_reg:
5567 s = names_seg[code - es_reg];
5568 break;
5569 case al_reg: case ah_reg: case cl_reg: case ch_reg:
5570 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
5571 USED_REX (0);
5572 if (rex)
5573 s = names8rex[code - al_reg];
5574 else
5575 s = names8[code - al_reg];
5576 break;
5577 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
5578 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
5579 USED_REX (REX_W);
5580 if (rex & REX_W)
5581 s = names64[code - eAX_reg];
5582 else if (sizeflag & DFLAG)
5583 s = names32[code - eAX_reg];
5584 else
5585 s = names16[code - eAX_reg];
5586 used_prefixes |= (prefixes & PREFIX_DATA);
5587 break;
5588 case z_mode_ax_reg:
5589 if ((rex & REX_W) || (sizeflag & DFLAG))
5590 s = *names32;
5591 else
5592 s = *names16;
5593 if (!(rex & REX_W))
5594 used_prefixes |= (prefixes & PREFIX_DATA);
5595 break;
5596 default:
5597 s = INTERNAL_DISASSEMBLER_ERROR;
5598 break;
5600 oappend (s);
5603 static void
5604 OP_I (int bytemode, int sizeflag)
5606 bfd_signed_vma op;
5607 bfd_signed_vma mask = -1;
5609 switch (bytemode)
5611 case b_mode:
5612 fetch_data(the_info, codep + 1);
5613 op = *codep++;
5614 mask = 0xff;
5615 break;
5616 case q_mode:
5617 if (address_mode == mode_64bit)
5619 op = get32s ();
5620 break;
5622 /* Fall through. */
5623 case v_mode:
5624 USED_REX (REX_W);
5625 if (rex & REX_W)
5626 op = get32s ();
5627 else if (sizeflag & DFLAG)
5629 op = get32 ();
5630 mask = 0xffffffff;
5632 else
5634 op = get16 ();
5635 mask = 0xfffff;
5637 used_prefixes |= (prefixes & PREFIX_DATA);
5638 break;
5639 case w_mode:
5640 mask = 0xfffff;
5641 op = get16 ();
5642 break;
5643 case const_1_mode:
5644 if (intel_syntax)
5645 oappend ("1");
5646 return;
5647 default:
5648 oappend (INTERNAL_DISASSEMBLER_ERROR);
5649 return;
5652 op &= mask;
5653 scratchbuf[0] = '$';
5654 print_operand_value (scratchbuf + 1, sizeof(scratchbuf) - 1, 1, op);
5655 oappend (scratchbuf + intel_syntax);
5656 scratchbuf[0] = '\0';
5659 static void
5660 OP_I64 (int bytemode, int sizeflag)
5662 bfd_signed_vma op;
5663 bfd_signed_vma mask = -1;
5665 if (address_mode != mode_64bit)
5667 OP_I (bytemode, sizeflag);
5668 return;
5671 switch (bytemode)
5673 case b_mode:
5674 fetch_data(the_info, codep + 1);
5675 op = *codep++;
5676 mask = 0xff;
5677 break;
5678 case v_mode:
5679 USED_REX (REX_W);
5680 if (rex & REX_W)
5681 op = get64 ();
5682 else if (sizeflag & DFLAG)
5684 op = get32 ();
5685 mask = 0xffffffff;
5687 else
5689 op = get16 ();
5690 mask = 0xfffff;
5692 used_prefixes |= (prefixes & PREFIX_DATA);
5693 break;
5694 case w_mode:
5695 mask = 0xfffff;
5696 op = get16 ();
5697 break;
5698 default:
5699 oappend (INTERNAL_DISASSEMBLER_ERROR);
5700 return;
5703 op &= mask;
5704 scratchbuf[0] = '$';
5705 print_operand_value (scratchbuf + 1, sizeof(scratchbuf) - 1, 1, op);
5706 oappend (scratchbuf + intel_syntax);
5707 scratchbuf[0] = '\0';
5710 static void
5711 OP_sI (int bytemode, int sizeflag)
5713 bfd_signed_vma op;
5715 switch (bytemode)
5717 case b_mode:
5718 fetch_data(the_info, codep + 1);
5719 op = *codep++;
5720 if ((op & 0x80) != 0)
5721 op -= 0x100;
5722 break;
5723 case v_mode:
5724 USED_REX (REX_W);
5725 if (rex & REX_W)
5726 op = get32s ();
5727 else if (sizeflag & DFLAG)
5729 op = get32s ();
5731 else
5733 op = get16 ();
5734 if ((op & 0x8000) != 0)
5735 op -= 0x10000;
5737 used_prefixes |= (prefixes & PREFIX_DATA);
5738 break;
5739 case w_mode:
5740 op = get16 ();
5741 if ((op & 0x8000) != 0)
5742 op -= 0x10000;
5743 break;
5744 default:
5745 oappend (INTERNAL_DISASSEMBLER_ERROR);
5746 return;
5749 scratchbuf[0] = '$';
5750 print_operand_value (scratchbuf + 1, sizeof(scratchbuf) - 1, 1, op);
5751 oappend (scratchbuf + intel_syntax);
5754 static void
5755 OP_J (int bytemode, int sizeflag)
5757 bfd_vma disp;
5758 bfd_vma mask = -1;
5759 bfd_vma segment = 0;
5761 switch (bytemode)
5763 case b_mode:
5764 fetch_data(the_info, codep + 1);
5765 disp = *codep++;
5766 if ((disp & 0x80) != 0)
5767 disp -= 0x100;
5768 break;
5769 case v_mode:
5770 if ((sizeflag & DFLAG) || (rex & REX_W))
5771 disp = get32s ();
5772 else
5774 disp = get16 ();
5775 if ((disp & 0x8000) != 0)
5776 disp -= 0x10000;
5777 /* In 16bit mode, address is wrapped around at 64k within
5778 the same segment. Otherwise, a data16 prefix on a jump
5779 instruction means that the pc is masked to 16 bits after
5780 the displacement is added! */
5781 mask = 0xffff;
5782 if ((prefixes & PREFIX_DATA) == 0)
5783 segment = ((start_pc + codep - start_codep)
5784 & ~((bfd_vma) 0xffff));
5786 used_prefixes |= (prefixes & PREFIX_DATA);
5787 break;
5788 default:
5789 oappend (INTERNAL_DISASSEMBLER_ERROR);
5790 return;
5792 disp = ((start_pc + codep - start_codep + disp) & mask) | segment;
5793 set_op (disp, 0);
5794 print_operand_value (scratchbuf, sizeof(scratchbuf), 1, disp);
5795 oappend (scratchbuf);
5798 static void
5799 OP_SEG (int bytemode, int sizeflag)
5801 if (bytemode == w_mode)
5802 oappend (names_seg[modrm.reg]);
5803 else
5804 OP_E (modrm.mod == 3 ? bytemode : w_mode, sizeflag);
5807 static void
5808 OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
5810 int seg, offset;
5812 if (sizeflag & DFLAG)
5814 offset = get32 ();
5815 seg = get16 ();
5817 else
5819 offset = get16 ();
5820 seg = get16 ();
5822 used_prefixes |= (prefixes & PREFIX_DATA);
5823 if (intel_syntax)
5824 snprintf (scratchbuf, sizeof(scratchbuf), "0x%x:0x%x", seg, offset);
5825 else
5826 snprintf (scratchbuf, sizeof(scratchbuf), "$0x%x,$0x%x", seg, offset);
5827 oappend (scratchbuf);
5830 static void
5831 OP_OFF (int bytemode, int sizeflag)
5833 bfd_vma off;
5835 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
5836 intel_operand_size (bytemode, sizeflag);
5837 append_seg ();
5839 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
5840 off = get32 ();
5841 else
5842 off = get16 ();
5844 if (intel_syntax)
5846 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5847 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
5849 oappend (names_seg[ds_reg - es_reg]);
5850 oappend (":");
5853 print_operand_value (scratchbuf, sizeof(scratchbuf), 1, off);
5854 oappend (scratchbuf);
5857 static void
5858 OP_OFF64 (int bytemode, int sizeflag)
5860 bfd_vma off;
5862 if (address_mode != mode_64bit
5863 || (prefixes & PREFIX_ADDR))
5865 OP_OFF (bytemode, sizeflag);
5866 return;
5869 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
5870 intel_operand_size (bytemode, sizeflag);
5871 append_seg ();
5873 off = get64 ();
5875 if (intel_syntax)
5877 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5878 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
5880 oappend (names_seg[ds_reg - es_reg]);
5881 oappend (":");
5884 print_operand_value (scratchbuf, sizeof(scratchbuf), 1, off);
5885 oappend (scratchbuf);
5888 static void
5889 ptr_reg (int code, int sizeflag)
5891 const char *s;
5893 *obufp++ = open_char;
5894 used_prefixes |= (prefixes & PREFIX_ADDR);
5895 if (address_mode == mode_64bit)
5897 if (!(sizeflag & AFLAG))
5898 s = names32[code - eAX_reg];
5899 else
5900 s = names64[code - eAX_reg];
5902 else if (sizeflag & AFLAG)
5903 s = names32[code - eAX_reg];
5904 else
5905 s = names16[code - eAX_reg];
5906 oappend (s);
5907 *obufp++ = close_char;
5908 *obufp = 0;
5911 static void
5912 OP_ESreg (int code, int sizeflag)
5914 if (intel_syntax)
5916 switch (codep[-1])
5918 case 0x6d: /* insw/insl */
5919 intel_operand_size (z_mode, sizeflag);
5920 break;
5921 case 0xa5: /* movsw/movsl/movsq */
5922 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5923 case 0xab: /* stosw/stosl */
5924 case 0xaf: /* scasw/scasl */
5925 intel_operand_size (v_mode, sizeflag);
5926 break;
5927 default:
5928 intel_operand_size (b_mode, sizeflag);
5931 oappend ("%es:" + intel_syntax);
5932 ptr_reg (code, sizeflag);
5935 static void
5936 OP_DSreg (int code, int sizeflag)
5938 if (intel_syntax)
5940 switch (codep[-1])
5942 case 0x6f: /* outsw/outsl */
5943 intel_operand_size (z_mode, sizeflag);
5944 break;
5945 case 0xa5: /* movsw/movsl/movsq */
5946 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5947 case 0xad: /* lodsw/lodsl/lodsq */
5948 intel_operand_size (v_mode, sizeflag);
5949 break;
5950 default:
5951 intel_operand_size (b_mode, sizeflag);
5954 if ((prefixes
5955 & (PREFIX_CS
5956 | PREFIX_DS
5957 | PREFIX_SS
5958 | PREFIX_ES
5959 | PREFIX_FS
5960 | PREFIX_GS)) == 0)
5961 prefixes |= PREFIX_DS;
5962 append_seg ();
5963 ptr_reg (code, sizeflag);
5966 static void
5967 OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5969 int add = 0;
5970 if (rex & REX_R)
5972 USED_REX (REX_R);
5973 add = 8;
5975 else if (address_mode != mode_64bit && (prefixes & PREFIX_LOCK))
5977 used_prefixes |= PREFIX_LOCK;
5978 add = 8;
5980 snprintf (scratchbuf, sizeof(scratchbuf), "%%cr%d", modrm.reg + add);
5981 oappend (scratchbuf + intel_syntax);
5984 static void
5985 OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5987 int add = 0;
5988 USED_REX (REX_R);
5989 if (rex & REX_R)
5990 add = 8;
5991 if (intel_syntax)
5992 snprintf (scratchbuf, sizeof(scratchbuf), "db%d", modrm.reg + add);
5993 else
5994 snprintf (scratchbuf, sizeof(scratchbuf), "%%db%d", modrm.reg + add);
5995 oappend (scratchbuf);
5998 static void
5999 OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
6001 snprintf (scratchbuf, sizeof(scratchbuf), "%%tr%d", modrm.reg);
6002 oappend (scratchbuf + intel_syntax);
6005 static void
6006 OP_R (int bytemode, int sizeflag)
6008 if (modrm.mod == 3)
6009 OP_E (bytemode, sizeflag);
6010 else
6011 BadOp ();
6014 static void
6015 OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
6017 used_prefixes |= (prefixes & PREFIX_DATA);
6018 if (prefixes & PREFIX_DATA)
6020 int add = 0;
6021 USED_REX (REX_R);
6022 if (rex & REX_R)
6023 add = 8;
6024 snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", modrm.reg + add);
6026 else
6027 snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", modrm.reg);
6028 oappend (scratchbuf + intel_syntax);
6031 static void
6032 OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
6034 int add = 0;
6035 USED_REX (REX_R);
6036 if (rex & REX_R)
6037 add = 8;
6038 snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", modrm.reg + add);
6039 oappend (scratchbuf + intel_syntax);
6042 static void
6043 OP_EM (int bytemode, int sizeflag)
6045 if (modrm.mod != 3)
6047 if (intel_syntax && bytemode == v_mode)
6049 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
6050 used_prefixes |= (prefixes & PREFIX_DATA);
6052 OP_E (bytemode, sizeflag);
6053 return;
6056 /* Skip mod/rm byte. */
6057 MODRM_CHECK;
6058 codep++;
6059 used_prefixes |= (prefixes & PREFIX_DATA);
6060 if (prefixes & PREFIX_DATA)
6062 int add = 0;
6064 USED_REX (REX_B);
6065 if (rex & REX_B)
6066 add = 8;
6067 snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", modrm.rm + add);
6069 else
6070 snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", modrm.rm);
6071 oappend (scratchbuf + intel_syntax);
6074 /* cvt* are the only instructions in sse2 which have
6075 both SSE and MMX operands and also have 0x66 prefix
6076 in their opcode. 0x66 was originally used to differentiate
6077 between SSE and MMX instruction(operands). So we have to handle the
6078 cvt* separately using OP_EMC and OP_MXC */
6079 static void
6080 OP_EMC (int bytemode, int sizeflag)
6082 if (modrm.mod != 3)
6084 if (intel_syntax && bytemode == v_mode)
6086 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
6087 used_prefixes |= (prefixes & PREFIX_DATA);
6089 OP_E (bytemode, sizeflag);
6090 return;
6093 /* Skip mod/rm byte. */
6094 MODRM_CHECK;
6095 codep++;
6096 used_prefixes |= (prefixes & PREFIX_DATA);
6097 snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", modrm.rm);
6098 oappend (scratchbuf + intel_syntax);
6101 static void
6102 OP_MXC (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
6104 used_prefixes |= (prefixes & PREFIX_DATA);
6105 snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", modrm.reg);
6106 oappend (scratchbuf + intel_syntax);
6109 static void
6110 OP_EX (int bytemode, int sizeflag)
6112 int add = 0;
6113 if (modrm.mod != 3)
6115 OP_E (bytemode, sizeflag);
6116 return;
6118 USED_REX (REX_B);
6119 if (rex & REX_B)
6120 add = 8;
6122 /* Skip mod/rm byte. */
6123 MODRM_CHECK;
6124 codep++;
6125 snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", modrm.rm + add);
6126 oappend (scratchbuf + intel_syntax);
6129 static void
6130 OP_MS (int bytemode, int sizeflag)
6132 if (modrm.mod == 3)
6133 OP_EM (bytemode, sizeflag);
6134 else
6135 BadOp ();
6138 static void
6139 OP_XS (int bytemode, int sizeflag)
6141 if (modrm.mod == 3)
6142 OP_EX (bytemode, sizeflag);
6143 else
6144 BadOp ();
6147 static void
6148 OP_M (int bytemode, int sizeflag)
6150 if (modrm.mod == 3)
6151 /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
6152 BadOp ();
6153 else
6154 OP_E (bytemode, sizeflag);
6157 static void
6158 OP_0f07 (int bytemode, int sizeflag)
6160 if (modrm.mod != 3 || modrm.rm != 0)
6161 BadOp ();
6162 else
6163 OP_E (bytemode, sizeflag);
6166 static void
6167 OP_0fae (int bytemode, int sizeflag)
6169 if (modrm.mod == 3)
6171 if (modrm.reg == 7)
6172 strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence");
6174 if (modrm.reg < 5 || modrm.rm != 0)
6176 BadOp (); /* bad sfence, mfence, or lfence */
6177 return;
6180 else if (modrm.reg != 7)
6182 BadOp (); /* bad clflush */
6183 return;
6186 OP_E (bytemode, sizeflag);
6189 /* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
6190 32bit mode and "xchg %rax,%rax" in 64bit mode. */
6192 static void
6193 NOP_Fixup1 (int bytemode, int sizeflag)
6195 if ((prefixes & PREFIX_DATA) != 0
6196 || (rex != 0
6197 && rex != 0x48
6198 && address_mode == mode_64bit))
6199 OP_REG (bytemode, sizeflag);
6200 else
6201 strcpy (obuf, "nop");
6204 static void
6205 NOP_Fixup2 (int bytemode, int sizeflag)
6207 if ((prefixes & PREFIX_DATA) != 0
6208 || (rex != 0
6209 && rex != 0x48
6210 && address_mode == mode_64bit))
6211 OP_IMREG (bytemode, sizeflag);
6214 static const char *Suffix3DNow[] = {
6215 /* 00 */ NULL, NULL, NULL, NULL,
6216 /* 04 */ NULL, NULL, NULL, NULL,
6217 /* 08 */ NULL, NULL, NULL, NULL,
6218 /* 0C */ "pi2fw", "pi2fd", NULL, NULL,
6219 /* 10 */ NULL, NULL, NULL, NULL,
6220 /* 14 */ NULL, NULL, NULL, NULL,
6221 /* 18 */ NULL, NULL, NULL, NULL,
6222 /* 1C */ "pf2iw", "pf2id", NULL, NULL,
6223 /* 20 */ NULL, NULL, NULL, NULL,
6224 /* 24 */ NULL, NULL, NULL, NULL,
6225 /* 28 */ NULL, NULL, NULL, NULL,
6226 /* 2C */ NULL, NULL, NULL, NULL,
6227 /* 30 */ NULL, NULL, NULL, NULL,
6228 /* 34 */ NULL, NULL, NULL, NULL,
6229 /* 38 */ NULL, NULL, NULL, NULL,
6230 /* 3C */ NULL, NULL, NULL, NULL,
6231 /* 40 */ NULL, NULL, NULL, NULL,
6232 /* 44 */ NULL, NULL, NULL, NULL,
6233 /* 48 */ NULL, NULL, NULL, NULL,
6234 /* 4C */ NULL, NULL, NULL, NULL,
6235 /* 50 */ NULL, NULL, NULL, NULL,
6236 /* 54 */ NULL, NULL, NULL, NULL,
6237 /* 58 */ NULL, NULL, NULL, NULL,
6238 /* 5C */ NULL, NULL, NULL, NULL,
6239 /* 60 */ NULL, NULL, NULL, NULL,
6240 /* 64 */ NULL, NULL, NULL, NULL,
6241 /* 68 */ NULL, NULL, NULL, NULL,
6242 /* 6C */ NULL, NULL, NULL, NULL,
6243 /* 70 */ NULL, NULL, NULL, NULL,
6244 /* 74 */ NULL, NULL, NULL, NULL,
6245 /* 78 */ NULL, NULL, NULL, NULL,
6246 /* 7C */ NULL, NULL, NULL, NULL,
6247 /* 80 */ NULL, NULL, NULL, NULL,
6248 /* 84 */ NULL, NULL, NULL, NULL,
6249 /* 88 */ NULL, NULL, "pfnacc", NULL,
6250 /* 8C */ NULL, NULL, "pfpnacc", NULL,
6251 /* 90 */ "pfcmpge", NULL, NULL, NULL,
6252 /* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
6253 /* 98 */ NULL, NULL, "pfsub", NULL,
6254 /* 9C */ NULL, NULL, "pfadd", NULL,
6255 /* A0 */ "pfcmpgt", NULL, NULL, NULL,
6256 /* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
6257 /* A8 */ NULL, NULL, "pfsubr", NULL,
6258 /* AC */ NULL, NULL, "pfacc", NULL,
6259 /* B0 */ "pfcmpeq", NULL, NULL, NULL,
6260 /* B4 */ "pfmul", NULL, "pfrcpit2", "pmulhrw",
6261 /* B8 */ NULL, NULL, NULL, "pswapd",
6262 /* BC */ NULL, NULL, NULL, "pavgusb",
6263 /* C0 */ NULL, NULL, NULL, NULL,
6264 /* C4 */ NULL, NULL, NULL, NULL,
6265 /* C8 */ NULL, NULL, NULL, NULL,
6266 /* CC */ NULL, NULL, NULL, NULL,
6267 /* D0 */ NULL, NULL, NULL, NULL,
6268 /* D4 */ NULL, NULL, NULL, NULL,
6269 /* D8 */ NULL, NULL, NULL, NULL,
6270 /* DC */ NULL, NULL, NULL, NULL,
6271 /* E0 */ NULL, NULL, NULL, NULL,
6272 /* E4 */ NULL, NULL, NULL, NULL,
6273 /* E8 */ NULL, NULL, NULL, NULL,
6274 /* EC */ NULL, NULL, NULL, NULL,
6275 /* F0 */ NULL, NULL, NULL, NULL,
6276 /* F4 */ NULL, NULL, NULL, NULL,
6277 /* F8 */ NULL, NULL, NULL, NULL,
6278 /* FC */ NULL, NULL, NULL, NULL,
6281 static void
6282 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
6284 const char *mnemonic;
6286 fetch_data(the_info, codep + 1);
6287 /* AMD 3DNow! instructions are specified by an opcode suffix in the
6288 place where an 8-bit immediate would normally go. ie. the last
6289 byte of the instruction. */
6290 obufp = obuf + strlen (obuf);
6291 mnemonic = Suffix3DNow[*codep++ & 0xff];
6292 if (mnemonic)
6293 oappend (mnemonic);
6294 else
6296 /* Since a variable sized modrm/sib chunk is between the start
6297 of the opcode (0x0f0f) and the opcode suffix, we need to do
6298 all the modrm processing first, and don't know until now that
6299 we have a bad opcode. This necessitates some cleaning up. */
6300 op_out[0][0] = '\0';
6301 op_out[1][0] = '\0';
6302 BadOp ();
6306 static const char *simd_cmp_op[] = {
6307 "eq",
6308 "lt",
6309 "le",
6310 "unord",
6311 "neq",
6312 "nlt",
6313 "nle",
6314 "ord"
6317 static void
6318 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
6320 unsigned int cmp_type;
6322 fetch_data(the_info, codep + 1);
6323 obufp = obuf + strlen (obuf);
6324 cmp_type = *codep++ & 0xff;
6325 if (cmp_type < 8)
6327 char suffix1 = 'p', suffix2 = 's';
6328 used_prefixes |= (prefixes & PREFIX_REPZ);
6329 if (prefixes & PREFIX_REPZ)
6330 suffix1 = 's';
6331 else
6333 used_prefixes |= (prefixes & PREFIX_DATA);
6334 if (prefixes & PREFIX_DATA)
6335 suffix2 = 'd';
6336 else
6338 used_prefixes |= (prefixes & PREFIX_REPNZ);
6339 if (prefixes & PREFIX_REPNZ)
6340 suffix1 = 's', suffix2 = 'd';
6343 snprintf (scratchbuf, sizeof(scratchbuf), "cmp%s%c%c",
6344 simd_cmp_op[cmp_type], suffix1, suffix2);
6345 used_prefixes |= (prefixes & PREFIX_REPZ);
6346 oappend (scratchbuf);
6348 else
6350 /* We have a bad extension byte. Clean up. */
6351 op_out[0][0] = '\0';
6352 op_out[1][0] = '\0';
6353 BadOp ();
6357 static void
6358 SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED)
6360 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
6361 forms of these instructions. */
6362 if (modrm.mod == 3)
6364 char *p = obuf + strlen (obuf);
6365 *(p + 1) = '\0';
6366 *p = *(p - 1);
6367 *(p - 1) = *(p - 2);
6368 *(p - 2) = *(p - 3);
6369 *(p - 3) = extrachar;
6373 static void
6374 PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
6376 if (modrm.mod == 3 && modrm.reg == 1 && modrm.rm <= 1)
6378 /* Override "sidt". */
6379 size_t olen = strlen (obuf);
6380 char *p = obuf + olen - 4;
6381 const char * const *names = (address_mode == mode_64bit
6382 ? names64 : names32);
6384 /* We might have a suffix when disassembling with -Msuffix. */
6385 if (*p == 'i')
6386 --p;
6388 /* Remove "addr16/addr32" if we aren't in Intel mode. */
6389 if (!intel_syntax
6390 && (prefixes & PREFIX_ADDR)
6391 && olen >= (4 + 7)
6392 && *(p - 1) == ' '
6393 && strncmp (p - 7, "addr", 4) == 0
6394 && (strncmp (p - 3, "16", 2) == 0
6395 || strncmp (p - 3, "32", 2) == 0))
6396 p -= 7;
6398 if (modrm.rm)
6400 /* mwait %eax,%ecx */
6401 strcpy (p, "mwait");
6402 if (!intel_syntax)
6403 strcpy (op_out[0], names[0]);
6405 else
6407 /* monitor %eax,%ecx,%edx" */
6408 strcpy (p, "monitor");
6409 if (!intel_syntax)
6411 const char * const *op1_names;
6412 if (!(prefixes & PREFIX_ADDR))
6413 op1_names = (address_mode == mode_16bit
6414 ? names16 : names);
6415 else
6417 op1_names = (address_mode != mode_32bit
6418 ? names32 : names16);
6419 used_prefixes |= PREFIX_ADDR;
6421 strcpy (op_out[0], op1_names[0]);
6422 strcpy (op_out[2], names[2]);
6425 if (!intel_syntax)
6427 strcpy (op_out[1], names[1]);
6428 two_source_ops = 1;
6431 codep++;
6433 else
6434 OP_M (0, sizeflag);
6437 static void
6438 SVME_Fixup (int bytemode, int sizeflag)
6440 const char *alt;
6441 char *p;
6443 switch (*codep)
6445 case 0xd8:
6446 alt = "vmrun";
6447 break;
6448 case 0xd9:
6449 alt = "vmmcall";
6450 break;
6451 case 0xda:
6452 alt = "vmload";
6453 break;
6454 case 0xdb:
6455 alt = "vmsave";
6456 break;
6457 case 0xdc:
6458 alt = "stgi";
6459 break;
6460 case 0xdd:
6461 alt = "clgi";
6462 break;
6463 case 0xde:
6464 alt = "skinit";
6465 break;
6466 case 0xdf:
6467 alt = "invlpga";
6468 break;
6469 default:
6470 OP_M (bytemode, sizeflag);
6471 return;
6473 /* Override "lidt". */
6474 p = obuf + strlen (obuf) - 4;
6475 /* We might have a suffix. */
6476 if (*p == 'i')
6477 --p;
6478 strcpy (p, alt);
6479 if (!(prefixes & PREFIX_ADDR))
6481 ++codep;
6482 return;
6484 used_prefixes |= PREFIX_ADDR;
6485 switch (*codep++)
6487 case 0xdf:
6488 strcpy (op_out[1], names32[1]);
6489 two_source_ops = 1;
6490 /* Fall through. */
6491 case 0xd8:
6492 case 0xda:
6493 case 0xdb:
6494 *obufp++ = open_char;
6495 if (address_mode == mode_64bit || (sizeflag & AFLAG))
6496 alt = names32[0];
6497 else
6498 alt = names16[0];
6499 strcpy (obufp, alt);
6500 obufp += strlen (alt);
6501 *obufp++ = close_char;
6502 *obufp = '\0';
6503 break;
6507 static void
6508 INVLPG_Fixup (int bytemode, int sizeflag)
6510 const char *alt;
6512 switch (*codep)
6514 case 0xf8:
6515 alt = "swapgs";
6516 break;
6517 case 0xf9:
6518 alt = "rdtscp";
6519 break;
6520 default:
6521 OP_M (bytemode, sizeflag);
6522 return;
6524 /* Override "invlpg". */
6525 strcpy (obuf + strlen (obuf) - 6, alt);
6526 codep++;
6529 static void
6530 BadOp (void)
6532 /* Throw away prefixes and 1st. opcode byte. */
6533 codep = insn_codep + 1;
6534 oappend ("(bad)");
6537 static void
6538 VMX_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
6540 if (modrm.mod == 3
6541 && modrm.reg == 0
6542 && modrm.rm >=1
6543 && modrm.rm <= 4)
6545 /* Override "sgdt". */
6546 char *p = obuf + strlen (obuf) - 4;
6548 /* We might have a suffix when disassembling with -Msuffix. */
6549 if (*p == 'g')
6550 --p;
6552 switch (modrm.rm)
6554 case 1:
6555 strcpy (p, "vmcall");
6556 break;
6557 case 2:
6558 strcpy (p, "vmlaunch");
6559 break;
6560 case 3:
6561 strcpy (p, "vmresume");
6562 break;
6563 case 4:
6564 strcpy (p, "vmxoff");
6565 break;
6568 codep++;
6570 else
6571 OP_E (0, sizeflag);
6574 static void
6575 OP_VMX (int bytemode, int sizeflag)
6577 used_prefixes |= (prefixes & (PREFIX_DATA | PREFIX_REPZ));
6578 if (prefixes & PREFIX_DATA)
6579 strcpy (obuf, "vmclear");
6580 else if (prefixes & PREFIX_REPZ)
6581 strcpy (obuf, "vmxon");
6582 else
6583 strcpy (obuf, "vmptrld");
6584 OP_E (bytemode, sizeflag);
6587 static void
6588 REP_Fixup (int bytemode, int sizeflag)
6590 /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
6591 lods and stos. */
6592 size_t ilen = 0;
6594 if (prefixes & PREFIX_REPZ)
6595 switch (*insn_codep)
6597 case 0x6e: /* outsb */
6598 case 0x6f: /* outsw/outsl */
6599 case 0xa4: /* movsb */
6600 case 0xa5: /* movsw/movsl/movsq */
6601 if (!intel_syntax)
6602 ilen = 5;
6603 else
6604 ilen = 4;
6605 break;
6606 case 0xaa: /* stosb */
6607 case 0xab: /* stosw/stosl/stosq */
6608 case 0xac: /* lodsb */
6609 case 0xad: /* lodsw/lodsl/lodsq */
6610 if (!intel_syntax && (sizeflag & SUFFIX_ALWAYS))
6611 ilen = 5;
6612 else
6613 ilen = 4;
6614 break;
6615 case 0x6c: /* insb */
6616 case 0x6d: /* insl/insw */
6617 if (!intel_syntax)
6618 ilen = 4;
6619 else
6620 ilen = 3;
6621 break;
6622 default:
6623 abort ();
6624 break;
6627 if (ilen != 0)
6629 size_t olen;
6630 char *p;
6632 olen = strlen (obuf);
6633 p = obuf + olen - ilen - 1 - 4;
6634 /* Handle "repz [addr16|addr32]". */
6635 if ((prefixes & PREFIX_ADDR))
6636 p -= 1 + 6;
6638 memmove (p + 3, p + 4, olen - (p + 3 - obuf));
6641 switch (bytemode)
6643 case al_reg:
6644 case eAX_reg:
6645 case indir_dx_reg:
6646 OP_IMREG (bytemode, sizeflag);
6647 break;
6648 case eDI_reg:
6649 OP_ESreg (bytemode, sizeflag);
6650 break;
6651 case eSI_reg:
6652 OP_DSreg (bytemode, sizeflag);
6653 break;
6654 default:
6655 abort ();
6656 break;
6660 static void
6661 CMPXCHG8B_Fixup (int bytemode, int sizeflag)
6663 USED_REX (REX_W);
6664 if (rex & REX_W)
6666 /* Change cmpxchg8b to cmpxchg16b. */
6667 char *p = obuf + strlen (obuf) - 2;
6668 strcpy (p, "16b");
6669 bytemode = o_mode;
6671 OP_M (bytemode, sizeflag);
6674 static void
6675 XMM_Fixup (int reg, int sizeflag ATTRIBUTE_UNUSED)
6677 snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", reg);
6678 oappend (scratchbuf + intel_syntax);
6681 static void
6682 CRC32_Fixup (int bytemode, int sizeflag)
6684 /* Add proper suffix to "crc32". */
6685 char *p = obuf + strlen (obuf);
6687 switch (bytemode)
6689 case b_mode:
6690 if (intel_syntax)
6691 break;
6693 *p++ = 'b';
6694 break;
6695 case v_mode:
6696 if (intel_syntax)
6697 break;
6699 USED_REX (REX_W);
6700 if (rex & REX_W)
6701 *p++ = 'q';
6702 else if (sizeflag & DFLAG)
6703 *p++ = 'l';
6704 else
6705 *p++ = 'w';
6706 used_prefixes |= (prefixes & PREFIX_DATA);
6707 break;
6708 default:
6709 oappend (INTERNAL_DISASSEMBLER_ERROR);
6710 break;
6712 *p = '\0';
6714 if (modrm.mod == 3)
6716 int add;
6718 /* Skip mod/rm byte. */
6719 MODRM_CHECK;
6720 codep++;
6722 USED_REX (REX_B);
6723 add = (rex & REX_B) ? 8 : 0;
6724 if (bytemode == b_mode)
6726 USED_REX (0);
6727 if (rex)
6728 oappend (names8rex[modrm.rm + add]);
6729 else
6730 oappend (names8[modrm.rm + add]);
6732 else
6734 USED_REX (REX_W);
6735 if (rex & REX_W)
6736 oappend (names64[modrm.rm + add]);
6737 else if ((prefixes & PREFIX_DATA))
6738 oappend (names16[modrm.rm + add]);
6739 else
6740 oappend (names32[modrm.rm + add]);
6743 else
6744 OP_E (bytemode, sizeflag);