hw/i386/acpi-dsdt.dsl

   1 /*
   2  * Bochs/QEMU ACPI DSDT ASL definition
   3  *
   4  * Copyright (c) 2006 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License version 2 as published by the Free Software Foundation.
   9  *
  10  * This library is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13  * Lesser General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU Lesser General Public
  16  * License along with this library; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  18  */
  19
  20 ACPI_EXTRACT_ALL_CODE AcpiDsdtAmlCode
  21
  22 DefinitionBlock (
  23     "acpi-dsdt.aml",    // Output Filename
  24     "DSDT",             // Signature
  25     0x01,               // DSDT Compliance Revision
  26     "BXPC",             // OEMID
  27     "BXDSDT",           // TABLE ID
  28     0x1                 // OEM Revision
  29     )
  30 {
  31
  32 #include "acpi-dsdt-dbug.dsl"
  33
  34     Scope(\_SB) {
  35         Device(PCI0) {
  36             Name(_HID, EisaId("PNP0A03"))
  37             Name(_ADR, 0x00)
  38             Name(_UID, 1)
  39 //#define PX13 S0B_
  40 //            External(PX13, DeviceObj)
  41         }
  42     }
  43
  44 #include "acpi-dsdt-hpet.dsl"
  45
  46
  47 /****************************************************************
  48  * PIIX4 PM
  49  ****************************************************************/
  50
  51     Scope(\_SB.PCI0) {
  52         Device(PX13) {
  53             Name(_ADR, 0x00010003)
  54             OperationRegion(P13C, PCI_Config, 0x00, 0xff)
  55         }
  56     }
  57
  58
  59 /****************************************************************
  60  * PIIX3 ISA bridge
  61  ****************************************************************/
  62
  63     Scope(\_SB.PCI0) {
  64
  65         External(ISA, DeviceObj)
  66
  67         Device(ISA) {
  68             Name(_ADR, 0x00010000)
  69
  70             /* PIIX PCI to ISA irq remapping */
  71             OperationRegion(P40C, PCI_Config, 0x60, 0x04)
  72
  73             /* enable bits */
  74             Field(\_SB.PCI0.PX13.P13C, AnyAcc, NoLock, Preserve) {
  75                 Offset(0x5f),
  76                 , 7,
  77                 LPEN, 1,         // LPT
  78                 Offset(0x67),
  79                 , 3,
  80                 CAEN, 1,         // COM1
  81                 , 3,
  82                 CBEN, 1,         // COM2
  83             }
  84             Name(FDEN, 1)
  85         }
  86     }
  87
  88 #define DSDT_APPLESMC_STA piix_dsdt_applesmc_sta
  89 #include "acpi-dsdt-isa.dsl"
  90
  91
  92 /****************************************************************
  93  * PCI hotplug
  94  ****************************************************************/
  95
  96     Scope(\_SB.PCI0) {
  97         OperationRegion(PCST, SystemIO, 0xae00, 0x08)
  98         Field(PCST, DWordAcc, NoLock, WriteAsZeros) {
  99             PCIU, 32,
 100             PCID, 32,
 101         }
 102
 103         OperationRegion(SEJ, SystemIO, 0xae08, 0x04)
 104         Field(SEJ, DWordAcc, NoLock, WriteAsZeros) {
 105             B0EJ, 32,
 106         }
 107
 108         OperationRegion(BNMR, SystemIO, 0xae10, 0x04)
 109         Field(BNMR, DWordAcc, NoLock, WriteAsZeros) {
 110             BNUM, 32,
 111         }
 112
 113         /* Lock to protect access to fields above. */
 114         Mutex(BLCK, 0)
 115
 116         /* Methods called by bulk generated PCI devices below */
 117
 118         /* Methods called by hotplug devices */
 119         Method(PCEJ, 2, NotSerialized) {
 120             // _EJ0 method - eject callback
 121             Acquire(BLCK, 0xFFFF)
 122             Store(Arg0, BNUM)
 123             Store(ShiftLeft(1, Arg1), B0EJ)
 124             Release(BLCK)
 125             Return (0x0)
 126         }
 127
 128         /* Hotplug notification method supplied by SSDT */
 129         External(\_SB.PCI0.PCNT, MethodObj)
 130     }
 131
 132
 133 /****************************************************************
 134  * PCI IRQs
 135  ****************************************************************/
 136
 137     Scope(\_SB) {
 138         Scope(PCI0) {
 139             Method (_PRT, 0) {
 140                 Store(Package(128) {}, Local0)
 141                 Store(Zero, Local1)
 142                 While(LLess(Local1, 128)) {
 143                     // slot = pin >> 2
 144                     Store(ShiftRight(Local1, 2), Local2)
 145
 146                     // lnk = (slot + pin) & 3
 147                     Store(And(Add(Local1, Local2), 3), Local3)
 148                     If (LEqual(Local3, 0)) {
 149                         Store(Package(4) { Zero, Zero, LNKD, Zero }, Local4)
 150                     }
 151                     If (LEqual(Local3, 1)) {
 152                         // device 1 is the power-management device, needs SCI
 153                         If (LEqual(Local1, 4)) {
 154                             Store(Package(4) { Zero, Zero, LNKS, Zero }, Local4)
 155                         } Else {
 156                             Store(Package(4) { Zero, Zero, LNKA, Zero }, Local4)
 157                         }
 158                     }
 159                     If (LEqual(Local3, 2)) {
 160                         Store(Package(4) { Zero, Zero, LNKB, Zero }, Local4)
 161                     }
 162                     If (LEqual(Local3, 3)) {
 163                         Store(Package(4) { Zero, Zero, LNKC, Zero }, Local4)
 164                     }
 165
 166                     // Complete the interrupt routing entry:
 167                     //    Package(4) { 0x[slot]FFFF, [pin], [link], 0) }
 168
 169                     Store(Or(ShiftLeft(Local2, 16), 0xFFFF), Index(Local4, 0))
 170                     Store(And(Local1, 3),                    Index(Local4, 1))
 171                     Store(Local4,                            Index(Local0, Local1))
 172
 173                     Increment(Local1)
 174                 }
 175
 176                 Return(Local0)
 177             }
 178         }
 179
 180         Field(PCI0.ISA.P40C, ByteAcc, NoLock, Preserve) {
 181             PRQ0,   8,
 182             PRQ1,   8,
 183             PRQ2,   8,
 184             PRQ3,   8
 185         }
 186
 187         Method(IQST, 1, NotSerialized) {
 188             // _STA method - get status
 189             If (And(0x80, Arg0)) {
 190                 Return (0x09)
 191             }
 192             Return (0x0B)
 193         }
 194         Method(IQCR, 1, Serialized) {
 195             // _CRS method - get current settings
 196             Name(PRR0, ResourceTemplate() {
 197                 Interrupt(, Level, ActiveHigh, Shared) { 0 }
 198             })
 199             CreateDWordField(PRR0, 0x05, PRRI)
 200             If (LLess(Arg0, 0x80)) {
 201                 Store(Arg0, PRRI)
 202             }
 203             Return (PRR0)
 204         }
 205
 206 #define define_link(link, uid, reg)                             \
 207         Device(link) {                                          \
 208             Name(_HID, EISAID("PNP0C0F"))                       \
 209             Name(_UID, uid)                                     \
 210             Name(_PRS, ResourceTemplate() {                     \
 211                 Interrupt(, Level, ActiveHigh, Shared) {        \
 212                     5, 10, 11                                   \
 213                 }                                               \
 214             })                                                  \
 215             Method(_STA, 0, NotSerialized) {                    \
 216                 Return (IQST(reg))                              \
 217             }                                                   \
 218             Method(_DIS, 0, NotSerialized) {                    \
 219                 Or(reg, 0x80, reg)                              \
 220             }                                                   \
 221             Method(_CRS, 0, NotSerialized) {                    \
 222                 Return (IQCR(reg))                              \
 223             }                                                   \
 224             Method(_SRS, 1, NotSerialized) {                    \
 225                 CreateDWordField(Arg0, 0x05, PRRI)              \
 226                 Store(PRRI, reg)                                \
 227             }                                                   \
 228         }
 229
 230         define_link(LNKA, 0, PRQ0)
 231         define_link(LNKB, 1, PRQ1)
 232         define_link(LNKC, 2, PRQ2)
 233         define_link(LNKD, 3, PRQ3)
 234
 235         Device(LNKS) {
 236             Name(_HID, EISAID("PNP0C0F"))
 237             Name(_UID, 4)
 238             Name(_PRS, ResourceTemplate() {
 239                 Interrupt(, Level, ActiveHigh, Shared) { 9 }
 240             })
 241
 242             // The SCI cannot be disabled and is always attached to GSI 9,
 243             // so these are no-ops.  We only need this link to override the
 244             // polarity to active high and match the content of the MADT.
 245             Method(_STA, 0, NotSerialized) { Return (0x0b) }
 246             Method(_DIS, 0, NotSerialized) { }
 247             Method(_CRS, 0, NotSerialized) { Return (_PRS) }
 248             Method(_SRS, 1, NotSerialized) { }
 249         }
 250     }
 251
 252 #include "hw/acpi/pc-hotplug.h"
 253 #define CPU_STATUS_BASE PIIX4_CPU_HOTPLUG_IO_BASE
 254 #include "acpi-dsdt-cpu-hotplug.dsl"
 255 #include "acpi-dsdt-mem-hotplug.dsl"
 256
 257
 258 /****************************************************************
 259  * General purpose events
 260  ****************************************************************/
 261     Scope(\_GPE) {
 262         Name(_HID, "ACPI0006")
 263
 264         Method(_L00) {
 265         }
 266         Method(_E01) {
 267             // PCI hotplug event
 268             Acquire(\_SB.PCI0.BLCK, 0xFFFF)
 269             \_SB.PCI0.PCNT()
 270             Release(\_SB.PCI0.BLCK)
 271         }
 272         Method(_E02) {
 273             // CPU hotplug event
 274             \_SB.PRSC()
 275         }
 276         Method(_E03) {
 277             // Memory hotplug event
 278             \_SB.PCI0.MEMORY_HOTPLUG_DEVICE.MEMORY_SLOT_SCAN_METHOD()
 279         }
 280         Method(_L04) {
 281         }
 282         Method(_L05) {
 283         }
 284         Method(_L06) {
 285         }
 286         Method(_L07) {
 287         }
 288         Method(_L08) {
 289         }
 290         Method(_L09) {
 291         }
 292         Method(_L0A) {
 293         }
 294         Method(_L0B) {
 295         }
 296         Method(_L0C) {
 297         }
 298         Method(_L0D) {
 299         }
 300         Method(_L0E) {
 301         }
 302         Method(_L0F) {
 303         }
 304     }
 305 }