2 * QEMU Crystal CS4231 audio chip emulation
4 * Copyright (c) 2006 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 #include "qemu/osdep.h"
26 #include "hw/audio/audio.h"
27 #include "audio/audio.h"
28 #include "hw/isa/isa.h"
30 #include "qemu/timer.h"
42 /* #define DEBUG_XLAW */
49 #define dolog(...) AUD_log ("cs4231a", __VA_ARGS__)
54 #define lwarn(...) AUD_log ("cs4231a", "warning: " __VA_ARGS__)
55 #define lerr(...) AUD_log ("cs4231a", "error: " __VA_ARGS__)
60 #define TYPE_CS4231A "cs4231a"
61 #define CS4231A(obj) OBJECT_CHECK (CSState, (obj), TYPE_CS4231A)
63 typedef struct CSState
{
68 uint32_t regs
[CS_REGS
];
69 uint8_t dregs
[CS_DREGS
];
82 #define MODE2 (1 << 6)
103 Left_ADC_Input_Control
,
104 Right_ADC_Input_Control
,
105 Left_AUX1_Input_Control
,
106 Right_AUX1_Input_Control
,
107 Left_AUX2_Input_Control
,
108 Right_AUX2_Input_Control
,
109 Left_DAC_Output_Control
,
110 Right_DAC_Output_Control
,
111 FS_And_Playback_Data_Format
,
112 Interface_Configuration
,
114 Error_Status_And_Initialization
,
117 Playback_Upper_Base_Count
,
118 Playback_Lower_Base_Count
,
119 Alternate_Feature_Enable_I
,
120 Alternate_Feature_Enable_II
,
121 Left_Line_Input_Control
,
122 Right_Line_Input_Control
,
126 Alternate_Feature_Enable_III
,
127 Alternate_Feature_Status
,
129 Mono_Input_And_Output_Control
,
133 Capture_Upper_Base_Count
,
134 Capture_Lower_Base_Count
137 static int freqs
[2][8] = {
138 { 8000, 16000, 27420, 32000, -1, -1, 48000, 9000 },
139 { 5510, 11025, 18900, 22050, 37800, 44100, 33075, 6620 }
142 /* Tables courtesy http://hazelware.luggle.com/tutorials/mulawcompression.html */
143 static int16_t MuLawDecompressTable
[256] =
145 -32124,-31100,-30076,-29052,-28028,-27004,-25980,-24956,
146 -23932,-22908,-21884,-20860,-19836,-18812,-17788,-16764,
147 -15996,-15484,-14972,-14460,-13948,-13436,-12924,-12412,
148 -11900,-11388,-10876,-10364, -9852, -9340, -8828, -8316,
149 -7932, -7676, -7420, -7164, -6908, -6652, -6396, -6140,
150 -5884, -5628, -5372, -5116, -4860, -4604, -4348, -4092,
151 -3900, -3772, -3644, -3516, -3388, -3260, -3132, -3004,
152 -2876, -2748, -2620, -2492, -2364, -2236, -2108, -1980,
153 -1884, -1820, -1756, -1692, -1628, -1564, -1500, -1436,
154 -1372, -1308, -1244, -1180, -1116, -1052, -988, -924,
155 -876, -844, -812, -780, -748, -716, -684, -652,
156 -620, -588, -556, -524, -492, -460, -428, -396,
157 -372, -356, -340, -324, -308, -292, -276, -260,
158 -244, -228, -212, -196, -180, -164, -148, -132,
159 -120, -112, -104, -96, -88, -80, -72, -64,
160 -56, -48, -40, -32, -24, -16, -8, 0,
161 32124, 31100, 30076, 29052, 28028, 27004, 25980, 24956,
162 23932, 22908, 21884, 20860, 19836, 18812, 17788, 16764,
163 15996, 15484, 14972, 14460, 13948, 13436, 12924, 12412,
164 11900, 11388, 10876, 10364, 9852, 9340, 8828, 8316,
165 7932, 7676, 7420, 7164, 6908, 6652, 6396, 6140,
166 5884, 5628, 5372, 5116, 4860, 4604, 4348, 4092,
167 3900, 3772, 3644, 3516, 3388, 3260, 3132, 3004,
168 2876, 2748, 2620, 2492, 2364, 2236, 2108, 1980,
169 1884, 1820, 1756, 1692, 1628, 1564, 1500, 1436,
170 1372, 1308, 1244, 1180, 1116, 1052, 988, 924,
171 876, 844, 812, 780, 748, 716, 684, 652,
172 620, 588, 556, 524, 492, 460, 428, 396,
173 372, 356, 340, 324, 308, 292, 276, 260,
174 244, 228, 212, 196, 180, 164, 148, 132,
175 120, 112, 104, 96, 88, 80, 72, 64,
176 56, 48, 40, 32, 24, 16, 8, 0
179 static int16_t ALawDecompressTable
[256] =
181 -5504, -5248, -6016, -5760, -4480, -4224, -4992, -4736,
182 -7552, -7296, -8064, -7808, -6528, -6272, -7040, -6784,
183 -2752, -2624, -3008, -2880, -2240, -2112, -2496, -2368,
184 -3776, -3648, -4032, -3904, -3264, -3136, -3520, -3392,
185 -22016,-20992,-24064,-23040,-17920,-16896,-19968,-18944,
186 -30208,-29184,-32256,-31232,-26112,-25088,-28160,-27136,
187 -11008,-10496,-12032,-11520,-8960, -8448, -9984, -9472,
188 -15104,-14592,-16128,-15616,-13056,-12544,-14080,-13568,
189 -344, -328, -376, -360, -280, -264, -312, -296,
190 -472, -456, -504, -488, -408, -392, -440, -424,
191 -88, -72, -120, -104, -24, -8, -56, -40,
192 -216, -200, -248, -232, -152, -136, -184, -168,
193 -1376, -1312, -1504, -1440, -1120, -1056, -1248, -1184,
194 -1888, -1824, -2016, -1952, -1632, -1568, -1760, -1696,
195 -688, -656, -752, -720, -560, -528, -624, -592,
196 -944, -912, -1008, -976, -816, -784, -880, -848,
197 5504, 5248, 6016, 5760, 4480, 4224, 4992, 4736,
198 7552, 7296, 8064, 7808, 6528, 6272, 7040, 6784,
199 2752, 2624, 3008, 2880, 2240, 2112, 2496, 2368,
200 3776, 3648, 4032, 3904, 3264, 3136, 3520, 3392,
201 22016, 20992, 24064, 23040, 17920, 16896, 19968, 18944,
202 30208, 29184, 32256, 31232, 26112, 25088, 28160, 27136,
203 11008, 10496, 12032, 11520, 8960, 8448, 9984, 9472,
204 15104, 14592, 16128, 15616, 13056, 12544, 14080, 13568,
205 344, 328, 376, 360, 280, 264, 312, 296,
206 472, 456, 504, 488, 408, 392, 440, 424,
207 88, 72, 120, 104, 24, 8, 56, 40,
208 216, 200, 248, 232, 152, 136, 184, 168,
209 1376, 1312, 1504, 1440, 1120, 1056, 1248, 1184,
210 1888, 1824, 2016, 1952, 1632, 1568, 1760, 1696,
211 688, 656, 752, 720, 560, 528, 624, 592,
212 944, 912, 1008, 976, 816, 784, 880, 848
215 static void cs4231a_reset (DeviceState
*dev
)
217 CSState
*s
= CS4231A (dev
);
219 s
->regs
[Index_Address
] = 0x40;
220 s
->regs
[Index_Data
] = 0x00;
221 s
->regs
[Status
] = 0x00;
222 s
->regs
[PIO_Data
] = 0x00;
224 s
->dregs
[Left_ADC_Input_Control
] = 0x00;
225 s
->dregs
[Right_ADC_Input_Control
] = 0x00;
226 s
->dregs
[Left_AUX1_Input_Control
] = 0x88;
227 s
->dregs
[Right_AUX1_Input_Control
] = 0x88;
228 s
->dregs
[Left_AUX2_Input_Control
] = 0x88;
229 s
->dregs
[Right_AUX2_Input_Control
] = 0x88;
230 s
->dregs
[Left_DAC_Output_Control
] = 0x80;
231 s
->dregs
[Right_DAC_Output_Control
] = 0x80;
232 s
->dregs
[FS_And_Playback_Data_Format
] = 0x00;
233 s
->dregs
[Interface_Configuration
] = 0x08;
234 s
->dregs
[Pin_Control
] = 0x00;
235 s
->dregs
[Error_Status_And_Initialization
] = 0x00;
236 s
->dregs
[MODE_And_ID
] = 0x8a;
237 s
->dregs
[Loopback_Control
] = 0x00;
238 s
->dregs
[Playback_Upper_Base_Count
] = 0x00;
239 s
->dregs
[Playback_Lower_Base_Count
] = 0x00;
240 s
->dregs
[Alternate_Feature_Enable_I
] = 0x00;
241 s
->dregs
[Alternate_Feature_Enable_II
] = 0x00;
242 s
->dregs
[Left_Line_Input_Control
] = 0x88;
243 s
->dregs
[Right_Line_Input_Control
] = 0x88;
244 s
->dregs
[Timer_Low_Base
] = 0x00;
245 s
->dregs
[Timer_High_Base
] = 0x00;
246 s
->dregs
[RESERVED
] = 0x00;
247 s
->dregs
[Alternate_Feature_Enable_III
] = 0x00;
248 s
->dregs
[Alternate_Feature_Status
] = 0x00;
249 s
->dregs
[Version_Chip_ID
] = 0xa0;
250 s
->dregs
[Mono_Input_And_Output_Control
] = 0xa0;
251 s
->dregs
[RESERVED_2
] = 0x00;
252 s
->dregs
[Capture_Data_Format
] = 0x00;
253 s
->dregs
[RESERVED_3
] = 0x00;
254 s
->dregs
[Capture_Upper_Base_Count
] = 0x00;
255 s
->dregs
[Capture_Lower_Base_Count
] = 0x00;
258 static void cs_audio_callback (void *opaque
, int free
)
261 s
->audio_free
= free
;
264 static void cs_reset_voices (CSState
*s
, uint32_t val
)
267 struct audsettings as
;
270 if (val
== 0 || val
== 32)
271 val
= (1 << 4) | (1 << 5);
275 as
.freq
= freqs
[xtal
][(val
>> 1) & 7];
278 lerr ("unsupported frequency (val=%#x)\n", val
);
282 as
.nchannels
= (val
& (1 << 4)) ? 2 : 1;
286 switch ((val
>> 5) & ((s
->dregs
[MODE_And_ID
] & MODE2
) ? 7 : 3)) {
289 s
->shift
= as
.nchannels
== 2;
293 s
->tab
= MuLawDecompressTable
;
296 s
->tab
= ALawDecompressTable
;
298 as
.fmt
= AUD_FMT_S16
;
299 as
.endianness
= AUDIO_HOST_ENDIANNESS
;
300 s
->shift
= as
.nchannels
== 2;
306 as
.fmt
= AUD_FMT_S16
;
307 s
->shift
= as
.nchannels
;
312 lerr ("attempt to use reserved format value (%#x)\n", val
);
316 lerr ("ADPCM 4 bit IMA compatible format is not supported\n");
320 s
->voice
= AUD_open_out (
329 if (s
->dregs
[Interface_Configuration
] & PEN
) {
330 if (!s
->dma_running
) {
331 DMA_hold_DREQ (s
->dma
);
332 AUD_set_active_out (s
->voice
, 1);
338 if (s
->dma_running
) {
339 DMA_release_DREQ (s
->dma
);
340 AUD_set_active_out (s
->voice
, 0);
347 if (s
->dma_running
) {
348 DMA_release_DREQ (s
->dma
);
349 AUD_set_active_out (s
->voice
, 0);
353 static uint64_t cs_read (void *opaque
, hwaddr addr
, unsigned size
)
356 uint32_t saddr
, iaddr
, ret
;
363 ret
= s
->regs
[saddr
] & ~0x80;
367 if (!(s
->dregs
[MODE_And_ID
] & MODE2
))
368 iaddr
= s
->regs
[Index_Address
] & 0x0f;
370 iaddr
= s
->regs
[Index_Address
] & 0x1f;
372 ret
= s
->dregs
[iaddr
];
373 if (iaddr
== Error_Status_And_Initialization
) {
374 /* keep SEAL happy */
375 if (s
->aci_counter
) {
383 ret
= s
->regs
[saddr
];
386 dolog ("read %d:%d -> %d\n", saddr
, iaddr
, ret
);
390 static void cs_write (void *opaque
, hwaddr addr
,
391 uint64_t val64
, unsigned size
)
394 uint32_t saddr
, iaddr
, val
;
401 if (!(s
->regs
[Index_Address
] & MCE
) && (val
& MCE
)
402 && (s
->dregs
[Interface_Configuration
] & (3 << 3)))
403 s
->aci_counter
= conf
.aci_counter
;
405 s
->regs
[Index_Address
] = val
& ~(1 << 7);
409 if (!(s
->dregs
[MODE_And_ID
] & MODE2
))
410 iaddr
= s
->regs
[Index_Address
] & 0x0f;
412 iaddr
= s
->regs
[Index_Address
] & 0x1f;
418 lwarn ("attempt to write %#x to reserved indirect register %d\n",
422 case FS_And_Playback_Data_Format
:
423 if (s
->regs
[Index_Address
] & MCE
) {
424 cs_reset_voices (s
, val
);
427 if (s
->dregs
[Alternate_Feature_Status
] & PMCE
) {
428 val
= (val
& ~0x0f) | (s
->dregs
[iaddr
] & 0x0f);
429 cs_reset_voices (s
, val
);
432 lwarn ("[P]MCE(%#x, %#x) is not set, val=%#x\n",
433 s
->regs
[Index_Address
],
434 s
->dregs
[Alternate_Feature_Status
],
439 s
->dregs
[iaddr
] = val
;
442 case Interface_Configuration
:
443 val
&= ~(1 << 5); /* D5 is reserved */
444 s
->dregs
[iaddr
] = val
;
446 lwarn ("PIO is not supported (%#x)\n", val
);
450 if (!s
->dma_running
) {
451 cs_reset_voices (s
, s
->dregs
[FS_And_Playback_Data_Format
]);
455 if (s
->dma_running
) {
456 DMA_release_DREQ (s
->dma
);
457 AUD_set_active_out (s
->voice
, 0);
463 case Error_Status_And_Initialization
:
464 lwarn ("attempt to write to read only register %d\n", iaddr
);
468 dolog ("val=%#x\n", val
);
470 s
->dregs
[iaddr
] |= MODE2
;
472 s
->dregs
[iaddr
] &= ~MODE2
;
475 case Alternate_Feature_Enable_I
:
477 lerr ("timer is not yet supported\n");
478 s
->dregs
[iaddr
] = val
;
481 case Alternate_Feature_Status
:
482 if ((s
->dregs
[iaddr
] & PI
) && !(val
& PI
)) {
484 qemu_irq_lower (s
->pic
);
485 s
->regs
[Status
] &= ~INT
;
487 s
->dregs
[iaddr
] = val
;
490 case Version_Chip_ID
:
491 lwarn ("write to Version_Chip_ID register %#x\n", val
);
492 s
->dregs
[iaddr
] = val
;
496 s
->dregs
[iaddr
] = val
;
499 dolog ("written value %#x to indirect register %d\n", val
, iaddr
);
503 if (s
->regs
[Status
] & INT
) {
504 qemu_irq_lower (s
->pic
);
506 s
->regs
[Status
] &= ~INT
;
507 s
->dregs
[Alternate_Feature_Status
] &= ~(PI
| CI
| TI
);
511 lwarn ("attempt to write value %#x to PIO register\n", val
);
516 static int cs_write_audio (CSState
*s
, int nchan
, int dma_pos
,
517 int dma_len
, int len
)
520 uint8_t tmpbuf
[4096];
526 int left
= dma_len
- dma_pos
;
530 to_copy
= audio_MIN (temp
, left
);
531 if (to_copy
> sizeof (tmpbuf
)) {
532 to_copy
= sizeof (tmpbuf
);
535 copied
= DMA_read_memory (nchan
, tmpbuf
, dma_pos
, to_copy
);
538 int16_t linbuf
[4096];
540 for (i
= 0; i
< copied
; ++i
)
541 linbuf
[i
] = s
->tab
[tmpbuf
[i
]];
542 copied
= AUD_write (s
->voice
, linbuf
, copied
<< 1);
546 copied
= AUD_write (s
->voice
, tmpbuf
, copied
);
550 dma_pos
= (dma_pos
+ copied
) % dma_len
;
561 static int cs_dma_read (void *opaque
, int nchan
, int dma_pos
, int dma_len
)
567 copy
= s
->voice
? (s
->audio_free
>> (s
->tab
!= NULL
)) : dma_len
;
569 if (s
->dregs
[Pin_Control
] & IEN
) {
570 till
= (s
->dregs
[Playback_Lower_Base_Count
]
571 | (s
->dregs
[Playback_Upper_Base_Count
] << 8)) << s
->shift
;
572 till
-= s
->transferred
;
573 copy
= audio_MIN (till
, copy
);
576 if ((copy
<= 0) || (dma_len
<= 0)) {
580 written
= cs_write_audio (s
, nchan
, dma_pos
, dma_len
, copy
);
582 dma_pos
= (dma_pos
+ written
) % dma_len
;
583 s
->audio_free
-= (written
<< (s
->tab
!= NULL
));
585 if (written
== till
) {
586 s
->regs
[Status
] |= INT
;
587 s
->dregs
[Alternate_Feature_Status
] |= PI
;
589 qemu_irq_raise (s
->pic
);
592 s
->transferred
+= written
;
598 static int cs4231a_pre_load (void *opaque
)
602 if (s
->dma_running
) {
603 DMA_release_DREQ (s
->dma
);
604 AUD_set_active_out (s
->voice
, 0);
610 static int cs4231a_post_load (void *opaque
, int version_id
)
614 if (s
->dma_running
&& (s
->dregs
[Interface_Configuration
] & PEN
)) {
616 cs_reset_voices (s
, s
->dregs
[FS_And_Playback_Data_Format
]);
621 static const VMStateDescription vmstate_cs4231a
= {
624 .minimum_version_id
= 1,
625 .pre_load
= cs4231a_pre_load
,
626 .post_load
= cs4231a_post_load
,
627 .fields
= (VMStateField
[]) {
628 VMSTATE_UINT32_ARRAY (regs
, CSState
, CS_REGS
),
629 VMSTATE_BUFFER (dregs
, CSState
),
630 VMSTATE_INT32 (dma_running
, CSState
),
631 VMSTATE_INT32 (audio_free
, CSState
),
632 VMSTATE_INT32 (transferred
, CSState
),
633 VMSTATE_INT32 (aci_counter
, CSState
),
634 VMSTATE_END_OF_LIST ()
638 static const MemoryRegionOps cs_ioport_ops
= {
642 .min_access_size
= 1,
643 .max_access_size
= 1,
647 static void cs4231a_initfn (Object
*obj
)
649 CSState
*s
= CS4231A (obj
);
651 memory_region_init_io (&s
->ioports
, OBJECT(s
), &cs_ioport_ops
, s
,
655 static void cs4231a_realizefn (DeviceState
*dev
, Error
**errp
)
657 ISADevice
*d
= ISA_DEVICE (dev
);
658 CSState
*s
= CS4231A (dev
);
660 isa_init_irq (d
, &s
->pic
, s
->irq
);
662 isa_register_ioport (d
, &s
->ioports
, s
->port
);
664 DMA_register_channel (s
->dma
, cs_dma_read
, s
);
666 AUD_register_card ("cs4231a", &s
->card
);
669 static int cs4231a_init (ISABus
*bus
)
671 isa_create_simple (bus
, TYPE_CS4231A
);
675 static Property cs4231a_properties
[] = {
676 DEFINE_PROP_UINT32 ("iobase", CSState
, port
, 0x534),
677 DEFINE_PROP_UINT32 ("irq", CSState
, irq
, 9),
678 DEFINE_PROP_UINT32 ("dma", CSState
, dma
, 3),
679 DEFINE_PROP_END_OF_LIST (),
682 static void cs4231a_class_initfn (ObjectClass
*klass
, void *data
)
684 DeviceClass
*dc
= DEVICE_CLASS (klass
);
686 dc
->realize
= cs4231a_realizefn
;
687 dc
->reset
= cs4231a_reset
;
688 set_bit(DEVICE_CATEGORY_SOUND
, dc
->categories
);
689 dc
->desc
= "Crystal Semiconductor CS4231A";
690 dc
->vmsd
= &vmstate_cs4231a
;
691 dc
->props
= cs4231a_properties
;
694 static const TypeInfo cs4231a_info
= {
695 .name
= TYPE_CS4231A
,
696 .parent
= TYPE_ISA_DEVICE
,
697 .instance_size
= sizeof (CSState
),
698 .instance_init
= cs4231a_initfn
,
699 .class_init
= cs4231a_class_initfn
,
702 static void cs4231a_register_types (void)
704 type_register_static (&cs4231a_info
);
705 isa_register_soundhw("cs4231a", "CS4231A", cs4231a_init
);
708 type_init (cs4231a_register_types
)