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rng: add request queue support to rng-random
[qemu/ar7.git] / memory.c
blob013c2ed531c97d7ba30c6b05b9d7ae26a6a2b689
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "qemu/osdep.h"
17 #include "exec/memory.h"
18 #include "exec/address-spaces.h"
19 #include "exec/ioport.h"
20 #include "qapi/visitor.h"
21 #include "qemu/bitops.h"
22 #include "qemu/error-report.h"
23 #include "qom/object.h"
24 #include "trace.h"
25
26 #include "exec/memory-internal.h"
27 #include "exec/ram_addr.h"
28 #include "sysemu/kvm.h"
29 #include "sysemu/sysemu.h"
30
31 //#define DEBUG_UNASSIGNED
32
33 #define RAM_ADDR_INVALID (~(ram_addr_t)0)
34
35 static unsigned memory_region_transaction_depth;
36 static bool memory_region_update_pending;
37 static bool ioeventfd_update_pending;
38 static bool global_dirty_log = false;
39
40 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
41 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
42
43 static QTAILQ_HEAD(, AddressSpace) address_spaces
44 = QTAILQ_HEAD_INITIALIZER(address_spaces);
45
46 typedef struct AddrRange AddrRange;
47
48 /*
49 * Note that signed integers are needed for negative offsetting in aliases
50 * (large MemoryRegion::alias_offset).
51 */
52 struct AddrRange {
53 Int128 start;
54 Int128 size;
55 };
56
57 static AddrRange addrrange_make(Int128 start, Int128 size)
58 {
59 return (AddrRange) { start, size };
60 }
61
62 static bool addrrange_equal(AddrRange r1, AddrRange r2)
63 {
64 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
65 }
66
67 static Int128 addrrange_end(AddrRange r)
68 {
69 return int128_add(r.start, r.size);
70 }
71
72 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
73 {
74 int128_addto(&range.start, delta);
75 return range;
76 }
77
78 static bool addrrange_contains(AddrRange range, Int128 addr)
79 {
80 return int128_ge(addr, range.start)
81 && int128_lt(addr, addrrange_end(range));
82 }
83
84 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
85 {
86 return addrrange_contains(r1, r2.start)
87 || addrrange_contains(r2, r1.start);
88 }
89
90 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
91 {
92 Int128 start = int128_max(r1.start, r2.start);
93 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
94 return addrrange_make(start, int128_sub(end, start));
95 }
96
97 enum ListenerDirection { Forward, Reverse };
98
99 static bool memory_listener_match(MemoryListener *listener,
100 MemoryRegionSection *section)
101 {
102 return !listener->address_space_filter
103 || listener->address_space_filter == section->address_space;
104 }
105
106 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
107 do { \
108 MemoryListener *_listener; \
109 \
110 switch (_direction) { \
111 case Forward: \
112 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
113 if (_listener->_callback) { \
114 _listener->_callback(_listener, ##_args); \
115 } \
116 } \
117 break; \
118 case Reverse: \
119 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
120 memory_listeners, link) { \
121 if (_listener->_callback) { \
122 _listener->_callback(_listener, ##_args); \
123 } \
124 } \
125 break; \
126 default: \
127 abort(); \
128 } \
129 } while (0)
130
131 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
132 do { \
133 MemoryListener *_listener; \
134 \
135 switch (_direction) { \
136 case Forward: \
137 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
138 if (_listener->_callback \
139 && memory_listener_match(_listener, _section)) { \
140 _listener->_callback(_listener, _section, ##_args); \
141 } \
142 } \
143 break; \
144 case Reverse: \
145 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
146 memory_listeners, link) { \
147 if (_listener->_callback \
148 && memory_listener_match(_listener, _section)) { \
149 _listener->_callback(_listener, _section, ##_args); \
150 } \
151 } \
152 break; \
153 default: \
154 abort(); \
155 } \
156 } while (0)
157
158 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
159 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
160 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
161 .mr = (fr)->mr, \
162 .address_space = (as), \
163 .offset_within_region = (fr)->offset_in_region, \
164 .size = (fr)->addr.size, \
165 .offset_within_address_space = int128_get64((fr)->addr.start), \
166 .readonly = (fr)->readonly, \
167 }), ##_args)
168
169 struct CoalescedMemoryRange {
170 AddrRange addr;
171 QTAILQ_ENTRY(CoalescedMemoryRange) link;
172 };
173
174 struct MemoryRegionIoeventfd {
175 AddrRange addr;
176 bool match_data;
177 uint64_t data;
178 EventNotifier *e;
179 };
180
181 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
182 MemoryRegionIoeventfd b)
183 {
184 if (int128_lt(a.addr.start, b.addr.start)) {
185 return true;
186 } else if (int128_gt(a.addr.start, b.addr.start)) {
187 return false;
188 } else if (int128_lt(a.addr.size, b.addr.size)) {
189 return true;
190 } else if (int128_gt(a.addr.size, b.addr.size)) {
191 return false;
192 } else if (a.match_data < b.match_data) {
193 return true;
194 } else if (a.match_data > b.match_data) {
195 return false;
196 } else if (a.match_data) {
197 if (a.data < b.data) {
198 return true;
199 } else if (a.data > b.data) {
200 return false;
201 }
202 }
203 if (a.e < b.e) {
204 return true;
205 } else if (a.e > b.e) {
206 return false;
207 }
208 return false;
209 }
210
211 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
212 MemoryRegionIoeventfd b)
213 {
214 return !memory_region_ioeventfd_before(a, b)
215 && !memory_region_ioeventfd_before(b, a);
216 }
217
218 typedef struct FlatRange FlatRange;
219 typedef struct FlatView FlatView;
220
221 /* Range of memory in the global map. Addresses are absolute. */
222 struct FlatRange {
223 MemoryRegion *mr;
224 hwaddr offset_in_region;
225 AddrRange addr;
226 uint8_t dirty_log_mask;
227 bool romd_mode;
228 bool readonly;
229 };
230
231 /* Flattened global view of current active memory hierarchy. Kept in sorted
232 * order.
233 */
234 struct FlatView {
235 struct rcu_head rcu;
236 unsigned ref;
237 FlatRange *ranges;
238 unsigned nr;
239 unsigned nr_allocated;
240 };
241
242 typedef struct AddressSpaceOps AddressSpaceOps;
243
244 #define FOR_EACH_FLAT_RANGE(var, view) \
245 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
246
247 static bool flatrange_equal(FlatRange *a, FlatRange *b)
248 {
249 return a->mr == b->mr
250 && addrrange_equal(a->addr, b->addr)
251 && a->offset_in_region == b->offset_in_region
252 && a->romd_mode == b->romd_mode
253 && a->readonly == b->readonly;
254 }
255
256 static void flatview_init(FlatView *view)
257 {
258 view->ref = 1;
259 view->ranges = NULL;
260 view->nr = 0;
261 view->nr_allocated = 0;
262 }
263
264 /* Insert a range into a given position. Caller is responsible for maintaining
265 * sorting order.
266 */
267 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
268 {
269 if (view->nr == view->nr_allocated) {
270 view->nr_allocated = MAX(2 * view->nr, 10);
271 view->ranges = g_realloc(view->ranges,
272 view->nr_allocated * sizeof(*view->ranges));
273 }
274 memmove(view->ranges + pos + 1, view->ranges + pos,
275 (view->nr - pos) * sizeof(FlatRange));
276 view->ranges[pos] = *range;
277 memory_region_ref(range->mr);
278 ++view->nr;
279 }
280
281 static void flatview_destroy(FlatView *view)
282 {
283 int i;
284
285 for (i = 0; i < view->nr; i++) {
286 memory_region_unref(view->ranges[i].mr);
287 }
288 g_free(view->ranges);
289 g_free(view);
290 }
291
292 static void flatview_ref(FlatView *view)
293 {
294 atomic_inc(&view->ref);
295 }
296
297 static void flatview_unref(FlatView *view)
298 {
299 if (atomic_fetch_dec(&view->ref) == 1) {
300 flatview_destroy(view);
301 }
302 }
303
304 static bool can_merge(FlatRange *r1, FlatRange *r2)
305 {
306 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
307 && r1->mr == r2->mr
308 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
309 r1->addr.size),
310 int128_make64(r2->offset_in_region))
311 && r1->dirty_log_mask == r2->dirty_log_mask
312 && r1->romd_mode == r2->romd_mode
313 && r1->readonly == r2->readonly;
314 }
315
316 /* Attempt to simplify a view by merging adjacent ranges */
317 static void flatview_simplify(FlatView *view)
318 {
319 unsigned i, j;
320
321 i = 0;
322 while (i < view->nr) {
323 j = i + 1;
324 while (j < view->nr
325 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
326 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
327 ++j;
328 }
329 ++i;
330 memmove(&view->ranges[i], &view->ranges[j],
331 (view->nr - j) * sizeof(view->ranges[j]));
332 view->nr -= j - i;
333 }
334 }
335
336 static bool memory_region_big_endian(MemoryRegion *mr)
337 {
338 #ifdef TARGET_WORDS_BIGENDIAN
339 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
340 #else
341 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
342 #endif
343 }
344
345 static bool memory_region_wrong_endianness(MemoryRegion *mr)
346 {
347 #ifdef TARGET_WORDS_BIGENDIAN
348 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
349 #else
350 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
351 #endif
352 }
353
354 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
355 {
356 if (memory_region_wrong_endianness(mr)) {
357 switch (size) {
358 case 1:
359 break;
360 case 2:
361 *data = bswap16(*data);
362 break;
363 case 4:
364 *data = bswap32(*data);
365 break;
366 case 8:
367 *data = bswap64(*data);
368 break;
369 default:
370 abort();
371 }
372 }
373 }
374
375 static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
376 {
377 MemoryRegion *root;
378 hwaddr abs_addr = offset;
379
380 abs_addr += mr->addr;
381 for (root = mr; root->container; ) {
382 root = root->container;
383 abs_addr += root->addr;
384 }
385
386 return abs_addr;
387 }
388
389 static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
390 hwaddr addr,
391 uint64_t *value,
392 unsigned size,
393 unsigned shift,
394 uint64_t mask,
395 MemTxAttrs attrs)
396 {
397 uint64_t tmp;
398
399 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
400 if (mr->subpage) {
401 trace_memory_region_subpage_read(mr, addr, tmp, size);
402 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
403 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
404 trace_memory_region_ops_read(mr, abs_addr, tmp, size);
405 }
406 *value |= (tmp & mask) << shift;
407 return MEMTX_OK;
408 }
409
410 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
411 hwaddr addr,
412 uint64_t *value,
413 unsigned size,
414 unsigned shift,
415 uint64_t mask,
416 MemTxAttrs attrs)
417 {
418 uint64_t tmp;
419
420 tmp = mr->ops->read(mr->opaque, addr, size);
421 if (mr->subpage) {
422 trace_memory_region_subpage_read(mr, addr, tmp, size);
423 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
424 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
425 trace_memory_region_ops_read(mr, abs_addr, tmp, size);
426 }
427 *value |= (tmp & mask) << shift;
428 return MEMTX_OK;
429 }
430
431 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
432 hwaddr addr,
433 uint64_t *value,
434 unsigned size,
435 unsigned shift,
436 uint64_t mask,
437 MemTxAttrs attrs)
438 {
439 uint64_t tmp = 0;
440 MemTxResult r;
441
442 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
443 if (mr->subpage) {
444 trace_memory_region_subpage_read(mr, addr, tmp, size);
445 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
446 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
447 trace_memory_region_ops_read(mr, abs_addr, tmp, size);
448 }
449 *value |= (tmp & mask) << shift;
450 return r;
451 }
452
453 static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
454 hwaddr addr,
455 uint64_t *value,
456 unsigned size,
457 unsigned shift,
458 uint64_t mask,
459 MemTxAttrs attrs)
460 {
461 uint64_t tmp;
462
463 tmp = (*value >> shift) & mask;
464 if (mr->subpage) {
465 trace_memory_region_subpage_write(mr, addr, tmp, size);
466 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
467 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
468 trace_memory_region_ops_write(mr, abs_addr, tmp, size);
469 }
470 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
471 return MEMTX_OK;
472 }
473
474 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
475 hwaddr addr,
476 uint64_t *value,
477 unsigned size,
478 unsigned shift,
479 uint64_t mask,
480 MemTxAttrs attrs)
481 {
482 uint64_t tmp;
483
484 tmp = (*value >> shift) & mask;
485 if (mr->subpage) {
486 trace_memory_region_subpage_write(mr, addr, tmp, size);
487 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
488 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
489 trace_memory_region_ops_write(mr, abs_addr, tmp, size);
490 }
491 mr->ops->write(mr->opaque, addr, tmp, size);
492 return MEMTX_OK;
493 }
494
495 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
496 hwaddr addr,
497 uint64_t *value,
498 unsigned size,
499 unsigned shift,
500 uint64_t mask,
501 MemTxAttrs attrs)
502 {
503 uint64_t tmp;
504
505 tmp = (*value >> shift) & mask;
506 if (mr->subpage) {
507 trace_memory_region_subpage_write(mr, addr, tmp, size);
508 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
509 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
510 trace_memory_region_ops_write(mr, abs_addr, tmp, size);
511 }
512 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
513 }
514
515 static MemTxResult access_with_adjusted_size(hwaddr addr,
516 uint64_t *value,
517 unsigned size,
518 unsigned access_size_min,
519 unsigned access_size_max,
520 MemTxResult (*access)(MemoryRegion *mr,
521 hwaddr addr,
522 uint64_t *value,
523 unsigned size,
524 unsigned shift,
525 uint64_t mask,
526 MemTxAttrs attrs),
527 MemoryRegion *mr,
528 MemTxAttrs attrs)
529 {
530 uint64_t access_mask;
531 unsigned access_size;
532 unsigned i;
533 MemTxResult r = MEMTX_OK;
534
535 if (!access_size_min) {
536 access_size_min = 1;
537 }
538 if (!access_size_max) {
539 access_size_max = 4;
540 }
541
542 /* FIXME: support unaligned access? */
543 access_size = MAX(MIN(size, access_size_max), access_size_min);
544 access_mask = -1ULL >> (64 - access_size * 8);
545 if (memory_region_big_endian(mr)) {
546 for (i = 0; i < size; i += access_size) {
547 r |= access(mr, addr + i, value, access_size,
548 (size - access_size - i) * 8, access_mask, attrs);
549 }
550 } else {
551 for (i = 0; i < size; i += access_size) {
552 r |= access(mr, addr + i, value, access_size, i * 8,
553 access_mask, attrs);
554 }
555 }
556 return r;
557 }
558
559 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
560 {
561 AddressSpace *as;
562
563 while (mr->container) {
564 mr = mr->container;
565 }
566 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
567 if (mr == as->root) {
568 return as;
569 }
570 }
571 return NULL;
572 }
573
574 /* Render a memory region into the global view. Ranges in @view obscure
575 * ranges in @mr.
576 */
577 static void render_memory_region(FlatView *view,
578 MemoryRegion *mr,
579 Int128 base,
580 AddrRange clip,
581 bool readonly)
582 {
583 MemoryRegion *subregion;
584 unsigned i;
585 hwaddr offset_in_region;
586 Int128 remain;
587 Int128 now;
588 FlatRange fr;
589 AddrRange tmp;
590
591 if (!mr->enabled) {
592 return;
593 }
594
595 int128_addto(&base, int128_make64(mr->addr));
596 readonly |= mr->readonly;
597
598 tmp = addrrange_make(base, mr->size);
599
600 if (!addrrange_intersects(tmp, clip)) {
601 return;
602 }
603
604 clip = addrrange_intersection(tmp, clip);
605
606 if (mr->alias) {
607 int128_subfrom(&base, int128_make64(mr->alias->addr));
608 int128_subfrom(&base, int128_make64(mr->alias_offset));
609 render_memory_region(view, mr->alias, base, clip, readonly);
610 return;
611 }
612
613 /* Render subregions in priority order. */
614 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
615 render_memory_region(view, subregion, base, clip, readonly);
616 }
617
618 if (!mr->terminates) {
619 return;
620 }
621
622 offset_in_region = int128_get64(int128_sub(clip.start, base));
623 base = clip.start;
624 remain = clip.size;
625
626 fr.mr = mr;
627 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
628 fr.romd_mode = mr->romd_mode;
629 fr.readonly = readonly;
630
631 /* Render the region itself into any gaps left by the current view. */
632 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
633 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
634 continue;
635 }
636 if (int128_lt(base, view->ranges[i].addr.start)) {
637 now = int128_min(remain,
638 int128_sub(view->ranges[i].addr.start, base));
639 fr.offset_in_region = offset_in_region;
640 fr.addr = addrrange_make(base, now);
641 flatview_insert(view, i, &fr);
642 ++i;
643 int128_addto(&base, now);
644 offset_in_region += int128_get64(now);
645 int128_subfrom(&remain, now);
646 }
647 now = int128_sub(int128_min(int128_add(base, remain),
648 addrrange_end(view->ranges[i].addr)),
649 base);
650 int128_addto(&base, now);
651 offset_in_region += int128_get64(now);
652 int128_subfrom(&remain, now);
653 }
654 if (int128_nz(remain)) {
655 fr.offset_in_region = offset_in_region;
656 fr.addr = addrrange_make(base, remain);
657 flatview_insert(view, i, &fr);
658 }
659 }
660
661 /* Render a memory topology into a list of disjoint absolute ranges. */
662 static FlatView *generate_memory_topology(MemoryRegion *mr)
663 {
664 FlatView *view;
665
666 view = g_new(FlatView, 1);
667 flatview_init(view);
668
669 if (mr) {
670 render_memory_region(view, mr, int128_zero(),
671 addrrange_make(int128_zero(), int128_2_64()), false);
672 }
673 flatview_simplify(view);
674
675 return view;
676 }
677
678 static void address_space_add_del_ioeventfds(AddressSpace *as,
679 MemoryRegionIoeventfd *fds_new,
680 unsigned fds_new_nb,
681 MemoryRegionIoeventfd *fds_old,
682 unsigned fds_old_nb)
683 {
684 unsigned iold, inew;
685 MemoryRegionIoeventfd *fd;
686 MemoryRegionSection section;
687
688 /* Generate a symmetric difference of the old and new fd sets, adding
689 * and deleting as necessary.
690 */
691
692 iold = inew = 0;
693 while (iold < fds_old_nb || inew < fds_new_nb) {
694 if (iold < fds_old_nb
695 && (inew == fds_new_nb
696 || memory_region_ioeventfd_before(fds_old[iold],
697 fds_new[inew]))) {
698 fd = &fds_old[iold];
699 section = (MemoryRegionSection) {
700 .address_space = as,
701 .offset_within_address_space = int128_get64(fd->addr.start),
702 .size = fd->addr.size,
703 };
704 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
705 fd->match_data, fd->data, fd->e);
706 ++iold;
707 } else if (inew < fds_new_nb
708 && (iold == fds_old_nb
709 || memory_region_ioeventfd_before(fds_new[inew],
710 fds_old[iold]))) {
711 fd = &fds_new[inew];
712 section = (MemoryRegionSection) {
713 .address_space = as,
714 .offset_within_address_space = int128_get64(fd->addr.start),
715 .size = fd->addr.size,
716 };
717 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
718 fd->match_data, fd->data, fd->e);
719 ++inew;
720 } else {
721 ++iold;
722 ++inew;
723 }
724 }
725 }
726
727 static FlatView *address_space_get_flatview(AddressSpace *as)
728 {
729 FlatView *view;
730
731 rcu_read_lock();
732 view = atomic_rcu_read(&as->current_map);
733 flatview_ref(view);
734 rcu_read_unlock();
735 return view;
736 }
737
738 static void address_space_update_ioeventfds(AddressSpace *as)
739 {
740 FlatView *view;
741 FlatRange *fr;
742 unsigned ioeventfd_nb = 0;
743 MemoryRegionIoeventfd *ioeventfds = NULL;
744 AddrRange tmp;
745 unsigned i;
746
747 view = address_space_get_flatview(as);
748 FOR_EACH_FLAT_RANGE(fr, view) {
749 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
750 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
751 int128_sub(fr->addr.start,
752 int128_make64(fr->offset_in_region)));
753 if (addrrange_intersects(fr->addr, tmp)) {
754 ++ioeventfd_nb;
755 ioeventfds = g_realloc(ioeventfds,
756 ioeventfd_nb * sizeof(*ioeventfds));
757 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
758 ioeventfds[ioeventfd_nb-1].addr = tmp;
759 }
760 }
761 }
762
763 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
764 as->ioeventfds, as->ioeventfd_nb);
765
766 g_free(as->ioeventfds);
767 as->ioeventfds = ioeventfds;
768 as->ioeventfd_nb = ioeventfd_nb;
769 flatview_unref(view);
770 }
771
772 static void address_space_update_topology_pass(AddressSpace *as,
773 const FlatView *old_view,
774 const FlatView *new_view,
775 bool adding)
776 {
777 unsigned iold, inew;
778 FlatRange *frold, *frnew;
779
780 /* Generate a symmetric difference of the old and new memory maps.
781 * Kill ranges in the old map, and instantiate ranges in the new map.
782 */
783 iold = inew = 0;
784 while (iold < old_view->nr || inew < new_view->nr) {
785 if (iold < old_view->nr) {
786 frold = &old_view->ranges[iold];
787 } else {
788 frold = NULL;
789 }
790 if (inew < new_view->nr) {
791 frnew = &new_view->ranges[inew];
792 } else {
793 frnew = NULL;
794 }
795
796 if (frold
797 && (!frnew
798 || int128_lt(frold->addr.start, frnew->addr.start)
799 || (int128_eq(frold->addr.start, frnew->addr.start)
800 && !flatrange_equal(frold, frnew)))) {
801 /* In old but not in new, or in both but attributes changed. */
802
803 if (!adding) {
804 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
805 }
806
807 ++iold;
808 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
809 /* In both and unchanged (except logging may have changed) */
810
811 if (adding) {
812 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
813 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
814 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
815 frold->dirty_log_mask,
816 frnew->dirty_log_mask);
817 }
818 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
819 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
820 frold->dirty_log_mask,
821 frnew->dirty_log_mask);
822 }
823 }
824
825 ++iold;
826 ++inew;
827 } else {
828 /* In new */
829
830 if (adding) {
831 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
832 }
833
834 ++inew;
835 }
836 }
837 }
838
839
840 static void address_space_update_topology(AddressSpace *as)
841 {
842 FlatView *old_view = address_space_get_flatview(as);
843 FlatView *new_view = generate_memory_topology(as->root);
844
845 address_space_update_topology_pass(as, old_view, new_view, false);
846 address_space_update_topology_pass(as, old_view, new_view, true);
847
848 /* Writes are protected by the BQL. */
849 atomic_rcu_set(&as->current_map, new_view);
850 call_rcu(old_view, flatview_unref, rcu);
851
852 /* Note that all the old MemoryRegions are still alive up to this
853 * point. This relieves most MemoryListeners from the need to
854 * ref/unref the MemoryRegions they get---unless they use them
855 * outside the iothread mutex, in which case precise reference
856 * counting is necessary.
857 */
858 flatview_unref(old_view);
859
860 address_space_update_ioeventfds(as);
861 }
862
863 void memory_region_transaction_begin(void)
864 {
865 qemu_flush_coalesced_mmio_buffer();
866 ++memory_region_transaction_depth;
867 }
868
869 static void memory_region_clear_pending(void)
870 {
871 memory_region_update_pending = false;
872 ioeventfd_update_pending = false;
873 }
874
875 void memory_region_transaction_commit(void)
876 {
877 AddressSpace *as;
878
879 assert(memory_region_transaction_depth);
880 --memory_region_transaction_depth;
881 if (!memory_region_transaction_depth) {
882 if (memory_region_update_pending) {
883 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
884
885 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
886 address_space_update_topology(as);
887 }
888
889 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
890 } else if (ioeventfd_update_pending) {
891 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
892 address_space_update_ioeventfds(as);
893 }
894 }
895 memory_region_clear_pending();
896 }
897 }
898
899 static void memory_region_destructor_none(MemoryRegion *mr)
900 {
901 }
902
903 static void memory_region_destructor_ram(MemoryRegion *mr)
904 {
905 qemu_ram_free(mr->ram_addr);
906 }
907
908 static void memory_region_destructor_rom_device(MemoryRegion *mr)
909 {
910 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
911 }
912
913 static bool memory_region_need_escape(char c)
914 {
915 return c == '/' || c == '[' || c == '\\' || c == ']';
916 }
917
918 static char *memory_region_escape_name(const char *name)
919 {
920 const char *p;
921 char *escaped, *q;
922 uint8_t c;
923 size_t bytes = 0;
924
925 for (p = name; *p; p++) {
926 bytes += memory_region_need_escape(*p) ? 4 : 1;
927 }
928 if (bytes == p - name) {
929 return g_memdup(name, bytes + 1);
930 }
931
932 escaped = g_malloc(bytes + 1);
933 for (p = name, q = escaped; *p; p++) {
934 c = *p;
935 if (unlikely(memory_region_need_escape(c))) {
936 *q++ = '\\';
937 *q++ = 'x';
938 *q++ = "0123456789abcdef"[c >> 4];
939 c = "0123456789abcdef"[c & 15];
940 }
941 *q++ = c;
942 }
943 *q = 0;
944 return escaped;
945 }
946
947 void memory_region_init(MemoryRegion *mr,
948 Object *owner,
949 const char *name,
950 uint64_t size)
951 {
952 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
953 mr->size = int128_make64(size);
954 if (size == UINT64_MAX) {
955 mr->size = int128_2_64();
956 }
957 mr->name = g_strdup(name);
958 mr->owner = owner;
959 mr->ram_block = NULL;
960
961 if (name) {
962 char *escaped_name = memory_region_escape_name(name);
963 char *name_array = g_strdup_printf("%s[*]", escaped_name);
964
965 if (!owner) {
966 owner = container_get(qdev_get_machine(), "/unattached");
967 }
968
969 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
970 object_unref(OBJECT(mr));
971 g_free(name_array);
972 g_free(escaped_name);
973 }
974 }
975
976 static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
977 void *opaque, Error **errp)
978 {
979 MemoryRegion *mr = MEMORY_REGION(obj);
980 uint64_t value = mr->addr;
981
982 visit_type_uint64(v, name, &value, errp);
983 }
984
985 static void memory_region_get_container(Object *obj, Visitor *v,
986 const char *name, void *opaque,
987 Error **errp)
988 {
989 MemoryRegion *mr = MEMORY_REGION(obj);
990 gchar *path = (gchar *)"";
991
992 if (mr->container) {
993 path = object_get_canonical_path(OBJECT(mr->container));
994 }
995 visit_type_str(v, name, &path, errp);
996 if (mr->container) {
997 g_free(path);
998 }
999 }
1000
1001 static Object *memory_region_resolve_container(Object *obj, void *opaque,
1002 const char *part)
1003 {
1004 MemoryRegion *mr = MEMORY_REGION(obj);
1005
1006 return OBJECT(mr->container);
1007 }
1008
1009 static void memory_region_get_priority(Object *obj, Visitor *v,
1010 const char *name, void *opaque,
1011 Error **errp)
1012 {
1013 MemoryRegion *mr = MEMORY_REGION(obj);
1014 int32_t value = mr->priority;
1015
1016 visit_type_int32(v, name, &value, errp);
1017 }
1018
1019 static bool memory_region_get_may_overlap(Object *obj, Error **errp)
1020 {
1021 MemoryRegion *mr = MEMORY_REGION(obj);
1022
1023 return mr->may_overlap;
1024 }
1025
1026 static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1027 void *opaque, Error **errp)
1028 {
1029 MemoryRegion *mr = MEMORY_REGION(obj);
1030 uint64_t value = memory_region_size(mr);
1031
1032 visit_type_uint64(v, name, &value, errp);
1033 }
1034
1035 static void memory_region_initfn(Object *obj)
1036 {
1037 MemoryRegion *mr = MEMORY_REGION(obj);
1038 ObjectProperty *op;
1039
1040 mr->ops = &unassigned_mem_ops;
1041 mr->ram_addr = RAM_ADDR_INVALID;
1042 mr->enabled = true;
1043 mr->romd_mode = true;
1044 mr->global_locking = true;
1045 mr->destructor = memory_region_destructor_none;
1046 QTAILQ_INIT(&mr->subregions);
1047 QTAILQ_INIT(&mr->coalesced);
1048
1049 op = object_property_add(OBJECT(mr), "container",
1050 "link<" TYPE_MEMORY_REGION ">",
1051 memory_region_get_container,
1052 NULL, /* memory_region_set_container */
1053 NULL, NULL, &error_abort);
1054 op->resolve = memory_region_resolve_container;
1055
1056 object_property_add(OBJECT(mr), "addr", "uint64",
1057 memory_region_get_addr,
1058 NULL, /* memory_region_set_addr */
1059 NULL, NULL, &error_abort);
1060 object_property_add(OBJECT(mr), "priority", "uint32",
1061 memory_region_get_priority,
1062 NULL, /* memory_region_set_priority */
1063 NULL, NULL, &error_abort);
1064 object_property_add_bool(OBJECT(mr), "may-overlap",
1065 memory_region_get_may_overlap,
1066 NULL, /* memory_region_set_may_overlap */
1067 &error_abort);
1068 object_property_add(OBJECT(mr), "size", "uint64",
1069 memory_region_get_size,
1070 NULL, /* memory_region_set_size, */
1071 NULL, NULL, &error_abort);
1072 }
1073
1074 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1075 unsigned size)
1076 {
1077 #ifdef DEBUG_UNASSIGNED
1078 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1079 #endif
1080 if (current_cpu != NULL) {
1081 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
1082 }
1083 return 0;
1084 }
1085
1086 static void unassigned_mem_write(void *opaque, hwaddr addr,
1087 uint64_t val, unsigned size)
1088 {
1089 #ifdef DEBUG_UNASSIGNED
1090 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1091 #endif
1092 if (current_cpu != NULL) {
1093 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1094 }
1095 }
1096
1097 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1098 unsigned size, bool is_write)
1099 {
1100 return false;
1101 }
1102
1103 const MemoryRegionOps unassigned_mem_ops = {
1104 .valid.accepts = unassigned_mem_accepts,
1105 .endianness = DEVICE_NATIVE_ENDIAN,
1106 };
1107
1108 bool memory_region_access_valid(MemoryRegion *mr,
1109 hwaddr addr,
1110 unsigned size,
1111 bool is_write)
1112 {
1113 int access_size_min, access_size_max;
1114 int access_size, i;
1115
1116 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1117 return false;
1118 }
1119
1120 if (!mr->ops->valid.accepts) {
1121 return true;
1122 }
1123
1124 access_size_min = mr->ops->valid.min_access_size;
1125 if (!mr->ops->valid.min_access_size) {
1126 access_size_min = 1;
1127 }
1128
1129 access_size_max = mr->ops->valid.max_access_size;
1130 if (!mr->ops->valid.max_access_size) {
1131 access_size_max = 4;
1132 }
1133
1134 access_size = MAX(MIN(size, access_size_max), access_size_min);
1135 for (i = 0; i < size; i += access_size) {
1136 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1137 is_write)) {
1138 return false;
1139 }
1140 }
1141
1142 return true;
1143 }
1144
1145 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1146 hwaddr addr,
1147 uint64_t *pval,
1148 unsigned size,
1149 MemTxAttrs attrs)
1150 {
1151 *pval = 0;
1152
1153 if (mr->ops->read) {
1154 return access_with_adjusted_size(addr, pval, size,
1155 mr->ops->impl.min_access_size,
1156 mr->ops->impl.max_access_size,
1157 memory_region_read_accessor,
1158 mr, attrs);
1159 } else if (mr->ops->read_with_attrs) {
1160 return access_with_adjusted_size(addr, pval, size,
1161 mr->ops->impl.min_access_size,
1162 mr->ops->impl.max_access_size,
1163 memory_region_read_with_attrs_accessor,
1164 mr, attrs);
1165 } else {
1166 return access_with_adjusted_size(addr, pval, size, 1, 4,
1167 memory_region_oldmmio_read_accessor,
1168 mr, attrs);
1169 }
1170 }
1171
1172 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1173 hwaddr addr,
1174 uint64_t *pval,
1175 unsigned size,
1176 MemTxAttrs attrs)
1177 {
1178 MemTxResult r;
1179
1180 if (!memory_region_access_valid(mr, addr, size, false)) {
1181 *pval = unassigned_mem_read(mr, addr, size);
1182 return MEMTX_DECODE_ERROR;
1183 }
1184
1185 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1186 adjust_endianness(mr, pval, size);
1187 return r;
1188 }
1189
1190 /* Return true if an eventfd was signalled */
1191 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1192 hwaddr addr,
1193 uint64_t data,
1194 unsigned size,
1195 MemTxAttrs attrs)
1196 {
1197 MemoryRegionIoeventfd ioeventfd = {
1198 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1199 .data = data,
1200 };
1201 unsigned i;
1202
1203 for (i = 0; i < mr->ioeventfd_nb; i++) {
1204 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1205 ioeventfd.e = mr->ioeventfds[i].e;
1206
1207 if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) {
1208 event_notifier_set(ioeventfd.e);
1209 return true;
1210 }
1211 }
1212
1213 return false;
1214 }
1215
1216 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1217 hwaddr addr,
1218 uint64_t data,
1219 unsigned size,
1220 MemTxAttrs attrs)
1221 {
1222 if (!memory_region_access_valid(mr, addr, size, true)) {
1223 unassigned_mem_write(mr, addr, data, size);
1224 return MEMTX_DECODE_ERROR;
1225 }
1226
1227 adjust_endianness(mr, &data, size);
1228
1229 if ((!kvm_eventfds_enabled()) &&
1230 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1231 return MEMTX_OK;
1232 }
1233
1234 if (mr->ops->write) {
1235 return access_with_adjusted_size(addr, &data, size,
1236 mr->ops->impl.min_access_size,
1237 mr->ops->impl.max_access_size,
1238 memory_region_write_accessor, mr,
1239 attrs);
1240 } else if (mr->ops->write_with_attrs) {
1241 return
1242 access_with_adjusted_size(addr, &data, size,
1243 mr->ops->impl.min_access_size,
1244 mr->ops->impl.max_access_size,
1245 memory_region_write_with_attrs_accessor,
1246 mr, attrs);
1247 } else {
1248 return access_with_adjusted_size(addr, &data, size, 1, 4,
1249 memory_region_oldmmio_write_accessor,
1250 mr, attrs);
1251 }
1252 }
1253
1254 void memory_region_init_io(MemoryRegion *mr,
1255 Object *owner,
1256 const MemoryRegionOps *ops,
1257 void *opaque,
1258 const char *name,
1259 uint64_t size)
1260 {
1261 memory_region_init(mr, owner, name, size);
1262 mr->ops = ops ? ops : &unassigned_mem_ops;
1263 mr->opaque = opaque;
1264 mr->terminates = true;
1265 }
1266
1267 void memory_region_init_ram(MemoryRegion *mr,
1268 Object *owner,
1269 const char *name,
1270 uint64_t size,
1271 Error **errp)
1272 {
1273 memory_region_init(mr, owner, name, size);
1274 mr->ram = true;
1275 mr->terminates = true;
1276 mr->destructor = memory_region_destructor_ram;
1277 mr->ram_addr = qemu_ram_alloc(size, mr, errp);
1278 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1279 }
1280
1281 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1282 Object *owner,
1283 const char *name,
1284 uint64_t size,
1285 uint64_t max_size,
1286 void (*resized)(const char*,
1287 uint64_t length,
1288 void *host),
1289 Error **errp)
1290 {
1291 memory_region_init(mr, owner, name, size);
1292 mr->ram = true;
1293 mr->terminates = true;
1294 mr->destructor = memory_region_destructor_ram;
1295 mr->ram_addr = qemu_ram_alloc_resizeable(size, max_size, resized, mr, errp);
1296 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1297 }
1298
1299 #ifdef __linux__
1300 void memory_region_init_ram_from_file(MemoryRegion *mr,
1301 struct Object *owner,
1302 const char *name,
1303 uint64_t size,
1304 bool share,
1305 const char *path,
1306 Error **errp)
1307 {
1308 memory_region_init(mr, owner, name, size);
1309 mr->ram = true;
1310 mr->terminates = true;
1311 mr->destructor = memory_region_destructor_ram;
1312 mr->ram_addr = qemu_ram_alloc_from_file(size, mr, share, path, errp);
1313 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1314 }
1315 #endif
1316
1317 void memory_region_init_ram_ptr(MemoryRegion *mr,
1318 Object *owner,
1319 const char *name,
1320 uint64_t size,
1321 void *ptr)
1322 {
1323 memory_region_init(mr, owner, name, size);
1324 mr->ram = true;
1325 mr->terminates = true;
1326 mr->destructor = memory_region_destructor_ram;
1327 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1328
1329 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1330 assert(ptr != NULL);
1331 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1332 }
1333
1334 void memory_region_set_skip_dump(MemoryRegion *mr)
1335 {
1336 mr->skip_dump = true;
1337 }
1338
1339 void memory_region_init_alias(MemoryRegion *mr,
1340 Object *owner,
1341 const char *name,
1342 MemoryRegion *orig,
1343 hwaddr offset,
1344 uint64_t size)
1345 {
1346 memory_region_init(mr, owner, name, size);
1347 mr->alias = orig;
1348 mr->alias_offset = offset;
1349 }
1350
1351 void memory_region_init_rom_device(MemoryRegion *mr,
1352 Object *owner,
1353 const MemoryRegionOps *ops,
1354 void *opaque,
1355 const char *name,
1356 uint64_t size,
1357 Error **errp)
1358 {
1359 memory_region_init(mr, owner, name, size);
1360 mr->ops = ops;
1361 mr->opaque = opaque;
1362 mr->terminates = true;
1363 mr->rom_device = true;
1364 mr->destructor = memory_region_destructor_rom_device;
1365 mr->ram_addr = qemu_ram_alloc(size, mr, errp);
1366 }
1367
1368 void memory_region_init_iommu(MemoryRegion *mr,
1369 Object *owner,
1370 const MemoryRegionIOMMUOps *ops,
1371 const char *name,
1372 uint64_t size)
1373 {
1374 memory_region_init(mr, owner, name, size);
1375 mr->iommu_ops = ops,
1376 mr->terminates = true; /* then re-forwards */
1377 notifier_list_init(&mr->iommu_notify);
1378 }
1379
1380 static void memory_region_finalize(Object *obj)
1381 {
1382 MemoryRegion *mr = MEMORY_REGION(obj);
1383
1384 assert(!mr->container);
1385
1386 /* We know the region is not visible in any address space (it
1387 * does not have a container and cannot be a root either because
1388 * it has no references, so we can blindly clear mr->enabled.
1389 * memory_region_set_enabled instead could trigger a transaction
1390 * and cause an infinite loop.
1391 */
1392 mr->enabled = false;
1393 memory_region_transaction_begin();
1394 while (!QTAILQ_EMPTY(&mr->subregions)) {
1395 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1396 memory_region_del_subregion(mr, subregion);
1397 }
1398 memory_region_transaction_commit();
1399
1400 mr->destructor(mr);
1401 memory_region_clear_coalescing(mr);
1402 g_free((char *)mr->name);
1403 g_free(mr->ioeventfds);
1404 }
1405
1406 Object *memory_region_owner(MemoryRegion *mr)
1407 {
1408 Object *obj = OBJECT(mr);
1409 return obj->parent;
1410 }
1411
1412 void memory_region_ref(MemoryRegion *mr)
1413 {
1414 /* MMIO callbacks most likely will access data that belongs
1415 * to the owner, hence the need to ref/unref the owner whenever
1416 * the memory region is in use.
1417 *
1418 * The memory region is a child of its owner. As long as the
1419 * owner doesn't call unparent itself on the memory region,
1420 * ref-ing the owner will also keep the memory region alive.
1421 * Memory regions without an owner are supposed to never go away;
1422 * we do not ref/unref them because it slows down DMA sensibly.
1423 */
1424 if (mr && mr->owner) {
1425 object_ref(mr->owner);
1426 }
1427 }
1428
1429 void memory_region_unref(MemoryRegion *mr)
1430 {
1431 if (mr && mr->owner) {
1432 object_unref(mr->owner);
1433 }
1434 }
1435
1436 uint64_t memory_region_size(MemoryRegion *mr)
1437 {
1438 if (int128_eq(mr->size, int128_2_64())) {
1439 return UINT64_MAX;
1440 }
1441 return int128_get64(mr->size);
1442 }
1443
1444 const char *memory_region_name(const MemoryRegion *mr)
1445 {
1446 if (!mr->name) {
1447 ((MemoryRegion *)mr)->name =
1448 object_get_canonical_path_component(OBJECT(mr));
1449 }
1450 return mr->name;
1451 }
1452
1453 bool memory_region_is_skip_dump(MemoryRegion *mr)
1454 {
1455 return mr->skip_dump;
1456 }
1457
1458 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1459 {
1460 uint8_t mask = mr->dirty_log_mask;
1461 if (global_dirty_log) {
1462 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1463 }
1464 return mask;
1465 }
1466
1467 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1468 {
1469 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1470 }
1471
1472 void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1473 {
1474 notifier_list_add(&mr->iommu_notify, n);
1475 }
1476
1477 void memory_region_iommu_replay(MemoryRegion *mr, Notifier *n,
1478 hwaddr granularity, bool is_write)
1479 {
1480 hwaddr addr;
1481 IOMMUTLBEntry iotlb;
1482
1483 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1484 iotlb = mr->iommu_ops->translate(mr, addr, is_write);
1485 if (iotlb.perm != IOMMU_NONE) {
1486 n->notify(n, &iotlb);
1487 }
1488
1489 /* if (2^64 - MR size) < granularity, it's possible to get an
1490 * infinite loop here. This should catch such a wraparound */
1491 if ((addr + granularity) < addr) {
1492 break;
1493 }
1494 }
1495 }
1496
1497 void memory_region_unregister_iommu_notifier(Notifier *n)
1498 {
1499 notifier_remove(n);
1500 }
1501
1502 void memory_region_notify_iommu(MemoryRegion *mr,
1503 IOMMUTLBEntry entry)
1504 {
1505 assert(memory_region_is_iommu(mr));
1506 notifier_list_notify(&mr->iommu_notify, &entry);
1507 }
1508
1509 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1510 {
1511 uint8_t mask = 1 << client;
1512 uint8_t old_logging;
1513
1514 assert(client == DIRTY_MEMORY_VGA);
1515 old_logging = mr->vga_logging_count;
1516 mr->vga_logging_count += log ? 1 : -1;
1517 if (!!old_logging == !!mr->vga_logging_count) {
1518 return;
1519 }
1520
1521 memory_region_transaction_begin();
1522 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1523 memory_region_update_pending |= mr->enabled;
1524 memory_region_transaction_commit();
1525 }
1526
1527 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1528 hwaddr size, unsigned client)
1529 {
1530 assert(mr->ram_addr != RAM_ADDR_INVALID);
1531 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client);
1532 }
1533
1534 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1535 hwaddr size)
1536 {
1537 assert(mr->ram_addr != RAM_ADDR_INVALID);
1538 cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size,
1539 memory_region_get_dirty_log_mask(mr));
1540 }
1541
1542 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1543 hwaddr size, unsigned client)
1544 {
1545 assert(mr->ram_addr != RAM_ADDR_INVALID);
1546 return cpu_physical_memory_test_and_clear_dirty(mr->ram_addr + addr,
1547 size, client);
1548 }
1549
1550
1551 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1552 {
1553 AddressSpace *as;
1554 FlatRange *fr;
1555
1556 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1557 FlatView *view = address_space_get_flatview(as);
1558 FOR_EACH_FLAT_RANGE(fr, view) {
1559 if (fr->mr == mr) {
1560 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1561 }
1562 }
1563 flatview_unref(view);
1564 }
1565 }
1566
1567 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1568 {
1569 if (mr->readonly != readonly) {
1570 memory_region_transaction_begin();
1571 mr->readonly = readonly;
1572 memory_region_update_pending |= mr->enabled;
1573 memory_region_transaction_commit();
1574 }
1575 }
1576
1577 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1578 {
1579 if (mr->romd_mode != romd_mode) {
1580 memory_region_transaction_begin();
1581 mr->romd_mode = romd_mode;
1582 memory_region_update_pending |= mr->enabled;
1583 memory_region_transaction_commit();
1584 }
1585 }
1586
1587 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1588 hwaddr size, unsigned client)
1589 {
1590 assert(mr->ram_addr != RAM_ADDR_INVALID);
1591 cpu_physical_memory_test_and_clear_dirty(mr->ram_addr + addr, size,
1592 client);
1593 }
1594
1595 int memory_region_get_fd(MemoryRegion *mr)
1596 {
1597 if (mr->alias) {
1598 return memory_region_get_fd(mr->alias);
1599 }
1600
1601 assert(mr->ram_addr != RAM_ADDR_INVALID);
1602
1603 return qemu_get_ram_fd(mr->ram_addr & TARGET_PAGE_MASK);
1604 }
1605
1606 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1607 {
1608 void *ptr;
1609 uint64_t offset = 0;
1610
1611 rcu_read_lock();
1612 while (mr->alias) {
1613 offset += mr->alias_offset;
1614 mr = mr->alias;
1615 }
1616 assert(mr->ram_addr != RAM_ADDR_INVALID);
1617 ptr = qemu_get_ram_ptr(mr->ram_block, mr->ram_addr & TARGET_PAGE_MASK);
1618 rcu_read_unlock();
1619
1620 return ptr + offset;
1621 }
1622
1623 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
1624 {
1625 assert(mr->ram_addr != RAM_ADDR_INVALID);
1626
1627 qemu_ram_resize(mr->ram_addr, newsize, errp);
1628 }
1629
1630 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1631 {
1632 FlatView *view;
1633 FlatRange *fr;
1634 CoalescedMemoryRange *cmr;
1635 AddrRange tmp;
1636 MemoryRegionSection section;
1637
1638 view = address_space_get_flatview(as);
1639 FOR_EACH_FLAT_RANGE(fr, view) {
1640 if (fr->mr == mr) {
1641 section = (MemoryRegionSection) {
1642 .address_space = as,
1643 .offset_within_address_space = int128_get64(fr->addr.start),
1644 .size = fr->addr.size,
1645 };
1646
1647 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1648 int128_get64(fr->addr.start),
1649 int128_get64(fr->addr.size));
1650 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1651 tmp = addrrange_shift(cmr->addr,
1652 int128_sub(fr->addr.start,
1653 int128_make64(fr->offset_in_region)));
1654 if (!addrrange_intersects(tmp, fr->addr)) {
1655 continue;
1656 }
1657 tmp = addrrange_intersection(tmp, fr->addr);
1658 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1659 int128_get64(tmp.start),
1660 int128_get64(tmp.size));
1661 }
1662 }
1663 }
1664 flatview_unref(view);
1665 }
1666
1667 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1668 {
1669 AddressSpace *as;
1670
1671 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1672 memory_region_update_coalesced_range_as(mr, as);
1673 }
1674 }
1675
1676 void memory_region_set_coalescing(MemoryRegion *mr)
1677 {
1678 memory_region_clear_coalescing(mr);
1679 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1680 }
1681
1682 void memory_region_add_coalescing(MemoryRegion *mr,
1683 hwaddr offset,
1684 uint64_t size)
1685 {
1686 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1687
1688 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1689 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1690 memory_region_update_coalesced_range(mr);
1691 memory_region_set_flush_coalesced(mr);
1692 }
1693
1694 void memory_region_clear_coalescing(MemoryRegion *mr)
1695 {
1696 CoalescedMemoryRange *cmr;
1697 bool updated = false;
1698
1699 qemu_flush_coalesced_mmio_buffer();
1700 mr->flush_coalesced_mmio = false;
1701
1702 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1703 cmr = QTAILQ_FIRST(&mr->coalesced);
1704 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1705 g_free(cmr);
1706 updated = true;
1707 }
1708
1709 if (updated) {
1710 memory_region_update_coalesced_range(mr);
1711 }
1712 }
1713
1714 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1715 {
1716 mr->flush_coalesced_mmio = true;
1717 }
1718
1719 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1720 {
1721 qemu_flush_coalesced_mmio_buffer();
1722 if (QTAILQ_EMPTY(&mr->coalesced)) {
1723 mr->flush_coalesced_mmio = false;
1724 }
1725 }
1726
1727 void memory_region_set_global_locking(MemoryRegion *mr)
1728 {
1729 mr->global_locking = true;
1730 }
1731
1732 void memory_region_clear_global_locking(MemoryRegion *mr)
1733 {
1734 mr->global_locking = false;
1735 }
1736
1737 static bool userspace_eventfd_warning;
1738
1739 void memory_region_add_eventfd(MemoryRegion *mr,
1740 hwaddr addr,
1741 unsigned size,
1742 bool match_data,
1743 uint64_t data,
1744 EventNotifier *e)
1745 {
1746 MemoryRegionIoeventfd mrfd = {
1747 .addr.start = int128_make64(addr),
1748 .addr.size = int128_make64(size),
1749 .match_data = match_data,
1750 .data = data,
1751 .e = e,
1752 };
1753 unsigned i;
1754
1755 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
1756 userspace_eventfd_warning))) {
1757 userspace_eventfd_warning = true;
1758 error_report("Using eventfd without MMIO binding in KVM. "
1759 "Suboptimal performance expected");
1760 }
1761
1762 if (size) {
1763 adjust_endianness(mr, &mrfd.data, size);
1764 }
1765 memory_region_transaction_begin();
1766 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1767 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1768 break;
1769 }
1770 }
1771 ++mr->ioeventfd_nb;
1772 mr->ioeventfds = g_realloc(mr->ioeventfds,
1773 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1774 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1775 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1776 mr->ioeventfds[i] = mrfd;
1777 ioeventfd_update_pending |= mr->enabled;
1778 memory_region_transaction_commit();
1779 }
1780
1781 void memory_region_del_eventfd(MemoryRegion *mr,
1782 hwaddr addr,
1783 unsigned size,
1784 bool match_data,
1785 uint64_t data,
1786 EventNotifier *e)
1787 {
1788 MemoryRegionIoeventfd mrfd = {
1789 .addr.start = int128_make64(addr),
1790 .addr.size = int128_make64(size),
1791 .match_data = match_data,
1792 .data = data,
1793 .e = e,
1794 };
1795 unsigned i;
1796
1797 if (size) {
1798 adjust_endianness(mr, &mrfd.data, size);
1799 }
1800 memory_region_transaction_begin();
1801 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1802 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1803 break;
1804 }
1805 }
1806 assert(i != mr->ioeventfd_nb);
1807 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1808 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1809 --mr->ioeventfd_nb;
1810 mr->ioeventfds = g_realloc(mr->ioeventfds,
1811 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1812 ioeventfd_update_pending |= mr->enabled;
1813 memory_region_transaction_commit();
1814 }
1815
1816 static void memory_region_update_container_subregions(MemoryRegion *subregion)
1817 {
1818 hwaddr offset = subregion->addr;
1819 MemoryRegion *mr = subregion->container;
1820 MemoryRegion *other;
1821
1822 memory_region_transaction_begin();
1823
1824 memory_region_ref(subregion);
1825 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1826 if (subregion->may_overlap || other->may_overlap) {
1827 continue;
1828 }
1829 if (int128_ge(int128_make64(offset),
1830 int128_add(int128_make64(other->addr), other->size))
1831 || int128_le(int128_add(int128_make64(offset), subregion->size),
1832 int128_make64(other->addr))) {
1833 continue;
1834 }
1835 #if 0
1836 printf("warning: subregion collision %llx/%llx (%s) "
1837 "vs %llx/%llx (%s)\n",
1838 (unsigned long long)offset,
1839 (unsigned long long)int128_get64(subregion->size),
1840 subregion->name,
1841 (unsigned long long)other->addr,
1842 (unsigned long long)int128_get64(other->size),
1843 other->name);
1844 #endif
1845 }
1846 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1847 if (subregion->priority >= other->priority) {
1848 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1849 goto done;
1850 }
1851 }
1852 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1853 done:
1854 memory_region_update_pending |= mr->enabled && subregion->enabled;
1855 memory_region_transaction_commit();
1856 }
1857
1858 static void memory_region_add_subregion_common(MemoryRegion *mr,
1859 hwaddr offset,
1860 MemoryRegion *subregion)
1861 {
1862 assert(!subregion->container);
1863 subregion->container = mr;
1864 subregion->addr = offset;
1865 memory_region_update_container_subregions(subregion);
1866 }
1867
1868 void memory_region_add_subregion(MemoryRegion *mr,
1869 hwaddr offset,
1870 MemoryRegion *subregion)
1871 {
1872 subregion->may_overlap = false;
1873 subregion->priority = 0;
1874 memory_region_add_subregion_common(mr, offset, subregion);
1875 }
1876
1877 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1878 hwaddr offset,
1879 MemoryRegion *subregion,
1880 int priority)
1881 {
1882 subregion->may_overlap = true;
1883 subregion->priority = priority;
1884 memory_region_add_subregion_common(mr, offset, subregion);
1885 }
1886
1887 void memory_region_del_subregion(MemoryRegion *mr,
1888 MemoryRegion *subregion)
1889 {
1890 memory_region_transaction_begin();
1891 assert(subregion->container == mr);
1892 subregion->container = NULL;
1893 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1894 memory_region_unref(subregion);
1895 memory_region_update_pending |= mr->enabled && subregion->enabled;
1896 memory_region_transaction_commit();
1897 }
1898
1899 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1900 {
1901 if (enabled == mr->enabled) {
1902 return;
1903 }
1904 memory_region_transaction_begin();
1905 mr->enabled = enabled;
1906 memory_region_update_pending = true;
1907 memory_region_transaction_commit();
1908 }
1909
1910 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
1911 {
1912 Int128 s = int128_make64(size);
1913
1914 if (size == UINT64_MAX) {
1915 s = int128_2_64();
1916 }
1917 if (int128_eq(s, mr->size)) {
1918 return;
1919 }
1920 memory_region_transaction_begin();
1921 mr->size = s;
1922 memory_region_update_pending = true;
1923 memory_region_transaction_commit();
1924 }
1925
1926 static void memory_region_readd_subregion(MemoryRegion *mr)
1927 {
1928 MemoryRegion *container = mr->container;
1929
1930 if (container) {
1931 memory_region_transaction_begin();
1932 memory_region_ref(mr);
1933 memory_region_del_subregion(container, mr);
1934 mr->container = container;
1935 memory_region_update_container_subregions(mr);
1936 memory_region_unref(mr);
1937 memory_region_transaction_commit();
1938 }
1939 }
1940
1941 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1942 {
1943 if (addr != mr->addr) {
1944 mr->addr = addr;
1945 memory_region_readd_subregion(mr);
1946 }
1947 }
1948
1949 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
1950 {
1951 assert(mr->alias);
1952
1953 if (offset == mr->alias_offset) {
1954 return;
1955 }
1956
1957 memory_region_transaction_begin();
1958 mr->alias_offset = offset;
1959 memory_region_update_pending |= mr->enabled;
1960 memory_region_transaction_commit();
1961 }
1962
1963 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
1964 {
1965 return mr->align;
1966 }
1967
1968 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1969 {
1970 const AddrRange *addr = addr_;
1971 const FlatRange *fr = fr_;
1972
1973 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1974 return -1;
1975 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1976 return 1;
1977 }
1978 return 0;
1979 }
1980
1981 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
1982 {
1983 return bsearch(&addr, view->ranges, view->nr,
1984 sizeof(FlatRange), cmp_flatrange_addr);
1985 }
1986
1987 bool memory_region_is_mapped(MemoryRegion *mr)
1988 {
1989 return mr->container ? true : false;
1990 }
1991
1992 /* Same as memory_region_find, but it does not add a reference to the
1993 * returned region. It must be called from an RCU critical section.
1994 */
1995 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
1996 hwaddr addr, uint64_t size)
1997 {
1998 MemoryRegionSection ret = { .mr = NULL };
1999 MemoryRegion *root;
2000 AddressSpace *as;
2001 AddrRange range;
2002 FlatView *view;
2003 FlatRange *fr;
2004
2005 addr += mr->addr;
2006 for (root = mr; root->container; ) {
2007 root = root->container;
2008 addr += root->addr;
2009 }
2010
2011 as = memory_region_to_address_space(root);
2012 if (!as) {
2013 return ret;
2014 }
2015 range = addrrange_make(int128_make64(addr), int128_make64(size));
2016
2017 view = atomic_rcu_read(&as->current_map);
2018 fr = flatview_lookup(view, range);
2019 if (!fr) {
2020 return ret;
2021 }
2022
2023 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2024 --fr;
2025 }
2026
2027 ret.mr = fr->mr;
2028 ret.address_space = as;
2029 range = addrrange_intersection(range, fr->addr);
2030 ret.offset_within_region = fr->offset_in_region;
2031 ret.offset_within_region += int128_get64(int128_sub(range.start,
2032 fr->addr.start));
2033 ret.size = range.size;
2034 ret.offset_within_address_space = int128_get64(range.start);
2035 ret.readonly = fr->readonly;
2036 return ret;
2037 }
2038
2039 MemoryRegionSection memory_region_find(MemoryRegion *mr,
2040 hwaddr addr, uint64_t size)
2041 {
2042 MemoryRegionSection ret;
2043 rcu_read_lock();
2044 ret = memory_region_find_rcu(mr, addr, size);
2045 if (ret.mr) {
2046 memory_region_ref(ret.mr);
2047 }
2048 rcu_read_unlock();
2049 return ret;
2050 }
2051
2052 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2053 {
2054 MemoryRegion *mr;
2055
2056 rcu_read_lock();
2057 mr = memory_region_find_rcu(container, addr, 1).mr;
2058 rcu_read_unlock();
2059 return mr && mr != container;
2060 }
2061
2062 void address_space_sync_dirty_bitmap(AddressSpace *as)
2063 {
2064 FlatView *view;
2065 FlatRange *fr;
2066
2067 view = address_space_get_flatview(as);
2068 FOR_EACH_FLAT_RANGE(fr, view) {
2069 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
2070 }
2071 flatview_unref(view);
2072 }
2073
2074 void memory_global_dirty_log_start(void)
2075 {
2076 global_dirty_log = true;
2077
2078 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2079
2080 /* Refresh DIRTY_LOG_MIGRATION bit. */
2081 memory_region_transaction_begin();
2082 memory_region_update_pending = true;
2083 memory_region_transaction_commit();
2084 }
2085
2086 void memory_global_dirty_log_stop(void)
2087 {
2088 global_dirty_log = false;
2089
2090 /* Refresh DIRTY_LOG_MIGRATION bit. */
2091 memory_region_transaction_begin();
2092 memory_region_update_pending = true;
2093 memory_region_transaction_commit();
2094
2095 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2096 }
2097
2098 static void listener_add_address_space(MemoryListener *listener,
2099 AddressSpace *as)
2100 {
2101 FlatView *view;
2102 FlatRange *fr;
2103
2104 if (listener->address_space_filter
2105 && listener->address_space_filter != as) {
2106 return;
2107 }
2108
2109 if (listener->begin) {
2110 listener->begin(listener);
2111 }
2112 if (global_dirty_log) {
2113 if (listener->log_global_start) {
2114 listener->log_global_start(listener);
2115 }
2116 }
2117
2118 view = address_space_get_flatview(as);
2119 FOR_EACH_FLAT_RANGE(fr, view) {
2120 MemoryRegionSection section = {
2121 .mr = fr->mr,
2122 .address_space = as,
2123 .offset_within_region = fr->offset_in_region,
2124 .size = fr->addr.size,
2125 .offset_within_address_space = int128_get64(fr->addr.start),
2126 .readonly = fr->readonly,
2127 };
2128 if (fr->dirty_log_mask && listener->log_start) {
2129 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2130 }
2131 if (listener->region_add) {
2132 listener->region_add(listener, &section);
2133 }
2134 }
2135 if (listener->commit) {
2136 listener->commit(listener);
2137 }
2138 flatview_unref(view);
2139 }
2140
2141 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
2142 {
2143 MemoryListener *other = NULL;
2144 AddressSpace *as;
2145
2146 listener->address_space_filter = filter;
2147 if (QTAILQ_EMPTY(&memory_listeners)
2148 || listener->priority >= QTAILQ_LAST(&memory_listeners,
2149 memory_listeners)->priority) {
2150 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2151 } else {
2152 QTAILQ_FOREACH(other, &memory_listeners, link) {
2153 if (listener->priority < other->priority) {
2154 break;
2155 }
2156 }
2157 QTAILQ_INSERT_BEFORE(other, listener, link);
2158 }
2159
2160 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2161 listener_add_address_space(listener, as);
2162 }
2163 }
2164
2165 void memory_listener_unregister(MemoryListener *listener)
2166 {
2167 QTAILQ_REMOVE(&memory_listeners, listener, link);
2168 }
2169
2170 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2171 {
2172 memory_region_ref(root);
2173 memory_region_transaction_begin();
2174 as->ref_count = 1;
2175 as->root = root;
2176 as->malloced = false;
2177 as->current_map = g_new(FlatView, 1);
2178 flatview_init(as->current_map);
2179 as->ioeventfd_nb = 0;
2180 as->ioeventfds = NULL;
2181 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2182 as->name = g_strdup(name ? name : "anonymous");
2183 address_space_init_dispatch(as);
2184 memory_region_update_pending |= root->enabled;
2185 memory_region_transaction_commit();
2186 }
2187
2188 static void do_address_space_destroy(AddressSpace *as)
2189 {
2190 MemoryListener *listener;
2191 bool do_free = as->malloced;
2192
2193 address_space_destroy_dispatch(as);
2194
2195 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2196 assert(listener->address_space_filter != as);
2197 }
2198
2199 flatview_unref(as->current_map);
2200 g_free(as->name);
2201 g_free(as->ioeventfds);
2202 memory_region_unref(as->root);
2203 if (do_free) {
2204 g_free(as);
2205 }
2206 }
2207
2208 AddressSpace *address_space_init_shareable(MemoryRegion *root, const char *name)
2209 {
2210 AddressSpace *as;
2211
2212 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2213 if (root == as->root && as->malloced) {
2214 as->ref_count++;
2215 return as;
2216 }
2217 }
2218
2219 as = g_malloc0(sizeof *as);
2220 address_space_init(as, root, name);
2221 as->malloced = true;
2222 return as;
2223 }
2224
2225 void address_space_destroy(AddressSpace *as)
2226 {
2227 MemoryRegion *root = as->root;
2228
2229 as->ref_count--;
2230 if (as->ref_count) {
2231 return;
2232 }
2233 /* Flush out anything from MemoryListeners listening in on this */
2234 memory_region_transaction_begin();
2235 as->root = NULL;
2236 memory_region_transaction_commit();
2237 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2238 address_space_unregister(as);
2239
2240 /* At this point, as->dispatch and as->current_map are dummy
2241 * entries that the guest should never use. Wait for the old
2242 * values to expire before freeing the data.
2243 */
2244 as->root = root;
2245 call_rcu(as, do_address_space_destroy, rcu);
2246 }
2247
2248 typedef struct MemoryRegionList MemoryRegionList;
2249
2250 struct MemoryRegionList {
2251 const MemoryRegion *mr;
2252 QTAILQ_ENTRY(MemoryRegionList) queue;
2253 };
2254
2255 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
2256
2257 static void mtree_print_mr(fprintf_function mon_printf, void *f,
2258 const MemoryRegion *mr, unsigned int level,
2259 hwaddr base,
2260 MemoryRegionListHead *alias_print_queue)
2261 {
2262 MemoryRegionList *new_ml, *ml, *next_ml;
2263 MemoryRegionListHead submr_print_queue;
2264 const MemoryRegion *submr;
2265 unsigned int i;
2266
2267 if (!mr) {
2268 return;
2269 }
2270
2271 for (i = 0; i < level; i++) {
2272 mon_printf(f, " ");
2273 }
2274
2275 if (mr->alias) {
2276 MemoryRegionList *ml;
2277 bool found = false;
2278
2279 /* check if the alias is already in the queue */
2280 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
2281 if (ml->mr == mr->alias) {
2282 found = true;
2283 }
2284 }
2285
2286 if (!found) {
2287 ml = g_new(MemoryRegionList, 1);
2288 ml->mr = mr->alias;
2289 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
2290 }
2291 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2292 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
2293 "-" TARGET_FMT_plx "%s\n",
2294 base + mr->addr,
2295 base + mr->addr
2296 + (int128_nz(mr->size) ?
2297 (hwaddr)int128_get64(int128_sub(mr->size,
2298 int128_one())) : 0),
2299 mr->priority,
2300 mr->romd_mode ? 'R' : '-',
2301 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2302 : '-',
2303 memory_region_name(mr),
2304 memory_region_name(mr->alias),
2305 mr->alias_offset,
2306 mr->alias_offset
2307 + (int128_nz(mr->size) ?
2308 (hwaddr)int128_get64(int128_sub(mr->size,
2309 int128_one())) : 0),
2310 mr->enabled ? "" : " [disabled]");
2311 } else {
2312 mon_printf(f,
2313 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s%s\n",
2314 base + mr->addr,
2315 base + mr->addr
2316 + (int128_nz(mr->size) ?
2317 (hwaddr)int128_get64(int128_sub(mr->size,
2318 int128_one())) : 0),
2319 mr->priority,
2320 mr->romd_mode ? 'R' : '-',
2321 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2322 : '-',
2323 memory_region_name(mr),
2324 mr->enabled ? "" : " [disabled]");
2325 }
2326
2327 QTAILQ_INIT(&submr_print_queue);
2328
2329 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2330 new_ml = g_new(MemoryRegionList, 1);
2331 new_ml->mr = submr;
2332 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2333 if (new_ml->mr->addr < ml->mr->addr ||
2334 (new_ml->mr->addr == ml->mr->addr &&
2335 new_ml->mr->priority > ml->mr->priority)) {
2336 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2337 new_ml = NULL;
2338 break;
2339 }
2340 }
2341 if (new_ml) {
2342 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2343 }
2344 }
2345
2346 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2347 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
2348 alias_print_queue);
2349 }
2350
2351 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
2352 g_free(ml);
2353 }
2354 }
2355
2356 void mtree_info(fprintf_function mon_printf, void *f)
2357 {
2358 MemoryRegionListHead ml_head;
2359 MemoryRegionList *ml, *ml2;
2360 AddressSpace *as;
2361
2362 QTAILQ_INIT(&ml_head);
2363
2364 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2365 mon_printf(f, "address-space: %s\n", as->name);
2366 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
2367 mon_printf(f, "\n");
2368 }
2369
2370 /* print aliased regions */
2371 QTAILQ_FOREACH(ml, &ml_head, queue) {
2372 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
2373 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
2374 mon_printf(f, "\n");
2375 }
2376
2377 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
2378 g_free(ml);
2379 }
2380 }
2381
2382 static const TypeInfo memory_region_info = {
2383 .parent = TYPE_OBJECT,
2384 .name = TYPE_MEMORY_REGION,
2385 .instance_size = sizeof(MemoryRegion),
2386 .instance_init = memory_region_initfn,
2387 .instance_finalize = memory_region_finalize,
2388 };
2389
2390 static void memory_register_types(void)
2391 {
2392 type_register_static(&memory_region_info);
2393 }
2394
2395 type_init(memory_register_types)
AR7 emulation for QEMU