2 * Copyright (c) 2003-2004 Fabrice Bellard
3 * Copyright (c) 2019 Red Hat, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a copy
6 * of this software and associated documentation files (the "Software"), to deal
7 * in the Software without restriction, including without limitation the rights
8 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9 * copies of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 #include "qemu/osdep.h"
24 #include "qemu/error-report.h"
25 #include "qemu/option.h"
26 #include "qemu/cutils.h"
27 #include "qemu/units.h"
28 #include "qemu-common.h"
29 #include "qemu/datadir.h"
30 #include "qapi/error.h"
31 #include "qapi/qmp/qerror.h"
32 #include "qapi/qapi-visit-common.h"
33 #include "qapi/clone-visitor.h"
34 #include "qapi/qapi-visit-machine.h"
35 #include "qapi/visitor.h"
36 #include "sysemu/qtest.h"
37 #include "sysemu/whpx.h"
38 #include "sysemu/numa.h"
39 #include "sysemu/replay.h"
40 #include "sysemu/sysemu.h"
41 #include "sysemu/cpu-timers.h"
44 #include "hw/i386/x86.h"
45 #include "target/i386/cpu.h"
46 #include "hw/i386/topology.h"
47 #include "hw/i386/fw_cfg.h"
48 #include "hw/intc/i8259.h"
49 #include "hw/rtc/mc146818rtc.h"
50 #include "target/i386/sev.h"
52 #include "hw/acpi/cpu_hotplug.h"
55 #include "hw/loader.h"
56 #include "multiboot.h"
58 #include "standard-headers/asm-x86/bootparam.h"
59 #include CONFIG_DEVICES
60 #include "kvm/kvm_i386.h"
62 /* Physical Address of PVH entry point read from kernel ELF NOTE */
63 static size_t pvh_start_addr
;
65 inline void init_topo_info(X86CPUTopoInfo
*topo_info
,
66 const X86MachineState
*x86ms
)
68 MachineState
*ms
= MACHINE(x86ms
);
70 topo_info
->dies_per_pkg
= ms
->smp
.dies
;
71 topo_info
->cores_per_die
= ms
->smp
.cores
;
72 topo_info
->threads_per_core
= ms
->smp
.threads
;
76 * Calculates initial APIC ID for a specific CPU index
78 * Currently we need to be able to calculate the APIC ID from the CPU index
79 * alone (without requiring a CPU object), as the QEMU<->Seabios interfaces have
80 * no concept of "CPU index", and the NUMA tables on fw_cfg need the APIC ID of
81 * all CPUs up to max_cpus.
83 uint32_t x86_cpu_apic_id_from_index(X86MachineState
*x86ms
,
84 unsigned int cpu_index
)
86 X86CPUTopoInfo topo_info
;
88 init_topo_info(&topo_info
, x86ms
);
90 return x86_apicid_from_cpu_idx(&topo_info
, cpu_index
);
94 void x86_cpu_new(X86MachineState
*x86ms
, int64_t apic_id
, Error
**errp
)
96 Object
*cpu
= object_new(MACHINE(x86ms
)->cpu_type
);
98 if (!object_property_set_uint(cpu
, "apic-id", apic_id
, errp
)) {
101 qdev_realize(DEVICE(cpu
), NULL
, errp
);
107 void x86_cpus_init(X86MachineState
*x86ms
, int default_cpu_version
)
110 const CPUArchIdList
*possible_cpus
;
111 MachineState
*ms
= MACHINE(x86ms
);
112 MachineClass
*mc
= MACHINE_GET_CLASS(x86ms
);
114 x86_cpu_set_default_version(default_cpu_version
);
117 * Calculates the limit to CPU APIC ID values
119 * Limit for the APIC ID value, so that all
120 * CPU APIC IDs are < x86ms->apic_id_limit.
122 * This is used for FW_CFG_MAX_CPUS. See comments on fw_cfg_arch_create().
124 x86ms
->apic_id_limit
= x86_cpu_apic_id_from_index(x86ms
,
125 ms
->smp
.max_cpus
- 1) + 1;
126 possible_cpus
= mc
->possible_cpu_arch_ids(ms
);
127 for (i
= 0; i
< ms
->smp
.cpus
; i
++) {
128 x86_cpu_new(x86ms
, possible_cpus
->cpus
[i
].arch_id
, &error_fatal
);
132 void x86_rtc_set_cpus_count(ISADevice
*rtc
, uint16_t cpus_count
)
134 if (cpus_count
> 0xff) {
136 * If the number of CPUs can't be represented in 8 bits, the
137 * BIOS must use "FW_CFG_NB_CPUS". Set RTC field to 0 just
138 * to make old BIOSes fail more predictably.
140 rtc_set_memory(rtc
, 0x5f, 0);
142 rtc_set_memory(rtc
, 0x5f, cpus_count
- 1);
146 static int x86_apic_cmp(const void *a
, const void *b
)
148 CPUArchId
*apic_a
= (CPUArchId
*)a
;
149 CPUArchId
*apic_b
= (CPUArchId
*)b
;
151 return apic_a
->arch_id
- apic_b
->arch_id
;
155 * returns pointer to CPUArchId descriptor that matches CPU's apic_id
156 * in ms->possible_cpus->cpus, if ms->possible_cpus->cpus has no
157 * entry corresponding to CPU's apic_id returns NULL.
159 CPUArchId
*x86_find_cpu_slot(MachineState
*ms
, uint32_t id
, int *idx
)
161 CPUArchId apic_id
, *found_cpu
;
163 apic_id
.arch_id
= id
;
164 found_cpu
= bsearch(&apic_id
, ms
->possible_cpus
->cpus
,
165 ms
->possible_cpus
->len
, sizeof(*ms
->possible_cpus
->cpus
),
167 if (found_cpu
&& idx
) {
168 *idx
= found_cpu
- ms
->possible_cpus
->cpus
;
173 void x86_cpu_plug(HotplugHandler
*hotplug_dev
,
174 DeviceState
*dev
, Error
**errp
)
176 CPUArchId
*found_cpu
;
177 Error
*local_err
= NULL
;
178 X86CPU
*cpu
= X86_CPU(dev
);
179 X86MachineState
*x86ms
= X86_MACHINE(hotplug_dev
);
181 if (x86ms
->acpi_dev
) {
182 hotplug_handler_plug(x86ms
->acpi_dev
, dev
, &local_err
);
188 /* increment the number of CPUs */
191 x86_rtc_set_cpus_count(x86ms
->rtc
, x86ms
->boot_cpus
);
194 fw_cfg_modify_i16(x86ms
->fw_cfg
, FW_CFG_NB_CPUS
, x86ms
->boot_cpus
);
197 found_cpu
= x86_find_cpu_slot(MACHINE(x86ms
), cpu
->apic_id
, NULL
);
198 found_cpu
->cpu
= OBJECT(dev
);
200 error_propagate(errp
, local_err
);
203 void x86_cpu_unplug_request_cb(HotplugHandler
*hotplug_dev
,
204 DeviceState
*dev
, Error
**errp
)
207 X86CPU
*cpu
= X86_CPU(dev
);
208 X86MachineState
*x86ms
= X86_MACHINE(hotplug_dev
);
210 if (!x86ms
->acpi_dev
) {
211 error_setg(errp
, "CPU hot unplug not supported without ACPI");
215 x86_find_cpu_slot(MACHINE(x86ms
), cpu
->apic_id
, &idx
);
218 error_setg(errp
, "Boot CPU is unpluggable");
222 hotplug_handler_unplug_request(x86ms
->acpi_dev
, dev
,
226 void x86_cpu_unplug_cb(HotplugHandler
*hotplug_dev
,
227 DeviceState
*dev
, Error
**errp
)
229 CPUArchId
*found_cpu
;
230 Error
*local_err
= NULL
;
231 X86CPU
*cpu
= X86_CPU(dev
);
232 X86MachineState
*x86ms
= X86_MACHINE(hotplug_dev
);
234 hotplug_handler_unplug(x86ms
->acpi_dev
, dev
, &local_err
);
239 found_cpu
= x86_find_cpu_slot(MACHINE(x86ms
), cpu
->apic_id
, NULL
);
240 found_cpu
->cpu
= NULL
;
243 /* decrement the number of CPUs */
245 /* Update the number of CPUs in CMOS */
246 x86_rtc_set_cpus_count(x86ms
->rtc
, x86ms
->boot_cpus
);
247 fw_cfg_modify_i16(x86ms
->fw_cfg
, FW_CFG_NB_CPUS
, x86ms
->boot_cpus
);
249 error_propagate(errp
, local_err
);
252 void x86_cpu_pre_plug(HotplugHandler
*hotplug_dev
,
253 DeviceState
*dev
, Error
**errp
)
258 X86CPUTopoIDs topo_ids
;
259 X86CPU
*cpu
= X86_CPU(dev
);
260 CPUX86State
*env
= &cpu
->env
;
261 MachineState
*ms
= MACHINE(hotplug_dev
);
262 X86MachineState
*x86ms
= X86_MACHINE(hotplug_dev
);
263 unsigned int smp_cores
= ms
->smp
.cores
;
264 unsigned int smp_threads
= ms
->smp
.threads
;
265 X86CPUTopoInfo topo_info
;
267 if (!object_dynamic_cast(OBJECT(cpu
), ms
->cpu_type
)) {
268 error_setg(errp
, "Invalid CPU type, expected cpu type: '%s'",
273 if (x86ms
->acpi_dev
) {
274 Error
*local_err
= NULL
;
276 hotplug_handler_pre_plug(HOTPLUG_HANDLER(x86ms
->acpi_dev
), dev
,
279 error_propagate(errp
, local_err
);
284 init_topo_info(&topo_info
, x86ms
);
286 env
->nr_dies
= ms
->smp
.dies
;
289 * If APIC ID is not set,
290 * set it based on socket/die/core/thread properties.
292 if (cpu
->apic_id
== UNASSIGNED_APIC_ID
) {
293 int max_socket
= (ms
->smp
.max_cpus
- 1) /
294 smp_threads
/ smp_cores
/ ms
->smp
.dies
;
297 * die-id was optional in QEMU 4.0 and older, so keep it optional
298 * if there's only one die per socket.
300 if (cpu
->die_id
< 0 && ms
->smp
.dies
== 1) {
304 if (cpu
->socket_id
< 0) {
305 error_setg(errp
, "CPU socket-id is not set");
307 } else if (cpu
->socket_id
> max_socket
) {
308 error_setg(errp
, "Invalid CPU socket-id: %u must be in range 0:%u",
309 cpu
->socket_id
, max_socket
);
312 if (cpu
->die_id
< 0) {
313 error_setg(errp
, "CPU die-id is not set");
315 } else if (cpu
->die_id
> ms
->smp
.dies
- 1) {
316 error_setg(errp
, "Invalid CPU die-id: %u must be in range 0:%u",
317 cpu
->die_id
, ms
->smp
.dies
- 1);
320 if (cpu
->core_id
< 0) {
321 error_setg(errp
, "CPU core-id is not set");
323 } else if (cpu
->core_id
> (smp_cores
- 1)) {
324 error_setg(errp
, "Invalid CPU core-id: %u must be in range 0:%u",
325 cpu
->core_id
, smp_cores
- 1);
328 if (cpu
->thread_id
< 0) {
329 error_setg(errp
, "CPU thread-id is not set");
331 } else if (cpu
->thread_id
> (smp_threads
- 1)) {
332 error_setg(errp
, "Invalid CPU thread-id: %u must be in range 0:%u",
333 cpu
->thread_id
, smp_threads
- 1);
337 topo_ids
.pkg_id
= cpu
->socket_id
;
338 topo_ids
.die_id
= cpu
->die_id
;
339 topo_ids
.core_id
= cpu
->core_id
;
340 topo_ids
.smt_id
= cpu
->thread_id
;
341 cpu
->apic_id
= x86_apicid_from_topo_ids(&topo_info
, &topo_ids
);
344 cpu_slot
= x86_find_cpu_slot(MACHINE(x86ms
), cpu
->apic_id
, &idx
);
346 MachineState
*ms
= MACHINE(x86ms
);
348 x86_topo_ids_from_apicid(cpu
->apic_id
, &topo_info
, &topo_ids
);
350 "Invalid CPU [socket: %u, die: %u, core: %u, thread: %u] with"
351 " APIC ID %" PRIu32
", valid index range 0:%d",
352 topo_ids
.pkg_id
, topo_ids
.die_id
, topo_ids
.core_id
, topo_ids
.smt_id
,
353 cpu
->apic_id
, ms
->possible_cpus
->len
- 1);
358 error_setg(errp
, "CPU[%d] with APIC ID %" PRIu32
" exists",
363 /* if 'address' properties socket-id/core-id/thread-id are not set, set them
364 * so that machine_query_hotpluggable_cpus would show correct values
366 /* TODO: move socket_id/core_id/thread_id checks into x86_cpu_realizefn()
367 * once -smp refactoring is complete and there will be CPU private
368 * CPUState::nr_cores and CPUState::nr_threads fields instead of globals */
369 x86_topo_ids_from_apicid(cpu
->apic_id
, &topo_info
, &topo_ids
);
370 if (cpu
->socket_id
!= -1 && cpu
->socket_id
!= topo_ids
.pkg_id
) {
371 error_setg(errp
, "property socket-id: %u doesn't match set apic-id:"
372 " 0x%x (socket-id: %u)", cpu
->socket_id
, cpu
->apic_id
,
376 cpu
->socket_id
= topo_ids
.pkg_id
;
378 if (cpu
->die_id
!= -1 && cpu
->die_id
!= topo_ids
.die_id
) {
379 error_setg(errp
, "property die-id: %u doesn't match set apic-id:"
380 " 0x%x (die-id: %u)", cpu
->die_id
, cpu
->apic_id
, topo_ids
.die_id
);
383 cpu
->die_id
= topo_ids
.die_id
;
385 if (cpu
->core_id
!= -1 && cpu
->core_id
!= topo_ids
.core_id
) {
386 error_setg(errp
, "property core-id: %u doesn't match set apic-id:"
387 " 0x%x (core-id: %u)", cpu
->core_id
, cpu
->apic_id
,
391 cpu
->core_id
= topo_ids
.core_id
;
393 if (cpu
->thread_id
!= -1 && cpu
->thread_id
!= topo_ids
.smt_id
) {
394 error_setg(errp
, "property thread-id: %u doesn't match set apic-id:"
395 " 0x%x (thread-id: %u)", cpu
->thread_id
, cpu
->apic_id
,
399 cpu
->thread_id
= topo_ids
.smt_id
;
401 if (hyperv_feat_enabled(cpu
, HYPERV_FEAT_VPINDEX
) &&
402 !kvm_hv_vpindex_settable()) {
403 error_setg(errp
, "kernel doesn't allow setting HyperV VP_INDEX");
410 numa_cpu_pre_plug(cpu_slot
, dev
, errp
);
413 CpuInstanceProperties
414 x86_cpu_index_to_props(MachineState
*ms
, unsigned cpu_index
)
416 MachineClass
*mc
= MACHINE_GET_CLASS(ms
);
417 const CPUArchIdList
*possible_cpus
= mc
->possible_cpu_arch_ids(ms
);
419 assert(cpu_index
< possible_cpus
->len
);
420 return possible_cpus
->cpus
[cpu_index
].props
;
423 int64_t x86_get_default_cpu_node_id(const MachineState
*ms
, int idx
)
425 X86CPUTopoIDs topo_ids
;
426 X86MachineState
*x86ms
= X86_MACHINE(ms
);
427 X86CPUTopoInfo topo_info
;
429 init_topo_info(&topo_info
, x86ms
);
431 assert(idx
< ms
->possible_cpus
->len
);
432 x86_topo_ids_from_apicid(ms
->possible_cpus
->cpus
[idx
].arch_id
,
433 &topo_info
, &topo_ids
);
434 return topo_ids
.pkg_id
% ms
->numa_state
->num_nodes
;
437 const CPUArchIdList
*x86_possible_cpu_arch_ids(MachineState
*ms
)
439 X86MachineState
*x86ms
= X86_MACHINE(ms
);
440 unsigned int max_cpus
= ms
->smp
.max_cpus
;
441 X86CPUTopoInfo topo_info
;
444 if (ms
->possible_cpus
) {
446 * make sure that max_cpus hasn't changed since the first use, i.e.
447 * -smp hasn't been parsed after it
449 assert(ms
->possible_cpus
->len
== max_cpus
);
450 return ms
->possible_cpus
;
453 ms
->possible_cpus
= g_malloc0(sizeof(CPUArchIdList
) +
454 sizeof(CPUArchId
) * max_cpus
);
455 ms
->possible_cpus
->len
= max_cpus
;
457 init_topo_info(&topo_info
, x86ms
);
459 for (i
= 0; i
< ms
->possible_cpus
->len
; i
++) {
460 X86CPUTopoIDs topo_ids
;
462 ms
->possible_cpus
->cpus
[i
].type
= ms
->cpu_type
;
463 ms
->possible_cpus
->cpus
[i
].vcpus_count
= 1;
464 ms
->possible_cpus
->cpus
[i
].arch_id
=
465 x86_cpu_apic_id_from_index(x86ms
, i
);
466 x86_topo_ids_from_apicid(ms
->possible_cpus
->cpus
[i
].arch_id
,
467 &topo_info
, &topo_ids
);
468 ms
->possible_cpus
->cpus
[i
].props
.has_socket_id
= true;
469 ms
->possible_cpus
->cpus
[i
].props
.socket_id
= topo_ids
.pkg_id
;
470 if (ms
->smp
.dies
> 1) {
471 ms
->possible_cpus
->cpus
[i
].props
.has_die_id
= true;
472 ms
->possible_cpus
->cpus
[i
].props
.die_id
= topo_ids
.die_id
;
474 ms
->possible_cpus
->cpus
[i
].props
.has_core_id
= true;
475 ms
->possible_cpus
->cpus
[i
].props
.core_id
= topo_ids
.core_id
;
476 ms
->possible_cpus
->cpus
[i
].props
.has_thread_id
= true;
477 ms
->possible_cpus
->cpus
[i
].props
.thread_id
= topo_ids
.smt_id
;
479 return ms
->possible_cpus
;
482 static void x86_nmi(NMIState
*n
, int cpu_index
, Error
**errp
)
484 /* cpu index isn't used */
488 X86CPU
*cpu
= X86_CPU(cs
);
490 if (!cpu
->apic_state
) {
491 cpu_interrupt(cs
, CPU_INTERRUPT_NMI
);
493 apic_deliver_nmi(cpu
->apic_state
);
498 static long get_file_size(FILE *f
)
502 /* XXX: on Unix systems, using fstat() probably makes more sense */
505 fseek(f
, 0, SEEK_END
);
507 fseek(f
, where
, SEEK_SET
);
513 uint64_t cpu_get_tsc(CPUX86State
*env
)
515 return cpus_get_elapsed_ticks();
519 static void pic_irq_request(void *opaque
, int irq
, int level
)
521 CPUState
*cs
= first_cpu
;
522 X86CPU
*cpu
= X86_CPU(cs
);
524 trace_x86_pic_interrupt(irq
, level
);
525 if (cpu
->apic_state
&& !kvm_irqchip_in_kernel() &&
526 !whpx_apic_in_platform()) {
529 if (apic_accept_pic_intr(cpu
->apic_state
)) {
530 apic_deliver_pic_intr(cpu
->apic_state
, level
);
535 cpu_interrupt(cs
, CPU_INTERRUPT_HARD
);
537 cpu_reset_interrupt(cs
, CPU_INTERRUPT_HARD
);
542 qemu_irq
x86_allocate_cpu_irq(void)
544 return qemu_allocate_irq(pic_irq_request
, NULL
, 0);
547 int cpu_get_pic_interrupt(CPUX86State
*env
)
549 X86CPU
*cpu
= env_archcpu(env
);
552 if (!kvm_irqchip_in_kernel() && !whpx_apic_in_platform()) {
553 intno
= apic_get_interrupt(cpu
->apic_state
);
557 /* read the irq from the PIC */
558 if (!apic_accept_pic_intr(cpu
->apic_state
)) {
563 intno
= pic_read_irq(isa_pic
);
567 DeviceState
*cpu_get_current_apic(void)
570 X86CPU
*cpu
= X86_CPU(current_cpu
);
571 return cpu
->apic_state
;
577 void gsi_handler(void *opaque
, int n
, int level
)
579 GSIState
*s
= opaque
;
581 trace_x86_gsi_interrupt(n
, level
);
583 case 0 ... ISA_NUM_IRQS
- 1:
584 if (s
->i8259_irq
[n
]) {
585 /* Under KVM, Kernel will forward to both PIC and IOAPIC */
586 qemu_set_irq(s
->i8259_irq
[n
], level
);
589 case ISA_NUM_IRQS
... IOAPIC_NUM_PINS
- 1:
590 qemu_set_irq(s
->ioapic_irq
[n
], level
);
592 case IO_APIC_SECONDARY_IRQBASE
593 ... IO_APIC_SECONDARY_IRQBASE
+ IOAPIC_NUM_PINS
- 1:
594 qemu_set_irq(s
->ioapic2_irq
[n
- IO_APIC_SECONDARY_IRQBASE
], level
);
599 void ioapic_init_gsi(GSIState
*gsi_state
, const char *parent_name
)
606 if (kvm_ioapic_in_kernel()) {
607 dev
= qdev_new(TYPE_KVM_IOAPIC
);
609 dev
= qdev_new(TYPE_IOAPIC
);
611 object_property_add_child(object_resolve_path(parent_name
, NULL
),
612 "ioapic", OBJECT(dev
));
613 d
= SYS_BUS_DEVICE(dev
);
614 sysbus_realize_and_unref(d
, &error_fatal
);
615 sysbus_mmio_map(d
, 0, IO_APIC_DEFAULT_ADDRESS
);
617 for (i
= 0; i
< IOAPIC_NUM_PINS
; i
++) {
618 gsi_state
->ioapic_irq
[i
] = qdev_get_gpio_in(dev
, i
);
622 DeviceState
*ioapic_init_secondary(GSIState
*gsi_state
)
628 dev
= qdev_new(TYPE_IOAPIC
);
629 d
= SYS_BUS_DEVICE(dev
);
630 sysbus_realize_and_unref(d
, &error_fatal
);
631 sysbus_mmio_map(d
, 0, IO_APIC_SECONDARY_ADDRESS
);
633 for (i
= 0; i
< IOAPIC_NUM_PINS
; i
++) {
634 gsi_state
->ioapic2_irq
[i
] = qdev_get_gpio_in(dev
, i
);
644 } __attribute__((packed
));
648 * The entry point into the kernel for PVH boot is different from
649 * the native entry point. The PVH entry is defined by the x86/HVM
650 * direct boot ABI and is available in an ELFNOTE in the kernel binary.
652 * This function is passed to load_elf() when it is called from
653 * load_elfboot() which then additionally checks for an ELF Note of
654 * type XEN_ELFNOTE_PHYS32_ENTRY and passes it to this function to
655 * parse the PVH entry address from the ELF Note.
657 * Due to trickery in elf_opts.h, load_elf() is actually available as
658 * load_elf32() or load_elf64() and this routine needs to be able
659 * to deal with being called as 32 or 64 bit.
661 * The address of the PVH entry point is saved to the 'pvh_start_addr'
662 * global variable. (although the entry point is 32-bit, the kernel
663 * binary can be either 32-bit or 64-bit).
665 static uint64_t read_pvh_start_addr(void *arg1
, void *arg2
, bool is64
)
667 size_t *elf_note_data_addr
;
669 /* Check if ELF Note header passed in is valid */
675 struct elf64_note
*nhdr64
= (struct elf64_note
*)arg1
;
676 uint64_t nhdr_size64
= sizeof(struct elf64_note
);
677 uint64_t phdr_align
= *(uint64_t *)arg2
;
678 uint64_t nhdr_namesz
= nhdr64
->n_namesz
;
681 ((void *)nhdr64
) + nhdr_size64
+
682 QEMU_ALIGN_UP(nhdr_namesz
, phdr_align
);
684 pvh_start_addr
= *elf_note_data_addr
;
686 struct elf32_note
*nhdr32
= (struct elf32_note
*)arg1
;
687 uint32_t nhdr_size32
= sizeof(struct elf32_note
);
688 uint32_t phdr_align
= *(uint32_t *)arg2
;
689 uint32_t nhdr_namesz
= nhdr32
->n_namesz
;
692 ((void *)nhdr32
) + nhdr_size32
+
693 QEMU_ALIGN_UP(nhdr_namesz
, phdr_align
);
695 pvh_start_addr
= *(uint32_t *)elf_note_data_addr
;
698 return pvh_start_addr
;
701 static bool load_elfboot(const char *kernel_filename
,
702 int kernel_file_size
,
704 size_t pvh_xen_start_addr
,
708 uint32_t mh_load_addr
= 0;
709 uint32_t elf_kernel_size
= 0;
711 uint64_t elf_low
, elf_high
;
714 if (ldl_p(header
) != 0x464c457f) {
715 return false; /* no elfboot */
718 bool elf_is64
= header
[EI_CLASS
] == ELFCLASS64
;
720 ((Elf64_Ehdr
*)header
)->e_flags
: ((Elf32_Ehdr
*)header
)->e_flags
;
722 if (flags
& 0x00010004) { /* LOAD_ELF_HEADER_HAS_ADDR */
723 error_report("elfboot unsupported flags = %x", flags
);
727 uint64_t elf_note_type
= XEN_ELFNOTE_PHYS32_ENTRY
;
728 kernel_size
= load_elf(kernel_filename
, read_pvh_start_addr
,
729 NULL
, &elf_note_type
, &elf_entry
,
730 &elf_low
, &elf_high
, NULL
, 0, I386_ELF_MACHINE
,
733 if (kernel_size
< 0) {
734 error_report("Error while loading elf kernel");
737 mh_load_addr
= elf_low
;
738 elf_kernel_size
= elf_high
- elf_low
;
740 if (pvh_start_addr
== 0) {
741 error_report("Error loading uncompressed kernel without PVH ELF Note");
744 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_ENTRY
, pvh_start_addr
);
745 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_ADDR
, mh_load_addr
);
746 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_SIZE
, elf_kernel_size
);
751 void x86_load_linux(X86MachineState
*x86ms
,
756 bool linuxboot_dma_enabled
= X86_MACHINE_GET_CLASS(x86ms
)->fwcfg_dma_enabled
;
758 int setup_size
, kernel_size
, cmdline_size
;
759 int dtb_size
, setup_data_offset
;
761 uint8_t header
[8192], *setup
, *kernel
;
762 hwaddr real_addr
, prot_addr
, cmdline_addr
, initrd_addr
= 0;
765 MachineState
*machine
= MACHINE(x86ms
);
766 struct setup_data
*setup_data
;
767 const char *kernel_filename
= machine
->kernel_filename
;
768 const char *initrd_filename
= machine
->initrd_filename
;
769 const char *dtb_filename
= machine
->dtb
;
770 const char *kernel_cmdline
= machine
->kernel_cmdline
;
771 SevKernelLoaderContext sev_load_ctx
= {};
773 /* Align to 16 bytes as a paranoia measure */
774 cmdline_size
= (strlen(kernel_cmdline
) + 16) & ~15;
776 /* load the kernel header */
777 f
= fopen(kernel_filename
, "rb");
779 fprintf(stderr
, "qemu: could not open kernel file '%s': %s\n",
780 kernel_filename
, strerror(errno
));
784 kernel_size
= get_file_size(f
);
786 fread(header
, 1, MIN(ARRAY_SIZE(header
), kernel_size
), f
) !=
787 MIN(ARRAY_SIZE(header
), kernel_size
)) {
788 fprintf(stderr
, "qemu: could not load kernel '%s': %s\n",
789 kernel_filename
, strerror(errno
));
793 /* kernel protocol version */
794 if (ldl_p(header
+ 0x202) == 0x53726448) {
795 protocol
= lduw_p(header
+ 0x206);
798 * This could be a multiboot kernel. If it is, let's stop treating it
799 * like a Linux kernel.
800 * Note: some multiboot images could be in the ELF format (the same of
801 * PVH), so we try multiboot first since we check the multiboot magic
802 * header before to load it.
804 if (load_multiboot(x86ms
, fw_cfg
, f
, kernel_filename
, initrd_filename
,
805 kernel_cmdline
, kernel_size
, header
)) {
809 * Check if the file is an uncompressed kernel file (ELF) and load it,
810 * saving the PVH entry point used by the x86/HVM direct boot ABI.
811 * If load_elfboot() is successful, populate the fw_cfg info.
814 load_elfboot(kernel_filename
, kernel_size
,
815 header
, pvh_start_addr
, fw_cfg
)) {
818 fw_cfg_add_i32(fw_cfg
, FW_CFG_CMDLINE_SIZE
,
819 strlen(kernel_cmdline
) + 1);
820 fw_cfg_add_string(fw_cfg
, FW_CFG_CMDLINE_DATA
, kernel_cmdline
);
822 fw_cfg_add_i32(fw_cfg
, FW_CFG_SETUP_SIZE
, sizeof(header
));
823 fw_cfg_add_bytes(fw_cfg
, FW_CFG_SETUP_DATA
,
824 header
, sizeof(header
));
827 if (initrd_filename
) {
828 GMappedFile
*mapped_file
;
833 mapped_file
= g_mapped_file_new(initrd_filename
, false, &gerr
);
835 fprintf(stderr
, "qemu: error reading initrd %s: %s\n",
836 initrd_filename
, gerr
->message
);
839 x86ms
->initrd_mapped_file
= mapped_file
;
841 initrd_data
= g_mapped_file_get_contents(mapped_file
);
842 initrd_size
= g_mapped_file_get_length(mapped_file
);
843 initrd_max
= x86ms
->below_4g_mem_size
- acpi_data_size
- 1;
844 if (initrd_size
>= initrd_max
) {
845 fprintf(stderr
, "qemu: initrd is too large, cannot support."
846 "(max: %"PRIu32
", need %"PRId64
")\n",
847 initrd_max
, (uint64_t)initrd_size
);
851 initrd_addr
= (initrd_max
- initrd_size
) & ~4095;
853 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_ADDR
, initrd_addr
);
854 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_SIZE
, initrd_size
);
855 fw_cfg_add_bytes(fw_cfg
, FW_CFG_INITRD_DATA
, initrd_data
,
859 option_rom
[nb_option_roms
].bootindex
= 0;
860 option_rom
[nb_option_roms
].name
= "pvh.bin";
868 if (protocol
< 0x200 || !(header
[0x211] & 0x01)) {
871 cmdline_addr
= 0x9a000 - cmdline_size
;
873 } else if (protocol
< 0x202) {
874 /* High but ancient kernel */
876 cmdline_addr
= 0x9a000 - cmdline_size
;
877 prot_addr
= 0x100000;
879 /* High and recent kernel */
881 cmdline_addr
= 0x20000;
882 prot_addr
= 0x100000;
885 /* highest address for loading the initrd */
886 if (protocol
>= 0x20c &&
887 lduw_p(header
+ 0x236) & XLF_CAN_BE_LOADED_ABOVE_4G
) {
889 * Linux has supported initrd up to 4 GB for a very long time (2007,
890 * long before XLF_CAN_BE_LOADED_ABOVE_4G which was added in 2013),
891 * though it only sets initrd_max to 2 GB to "work around bootloader
892 * bugs". Luckily, QEMU firmware(which does something like bootloader)
893 * has supported this.
895 * It's believed that if XLF_CAN_BE_LOADED_ABOVE_4G is set, initrd can
896 * be loaded into any address.
898 * In addition, initrd_max is uint32_t simply because QEMU doesn't
899 * support the 64-bit boot protocol (specifically the ext_ramdisk_image
902 * Therefore here just limit initrd_max to UINT32_MAX simply as well.
904 initrd_max
= UINT32_MAX
;
905 } else if (protocol
>= 0x203) {
906 initrd_max
= ldl_p(header
+ 0x22c);
908 initrd_max
= 0x37ffffff;
911 if (initrd_max
>= x86ms
->below_4g_mem_size
- acpi_data_size
) {
912 initrd_max
= x86ms
->below_4g_mem_size
- acpi_data_size
- 1;
915 fw_cfg_add_i32(fw_cfg
, FW_CFG_CMDLINE_ADDR
, cmdline_addr
);
916 fw_cfg_add_i32(fw_cfg
, FW_CFG_CMDLINE_SIZE
, strlen(kernel_cmdline
) + 1);
917 fw_cfg_add_string(fw_cfg
, FW_CFG_CMDLINE_DATA
, kernel_cmdline
);
918 sev_load_ctx
.cmdline_data
= (char *)kernel_cmdline
;
919 sev_load_ctx
.cmdline_size
= strlen(kernel_cmdline
) + 1;
921 if (protocol
>= 0x202) {
922 stl_p(header
+ 0x228, cmdline_addr
);
924 stw_p(header
+ 0x20, 0xA33F);
925 stw_p(header
+ 0x22, cmdline_addr
- real_addr
);
928 /* handle vga= parameter */
929 vmode
= strstr(kernel_cmdline
, "vga=");
931 unsigned int video_mode
;
936 if (!strncmp(vmode
, "normal", 6)) {
938 } else if (!strncmp(vmode
, "ext", 3)) {
940 } else if (!strncmp(vmode
, "ask", 3)) {
943 ret
= qemu_strtoui(vmode
, &end
, 0, &video_mode
);
944 if (ret
!= 0 || (*end
&& *end
!= ' ')) {
945 fprintf(stderr
, "qemu: invalid 'vga=' kernel parameter.\n");
949 stw_p(header
+ 0x1fa, video_mode
);
954 * High nybble = B reserved for QEMU; low nybble is revision number.
955 * If this code is substantially changed, you may want to consider
956 * incrementing the revision.
958 if (protocol
>= 0x200) {
959 header
[0x210] = 0xB0;
962 if (protocol
>= 0x201) {
963 header
[0x211] |= 0x80; /* CAN_USE_HEAP */
964 stw_p(header
+ 0x224, cmdline_addr
- real_addr
- 0x200);
968 if (initrd_filename
) {
969 GMappedFile
*mapped_file
;
974 if (protocol
< 0x200) {
975 fprintf(stderr
, "qemu: linux kernel too old to load a ram disk\n");
979 mapped_file
= g_mapped_file_new(initrd_filename
, false, &gerr
);
981 fprintf(stderr
, "qemu: error reading initrd %s: %s\n",
982 initrd_filename
, gerr
->message
);
985 x86ms
->initrd_mapped_file
= mapped_file
;
987 initrd_data
= g_mapped_file_get_contents(mapped_file
);
988 initrd_size
= g_mapped_file_get_length(mapped_file
);
989 if (initrd_size
>= initrd_max
) {
990 fprintf(stderr
, "qemu: initrd is too large, cannot support."
991 "(max: %"PRIu32
", need %"PRId64
")\n",
992 initrd_max
, (uint64_t)initrd_size
);
996 initrd_addr
= (initrd_max
- initrd_size
) & ~4095;
998 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_ADDR
, initrd_addr
);
999 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_SIZE
, initrd_size
);
1000 fw_cfg_add_bytes(fw_cfg
, FW_CFG_INITRD_DATA
, initrd_data
, initrd_size
);
1001 sev_load_ctx
.initrd_data
= initrd_data
;
1002 sev_load_ctx
.initrd_size
= initrd_size
;
1004 stl_p(header
+ 0x218, initrd_addr
);
1005 stl_p(header
+ 0x21c, initrd_size
);
1008 /* load kernel and setup */
1009 setup_size
= header
[0x1f1];
1010 if (setup_size
== 0) {
1013 setup_size
= (setup_size
+ 1) * 512;
1014 if (setup_size
> kernel_size
) {
1015 fprintf(stderr
, "qemu: invalid kernel header\n");
1018 kernel_size
-= setup_size
;
1020 setup
= g_malloc(setup_size
);
1021 kernel
= g_malloc(kernel_size
);
1022 fseek(f
, 0, SEEK_SET
);
1023 if (fread(setup
, 1, setup_size
, f
) != setup_size
) {
1024 fprintf(stderr
, "fread() failed\n");
1027 if (fread(kernel
, 1, kernel_size
, f
) != kernel_size
) {
1028 fprintf(stderr
, "fread() failed\n");
1033 /* append dtb to kernel */
1035 if (protocol
< 0x209) {
1036 fprintf(stderr
, "qemu: Linux kernel too old to load a dtb\n");
1040 dtb_size
= get_image_size(dtb_filename
);
1041 if (dtb_size
<= 0) {
1042 fprintf(stderr
, "qemu: error reading dtb %s: %s\n",
1043 dtb_filename
, strerror(errno
));
1047 setup_data_offset
= QEMU_ALIGN_UP(kernel_size
, 16);
1048 kernel_size
= setup_data_offset
+ sizeof(struct setup_data
) + dtb_size
;
1049 kernel
= g_realloc(kernel
, kernel_size
);
1051 stq_p(header
+ 0x250, prot_addr
+ setup_data_offset
);
1053 setup_data
= (struct setup_data
*)(kernel
+ setup_data_offset
);
1054 setup_data
->next
= 0;
1055 setup_data
->type
= cpu_to_le32(SETUP_DTB
);
1056 setup_data
->len
= cpu_to_le32(dtb_size
);
1058 load_image_size(dtb_filename
, setup_data
->data
, dtb_size
);
1062 * If we're starting an encrypted VM, it will be OVMF based, which uses the
1063 * efi stub for booting and doesn't require any values to be placed in the
1064 * kernel header. We therefore don't update the header so the hash of the
1065 * kernel on the other side of the fw_cfg interface matches the hash of the
1066 * file the user passed in.
1068 if (!sev_enabled()) {
1069 memcpy(setup
, header
, MIN(sizeof(header
), setup_size
));
1072 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_ADDR
, prot_addr
);
1073 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_SIZE
, kernel_size
);
1074 fw_cfg_add_bytes(fw_cfg
, FW_CFG_KERNEL_DATA
, kernel
, kernel_size
);
1075 sev_load_ctx
.kernel_data
= (char *)kernel
;
1076 sev_load_ctx
.kernel_size
= kernel_size
;
1078 fw_cfg_add_i32(fw_cfg
, FW_CFG_SETUP_ADDR
, real_addr
);
1079 fw_cfg_add_i32(fw_cfg
, FW_CFG_SETUP_SIZE
, setup_size
);
1080 fw_cfg_add_bytes(fw_cfg
, FW_CFG_SETUP_DATA
, setup
, setup_size
);
1081 sev_load_ctx
.setup_data
= (char *)setup
;
1082 sev_load_ctx
.setup_size
= setup_size
;
1084 if (sev_enabled()) {
1085 sev_add_kernel_loader_hashes(&sev_load_ctx
, &error_fatal
);
1088 option_rom
[nb_option_roms
].bootindex
= 0;
1089 option_rom
[nb_option_roms
].name
= "linuxboot.bin";
1090 if (linuxboot_dma_enabled
&& fw_cfg_dma_enabled(fw_cfg
)) {
1091 option_rom
[nb_option_roms
].name
= "linuxboot_dma.bin";
1096 void x86_bios_rom_init(MachineState
*ms
, const char *default_firmware
,
1097 MemoryRegion
*rom_memory
, bool isapc_ram_fw
)
1099 const char *bios_name
;
1101 MemoryRegion
*bios
, *isa_bios
;
1102 int bios_size
, isa_bios_size
;
1106 bios_name
= ms
->firmware
?: default_firmware
;
1107 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
1109 bios_size
= get_image_size(filename
);
1113 if (bios_size
<= 0 ||
1114 (bios_size
% 65536) != 0) {
1117 bios
= g_malloc(sizeof(*bios
));
1118 memory_region_init_ram(bios
, NULL
, "pc.bios", bios_size
, &error_fatal
);
1119 if (!isapc_ram_fw
) {
1120 memory_region_set_readonly(bios
, true);
1122 ret
= rom_add_file_fixed(bios_name
, (uint32_t)(-bios_size
), -1);
1125 fprintf(stderr
, "qemu: could not load PC BIOS '%s'\n", bios_name
);
1130 /* map the last 128KB of the BIOS in ISA space */
1131 isa_bios_size
= MIN(bios_size
, 128 * KiB
);
1132 isa_bios
= g_malloc(sizeof(*isa_bios
));
1133 memory_region_init_alias(isa_bios
, NULL
, "isa-bios", bios
,
1134 bios_size
- isa_bios_size
, isa_bios_size
);
1135 memory_region_add_subregion_overlap(rom_memory
,
1136 0x100000 - isa_bios_size
,
1139 if (!isapc_ram_fw
) {
1140 memory_region_set_readonly(isa_bios
, true);
1143 /* map all the bios at the top of memory */
1144 memory_region_add_subregion(rom_memory
,
1145 (uint32_t)(-bios_size
),
1149 bool x86_machine_is_smm_enabled(const X86MachineState
*x86ms
)
1151 bool smm_available
= false;
1153 if (x86ms
->smm
== ON_OFF_AUTO_OFF
) {
1157 if (tcg_enabled() || qtest_enabled()) {
1158 smm_available
= true;
1159 } else if (kvm_enabled()) {
1160 smm_available
= kvm_has_smm();
1163 if (smm_available
) {
1167 if (x86ms
->smm
== ON_OFF_AUTO_ON
) {
1168 error_report("System Management Mode not supported by this hypervisor.");
1174 static void x86_machine_get_smm(Object
*obj
, Visitor
*v
, const char *name
,
1175 void *opaque
, Error
**errp
)
1177 X86MachineState
*x86ms
= X86_MACHINE(obj
);
1178 OnOffAuto smm
= x86ms
->smm
;
1180 visit_type_OnOffAuto(v
, name
, &smm
, errp
);
1183 static void x86_machine_set_smm(Object
*obj
, Visitor
*v
, const char *name
,
1184 void *opaque
, Error
**errp
)
1186 X86MachineState
*x86ms
= X86_MACHINE(obj
);
1188 visit_type_OnOffAuto(v
, name
, &x86ms
->smm
, errp
);
1191 bool x86_machine_is_acpi_enabled(const X86MachineState
*x86ms
)
1193 if (x86ms
->acpi
== ON_OFF_AUTO_OFF
) {
1199 static void x86_machine_get_acpi(Object
*obj
, Visitor
*v
, const char *name
,
1200 void *opaque
, Error
**errp
)
1202 X86MachineState
*x86ms
= X86_MACHINE(obj
);
1203 OnOffAuto acpi
= x86ms
->acpi
;
1205 visit_type_OnOffAuto(v
, name
, &acpi
, errp
);
1208 static void x86_machine_set_acpi(Object
*obj
, Visitor
*v
, const char *name
,
1209 void *opaque
, Error
**errp
)
1211 X86MachineState
*x86ms
= X86_MACHINE(obj
);
1213 visit_type_OnOffAuto(v
, name
, &x86ms
->acpi
, errp
);
1216 static char *x86_machine_get_oem_id(Object
*obj
, Error
**errp
)
1218 X86MachineState
*x86ms
= X86_MACHINE(obj
);
1220 return g_strdup(x86ms
->oem_id
);
1223 static void x86_machine_set_oem_id(Object
*obj
, const char *value
, Error
**errp
)
1225 X86MachineState
*x86ms
= X86_MACHINE(obj
);
1226 size_t len
= strlen(value
);
1230 "User specified "X86_MACHINE_OEM_ID
" value is bigger than "
1235 strncpy(x86ms
->oem_id
, value
, 6);
1238 static char *x86_machine_get_oem_table_id(Object
*obj
, Error
**errp
)
1240 X86MachineState
*x86ms
= X86_MACHINE(obj
);
1242 return g_strdup(x86ms
->oem_table_id
);
1245 static void x86_machine_set_oem_table_id(Object
*obj
, const char *value
,
1248 X86MachineState
*x86ms
= X86_MACHINE(obj
);
1249 size_t len
= strlen(value
);
1253 "User specified "X86_MACHINE_OEM_TABLE_ID
1254 " value is bigger than "
1258 strncpy(x86ms
->oem_table_id
, value
, 8);
1261 static void x86_machine_get_bus_lock_ratelimit(Object
*obj
, Visitor
*v
,
1262 const char *name
, void *opaque
, Error
**errp
)
1264 X86MachineState
*x86ms
= X86_MACHINE(obj
);
1265 uint64_t bus_lock_ratelimit
= x86ms
->bus_lock_ratelimit
;
1267 visit_type_uint64(v
, name
, &bus_lock_ratelimit
, errp
);
1270 static void x86_machine_set_bus_lock_ratelimit(Object
*obj
, Visitor
*v
,
1271 const char *name
, void *opaque
, Error
**errp
)
1273 X86MachineState
*x86ms
= X86_MACHINE(obj
);
1275 visit_type_uint64(v
, name
, &x86ms
->bus_lock_ratelimit
, errp
);
1278 static void machine_get_sgx_epc(Object
*obj
, Visitor
*v
, const char *name
,
1279 void *opaque
, Error
**errp
)
1281 X86MachineState
*x86ms
= X86_MACHINE(obj
);
1282 SgxEPCList
*list
= x86ms
->sgx_epc_list
;
1284 visit_type_SgxEPCList(v
, name
, &list
, errp
);
1287 static void machine_set_sgx_epc(Object
*obj
, Visitor
*v
, const char *name
,
1288 void *opaque
, Error
**errp
)
1290 X86MachineState
*x86ms
= X86_MACHINE(obj
);
1293 list
= x86ms
->sgx_epc_list
;
1294 visit_type_SgxEPCList(v
, name
, &x86ms
->sgx_epc_list
, errp
);
1296 qapi_free_SgxEPCList(list
);
1299 static void x86_machine_initfn(Object
*obj
)
1301 X86MachineState
*x86ms
= X86_MACHINE(obj
);
1303 x86ms
->smm
= ON_OFF_AUTO_AUTO
;
1304 x86ms
->acpi
= ON_OFF_AUTO_AUTO
;
1305 x86ms
->pci_irq_mask
= ACPI_BUILD_PCI_IRQS
;
1306 x86ms
->oem_id
= g_strndup(ACPI_BUILD_APPNAME6
, 6);
1307 x86ms
->oem_table_id
= g_strndup(ACPI_BUILD_APPNAME8
, 8);
1308 x86ms
->bus_lock_ratelimit
= 0;
1311 static void x86_machine_class_init(ObjectClass
*oc
, void *data
)
1313 MachineClass
*mc
= MACHINE_CLASS(oc
);
1314 X86MachineClass
*x86mc
= X86_MACHINE_CLASS(oc
);
1315 NMIClass
*nc
= NMI_CLASS(oc
);
1317 mc
->cpu_index_to_instance_props
= x86_cpu_index_to_props
;
1318 mc
->get_default_cpu_node_id
= x86_get_default_cpu_node_id
;
1319 mc
->possible_cpu_arch_ids
= x86_possible_cpu_arch_ids
;
1320 x86mc
->save_tsc_khz
= true;
1321 x86mc
->fwcfg_dma_enabled
= true;
1322 nc
->nmi_monitor_handler
= x86_nmi
;
1324 object_class_property_add(oc
, X86_MACHINE_SMM
, "OnOffAuto",
1325 x86_machine_get_smm
, x86_machine_set_smm
,
1327 object_class_property_set_description(oc
, X86_MACHINE_SMM
,
1330 object_class_property_add(oc
, X86_MACHINE_ACPI
, "OnOffAuto",
1331 x86_machine_get_acpi
, x86_machine_set_acpi
,
1333 object_class_property_set_description(oc
, X86_MACHINE_ACPI
,
1336 object_class_property_add_str(oc
, X86_MACHINE_OEM_ID
,
1337 x86_machine_get_oem_id
,
1338 x86_machine_set_oem_id
);
1339 object_class_property_set_description(oc
, X86_MACHINE_OEM_ID
,
1340 "Override the default value of field OEMID "
1341 "in ACPI table header."
1342 "The string may be up to 6 bytes in size");
1345 object_class_property_add_str(oc
, X86_MACHINE_OEM_TABLE_ID
,
1346 x86_machine_get_oem_table_id
,
1347 x86_machine_set_oem_table_id
);
1348 object_class_property_set_description(oc
, X86_MACHINE_OEM_TABLE_ID
,
1349 "Override the default value of field OEM Table ID "
1350 "in ACPI table header."
1351 "The string may be up to 8 bytes in size");
1353 object_class_property_add(oc
, X86_MACHINE_BUS_LOCK_RATELIMIT
, "uint64_t",
1354 x86_machine_get_bus_lock_ratelimit
,
1355 x86_machine_set_bus_lock_ratelimit
, NULL
, NULL
);
1356 object_class_property_set_description(oc
, X86_MACHINE_BUS_LOCK_RATELIMIT
,
1357 "Set the ratelimit for the bus locks acquired in VMs");
1359 object_class_property_add(oc
, "sgx-epc", "SgxEPC",
1360 machine_get_sgx_epc
, machine_set_sgx_epc
,
1362 object_class_property_set_description(oc
, "sgx-epc",
1366 static const TypeInfo x86_machine_info
= {
1367 .name
= TYPE_X86_MACHINE
,
1368 .parent
= TYPE_MACHINE
,
1370 .instance_size
= sizeof(X86MachineState
),
1371 .instance_init
= x86_machine_initfn
,
1372 .class_size
= sizeof(X86MachineClass
),
1373 .class_init
= x86_machine_class_init
,
1374 .interfaces
= (InterfaceInfo
[]) {
1380 static void x86_machine_register_types(void)
1382 type_register_static(&x86_machine_info
);
1385 type_init(x86_machine_register_types
)