target-ppc: Add VSX ISA2.06 xmul Instructions
[qemu/ar7.git] / target-ppc / cpu-qom.h
blob72b22329b05f5de976d3f3196c2a39da61c822a4
1 /*
2 * QEMU PowerPC CPU
4 * Copyright (c) 2012 SUSE LINUX Products GmbH
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see
18 * <http://www.gnu.org/licenses/lgpl-2.1.html>
20 #ifndef QEMU_PPC_CPU_QOM_H
21 #define QEMU_PPC_CPU_QOM_H
23 #include "qom/cpu.h"
24 #include "cpu.h"
26 #ifdef TARGET_PPC64
27 #define TYPE_POWERPC_CPU "powerpc64-cpu"
28 #elif defined(TARGET_PPCEMB)
29 #define TYPE_POWERPC_CPU "embedded-powerpc-cpu"
30 #else
31 #define TYPE_POWERPC_CPU "powerpc-cpu"
32 #endif
34 #define POWERPC_CPU_CLASS(klass) \
35 OBJECT_CLASS_CHECK(PowerPCCPUClass, (klass), TYPE_POWERPC_CPU)
36 #define POWERPC_CPU(obj) \
37 OBJECT_CHECK(PowerPCCPU, (obj), TYPE_POWERPC_CPU)
38 #define POWERPC_CPU_GET_CLASS(obj) \
39 OBJECT_GET_CLASS(PowerPCCPUClass, (obj), TYPE_POWERPC_CPU)
41 /**
42 * PowerPCCPUClass:
43 * @parent_realize: The parent class' realize handler.
44 * @parent_reset: The parent class' reset handler.
46 * A PowerPC CPU model.
48 typedef struct PowerPCCPUClass {
49 /*< private >*/
50 CPUClass parent_class;
51 /*< public >*/
53 DeviceRealize parent_realize;
54 void (*parent_reset)(CPUState *cpu);
56 uint32_t pvr;
57 uint32_t pvr_mask;
58 uint32_t svr;
59 uint64_t insns_flags;
60 uint64_t insns_flags2;
61 uint64_t msr_mask;
62 powerpc_mmu_t mmu_model;
63 powerpc_excp_t excp_model;
64 powerpc_input_t bus_model;
65 uint32_t flags;
66 int bfd_mach;
67 uint32_t l1_dcache_size, l1_icache_size;
68 #if defined(TARGET_PPC64)
69 const struct ppc_segment_page_sizes *sps;
70 #endif
71 void (*init_proc)(CPUPPCState *env);
72 int (*check_pow)(CPUPPCState *env);
73 #if defined(CONFIG_SOFTMMU)
74 int (*handle_mmu_fault)(CPUPPCState *env, target_ulong eaddr, int rwx,
75 int mmu_idx);
76 #endif
77 } PowerPCCPUClass;
79 /**
80 * PowerPCCPU:
81 * @env: #CPUPPCState
83 * A PowerPC CPU.
85 typedef struct PowerPCCPU {
86 /*< private >*/
87 CPUState parent_obj;
88 /*< public >*/
90 CPUPPCState env;
91 } PowerPCCPU;
93 static inline PowerPCCPU *ppc_env_get_cpu(CPUPPCState *env)
95 return container_of(env, PowerPCCPU, env);
98 #define ENV_GET_CPU(e) CPU(ppc_env_get_cpu(e))
100 #define ENV_OFFSET offsetof(PowerPCCPU, env)
102 PowerPCCPUClass *ppc_cpu_class_by_pvr(uint32_t pvr);
103 PowerPCCPUClass *ppc_cpu_class_by_pvr_mask(uint32_t pvr);
105 void ppc_cpu_do_interrupt(CPUState *cpu);
106 void ppc_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
107 int flags);
108 void ppc_cpu_dump_statistics(CPUState *cpu, FILE *f,
109 fprintf_function cpu_fprintf, int flags);
110 hwaddr ppc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
111 int ppc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
112 int ppc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
113 int ppc64_cpu_write_elf64_qemunote(WriteCoreDumpFunction f,
114 CPUState *cpu, void *opaque);
115 int ppc64_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
116 int cpuid, void *opaque);
117 #ifndef CONFIG_USER_ONLY
118 extern const struct VMStateDescription vmstate_ppc_cpu;
119 #endif
121 #endif