hw/ppc_newworld.c

   1 /*
   2  * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
   3  *
   4  * Copyright (c) 2004-2007 Fabrice Bellard
   5  * Copyright (c) 2007 Jocelyn Mayer
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy
   8  * of this software and associated documentation files (the "Software"), to deal
   9  * in the Software without restriction, including without limitation the rights
  10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11  * copies of the Software, and to permit persons to whom the Software is
  12  * furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included in
  15  * all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23  * THE SOFTWARE.
  24  *
  25  * PCI bus layout on a real G5 (U3 based):
  26  *
  27  * 0000:f0:0b.0 Host bridge [0600]: Apple Computer Inc. U3 AGP [106b:004b]
  28  * 0000:f0:10.0 VGA compatible controller [0300]: ATI Technologies Inc RV350 AP [Radeon 9600] [1002:4150]
  29  * 0001:00:00.0 Host bridge [0600]: Apple Computer Inc. CPC945 HT Bridge [106b:004a]
  30  * 0001:00:01.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
  31  * 0001:00:02.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
  32  * 0001:00:03.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0045]
  33  * 0001:00:04.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0046]
  34  * 0001:00:05.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0047]
  35  * 0001:00:06.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0048]
  36  * 0001:00:07.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0049]
  37  * 0001:01:07.0 Class [ff00]: Apple Computer Inc. K2 KeyLargo Mac/IO [106b:0041] (rev 20)
  38  * 0001:01:08.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
  39  * 0001:01:09.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
  40  * 0001:02:0b.0 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
  41  * 0001:02:0b.1 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
  42  * 0001:02:0b.2 USB Controller [0c03]: NEC Corporation USB 2.0 [1033:00e0] (rev 04)
  43  * 0001:03:0d.0 Class [ff00]: Apple Computer Inc. K2 ATA/100 [106b:0043]
  44  * 0001:03:0e.0 FireWire (IEEE 1394) [0c00]: Apple Computer Inc. K2 FireWire [106b:0042]
  45  * 0001:04:0f.0 Ethernet controller [0200]: Apple Computer Inc. K2 GMAC (Sun GEM) [106b:004c]
  46  * 0001:05:0c.0 IDE interface [0101]: Broadcom K2 SATA [1166:0240]
  47  *
  48  */
  49 #include "hw.h"
  50 #include "ppc.h"
  51 #include "ppc_mac.h"
  52 #include "mac_dbdma.h"
  53 #include "nvram.h"
  54 #include "pc.h"
  55 #include "pci.h"
  56 #include "usb-ohci.h"
  57 #include "net.h"
  58 #include "sysemu.h"
  59 #include "boards.h"
  60 #include "fw_cfg.h"
  61 #include "escc.h"
  62 #include "openpic.h"
  63 #include "ide.h"
  64 #include "loader.h"
  65 #include "elf.h"
  66 #include "kvm.h"
  67 #include "kvm_ppc.h"
  68 #include "hw/usb.h"
  69 #include "blockdev.h"
  70 #include "exec-memory.h"
  71
  72 #define MAX_IDE_BUS 2
  73 #define CFG_ADDR 0xf0000510
  74
  75 /* debug UniNorth */
  76 //#define DEBUG_UNIN
  77
  78 #ifdef DEBUG_UNIN
  79 #define UNIN_DPRINTF(fmt, ...)                                  \
  80     do { printf("UNIN: " fmt , ## __VA_ARGS__); } while (0)
  81 #else
  82 #define UNIN_DPRINTF(fmt, ...)
  83 #endif
  84
  85 /* UniN device */
  86 static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
  87 {
  88     UNIN_DPRINTF("writel addr " TARGET_FMT_plx " val %x\n", addr, value);
  89 }
  90
  91 static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
  92 {
  93     uint32_t value;
  94
  95     value = 0;
  96     UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value);
  97
  98     return value;
  99 }
 100
 101 static CPUWriteMemoryFunc * const unin_write[] = {
 102     &unin_writel,
 103     &unin_writel,
 104     &unin_writel,
 105 };
 106
 107 static CPUReadMemoryFunc * const unin_read[] = {
 108     &unin_readl,
 109     &unin_readl,
 110     &unin_readl,
 111 };
 112
 113 static int fw_cfg_boot_set(void *opaque, const char *boot_device)
 114 {
 115     fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
 116     return 0;
 117 }
 118
 119 static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
 120 {
 121     return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
 122 }
 123
 124 static target_phys_addr_t round_page(target_phys_addr_t addr)
 125 {
 126     return (addr + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK;
 127 }
 128
 129 /* PowerPC Mac99 hardware initialisation */
 130 static void ppc_core99_init (ram_addr_t ram_size,
 131                              const char *boot_device,
 132                              const char *kernel_filename,
 133                              const char *kernel_cmdline,
 134                              const char *initrd_filename,
 135                              const char *cpu_model)
 136 {
 137     CPUState *env = NULL;
 138     char *filename;
 139     qemu_irq *pic, **openpic_irqs;
 140     int unin_memory;
 141     int linux_boot, i;
 142     ram_addr_t ram_offset, bios_offset;
 143     target_phys_addr_t kernel_base, initrd_base, cmdline_base = 0;
 144     long kernel_size, initrd_size;
 145     PCIBus *pci_bus;
 146     MacIONVRAMState *nvr;
 147     int nvram_mem_index;
 148     int bios_size;
 149     int pic_mem_index, dbdma_mem_index, cuda_mem_index, escc_mem_index;
 150     int ide_mem_index[3];
 151     int ppc_boot_device;
 152     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 153     void *fw_cfg;
 154     void *dbdma;
 155     int machine_arch;
 156
 157     linux_boot = (kernel_filename != NULL);
 158
 159     /* init CPUs */
 160     if (cpu_model == NULL)
 161 #ifdef TARGET_PPC64
 162         cpu_model = "970fx";
 163 #else
 164         cpu_model = "G4";
 165 #endif
 166     for (i = 0; i < smp_cpus; i++) {
 167         env = cpu_init(cpu_model);
 168         if (!env) {
 169             fprintf(stderr, "Unable to find PowerPC CPU definition\n");
 170             exit(1);
 171         }
 172         /* Set time-base frequency to 100 Mhz */
 173         cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
 174         qemu_register_reset((QEMUResetHandler*)&cpu_reset, env);
 175     }
 176
 177     /* allocate RAM */
 178     ram_offset = qemu_ram_alloc(NULL, "ppc_core99.ram", ram_size);
 179     cpu_register_physical_memory(0, ram_size, ram_offset);
 180
 181     /* allocate and load BIOS */
 182     bios_offset = qemu_ram_alloc(NULL, "ppc_core99.bios", BIOS_SIZE);
 183     if (bios_name == NULL)
 184         bios_name = PROM_FILENAME;
 185     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 186     cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset | IO_MEM_ROM);
 187
 188     /* Load OpenBIOS (ELF) */
 189     if (filename) {
 190         bios_size = load_elf(filename, NULL, NULL, NULL,
 191                              NULL, NULL, 1, ELF_MACHINE, 0);
 192
 193         qemu_free(filename);
 194     } else {
 195         bios_size = -1;
 196     }
 197     if (bios_size < 0 || bios_size > BIOS_SIZE) {
 198         hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
 199         exit(1);
 200     }
 201
 202     if (linux_boot) {
 203         uint64_t lowaddr = 0;
 204         int bswap_needed;
 205
 206 #ifdef BSWAP_NEEDED
 207         bswap_needed = 1;
 208 #else
 209         bswap_needed = 0;
 210 #endif
 211         kernel_base = KERNEL_LOAD_ADDR;
 212
 213         kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
 214                                NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
 215         if (kernel_size < 0)
 216             kernel_size = load_aout(kernel_filename, kernel_base,
 217                                     ram_size - kernel_base, bswap_needed,
 218                                     TARGET_PAGE_SIZE);
 219         if (kernel_size < 0)
 220             kernel_size = load_image_targphys(kernel_filename,
 221                                               kernel_base,
 222                                               ram_size - kernel_base);
 223         if (kernel_size < 0) {
 224             hw_error("qemu: could not load kernel '%s'\n", kernel_filename);
 225             exit(1);
 226         }
 227         /* load initrd */
 228         if (initrd_filename) {
 229             initrd_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
 230             initrd_size = load_image_targphys(initrd_filename, initrd_base,
 231                                               ram_size - initrd_base);
 232             if (initrd_size < 0) {
 233                 hw_error("qemu: could not load initial ram disk '%s'\n",
 234                          initrd_filename);
 235                 exit(1);
 236             }
 237             cmdline_base = round_page(initrd_base + initrd_size);
 238         } else {
 239             initrd_base = 0;
 240             initrd_size = 0;
 241             cmdline_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
 242         }
 243         ppc_boot_device = 'm';
 244     } else {
 245         kernel_base = 0;
 246         kernel_size = 0;
 247         initrd_base = 0;
 248         initrd_size = 0;
 249         ppc_boot_device = '\0';
 250         /* We consider that NewWorld PowerMac never have any floppy drive
 251          * For now, OHW cannot boot from the network.
 252          */
 253         for (i = 0; boot_device[i] != '\0'; i++) {
 254             if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
 255                 ppc_boot_device = boot_device[i];
 256                 break;
 257             }
 258         }
 259         if (ppc_boot_device == '\0') {
 260             fprintf(stderr, "No valid boot device for Mac99 machine\n");
 261             exit(1);
 262         }
 263     }
 264
 265     isa_mem_base = 0x80000000;
 266
 267     /* Register 8 MB of ISA IO space */
 268     isa_mmio_init(0xf2000000, 0x00800000);
 269
 270     /* UniN init */
 271     unin_memory = cpu_register_io_memory(unin_read, unin_write, NULL,
 272                                          DEVICE_NATIVE_ENDIAN);
 273     cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);
 274
 275     openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
 276     openpic_irqs[0] =
 277         qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
 278     for (i = 0; i < smp_cpus; i++) {
 279         /* Mac99 IRQ connection between OpenPIC outputs pins
 280          * and PowerPC input pins
 281          */
 282         switch (PPC_INPUT(env)) {
 283         case PPC_FLAGS_INPUT_6xx:
 284             openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
 285             openpic_irqs[i][OPENPIC_OUTPUT_INT] =
 286                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 287             openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
 288                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 289             openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
 290                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
 291             /* Not connected ? */
 292             openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
 293             /* Check this */
 294             openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
 295                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
 296             break;
 297 #if defined(TARGET_PPC64)
 298         case PPC_FLAGS_INPUT_970:
 299             openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
 300             openpic_irqs[i][OPENPIC_OUTPUT_INT] =
 301                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
 302             openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
 303                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
 304             openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
 305                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
 306             /* Not connected ? */
 307             openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
 308             /* Check this */
 309             openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
 310                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
 311             break;
 312 #endif /* defined(TARGET_PPC64) */
 313         default:
 314             hw_error("Bus model not supported on mac99 machine\n");
 315             exit(1);
 316         }
 317     }
 318     pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
 319     if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
 320         /* 970 gets a U3 bus */
 321         pci_bus = pci_pmac_u3_init(pic, get_system_memory());
 322         machine_arch = ARCH_MAC99_U3;
 323     } else {
 324         pci_bus = pci_pmac_init(pic, get_system_memory());
 325         machine_arch = ARCH_MAC99;
 326     }
 327     /* init basic PC hardware */
 328     pci_vga_init(pci_bus);
 329
 330     escc_mem_index = escc_init(0x80013000, pic[0x25], pic[0x24],
 331                                serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
 332
 333     for(i = 0; i < nb_nics; i++)
 334         pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL);
 335
 336     ide_drive_get(hd, MAX_IDE_BUS);
 337     dbdma = DBDMA_init(&dbdma_mem_index);
 338
 339     /* We only emulate 2 out of 3 IDE controllers for now */
 340     ide_mem_index[0] = -1;
 341     ide_mem_index[1] = pmac_ide_init(hd, pic[0x0d], dbdma, 0x16, pic[0x02]);
 342     ide_mem_index[2] = pmac_ide_init(&hd[MAX_IDE_DEVS], pic[0x0e], dbdma, 0x1a, pic[0x02]);
 343
 344     /* cuda also initialize ADB */
 345     if (machine_arch == ARCH_MAC99_U3) {
 346         usb_enabled = 1;
 347     }
 348     cuda_init(&cuda_mem_index, pic[0x19]);
 349
 350     adb_kbd_init(&adb_bus);
 351     adb_mouse_init(&adb_bus);
 352
 353     macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem_index,
 354                dbdma_mem_index, cuda_mem_index, NULL, 3, ide_mem_index,
 355                escc_mem_index);
 356
 357     if (usb_enabled) {
 358         usb_ohci_init_pci(pci_bus, -1);
 359     }
 360
 361     /* U3 needs to use USB for input because Linux doesn't support via-cuda
 362        on PPC64 */
 363     if (machine_arch == ARCH_MAC99_U3) {
 364         usbdevice_create("keyboard");
 365         usbdevice_create("mouse");
 366     }
 367
 368     if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
 369         graphic_depth = 15;
 370
 371     /* The NewWorld NVRAM is not located in the MacIO device */
 372     nvr = macio_nvram_init(&nvram_mem_index, 0x2000, 1);
 373     pmac_format_nvram_partition(nvr, 0x2000);
 374     macio_nvram_map(nvr, 0xFFF04000);
 375     /* No PCI init: the BIOS will do it */
 376
 377     fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
 378     fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
 379     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
 380     fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);
 381     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
 382     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
 383     if (kernel_cmdline) {
 384         fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
 385         pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
 386     } else {
 387         fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
 388     }
 389     fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
 390     fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
 391     fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
 392
 393     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
 394     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
 395     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
 396
 397     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
 398     if (kvm_enabled()) {
 399 #ifdef CONFIG_KVM
 400         uint8_t *hypercall;
 401
 402         fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, kvmppc_get_tbfreq());
 403         hypercall = qemu_malloc(16);
 404         kvmppc_get_hypercall(env, hypercall, 16);
 405         fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
 406         fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
 407 #endif
 408     } else {
 409         fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, get_ticks_per_sec());
 410     }
 411
 412     qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
 413 }
 414
 415 static QEMUMachine core99_machine = {
 416     .name = "mac99",
 417     .desc = "Mac99 based PowerMAC",
 418     .init = ppc_core99_init,
 419     .max_cpus = MAX_CPUS,
 420 #ifdef TARGET_PPC64
 421     .is_default = 1,
 422 #endif
 423 };
 424
 425 static void core99_machine_init(void)
 426 {
 427     qemu_register_machine(&core99_machine);
 428 }
 429
 430 machine_init(core99_machine_init);