hw/vmware_vga.c

   1 /*
   2  * QEMU VMware-SVGA "chipset".
   3  *
   4  * Copyright (c) 2007 Andrzej Zaborowski  <balrog@zabor.org>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "hw.h"
  25 #include "loader.h"
  26 #include "console.h"
  27 #include "pci.h"
  28
  29 #undef VERBOSE
  30 #define HW_RECT_ACCEL
  31 #define HW_FILL_ACCEL
  32 #define HW_MOUSE_ACCEL
  33
  34 #include "vga_int.h"
  35
  36 /* See http://vmware-svga.sf.net/ for some documentation on VMWare SVGA */
  37
  38 struct vmsvga_state_s {
  39     VGACommonState vga;
  40
  41     int invalidated;
  42     int enable;
  43     int config;
  44     struct {
  45         int id;
  46         int x;
  47         int y;
  48         int on;
  49     } cursor;
  50
  51     int index;
  52     int scratch_size;
  53     uint32_t *scratch;
  54     int new_width;
  55     int new_height;
  56     uint32_t guest;
  57     uint32_t svgaid;
  58     int syncing;
  59
  60     MemoryRegion fifo_ram;
  61     uint8_t *fifo_ptr;
  62     unsigned int fifo_size;
  63
  64     union {
  65         uint32_t *fifo;
  66         struct QEMU_PACKED {
  67             uint32_t min;
  68             uint32_t max;
  69             uint32_t next_cmd;
  70             uint32_t stop;
  71             /* Add registers here when adding capabilities.  */
  72             uint32_t fifo[0];
  73         } *cmd;
  74     };
  75
  76 #define REDRAW_FIFO_LEN  512
  77     struct vmsvga_rect_s {
  78         int x, y, w, h;
  79     } redraw_fifo[REDRAW_FIFO_LEN];
  80     int redraw_fifo_first, redraw_fifo_last;
  81 };
  82
  83 struct pci_vmsvga_state_s {
  84     PCIDevice card;
  85     struct vmsvga_state_s chip;
  86     MemoryRegion io_bar;
  87 };
  88
  89 #define SVGA_MAGIC              0x900000UL
  90 #define SVGA_MAKE_ID(ver)       (SVGA_MAGIC << 8 | (ver))
  91 #define SVGA_ID_0               SVGA_MAKE_ID(0)
  92 #define SVGA_ID_1               SVGA_MAKE_ID(1)
  93 #define SVGA_ID_2               SVGA_MAKE_ID(2)
  94
  95 #define SVGA_LEGACY_BASE_PORT   0x4560
  96 #define SVGA_INDEX_PORT         0x0
  97 #define SVGA_VALUE_PORT         0x1
  98 #define SVGA_BIOS_PORT          0x2
  99
 100 #define SVGA_VERSION_2
 101
 102 #ifdef SVGA_VERSION_2
 103 # define SVGA_ID                SVGA_ID_2
 104 # define SVGA_IO_BASE           SVGA_LEGACY_BASE_PORT
 105 # define SVGA_IO_MUL            1
 106 # define SVGA_FIFO_SIZE         0x10000
 107 # define SVGA_PCI_DEVICE_ID     PCI_DEVICE_ID_VMWARE_SVGA2
 108 #else
 109 # define SVGA_ID                SVGA_ID_1
 110 # define SVGA_IO_BASE           SVGA_LEGACY_BASE_PORT
 111 # define SVGA_IO_MUL            4
 112 # define SVGA_FIFO_SIZE         0x10000
 113 # define SVGA_PCI_DEVICE_ID     PCI_DEVICE_ID_VMWARE_SVGA
 114 #endif
 115
 116 enum {
 117     /* ID 0, 1 and 2 registers */
 118     SVGA_REG_ID = 0,
 119     SVGA_REG_ENABLE = 1,
 120     SVGA_REG_WIDTH = 2,
 121     SVGA_REG_HEIGHT = 3,
 122     SVGA_REG_MAX_WIDTH = 4,
 123     SVGA_REG_MAX_HEIGHT = 5,
 124     SVGA_REG_DEPTH = 6,
 125     SVGA_REG_BITS_PER_PIXEL = 7,        /* Current bpp in the guest */
 126     SVGA_REG_PSEUDOCOLOR = 8,
 127     SVGA_REG_RED_MASK = 9,
 128     SVGA_REG_GREEN_MASK = 10,
 129     SVGA_REG_BLUE_MASK = 11,
 130     SVGA_REG_BYTES_PER_LINE = 12,
 131     SVGA_REG_FB_START = 13,
 132     SVGA_REG_FB_OFFSET = 14,
 133     SVGA_REG_VRAM_SIZE = 15,
 134     SVGA_REG_FB_SIZE = 16,
 135
 136     /* ID 1 and 2 registers */
 137     SVGA_REG_CAPABILITIES = 17,
 138     SVGA_REG_MEM_START = 18,            /* Memory for command FIFO */
 139     SVGA_REG_MEM_SIZE = 19,
 140     SVGA_REG_CONFIG_DONE = 20,          /* Set when memory area configured */
 141     SVGA_REG_SYNC = 21,                 /* Write to force synchronization */
 142     SVGA_REG_BUSY = 22,                 /* Read to check if sync is done */
 143     SVGA_REG_GUEST_ID = 23,             /* Set guest OS identifier */
 144     SVGA_REG_CURSOR_ID = 24,            /* ID of cursor */
 145     SVGA_REG_CURSOR_X = 25,             /* Set cursor X position */
 146     SVGA_REG_CURSOR_Y = 26,             /* Set cursor Y position */
 147     SVGA_REG_CURSOR_ON = 27,            /* Turn cursor on/off */
 148     SVGA_REG_HOST_BITS_PER_PIXEL = 28,  /* Current bpp in the host */
 149     SVGA_REG_SCRATCH_SIZE = 29,         /* Number of scratch registers */
 150     SVGA_REG_MEM_REGS = 30,             /* Number of FIFO registers */
 151     SVGA_REG_NUM_DISPLAYS = 31,         /* Number of guest displays */
 152     SVGA_REG_PITCHLOCK = 32,            /* Fixed pitch for all modes */
 153
 154     SVGA_PALETTE_BASE = 1024,           /* Base of SVGA color map */
 155     SVGA_PALETTE_END  = SVGA_PALETTE_BASE + 767,
 156     SVGA_SCRATCH_BASE = SVGA_PALETTE_BASE + 768,
 157 };
 158
 159 #define SVGA_CAP_NONE                   0
 160 #define SVGA_CAP_RECT_FILL              (1 << 0)
 161 #define SVGA_CAP_RECT_COPY              (1 << 1)
 162 #define SVGA_CAP_RECT_PAT_FILL          (1 << 2)
 163 #define SVGA_CAP_LEGACY_OFFSCREEN       (1 << 3)
 164 #define SVGA_CAP_RASTER_OP              (1 << 4)
 165 #define SVGA_CAP_CURSOR                 (1 << 5)
 166 #define SVGA_CAP_CURSOR_BYPASS          (1 << 6)
 167 #define SVGA_CAP_CURSOR_BYPASS_2        (1 << 7)
 168 #define SVGA_CAP_8BIT_EMULATION         (1 << 8)
 169 #define SVGA_CAP_ALPHA_CURSOR           (1 << 9)
 170 #define SVGA_CAP_GLYPH                  (1 << 10)
 171 #define SVGA_CAP_GLYPH_CLIPPING         (1 << 11)
 172 #define SVGA_CAP_OFFSCREEN_1            (1 << 12)
 173 #define SVGA_CAP_ALPHA_BLEND            (1 << 13)
 174 #define SVGA_CAP_3D                     (1 << 14)
 175 #define SVGA_CAP_EXTENDED_FIFO          (1 << 15)
 176 #define SVGA_CAP_MULTIMON               (1 << 16)
 177 #define SVGA_CAP_PITCHLOCK              (1 << 17)
 178
 179 /*
 180  * FIFO offsets (seen as an array of 32-bit words)
 181  */
 182 enum {
 183     /*
 184      * The original defined FIFO offsets
 185      */
 186     SVGA_FIFO_MIN = 0,
 187     SVGA_FIFO_MAX,      /* The distance from MIN to MAX must be at least 10K */
 188     SVGA_FIFO_NEXT_CMD,
 189     SVGA_FIFO_STOP,
 190
 191     /*
 192      * Additional offsets added as of SVGA_CAP_EXTENDED_FIFO
 193      */
 194     SVGA_FIFO_CAPABILITIES = 4,
 195     SVGA_FIFO_FLAGS,
 196     SVGA_FIFO_FENCE,
 197     SVGA_FIFO_3D_HWVERSION,
 198     SVGA_FIFO_PITCHLOCK,
 199 };
 200
 201 #define SVGA_FIFO_CAP_NONE              0
 202 #define SVGA_FIFO_CAP_FENCE             (1 << 0)
 203 #define SVGA_FIFO_CAP_ACCELFRONT        (1 << 1)
 204 #define SVGA_FIFO_CAP_PITCHLOCK         (1 << 2)
 205
 206 #define SVGA_FIFO_FLAG_NONE             0
 207 #define SVGA_FIFO_FLAG_ACCELFRONT       (1 << 0)
 208
 209 /* These values can probably be changed arbitrarily.  */
 210 #define SVGA_SCRATCH_SIZE               0x8000
 211 #define SVGA_MAX_WIDTH                  2360
 212 #define SVGA_MAX_HEIGHT                 1770
 213
 214 #ifdef VERBOSE
 215 # define GUEST_OS_BASE          0x5001
 216 static const char *vmsvga_guest_id[] = {
 217     [0x00] = "Dos",
 218     [0x01] = "Windows 3.1",
 219     [0x02] = "Windows 95",
 220     [0x03] = "Windows 98",
 221     [0x04] = "Windows ME",
 222     [0x05] = "Windows NT",
 223     [0x06] = "Windows 2000",
 224     [0x07] = "Linux",
 225     [0x08] = "OS/2",
 226     [0x09] = "an unknown OS",
 227     [0x0a] = "BSD",
 228     [0x0b] = "Whistler",
 229     [0x0c] = "an unknown OS",
 230     [0x0d] = "an unknown OS",
 231     [0x0e] = "an unknown OS",
 232     [0x0f] = "an unknown OS",
 233     [0x10] = "an unknown OS",
 234     [0x11] = "an unknown OS",
 235     [0x12] = "an unknown OS",
 236     [0x13] = "an unknown OS",
 237     [0x14] = "an unknown OS",
 238     [0x15] = "Windows 2003",
 239 };
 240 #endif
 241
 242 enum {
 243     SVGA_CMD_INVALID_CMD = 0,
 244     SVGA_CMD_UPDATE = 1,
 245     SVGA_CMD_RECT_FILL = 2,
 246     SVGA_CMD_RECT_COPY = 3,
 247     SVGA_CMD_DEFINE_BITMAP = 4,
 248     SVGA_CMD_DEFINE_BITMAP_SCANLINE = 5,
 249     SVGA_CMD_DEFINE_PIXMAP = 6,
 250     SVGA_CMD_DEFINE_PIXMAP_SCANLINE = 7,
 251     SVGA_CMD_RECT_BITMAP_FILL = 8,
 252     SVGA_CMD_RECT_PIXMAP_FILL = 9,
 253     SVGA_CMD_RECT_BITMAP_COPY = 10,
 254     SVGA_CMD_RECT_PIXMAP_COPY = 11,
 255     SVGA_CMD_FREE_OBJECT = 12,
 256     SVGA_CMD_RECT_ROP_FILL = 13,
 257     SVGA_CMD_RECT_ROP_COPY = 14,
 258     SVGA_CMD_RECT_ROP_BITMAP_FILL = 15,
 259     SVGA_CMD_RECT_ROP_PIXMAP_FILL = 16,
 260     SVGA_CMD_RECT_ROP_BITMAP_COPY = 17,
 261     SVGA_CMD_RECT_ROP_PIXMAP_COPY = 18,
 262     SVGA_CMD_DEFINE_CURSOR = 19,
 263     SVGA_CMD_DISPLAY_CURSOR = 20,
 264     SVGA_CMD_MOVE_CURSOR = 21,
 265     SVGA_CMD_DEFINE_ALPHA_CURSOR = 22,
 266     SVGA_CMD_DRAW_GLYPH = 23,
 267     SVGA_CMD_DRAW_GLYPH_CLIPPED = 24,
 268     SVGA_CMD_UPDATE_VERBOSE = 25,
 269     SVGA_CMD_SURFACE_FILL = 26,
 270     SVGA_CMD_SURFACE_COPY = 27,
 271     SVGA_CMD_SURFACE_ALPHA_BLEND = 28,
 272     SVGA_CMD_FRONT_ROP_FILL = 29,
 273     SVGA_CMD_FENCE = 30,
 274 };
 275
 276 /* Legal values for the SVGA_REG_CURSOR_ON register in cursor bypass mode */
 277 enum {
 278     SVGA_CURSOR_ON_HIDE = 0,
 279     SVGA_CURSOR_ON_SHOW = 1,
 280     SVGA_CURSOR_ON_REMOVE_FROM_FB = 2,
 281     SVGA_CURSOR_ON_RESTORE_TO_FB = 3,
 282 };
 283
 284 static inline void vmsvga_update_rect(struct vmsvga_state_s *s,
 285                 int x, int y, int w, int h)
 286 {
 287     int line;
 288     int bypl;
 289     int width;
 290     int start;
 291     uint8_t *src;
 292     uint8_t *dst;
 293
 294     if (x + w > ds_get_width(s->vga.ds)) {
 295         fprintf(stderr, "%s: update width too large x: %d, w: %d\n",
 296                 __func__, x, w);
 297         x = MIN(x, ds_get_width(s->vga.ds));
 298         w = ds_get_width(s->vga.ds) - x;
 299     }
 300
 301     if (y + h > ds_get_height(s->vga.ds)) {
 302         fprintf(stderr, "%s: update height too large y: %d, h: %d\n",
 303                 __func__, y, h);
 304         y = MIN(y, ds_get_height(s->vga.ds));
 305         h = ds_get_height(s->vga.ds) - y;
 306     }
 307
 308     bypl = ds_get_linesize(s->vga.ds);
 309     width = ds_get_bytes_per_pixel(s->vga.ds) * w;
 310     start = ds_get_bytes_per_pixel(s->vga.ds) * x + bypl * y;
 311     src = s->vga.vram_ptr + start;
 312     dst = ds_get_data(s->vga.ds) + start;
 313
 314     for (line = h; line > 0; line--, src += bypl, dst += bypl) {
 315         memcpy(dst, src, width);
 316     }
 317     dpy_gfx_update(s->vga.ds, x, y, w, h);
 318 }
 319
 320 static inline void vmsvga_update_screen(struct vmsvga_state_s *s)
 321 {
 322     memcpy(ds_get_data(s->vga.ds), s->vga.vram_ptr,
 323            ds_get_linesize(s->vga.ds) * ds_get_height(s->vga.ds));
 324     dpy_gfx_update(s->vga.ds, 0, 0,
 325                ds_get_width(s->vga.ds), ds_get_height(s->vga.ds));
 326 }
 327
 328 static inline void vmsvga_update_rect_delayed(struct vmsvga_state_s *s,
 329                 int x, int y, int w, int h)
 330 {
 331     struct vmsvga_rect_s *rect = &s->redraw_fifo[s->redraw_fifo_last++];
 332
 333     s->redraw_fifo_last &= REDRAW_FIFO_LEN - 1;
 334     rect->x = x;
 335     rect->y = y;
 336     rect->w = w;
 337     rect->h = h;
 338 }
 339
 340 static inline void vmsvga_update_rect_flush(struct vmsvga_state_s *s)
 341 {
 342     struct vmsvga_rect_s *rect;
 343
 344     if (s->invalidated) {
 345         s->redraw_fifo_first = s->redraw_fifo_last;
 346         return;
 347     }
 348     /* Overlapping region updates can be optimised out here - if someone
 349      * knows a smart algorithm to do that, please share.  */
 350     while (s->redraw_fifo_first != s->redraw_fifo_last) {
 351         rect = &s->redraw_fifo[s->redraw_fifo_first++];
 352         s->redraw_fifo_first &= REDRAW_FIFO_LEN - 1;
 353         vmsvga_update_rect(s, rect->x, rect->y, rect->w, rect->h);
 354     }
 355 }
 356
 357 #ifdef HW_RECT_ACCEL
 358 static inline void vmsvga_copy_rect(struct vmsvga_state_s *s,
 359                 int x0, int y0, int x1, int y1, int w, int h)
 360 {
 361     uint8_t *vram = s->vga.vram_ptr;
 362     int bypl = ds_get_linesize(s->vga.ds);
 363     int bypp = ds_get_bytes_per_pixel(s->vga.ds);
 364     int width = bypp * w;
 365     int line = h;
 366     uint8_t *ptr[2];
 367
 368     if (y1 > y0) {
 369         ptr[0] = vram + bypp * x0 + bypl * (y0 + h - 1);
 370         ptr[1] = vram + bypp * x1 + bypl * (y1 + h - 1);
 371         for (; line > 0; line --, ptr[0] -= bypl, ptr[1] -= bypl) {
 372             memmove(ptr[1], ptr[0], width);
 373         }
 374     } else {
 375         ptr[0] = vram + bypp * x0 + bypl * y0;
 376         ptr[1] = vram + bypp * x1 + bypl * y1;
 377         for (; line > 0; line --, ptr[0] += bypl, ptr[1] += bypl) {
 378             memmove(ptr[1], ptr[0], width);
 379         }
 380     }
 381
 382     vmsvga_update_rect_delayed(s, x1, y1, w, h);
 383 }
 384 #endif
 385
 386 #ifdef HW_FILL_ACCEL
 387 static inline void vmsvga_fill_rect(struct vmsvga_state_s *s,
 388                 uint32_t c, int x, int y, int w, int h)
 389 {
 390     int bypl = ds_get_linesize(s->vga.ds);
 391     int width = ds_get_bytes_per_pixel(s->vga.ds) * w;
 392     int line = h;
 393     int column;
 394     uint8_t *fst;
 395     uint8_t *dst;
 396     uint8_t *src;
 397     uint8_t col[4];
 398
 399     col[0] = c;
 400     col[1] = c >> 8;
 401     col[2] = c >> 16;
 402     col[3] = c >> 24;
 403
 404     fst = s->vga.vram_ptr + ds_get_bytes_per_pixel(s->vga.ds) * x + bypl * y;
 405
 406     if (line--) {
 407         dst = fst;
 408         src = col;
 409         for (column = width; column > 0; column--) {
 410             *(dst++) = *(src++);
 411             if (src - col == ds_get_bytes_per_pixel(s->vga.ds)) {
 412                 src = col;
 413             }
 414         }
 415         dst = fst;
 416         for (; line > 0; line--) {
 417             dst += bypl;
 418             memcpy(dst, fst, width);
 419         }
 420     }
 421
 422     vmsvga_update_rect_delayed(s, x, y, w, h);
 423 }
 424 #endif
 425
 426 struct vmsvga_cursor_definition_s {
 427     int width;
 428     int height;
 429     int id;
 430     int bpp;
 431     int hot_x;
 432     int hot_y;
 433     uint32_t mask[1024];
 434     uint32_t image[4096];
 435 };
 436
 437 #define SVGA_BITMAP_SIZE(w, h)          ((((w) + 31) >> 5) * (h))
 438 #define SVGA_PIXMAP_SIZE(w, h, bpp)     (((((w) * (bpp)) + 31) >> 5) * (h))
 439
 440 #ifdef HW_MOUSE_ACCEL
 441 static inline void vmsvga_cursor_define(struct vmsvga_state_s *s,
 442                 struct vmsvga_cursor_definition_s *c)
 443 {
 444     QEMUCursor *qc;
 445     int i, pixels;
 446
 447     qc = cursor_alloc(c->width, c->height);
 448     qc->hot_x = c->hot_x;
 449     qc->hot_y = c->hot_y;
 450     switch (c->bpp) {
 451     case 1:
 452         cursor_set_mono(qc, 0xffffff, 0x000000, (void *)c->image,
 453                         1, (void *)c->mask);
 454 #ifdef DEBUG
 455         cursor_print_ascii_art(qc, "vmware/mono");
 456 #endif
 457         break;
 458     case 32:
 459         /* fill alpha channel from mask, set color to zero */
 460         cursor_set_mono(qc, 0x000000, 0x000000, (void *)c->mask,
 461                         1, (void *)c->mask);
 462         /* add in rgb values */
 463         pixels = c->width * c->height;
 464         for (i = 0; i < pixels; i++) {
 465             qc->data[i] |= c->image[i] & 0xffffff;
 466         }
 467 #ifdef DEBUG
 468         cursor_print_ascii_art(qc, "vmware/32bit");
 469 #endif
 470         break;
 471     default:
 472         fprintf(stderr, "%s: unhandled bpp %d, using fallback cursor\n",
 473                 __func__, c->bpp);
 474         cursor_put(qc);
 475         qc = cursor_builtin_left_ptr();
 476     }
 477
 478     dpy_cursor_define(s->vga.ds, qc);
 479     cursor_put(qc);
 480 }
 481 #endif
 482
 483 #define CMD(f)  le32_to_cpu(s->cmd->f)
 484
 485 static inline int vmsvga_fifo_length(struct vmsvga_state_s *s)
 486 {
 487     int num;
 488
 489     if (!s->config || !s->enable) {
 490         return 0;
 491     }
 492     num = CMD(next_cmd) - CMD(stop);
 493     if (num < 0) {
 494         num += CMD(max) - CMD(min);
 495     }
 496     return num >> 2;
 497 }
 498
 499 static inline uint32_t vmsvga_fifo_read_raw(struct vmsvga_state_s *s)
 500 {
 501     uint32_t cmd = s->fifo[CMD(stop) >> 2];
 502
 503     s->cmd->stop = cpu_to_le32(CMD(stop) + 4);
 504     if (CMD(stop) >= CMD(max)) {
 505         s->cmd->stop = s->cmd->min;
 506     }
 507     return cmd;
 508 }
 509
 510 static inline uint32_t vmsvga_fifo_read(struct vmsvga_state_s *s)
 511 {
 512     return le32_to_cpu(vmsvga_fifo_read_raw(s));
 513 }
 514
 515 static void vmsvga_fifo_run(struct vmsvga_state_s *s)
 516 {
 517     uint32_t cmd, colour;
 518     int args, len;
 519     int x, y, dx, dy, width, height;
 520     struct vmsvga_cursor_definition_s cursor;
 521     uint32_t cmd_start;
 522
 523     len = vmsvga_fifo_length(s);
 524     while (len > 0) {
 525         /* May need to go back to the start of the command if incomplete */
 526         cmd_start = s->cmd->stop;
 527
 528         switch (cmd = vmsvga_fifo_read(s)) {
 529         case SVGA_CMD_UPDATE:
 530         case SVGA_CMD_UPDATE_VERBOSE:
 531             len -= 5;
 532             if (len < 0) {
 533                 goto rewind;
 534             }
 535
 536             x = vmsvga_fifo_read(s);
 537             y = vmsvga_fifo_read(s);
 538             width = vmsvga_fifo_read(s);
 539             height = vmsvga_fifo_read(s);
 540             vmsvga_update_rect_delayed(s, x, y, width, height);
 541             break;
 542
 543         case SVGA_CMD_RECT_FILL:
 544             len -= 6;
 545             if (len < 0) {
 546                 goto rewind;
 547             }
 548
 549             colour = vmsvga_fifo_read(s);
 550             x = vmsvga_fifo_read(s);
 551             y = vmsvga_fifo_read(s);
 552             width = vmsvga_fifo_read(s);
 553             height = vmsvga_fifo_read(s);
 554 #ifdef HW_FILL_ACCEL
 555             vmsvga_fill_rect(s, colour, x, y, width, height);
 556             break;
 557 #else
 558             args = 0;
 559             goto badcmd;
 560 #endif
 561
 562         case SVGA_CMD_RECT_COPY:
 563             len -= 7;
 564             if (len < 0) {
 565                 goto rewind;
 566             }
 567
 568             x = vmsvga_fifo_read(s);
 569             y = vmsvga_fifo_read(s);
 570             dx = vmsvga_fifo_read(s);
 571             dy = vmsvga_fifo_read(s);
 572             width = vmsvga_fifo_read(s);
 573             height = vmsvga_fifo_read(s);
 574 #ifdef HW_RECT_ACCEL
 575             vmsvga_copy_rect(s, x, y, dx, dy, width, height);
 576             break;
 577 #else
 578             args = 0;
 579             goto badcmd;
 580 #endif
 581
 582         case SVGA_CMD_DEFINE_CURSOR:
 583             len -= 8;
 584             if (len < 0) {
 585                 goto rewind;
 586             }
 587
 588             cursor.id = vmsvga_fifo_read(s);
 589             cursor.hot_x = vmsvga_fifo_read(s);
 590             cursor.hot_y = vmsvga_fifo_read(s);
 591             cursor.width = x = vmsvga_fifo_read(s);
 592             cursor.height = y = vmsvga_fifo_read(s);
 593             vmsvga_fifo_read(s);
 594             cursor.bpp = vmsvga_fifo_read(s);
 595
 596             args = SVGA_BITMAP_SIZE(x, y) + SVGA_PIXMAP_SIZE(x, y, cursor.bpp);
 597             if (SVGA_BITMAP_SIZE(x, y) > sizeof cursor.mask ||
 598                 SVGA_PIXMAP_SIZE(x, y, cursor.bpp) > sizeof cursor.image) {
 599                     goto badcmd;
 600             }
 601
 602             len -= args;
 603             if (len < 0) {
 604                 goto rewind;
 605             }
 606
 607             for (args = 0; args < SVGA_BITMAP_SIZE(x, y); args++) {
 608                 cursor.mask[args] = vmsvga_fifo_read_raw(s);
 609             }
 610             for (args = 0; args < SVGA_PIXMAP_SIZE(x, y, cursor.bpp); args++) {
 611                 cursor.image[args] = vmsvga_fifo_read_raw(s);
 612             }
 613 #ifdef HW_MOUSE_ACCEL
 614             vmsvga_cursor_define(s, &cursor);
 615             break;
 616 #else
 617             args = 0;
 618             goto badcmd;
 619 #endif
 620
 621         /*
 622          * Other commands that we at least know the number of arguments
 623          * for so we can avoid FIFO desync if driver uses them illegally.
 624          */
 625         case SVGA_CMD_DEFINE_ALPHA_CURSOR:
 626             len -= 6;
 627             if (len < 0) {
 628                 goto rewind;
 629             }
 630             vmsvga_fifo_read(s);
 631             vmsvga_fifo_read(s);
 632             vmsvga_fifo_read(s);
 633             x = vmsvga_fifo_read(s);
 634             y = vmsvga_fifo_read(s);
 635             args = x * y;
 636             goto badcmd;
 637         case SVGA_CMD_RECT_ROP_FILL:
 638             args = 6;
 639             goto badcmd;
 640         case SVGA_CMD_RECT_ROP_COPY:
 641             args = 7;
 642             goto badcmd;
 643         case SVGA_CMD_DRAW_GLYPH_CLIPPED:
 644             len -= 4;
 645             if (len < 0) {
 646                 goto rewind;
 647             }
 648             vmsvga_fifo_read(s);
 649             vmsvga_fifo_read(s);
 650             args = 7 + (vmsvga_fifo_read(s) >> 2);
 651             goto badcmd;
 652         case SVGA_CMD_SURFACE_ALPHA_BLEND:
 653             args = 12;
 654             goto badcmd;
 655
 656         /*
 657          * Other commands that are not listed as depending on any
 658          * CAPABILITIES bits, but are not described in the README either.
 659          */
 660         case SVGA_CMD_SURFACE_FILL:
 661         case SVGA_CMD_SURFACE_COPY:
 662         case SVGA_CMD_FRONT_ROP_FILL:
 663         case SVGA_CMD_FENCE:
 664         case SVGA_CMD_INVALID_CMD:
 665             break; /* Nop */
 666
 667         default:
 668             args = 0;
 669         badcmd:
 670             len -= args;
 671             if (len < 0) {
 672                 goto rewind;
 673             }
 674             while (args--) {
 675                 vmsvga_fifo_read(s);
 676             }
 677             printf("%s: Unknown command 0x%02x in SVGA command FIFO\n",
 678                    __func__, cmd);
 679             break;
 680
 681         rewind:
 682             s->cmd->stop = cmd_start;
 683             break;
 684         }
 685     }
 686
 687     s->syncing = 0;
 688 }
 689
 690 static uint32_t vmsvga_index_read(void *opaque, uint32_t address)
 691 {
 692     struct vmsvga_state_s *s = opaque;
 693
 694     return s->index;
 695 }
 696
 697 static void vmsvga_index_write(void *opaque, uint32_t address, uint32_t index)
 698 {
 699     struct vmsvga_state_s *s = opaque;
 700
 701     s->index = index;
 702 }
 703
 704 static uint32_t vmsvga_value_read(void *opaque, uint32_t address)
 705 {
 706     uint32_t caps;
 707     struct vmsvga_state_s *s = opaque;
 708
 709     switch (s->index) {
 710     case SVGA_REG_ID:
 711         return s->svgaid;
 712
 713     case SVGA_REG_ENABLE:
 714         return s->enable;
 715
 716     case SVGA_REG_WIDTH:
 717         return ds_get_width(s->vga.ds);
 718
 719     case SVGA_REG_HEIGHT:
 720         return ds_get_height(s->vga.ds);
 721
 722     case SVGA_REG_MAX_WIDTH:
 723         return SVGA_MAX_WIDTH;
 724
 725     case SVGA_REG_MAX_HEIGHT:
 726         return SVGA_MAX_HEIGHT;
 727
 728     case SVGA_REG_DEPTH:
 729         return ds_get_depth(s->vga.ds);
 730
 731     case SVGA_REG_BITS_PER_PIXEL:
 732         return ds_get_bits_per_pixel(s->vga.ds);
 733
 734     case SVGA_REG_PSEUDOCOLOR:
 735         return 0x0;
 736
 737     case SVGA_REG_RED_MASK:
 738         return ds_get_rmask(s->vga.ds);
 739
 740     case SVGA_REG_GREEN_MASK:
 741         return ds_get_gmask(s->vga.ds);
 742
 743     case SVGA_REG_BLUE_MASK:
 744         return ds_get_bmask(s->vga.ds);
 745
 746     case SVGA_REG_BYTES_PER_LINE:
 747         return ds_get_bytes_per_pixel(s->vga.ds) * s->new_width;
 748
 749     case SVGA_REG_FB_START: {
 750         struct pci_vmsvga_state_s *pci_vmsvga
 751             = container_of(s, struct pci_vmsvga_state_s, chip);
 752         return pci_get_bar_addr(&pci_vmsvga->card, 1);
 753     }
 754
 755     case SVGA_REG_FB_OFFSET:
 756         return 0x0;
 757
 758     case SVGA_REG_VRAM_SIZE:
 759         return s->vga.vram_size; /* No physical VRAM besides the framebuffer */
 760
 761     case SVGA_REG_FB_SIZE:
 762         return s->vga.vram_size;
 763
 764     case SVGA_REG_CAPABILITIES:
 765         caps = SVGA_CAP_NONE;
 766 #ifdef HW_RECT_ACCEL
 767         caps |= SVGA_CAP_RECT_COPY;
 768 #endif
 769 #ifdef HW_FILL_ACCEL
 770         caps |= SVGA_CAP_RECT_FILL;
 771 #endif
 772 #ifdef HW_MOUSE_ACCEL
 773         if (dpy_cursor_define_supported(s->vga.ds)) {
 774             caps |= SVGA_CAP_CURSOR | SVGA_CAP_CURSOR_BYPASS_2 |
 775                     SVGA_CAP_CURSOR_BYPASS;
 776         }
 777 #endif
 778         return caps;
 779
 780     case SVGA_REG_MEM_START: {
 781         struct pci_vmsvga_state_s *pci_vmsvga
 782             = container_of(s, struct pci_vmsvga_state_s, chip);
 783         return pci_get_bar_addr(&pci_vmsvga->card, 2);
 784     }
 785
 786     case SVGA_REG_MEM_SIZE:
 787         return s->fifo_size;
 788
 789     case SVGA_REG_CONFIG_DONE:
 790         return s->config;
 791
 792     case SVGA_REG_SYNC:
 793     case SVGA_REG_BUSY:
 794         return s->syncing;
 795
 796     case SVGA_REG_GUEST_ID:
 797         return s->guest;
 798
 799     case SVGA_REG_CURSOR_ID:
 800         return s->cursor.id;
 801
 802     case SVGA_REG_CURSOR_X:
 803         return s->cursor.x;
 804
 805     case SVGA_REG_CURSOR_Y:
 806         return s->cursor.x;
 807
 808     case SVGA_REG_CURSOR_ON:
 809         return s->cursor.on;
 810
 811     case SVGA_REG_HOST_BITS_PER_PIXEL:
 812         return ds_get_bits_per_pixel(s->vga.ds);
 813
 814     case SVGA_REG_SCRATCH_SIZE:
 815         return s->scratch_size;
 816
 817     case SVGA_REG_MEM_REGS:
 818     case SVGA_REG_NUM_DISPLAYS:
 819     case SVGA_REG_PITCHLOCK:
 820     case SVGA_PALETTE_BASE ... SVGA_PALETTE_END:
 821         return 0;
 822
 823     default:
 824         if (s->index >= SVGA_SCRATCH_BASE &&
 825             s->index < SVGA_SCRATCH_BASE + s->scratch_size) {
 826             return s->scratch[s->index - SVGA_SCRATCH_BASE];
 827         }
 828         printf("%s: Bad register %02x\n", __func__, s->index);
 829     }
 830
 831     return 0;
 832 }
 833
 834 static void vmsvga_value_write(void *opaque, uint32_t address, uint32_t value)
 835 {
 836     struct vmsvga_state_s *s = opaque;
 837
 838     switch (s->index) {
 839     case SVGA_REG_ID:
 840         if (value == SVGA_ID_2 || value == SVGA_ID_1 || value == SVGA_ID_0) {
 841             s->svgaid = value;
 842         }
 843         break;
 844
 845     case SVGA_REG_ENABLE:
 846         s->enable = value;
 847         s->config &= !!value;
 848         s->invalidated = 1;
 849         s->vga.invalidate(&s->vga);
 850         if (s->enable) {
 851             vga_dirty_log_stop(&s->vga);
 852         } else {
 853             vga_dirty_log_start(&s->vga);
 854         }
 855         break;
 856
 857     case SVGA_REG_WIDTH:
 858         if (value <= SVGA_MAX_WIDTH) {
 859             s->new_width = value;
 860             s->invalidated = 1;
 861         } else {
 862             printf("%s: Bad width: %i\n", __func__, value);
 863         }
 864         break;
 865
 866     case SVGA_REG_HEIGHT:
 867         if (value <= SVGA_MAX_HEIGHT) {
 868             s->new_height = value;
 869             s->invalidated = 1;
 870         } else {
 871             printf("%s: Bad height: %i\n", __func__, value);
 872         }
 873         break;
 874
 875     case SVGA_REG_BITS_PER_PIXEL:
 876         if (value != ds_get_bits_per_pixel(s->vga.ds)) {
 877             printf("%s: Bad bits per pixel: %i bits\n", __func__, value);
 878             s->config = 0;
 879         }
 880         break;
 881
 882     case SVGA_REG_CONFIG_DONE:
 883         if (value) {
 884             s->fifo = (uint32_t *) s->fifo_ptr;
 885             /* Check range and alignment.  */
 886             if ((CMD(min) | CMD(max) | CMD(next_cmd) | CMD(stop)) & 3) {
 887                 break;
 888             }
 889             if (CMD(min) < (uint8_t *) s->cmd->fifo - (uint8_t *) s->fifo) {
 890                 break;
 891             }
 892             if (CMD(max) > SVGA_FIFO_SIZE) {
 893                 break;
 894             }
 895             if (CMD(max) < CMD(min) + 10 * 1024) {
 896                 break;
 897             }
 898         }
 899         s->config = !!value;
 900         break;
 901
 902     case SVGA_REG_SYNC:
 903         s->syncing = 1;
 904         vmsvga_fifo_run(s); /* Or should we just wait for update_display? */
 905         break;
 906
 907     case SVGA_REG_GUEST_ID:
 908         s->guest = value;
 909 #ifdef VERBOSE
 910         if (value >= GUEST_OS_BASE && value < GUEST_OS_BASE +
 911             ARRAY_SIZE(vmsvga_guest_id)) {
 912             printf("%s: guest runs %s.\n", __func__,
 913                    vmsvga_guest_id[value - GUEST_OS_BASE]);
 914         }
 915 #endif
 916         break;
 917
 918     case SVGA_REG_CURSOR_ID:
 919         s->cursor.id = value;
 920         break;
 921
 922     case SVGA_REG_CURSOR_X:
 923         s->cursor.x = value;
 924         break;
 925
 926     case SVGA_REG_CURSOR_Y:
 927         s->cursor.y = value;
 928         break;
 929
 930     case SVGA_REG_CURSOR_ON:
 931         s->cursor.on |= (value == SVGA_CURSOR_ON_SHOW);
 932         s->cursor.on &= (value != SVGA_CURSOR_ON_HIDE);
 933 #ifdef HW_MOUSE_ACCEL
 934         if (value <= SVGA_CURSOR_ON_SHOW) {
 935             dpy_mouse_set(s->vga.ds, s->cursor.x, s->cursor.y, s->cursor.on);
 936         }
 937 #endif
 938         break;
 939
 940     case SVGA_REG_DEPTH:
 941     case SVGA_REG_MEM_REGS:
 942     case SVGA_REG_NUM_DISPLAYS:
 943     case SVGA_REG_PITCHLOCK:
 944     case SVGA_PALETTE_BASE ... SVGA_PALETTE_END:
 945         break;
 946
 947     default:
 948         if (s->index >= SVGA_SCRATCH_BASE &&
 949                 s->index < SVGA_SCRATCH_BASE + s->scratch_size) {
 950             s->scratch[s->index - SVGA_SCRATCH_BASE] = value;
 951             break;
 952         }
 953         printf("%s: Bad register %02x\n", __func__, s->index);
 954     }
 955 }
 956
 957 static uint32_t vmsvga_bios_read(void *opaque, uint32_t address)
 958 {
 959     printf("%s: what are we supposed to return?\n", __func__);
 960     return 0xcafe;
 961 }
 962
 963 static void vmsvga_bios_write(void *opaque, uint32_t address, uint32_t data)
 964 {
 965     printf("%s: what are we supposed to do with (%08x)?\n", __func__, data);
 966 }
 967
 968 static inline void vmsvga_check_size(struct vmsvga_state_s *s)
 969 {
 970     if (s->new_width != ds_get_width(s->vga.ds) ||
 971         s->new_height != ds_get_height(s->vga.ds)) {
 972         qemu_console_resize(s->vga.ds, s->new_width, s->new_height);
 973         s->invalidated = 1;
 974     }
 975 }
 976
 977 static void vmsvga_update_display(void *opaque)
 978 {
 979     struct vmsvga_state_s *s = opaque;
 980     if (!s->enable) {
 981         s->vga.update(&s->vga);
 982         return;
 983     }
 984
 985     vmsvga_check_size(s);
 986
 987     vmsvga_fifo_run(s);
 988     vmsvga_update_rect_flush(s);
 989
 990     /*
 991      * Is it more efficient to look at vram VGA-dirty bits or wait
 992      * for the driver to issue SVGA_CMD_UPDATE?
 993      */
 994     if (s->invalidated) {
 995         s->invalidated = 0;
 996         vmsvga_update_screen(s);
 997     }
 998 }
 999
1000 static void vmsvga_reset(DeviceState *dev)
1001 {
1002     struct pci_vmsvga_state_s *pci =
1003         DO_UPCAST(struct pci_vmsvga_state_s, card.qdev, dev);
1004     struct vmsvga_state_s *s = &pci->chip;
1005
1006     s->index = 0;
1007     s->enable = 0;
1008     s->config = 0;
1009     s->svgaid = SVGA_ID;
1010     s->cursor.on = 0;
1011     s->redraw_fifo_first = 0;
1012     s->redraw_fifo_last = 0;
1013     s->syncing = 0;
1014
1015     vga_dirty_log_start(&s->vga);
1016 }
1017
1018 static void vmsvga_invalidate_display(void *opaque)
1019 {
1020     struct vmsvga_state_s *s = opaque;
1021     if (!s->enable) {
1022         s->vga.invalidate(&s->vga);
1023         return;
1024     }
1025
1026     s->invalidated = 1;
1027 }
1028
1029 /* save the vga display in a PPM image even if no display is
1030    available */
1031 static void vmsvga_screen_dump(void *opaque, const char *filename, bool cswitch,
1032                                Error **errp)
1033 {
1034     struct vmsvga_state_s *s = opaque;
1035     if (!s->enable) {
1036         s->vga.screen_dump(&s->vga, filename, cswitch, errp);
1037         return;
1038     }
1039
1040     if (ds_get_bits_per_pixel(s->vga.ds) == 32) {
1041         DisplaySurface *ds = qemu_create_displaysurface_from(
1042                                  ds_get_width(s->vga.ds),
1043                                  ds_get_height(s->vga.ds),
1044                                  32,
1045                                  ds_get_linesize(s->vga.ds),
1046                                  s->vga.vram_ptr);
1047         ppm_save(filename, ds, errp);
1048         g_free(ds);
1049     }
1050 }
1051
1052 static void vmsvga_text_update(void *opaque, console_ch_t *chardata)
1053 {
1054     struct vmsvga_state_s *s = opaque;
1055
1056     if (s->vga.text_update) {
1057         s->vga.text_update(&s->vga, chardata);
1058     }
1059 }
1060
1061 static int vmsvga_post_load(void *opaque, int version_id)
1062 {
1063     struct vmsvga_state_s *s = opaque;
1064
1065     s->invalidated = 1;
1066     if (s->config) {
1067         s->fifo = (uint32_t *) s->fifo_ptr;
1068     }
1069     return 0;
1070 }
1071
1072 static const VMStateDescription vmstate_vmware_vga_internal = {
1073     .name = "vmware_vga_internal",
1074     .version_id = 0,
1075     .minimum_version_id = 0,
1076     .minimum_version_id_old = 0,
1077     .post_load = vmsvga_post_load,
1078     .fields      = (VMStateField[]) {
1079         VMSTATE_UNUSED(4), /* was depth */
1080         VMSTATE_INT32(enable, struct vmsvga_state_s),
1081         VMSTATE_INT32(config, struct vmsvga_state_s),
1082         VMSTATE_INT32(cursor.id, struct vmsvga_state_s),
1083         VMSTATE_INT32(cursor.x, struct vmsvga_state_s),
1084         VMSTATE_INT32(cursor.y, struct vmsvga_state_s),
1085         VMSTATE_INT32(cursor.on, struct vmsvga_state_s),
1086         VMSTATE_INT32(index, struct vmsvga_state_s),
1087         VMSTATE_VARRAY_INT32(scratch, struct vmsvga_state_s,
1088                              scratch_size, 0, vmstate_info_uint32, uint32_t),
1089         VMSTATE_INT32(new_width, struct vmsvga_state_s),
1090         VMSTATE_INT32(new_height, struct vmsvga_state_s),
1091         VMSTATE_UINT32(guest, struct vmsvga_state_s),
1092         VMSTATE_UINT32(svgaid, struct vmsvga_state_s),
1093         VMSTATE_INT32(syncing, struct vmsvga_state_s),
1094         VMSTATE_UNUSED(4), /* was fb_size */
1095         VMSTATE_END_OF_LIST()
1096     }
1097 };
1098
1099 static const VMStateDescription vmstate_vmware_vga = {
1100     .name = "vmware_vga",
1101     .version_id = 0,
1102     .minimum_version_id = 0,
1103     .minimum_version_id_old = 0,
1104     .fields      = (VMStateField[]) {
1105         VMSTATE_PCI_DEVICE(card, struct pci_vmsvga_state_s),
1106         VMSTATE_STRUCT(chip, struct pci_vmsvga_state_s, 0,
1107                        vmstate_vmware_vga_internal, struct vmsvga_state_s),
1108         VMSTATE_END_OF_LIST()
1109     }
1110 };
1111
1112 static void vmsvga_init(struct vmsvga_state_s *s,
1113                         MemoryRegion *address_space, MemoryRegion *io)
1114 {
1115     s->scratch_size = SVGA_SCRATCH_SIZE;
1116     s->scratch = g_malloc(s->scratch_size * 4);
1117
1118     s->vga.ds = graphic_console_init(vmsvga_update_display,
1119                                      vmsvga_invalidate_display,
1120                                      vmsvga_screen_dump,
1121                                      vmsvga_text_update, s);
1122
1123
1124     s->fifo_size = SVGA_FIFO_SIZE;
1125     memory_region_init_ram(&s->fifo_ram, "vmsvga.fifo", s->fifo_size);
1126     vmstate_register_ram_global(&s->fifo_ram);
1127     s->fifo_ptr = memory_region_get_ram_ptr(&s->fifo_ram);
1128
1129     vga_common_init(&s->vga);
1130     vga_init(&s->vga, address_space, io, true);
1131     vmstate_register(NULL, 0, &vmstate_vga_common, &s->vga);
1132 }
1133
1134 static uint64_t vmsvga_io_read(void *opaque, hwaddr addr, unsigned size)
1135 {
1136     struct vmsvga_state_s *s = opaque;
1137
1138     switch (addr) {
1139     case SVGA_IO_MUL * SVGA_INDEX_PORT: return vmsvga_index_read(s, addr);
1140     case SVGA_IO_MUL * SVGA_VALUE_PORT: return vmsvga_value_read(s, addr);
1141     case SVGA_IO_MUL * SVGA_BIOS_PORT: return vmsvga_bios_read(s, addr);
1142     default: return -1u;
1143     }
1144 }
1145
1146 static void vmsvga_io_write(void *opaque, hwaddr addr,
1147                             uint64_t data, unsigned size)
1148 {
1149     struct vmsvga_state_s *s = opaque;
1150
1151     switch (addr) {
1152     case SVGA_IO_MUL * SVGA_INDEX_PORT:
1153         vmsvga_index_write(s, addr, data);
1154         break;
1155     case SVGA_IO_MUL * SVGA_VALUE_PORT:
1156         vmsvga_value_write(s, addr, data);
1157         break;
1158     case SVGA_IO_MUL * SVGA_BIOS_PORT:
1159         vmsvga_bios_write(s, addr, data);
1160         break;
1161     }
1162 }
1163
1164 static const MemoryRegionOps vmsvga_io_ops = {
1165     .read = vmsvga_io_read,
1166     .write = vmsvga_io_write,
1167     .endianness = DEVICE_LITTLE_ENDIAN,
1168     .valid = {
1169         .min_access_size = 4,
1170         .max_access_size = 4,
1171     },
1172 };
1173
1174 static int pci_vmsvga_initfn(PCIDevice *dev)
1175 {
1176     struct pci_vmsvga_state_s *s =
1177         DO_UPCAST(struct pci_vmsvga_state_s, card, dev);
1178
1179     s->card.config[PCI_CACHE_LINE_SIZE] = 0x08;         /* Cache line size */
1180     s->card.config[PCI_LATENCY_TIMER] = 0x40;           /* Latency timer */
1181     s->card.config[PCI_INTERRUPT_LINE] = 0xff;          /* End */
1182
1183     memory_region_init_io(&s->io_bar, &vmsvga_io_ops, &s->chip,
1184                           "vmsvga-io", 0x10);
1185     memory_region_set_flush_coalesced(&s->io_bar);
1186     pci_register_bar(&s->card, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io_bar);
1187
1188     vmsvga_init(&s->chip, pci_address_space(dev), pci_address_space_io(dev));
1189
1190     pci_register_bar(&s->card, 1, PCI_BASE_ADDRESS_MEM_PREFETCH,
1191                      &s->chip.vga.vram);
1192     pci_register_bar(&s->card, 2, PCI_BASE_ADDRESS_MEM_PREFETCH,
1193                      &s->chip.fifo_ram);
1194
1195     if (!dev->rom_bar) {
1196         /* compatibility with pc-0.13 and older */
1197         vga_init_vbe(&s->chip.vga, pci_address_space(dev));
1198     }
1199
1200     return 0;
1201 }
1202
1203 static Property vga_vmware_properties[] = {
1204     DEFINE_PROP_UINT32("vgamem_mb", struct pci_vmsvga_state_s,
1205                        chip.vga.vram_size_mb, 16),
1206     DEFINE_PROP_END_OF_LIST(),
1207 };
1208
1209 static void vmsvga_class_init(ObjectClass *klass, void *data)
1210 {
1211     DeviceClass *dc = DEVICE_CLASS(klass);
1212     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
1213
1214     k->no_hotplug = 1;
1215     k->init = pci_vmsvga_initfn;
1216     k->romfile = "vgabios-vmware.bin";
1217     k->vendor_id = PCI_VENDOR_ID_VMWARE;
1218     k->device_id = SVGA_PCI_DEVICE_ID;
1219     k->class_id = PCI_CLASS_DISPLAY_VGA;
1220     k->subsystem_vendor_id = PCI_VENDOR_ID_VMWARE;
1221     k->subsystem_id = SVGA_PCI_DEVICE_ID;
1222     dc->reset = vmsvga_reset;
1223     dc->vmsd = &vmstate_vmware_vga;
1224     dc->props = vga_vmware_properties;
1225 }
1226
1227 static TypeInfo vmsvga_info = {
1228     .name          = "vmware-svga",
1229     .parent        = TYPE_PCI_DEVICE,
1230     .instance_size = sizeof(struct pci_vmsvga_state_s),
1231     .class_init    = vmsvga_class_init,
1232 };
1233
1234 static void vmsvga_register_types(void)
1235 {
1236     type_register_static(&vmsvga_info);
1237 }
1238
1239 type_init(vmsvga_register_types)