target/arm: Move feature test functions to their own header
[qemu/ar7.git] / linux-user / aarch64 / signal.c
bloba1e22d526d8cc72902b7f20d014bd627210761ca
1 /*
2 * Emulation of Linux signals
4 * Copyright (c) 2003 Fabrice Bellard
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
19 #include "qemu/osdep.h"
20 #include "qemu.h"
21 #include "user-internals.h"
22 #include "signal-common.h"
23 #include "linux-user/trace.h"
24 #include "target/arm/cpu-features.h"
26 struct target_sigcontext {
27 uint64_t fault_address;
28 /* AArch64 registers */
29 uint64_t regs[31];
30 uint64_t sp;
31 uint64_t pc;
32 uint64_t pstate;
33 /* 4K reserved for FP/SIMD state and future expansion */
34 char __reserved[4096] __attribute__((__aligned__(16)));
37 struct target_ucontext {
38 abi_ulong tuc_flags;
39 abi_ulong tuc_link;
40 target_stack_t tuc_stack;
41 target_sigset_t tuc_sigmask;
42 /* glibc uses a 1024-bit sigset_t */
43 char __unused[1024 / 8 - sizeof(target_sigset_t)];
44 /* last for future expansion */
45 struct target_sigcontext tuc_mcontext;
49 * Header to be used at the beginning of structures extending the user
50 * context. Such structures must be placed after the rt_sigframe on the stack
51 * and be 16-byte aligned. The last structure must be a dummy one with the
52 * magic and size set to 0.
54 struct target_aarch64_ctx {
55 uint32_t magic;
56 uint32_t size;
59 #define TARGET_FPSIMD_MAGIC 0x46508001
61 struct target_fpsimd_context {
62 struct target_aarch64_ctx head;
63 uint32_t fpsr;
64 uint32_t fpcr;
65 uint64_t vregs[32 * 2]; /* really uint128_t vregs[32] */
68 #define TARGET_EXTRA_MAGIC 0x45585401
70 struct target_extra_context {
71 struct target_aarch64_ctx head;
72 uint64_t datap; /* 16-byte aligned pointer to extra space cast to __u64 */
73 uint32_t size; /* size in bytes of the extra space */
74 uint32_t reserved[3];
77 #define TARGET_SVE_MAGIC 0x53564501
79 struct target_sve_context {
80 struct target_aarch64_ctx head;
81 uint16_t vl;
82 uint16_t flags;
83 uint16_t reserved[2];
84 /* The actual SVE data immediately follows. It is laid out
85 * according to TARGET_SVE_SIG_{Z,P}REG_OFFSET, based off of
86 * the original struct pointer.
90 #define TARGET_SVE_VQ_BYTES 16
92 #define TARGET_SVE_SIG_ZREG_SIZE(VQ) ((VQ) * TARGET_SVE_VQ_BYTES)
93 #define TARGET_SVE_SIG_PREG_SIZE(VQ) ((VQ) * (TARGET_SVE_VQ_BYTES / 8))
95 #define TARGET_SVE_SIG_REGS_OFFSET \
96 QEMU_ALIGN_UP(sizeof(struct target_sve_context), TARGET_SVE_VQ_BYTES)
97 #define TARGET_SVE_SIG_ZREG_OFFSET(VQ, N) \
98 (TARGET_SVE_SIG_REGS_OFFSET + TARGET_SVE_SIG_ZREG_SIZE(VQ) * (N))
99 #define TARGET_SVE_SIG_PREG_OFFSET(VQ, N) \
100 (TARGET_SVE_SIG_ZREG_OFFSET(VQ, 32) + TARGET_SVE_SIG_PREG_SIZE(VQ) * (N))
101 #define TARGET_SVE_SIG_FFR_OFFSET(VQ) \
102 (TARGET_SVE_SIG_PREG_OFFSET(VQ, 16))
103 #define TARGET_SVE_SIG_CONTEXT_SIZE(VQ) \
104 (TARGET_SVE_SIG_PREG_OFFSET(VQ, 17))
106 #define TARGET_SVE_SIG_FLAG_SM 1
108 #define TARGET_ZA_MAGIC 0x54366345
110 struct target_za_context {
111 struct target_aarch64_ctx head;
112 uint16_t vl;
113 uint16_t reserved[3];
114 /* The actual ZA data immediately follows. */
117 #define TARGET_ZA_SIG_REGS_OFFSET \
118 QEMU_ALIGN_UP(sizeof(struct target_za_context), TARGET_SVE_VQ_BYTES)
119 #define TARGET_ZA_SIG_ZAV_OFFSET(VQ, N) \
120 (TARGET_ZA_SIG_REGS_OFFSET + (VQ) * TARGET_SVE_VQ_BYTES * (N))
121 #define TARGET_ZA_SIG_CONTEXT_SIZE(VQ) \
122 TARGET_ZA_SIG_ZAV_OFFSET(VQ, VQ * TARGET_SVE_VQ_BYTES)
124 struct target_rt_sigframe {
125 struct target_siginfo info;
126 struct target_ucontext uc;
129 struct target_rt_frame_record {
130 uint64_t fp;
131 uint64_t lr;
134 static void target_setup_general_frame(struct target_rt_sigframe *sf,
135 CPUARMState *env, target_sigset_t *set)
137 int i;
139 __put_user(0, &sf->uc.tuc_flags);
140 __put_user(0, &sf->uc.tuc_link);
142 target_save_altstack(&sf->uc.tuc_stack, env);
144 for (i = 0; i < 31; i++) {
145 __put_user(env->xregs[i], &sf->uc.tuc_mcontext.regs[i]);
147 __put_user(env->xregs[31], &sf->uc.tuc_mcontext.sp);
148 __put_user(env->pc, &sf->uc.tuc_mcontext.pc);
149 __put_user(pstate_read(env), &sf->uc.tuc_mcontext.pstate);
151 __put_user(env->exception.vaddress, &sf->uc.tuc_mcontext.fault_address);
153 for (i = 0; i < TARGET_NSIG_WORDS; i++) {
154 __put_user(set->sig[i], &sf->uc.tuc_sigmask.sig[i]);
158 static void target_setup_fpsimd_record(struct target_fpsimd_context *fpsimd,
159 CPUARMState *env)
161 int i;
163 __put_user(TARGET_FPSIMD_MAGIC, &fpsimd->head.magic);
164 __put_user(sizeof(struct target_fpsimd_context), &fpsimd->head.size);
165 __put_user(vfp_get_fpsr(env), &fpsimd->fpsr);
166 __put_user(vfp_get_fpcr(env), &fpsimd->fpcr);
168 for (i = 0; i < 32; i++) {
169 uint64_t *q = aa64_vfp_qreg(env, i);
170 #if TARGET_BIG_ENDIAN
171 __put_user(q[0], &fpsimd->vregs[i * 2 + 1]);
172 __put_user(q[1], &fpsimd->vregs[i * 2]);
173 #else
174 __put_user(q[0], &fpsimd->vregs[i * 2]);
175 __put_user(q[1], &fpsimd->vregs[i * 2 + 1]);
176 #endif
180 static void target_setup_extra_record(struct target_extra_context *extra,
181 uint64_t datap, uint32_t extra_size)
183 __put_user(TARGET_EXTRA_MAGIC, &extra->head.magic);
184 __put_user(sizeof(struct target_extra_context), &extra->head.size);
185 __put_user(datap, &extra->datap);
186 __put_user(extra_size, &extra->size);
189 static void target_setup_end_record(struct target_aarch64_ctx *end)
191 __put_user(0, &end->magic);
192 __put_user(0, &end->size);
195 static void target_setup_sve_record(struct target_sve_context *sve,
196 CPUARMState *env, int size)
198 int i, j, vq = sve_vq(env);
200 memset(sve, 0, sizeof(*sve));
201 __put_user(TARGET_SVE_MAGIC, &sve->head.magic);
202 __put_user(size, &sve->head.size);
203 __put_user(vq * TARGET_SVE_VQ_BYTES, &sve->vl);
204 if (FIELD_EX64(env->svcr, SVCR, SM)) {
205 __put_user(TARGET_SVE_SIG_FLAG_SM, &sve->flags);
208 /* Note that SVE regs are stored as a byte stream, with each byte element
209 * at a subsequent address. This corresponds to a little-endian store
210 * of our 64-bit hunks.
212 for (i = 0; i < 32; ++i) {
213 uint64_t *z = (void *)sve + TARGET_SVE_SIG_ZREG_OFFSET(vq, i);
214 for (j = 0; j < vq * 2; ++j) {
215 __put_user_e(env->vfp.zregs[i].d[j], z + j, le);
218 for (i = 0; i <= 16; ++i) {
219 uint16_t *p = (void *)sve + TARGET_SVE_SIG_PREG_OFFSET(vq, i);
220 for (j = 0; j < vq; ++j) {
221 uint64_t r = env->vfp.pregs[i].p[j >> 2];
222 __put_user_e(r >> ((j & 3) * 16), p + j, le);
227 static void target_setup_za_record(struct target_za_context *za,
228 CPUARMState *env, int size)
230 int vq = sme_vq(env);
231 int vl = vq * TARGET_SVE_VQ_BYTES;
232 int i, j;
234 memset(za, 0, sizeof(*za));
235 __put_user(TARGET_ZA_MAGIC, &za->head.magic);
236 __put_user(size, &za->head.size);
237 __put_user(vl, &za->vl);
239 if (size == TARGET_ZA_SIG_CONTEXT_SIZE(0)) {
240 return;
242 assert(size == TARGET_ZA_SIG_CONTEXT_SIZE(vq));
245 * Note that ZA vectors are stored as a byte stream,
246 * with each byte element at a subsequent address.
248 for (i = 0; i < vl; ++i) {
249 uint64_t *z = (void *)za + TARGET_ZA_SIG_ZAV_OFFSET(vq, i);
250 for (j = 0; j < vq * 2; ++j) {
251 __put_user_e(env->zarray[i].d[j], z + j, le);
256 static void target_restore_general_frame(CPUARMState *env,
257 struct target_rt_sigframe *sf)
259 sigset_t set;
260 uint64_t pstate;
261 int i;
263 target_to_host_sigset(&set, &sf->uc.tuc_sigmask);
264 set_sigmask(&set);
266 for (i = 0; i < 31; i++) {
267 __get_user(env->xregs[i], &sf->uc.tuc_mcontext.regs[i]);
270 __get_user(env->xregs[31], &sf->uc.tuc_mcontext.sp);
271 __get_user(env->pc, &sf->uc.tuc_mcontext.pc);
272 __get_user(pstate, &sf->uc.tuc_mcontext.pstate);
273 pstate_write(env, pstate);
276 static void target_restore_fpsimd_record(CPUARMState *env,
277 struct target_fpsimd_context *fpsimd)
279 uint32_t fpsr, fpcr;
280 int i;
282 __get_user(fpsr, &fpsimd->fpsr);
283 vfp_set_fpsr(env, fpsr);
284 __get_user(fpcr, &fpsimd->fpcr);
285 vfp_set_fpcr(env, fpcr);
287 for (i = 0; i < 32; i++) {
288 uint64_t *q = aa64_vfp_qreg(env, i);
289 #if TARGET_BIG_ENDIAN
290 __get_user(q[0], &fpsimd->vregs[i * 2 + 1]);
291 __get_user(q[1], &fpsimd->vregs[i * 2]);
292 #else
293 __get_user(q[0], &fpsimd->vregs[i * 2]);
294 __get_user(q[1], &fpsimd->vregs[i * 2 + 1]);
295 #endif
299 static bool target_restore_sve_record(CPUARMState *env,
300 struct target_sve_context *sve,
301 int size, int *svcr)
303 int i, j, vl, vq, flags;
304 bool sm;
306 __get_user(vl, &sve->vl);
307 __get_user(flags, &sve->flags);
309 sm = flags & TARGET_SVE_SIG_FLAG_SM;
311 /* The cpu must support Streaming or Non-streaming SVE. */
312 if (sm
313 ? !cpu_isar_feature(aa64_sme, env_archcpu(env))
314 : !cpu_isar_feature(aa64_sve, env_archcpu(env))) {
315 return false;
319 * Note that we cannot use sve_vq() because that depends on the
320 * current setting of PSTATE.SM, not the state to be restored.
322 vq = sve_vqm1_for_el_sm(env, 0, sm) + 1;
324 /* Reject mismatched VL. */
325 if (vl != vq * TARGET_SVE_VQ_BYTES) {
326 return false;
329 /* Accept empty record -- used to clear PSTATE.SM. */
330 if (size <= sizeof(*sve)) {
331 return true;
334 /* Reject non-empty but incomplete record. */
335 if (size < TARGET_SVE_SIG_CONTEXT_SIZE(vq)) {
336 return false;
339 *svcr = FIELD_DP64(*svcr, SVCR, SM, sm);
342 * Note that SVE regs are stored as a byte stream, with each byte element
343 * at a subsequent address. This corresponds to a little-endian load
344 * of our 64-bit hunks.
346 for (i = 0; i < 32; ++i) {
347 uint64_t *z = (void *)sve + TARGET_SVE_SIG_ZREG_OFFSET(vq, i);
348 for (j = 0; j < vq * 2; ++j) {
349 __get_user_e(env->vfp.zregs[i].d[j], z + j, le);
352 for (i = 0; i <= 16; ++i) {
353 uint16_t *p = (void *)sve + TARGET_SVE_SIG_PREG_OFFSET(vq, i);
354 for (j = 0; j < vq; ++j) {
355 uint16_t r;
356 __get_user_e(r, p + j, le);
357 if (j & 3) {
358 env->vfp.pregs[i].p[j >> 2] |= (uint64_t)r << ((j & 3) * 16);
359 } else {
360 env->vfp.pregs[i].p[j >> 2] = r;
364 return true;
367 static bool target_restore_za_record(CPUARMState *env,
368 struct target_za_context *za,
369 int size, int *svcr)
371 int i, j, vl, vq;
373 if (!cpu_isar_feature(aa64_sme, env_archcpu(env))) {
374 return false;
377 __get_user(vl, &za->vl);
378 vq = sme_vq(env);
380 /* Reject mismatched VL. */
381 if (vl != vq * TARGET_SVE_VQ_BYTES) {
382 return false;
385 /* Accept empty record -- used to clear PSTATE.ZA. */
386 if (size <= TARGET_ZA_SIG_CONTEXT_SIZE(0)) {
387 return true;
390 /* Reject non-empty but incomplete record. */
391 if (size < TARGET_ZA_SIG_CONTEXT_SIZE(vq)) {
392 return false;
395 *svcr = FIELD_DP64(*svcr, SVCR, ZA, 1);
397 for (i = 0; i < vl; ++i) {
398 uint64_t *z = (void *)za + TARGET_ZA_SIG_ZAV_OFFSET(vq, i);
399 for (j = 0; j < vq * 2; ++j) {
400 __get_user_e(env->zarray[i].d[j], z + j, le);
403 return true;
406 static int target_restore_sigframe(CPUARMState *env,
407 struct target_rt_sigframe *sf)
409 struct target_aarch64_ctx *ctx, *extra = NULL;
410 struct target_fpsimd_context *fpsimd = NULL;
411 struct target_sve_context *sve = NULL;
412 struct target_za_context *za = NULL;
413 uint64_t extra_datap = 0;
414 bool used_extra = false;
415 int sve_size = 0;
416 int za_size = 0;
417 int svcr = 0;
419 target_restore_general_frame(env, sf);
421 ctx = (struct target_aarch64_ctx *)sf->uc.tuc_mcontext.__reserved;
422 while (ctx) {
423 uint32_t magic, size, extra_size;
425 __get_user(magic, &ctx->magic);
426 __get_user(size, &ctx->size);
427 switch (magic) {
428 case 0:
429 if (size != 0) {
430 goto err;
432 if (used_extra) {
433 ctx = NULL;
434 } else {
435 ctx = extra;
436 used_extra = true;
438 continue;
440 case TARGET_FPSIMD_MAGIC:
441 if (fpsimd || size != sizeof(struct target_fpsimd_context)) {
442 goto err;
444 fpsimd = (struct target_fpsimd_context *)ctx;
445 break;
447 case TARGET_SVE_MAGIC:
448 if (sve || size < sizeof(struct target_sve_context)) {
449 goto err;
451 sve = (struct target_sve_context *)ctx;
452 sve_size = size;
453 break;
455 case TARGET_ZA_MAGIC:
456 if (za || size < sizeof(struct target_za_context)) {
457 goto err;
459 za = (struct target_za_context *)ctx;
460 za_size = size;
461 break;
463 case TARGET_EXTRA_MAGIC:
464 if (extra || size != sizeof(struct target_extra_context)) {
465 goto err;
467 __get_user(extra_datap,
468 &((struct target_extra_context *)ctx)->datap);
469 __get_user(extra_size,
470 &((struct target_extra_context *)ctx)->size);
471 extra = lock_user(VERIFY_READ, extra_datap, extra_size, 0);
472 if (!extra) {
473 return 1;
475 break;
477 default:
478 /* Unknown record -- we certainly didn't generate it.
479 * Did we in fact get out of sync?
481 goto err;
483 ctx = (void *)ctx + size;
486 /* Require FPSIMD always. */
487 if (fpsimd) {
488 target_restore_fpsimd_record(env, fpsimd);
489 } else {
490 goto err;
493 /* SVE data, if present, overwrites FPSIMD data. */
494 if (sve && !target_restore_sve_record(env, sve, sve_size, &svcr)) {
495 goto err;
497 if (za && !target_restore_za_record(env, za, za_size, &svcr)) {
498 goto err;
500 if (env->svcr != svcr) {
501 env->svcr = svcr;
502 arm_rebuild_hflags(env);
504 unlock_user(extra, extra_datap, 0);
505 return 0;
507 err:
508 unlock_user(extra, extra_datap, 0);
509 return 1;
512 static abi_ulong get_sigframe(struct target_sigaction *ka,
513 CPUARMState *env, int size)
515 abi_ulong sp;
517 sp = target_sigsp(get_sp_from_cpustate(env), ka);
519 sp = (sp - size) & ~15;
521 return sp;
524 typedef struct {
525 int total_size;
526 int extra_base;
527 int extra_size;
528 int std_end_ofs;
529 int extra_ofs;
530 int extra_end_ofs;
531 } target_sigframe_layout;
533 static int alloc_sigframe_space(int this_size, target_sigframe_layout *l)
535 /* Make sure there will always be space for the end marker. */
536 const int std_size = sizeof(struct target_rt_sigframe)
537 - sizeof(struct target_aarch64_ctx);
538 int this_loc = l->total_size;
540 if (l->extra_base) {
541 /* Once we have begun an extra space, all allocations go there. */
542 l->extra_size += this_size;
543 } else if (this_size + this_loc > std_size) {
544 /* This allocation does not fit in the standard space. */
545 /* Allocate the extra record. */
546 l->extra_ofs = this_loc;
547 l->total_size += sizeof(struct target_extra_context);
549 /* Allocate the standard end record. */
550 l->std_end_ofs = l->total_size;
551 l->total_size += sizeof(struct target_aarch64_ctx);
553 /* Allocate the requested record. */
554 l->extra_base = this_loc = l->total_size;
555 l->extra_size = this_size;
557 l->total_size += this_size;
559 return this_loc;
562 static void target_setup_frame(int usig, struct target_sigaction *ka,
563 target_siginfo_t *info, target_sigset_t *set,
564 CPUARMState *env)
566 target_sigframe_layout layout = {
567 /* Begin with the size pointing to the reserved space. */
568 .total_size = offsetof(struct target_rt_sigframe,
569 uc.tuc_mcontext.__reserved),
571 int fpsimd_ofs, fr_ofs, sve_ofs = 0, za_ofs = 0;
572 int sve_size = 0, za_size = 0;
573 struct target_rt_sigframe *frame;
574 struct target_rt_frame_record *fr;
575 abi_ulong frame_addr, return_addr;
577 /* FPSIMD record is always in the standard space. */
578 fpsimd_ofs = alloc_sigframe_space(sizeof(struct target_fpsimd_context),
579 &layout);
581 /* SVE state needs saving only if it exists. */
582 if (cpu_isar_feature(aa64_sve, env_archcpu(env)) ||
583 cpu_isar_feature(aa64_sme, env_archcpu(env))) {
584 sve_size = QEMU_ALIGN_UP(TARGET_SVE_SIG_CONTEXT_SIZE(sve_vq(env)), 16);
585 sve_ofs = alloc_sigframe_space(sve_size, &layout);
587 if (cpu_isar_feature(aa64_sme, env_archcpu(env))) {
588 /* ZA state needs saving only if it is enabled. */
589 if (FIELD_EX64(env->svcr, SVCR, ZA)) {
590 za_size = TARGET_ZA_SIG_CONTEXT_SIZE(sme_vq(env));
591 } else {
592 za_size = TARGET_ZA_SIG_CONTEXT_SIZE(0);
594 za_ofs = alloc_sigframe_space(za_size, &layout);
597 if (layout.extra_ofs) {
598 /* Reserve space for the extra end marker. The standard end marker
599 * will have been allocated when we allocated the extra record.
601 layout.extra_end_ofs
602 = alloc_sigframe_space(sizeof(struct target_aarch64_ctx), &layout);
603 } else {
604 /* Reserve space for the standard end marker.
605 * Do not use alloc_sigframe_space because we cheat
606 * std_size therein to reserve space for this.
608 layout.std_end_ofs = layout.total_size;
609 layout.total_size += sizeof(struct target_aarch64_ctx);
612 /* We must always provide at least the standard 4K reserved space,
613 * even if we don't use all of it (this is part of the ABI)
615 layout.total_size = MAX(layout.total_size,
616 sizeof(struct target_rt_sigframe));
619 * Reserve space for the standard frame unwind pair: fp, lr.
620 * Despite the name this is not a "real" record within the frame.
622 fr_ofs = layout.total_size;
623 layout.total_size += sizeof(struct target_rt_frame_record);
625 frame_addr = get_sigframe(ka, env, layout.total_size);
626 trace_user_setup_frame(env, frame_addr);
627 frame = lock_user(VERIFY_WRITE, frame_addr, layout.total_size, 0);
628 if (!frame) {
629 goto give_sigsegv;
632 target_setup_general_frame(frame, env, set);
633 target_setup_fpsimd_record((void *)frame + fpsimd_ofs, env);
634 target_setup_end_record((void *)frame + layout.std_end_ofs);
635 if (layout.extra_ofs) {
636 target_setup_extra_record((void *)frame + layout.extra_ofs,
637 frame_addr + layout.extra_base,
638 layout.extra_size);
639 target_setup_end_record((void *)frame + layout.extra_end_ofs);
641 if (sve_ofs) {
642 target_setup_sve_record((void *)frame + sve_ofs, env, sve_size);
644 if (za_ofs) {
645 target_setup_za_record((void *)frame + za_ofs, env, za_size);
648 /* Set up the stack frame for unwinding. */
649 fr = (void *)frame + fr_ofs;
650 __put_user(env->xregs[29], &fr->fp);
651 __put_user(env->xregs[30], &fr->lr);
653 if (ka->sa_flags & TARGET_SA_RESTORER) {
654 return_addr = ka->sa_restorer;
655 } else {
656 return_addr = default_rt_sigreturn;
658 env->xregs[0] = usig;
659 env->xregs[29] = frame_addr + fr_ofs;
660 env->xregs[30] = return_addr;
661 env->xregs[31] = frame_addr;
662 env->pc = ka->_sa_handler;
664 /* Invoke the signal handler as if by indirect call. */
665 if (cpu_isar_feature(aa64_bti, env_archcpu(env))) {
666 env->btype = 2;
669 /* Invoke the signal handler with both SM and ZA disabled. */
670 aarch64_set_svcr(env, 0, R_SVCR_SM_MASK | R_SVCR_ZA_MASK);
672 if (info) {
673 tswap_siginfo(&frame->info, info);
674 env->xregs[1] = frame_addr + offsetof(struct target_rt_sigframe, info);
675 env->xregs[2] = frame_addr + offsetof(struct target_rt_sigframe, uc);
678 unlock_user(frame, frame_addr, layout.total_size);
679 return;
681 give_sigsegv:
682 unlock_user(frame, frame_addr, layout.total_size);
683 force_sigsegv(usig);
686 void setup_rt_frame(int sig, struct target_sigaction *ka,
687 target_siginfo_t *info, target_sigset_t *set,
688 CPUARMState *env)
690 target_setup_frame(sig, ka, info, set, env);
693 void setup_frame(int sig, struct target_sigaction *ka,
694 target_sigset_t *set, CPUARMState *env)
696 target_setup_frame(sig, ka, 0, set, env);
699 long do_rt_sigreturn(CPUARMState *env)
701 struct target_rt_sigframe *frame = NULL;
702 abi_ulong frame_addr = env->xregs[31];
704 trace_user_do_rt_sigreturn(env, frame_addr);
705 if (frame_addr & 15) {
706 goto badframe;
709 if (!lock_user_struct(VERIFY_READ, frame, frame_addr, 1)) {
710 goto badframe;
713 if (target_restore_sigframe(env, frame)) {
714 goto badframe;
717 target_restore_altstack(&frame->uc.tuc_stack, env);
719 unlock_user_struct(frame, frame_addr, 0);
720 return -QEMU_ESIGRETURN;
722 badframe:
723 unlock_user_struct(frame, frame_addr, 0);
724 force_sig(TARGET_SIGSEGV);
725 return -QEMU_ESIGRETURN;
728 long do_sigreturn(CPUARMState *env)
730 return do_rt_sigreturn(env);
733 void setup_sigtramp(abi_ulong sigtramp_page)
735 uint32_t *tramp = lock_user(VERIFY_WRITE, sigtramp_page, 8, 0);
736 assert(tramp != NULL);
739 * mov x8,#__NR_rt_sigreturn; svc #0
740 * Since these are instructions they need to be put as little-endian
741 * regardless of target default or current CPU endianness.
743 __put_user_e(0xd2801168, &tramp[0], le);
744 __put_user_e(0xd4000001, &tramp[1], le);
746 default_rt_sigreturn = sigtramp_page;
747 unlock_user(tramp, sigtramp_page, 8);