dis-asm.h

   1 /* Interface between the opcode library and its callers.
   2    Written by Cygnus Support, 1993.
   3
   4    The opcode library (libopcodes.a) provides instruction decoders for
   5    a large variety of instruction sets, callable with an identical
   6    interface, for making instruction-processing programs more independent
   7    of the instruction set being processed.  */
   8
   9 #ifndef DIS_ASM_H
  10 #define DIS_ASM_H
  11
  12 #include "qemu-common.h"
  13
  14 typedef void *PTR;
  15 typedef uint64_t bfd_vma;
  16 typedef int64_t bfd_signed_vma;
  17 typedef uint8_t bfd_byte;
  18 #define sprintf_vma(s,x) sprintf (s, "%0" PRIx64, x)
  19 #define snprintf_vma(s,ss,x) snprintf (s, ss, "%0" PRIx64, x)
  20
  21 #define BFD64
  22
  23 enum bfd_flavour {
  24   bfd_target_unknown_flavour,
  25   bfd_target_aout_flavour,
  26   bfd_target_coff_flavour,
  27   bfd_target_ecoff_flavour,
  28   bfd_target_elf_flavour,
  29   bfd_target_ieee_flavour,
  30   bfd_target_nlm_flavour,
  31   bfd_target_oasys_flavour,
  32   bfd_target_tekhex_flavour,
  33   bfd_target_srec_flavour,
  34   bfd_target_ihex_flavour,
  35   bfd_target_som_flavour,
  36   bfd_target_os9k_flavour,
  37   bfd_target_versados_flavour,
  38   bfd_target_msdos_flavour,
  39   bfd_target_evax_flavour
  40 };
  41
  42 enum bfd_endian { BFD_ENDIAN_BIG, BFD_ENDIAN_LITTLE, BFD_ENDIAN_UNKNOWN };
  43
  44 enum bfd_architecture
  45 {
  46   bfd_arch_unknown,    /* File arch not known */
  47   bfd_arch_obscure,    /* Arch known, not one of these */
  48   bfd_arch_m68k,       /* Motorola 68xxx */
  49 #define bfd_mach_m68000 1
  50 #define bfd_mach_m68008 2
  51 #define bfd_mach_m68010 3
  52 #define bfd_mach_m68020 4
  53 #define bfd_mach_m68030 5
  54 #define bfd_mach_m68040 6
  55 #define bfd_mach_m68060 7
  56 #define bfd_mach_cpu32  8
  57 #define bfd_mach_mcf5200  9
  58 #define bfd_mach_mcf5206e 10
  59 #define bfd_mach_mcf5307  11
  60 #define bfd_mach_mcf5407  12
  61 #define bfd_mach_mcf528x  13
  62 #define bfd_mach_mcfv4e   14
  63 #define bfd_mach_mcf521x   15
  64 #define bfd_mach_mcf5249   16
  65 #define bfd_mach_mcf547x   17
  66 #define bfd_mach_mcf548x   18
  67   bfd_arch_vax,        /* DEC Vax */
  68   bfd_arch_i960,       /* Intel 960 */
  69      /* The order of the following is important.
  70        lower number indicates a machine type that
  71        only accepts a subset of the instructions
  72        available to machines with higher numbers.
  73        The exception is the "ca", which is
  74        incompatible with all other machines except
  75        "core". */
  76
  77 #define bfd_mach_i960_core      1
  78 #define bfd_mach_i960_ka_sa     2
  79 #define bfd_mach_i960_kb_sb     3
  80 #define bfd_mach_i960_mc        4
  81 #define bfd_mach_i960_xa        5
  82 #define bfd_mach_i960_ca        6
  83 #define bfd_mach_i960_jx        7
  84 #define bfd_mach_i960_hx        8
  85
  86   bfd_arch_a29k,       /* AMD 29000 */
  87   bfd_arch_sparc,      /* SPARC */
  88 #define bfd_mach_sparc                 1
  89 /* The difference between v8plus and v9 is that v9 is a true 64 bit env.  */
  90 #define bfd_mach_sparc_sparclet        2
  91 #define bfd_mach_sparc_sparclite       3
  92 #define bfd_mach_sparc_v8plus          4
  93 #define bfd_mach_sparc_v8plusa         5 /* with ultrasparc add'ns.  */
  94 #define bfd_mach_sparc_sparclite_le    6
  95 #define bfd_mach_sparc_v9              7
  96 #define bfd_mach_sparc_v9a             8 /* with ultrasparc add'ns.  */
  97 #define bfd_mach_sparc_v8plusb         9 /* with cheetah add'ns.  */
  98 #define bfd_mach_sparc_v9b             10 /* with cheetah add'ns.  */
  99 /* Nonzero if MACH has the v9 instruction set.  */
 100 #define bfd_mach_sparc_v9_p(mach) \
 101   ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9b \
 102    && (mach) != bfd_mach_sparc_sparclite_le)
 103   bfd_arch_mips,       /* MIPS Rxxxx */
 104 #define bfd_mach_mips3000              3000
 105 #define bfd_mach_mips3900              3900
 106 #define bfd_mach_mips4000              4000
 107 #define bfd_mach_mips4010              4010
 108 #define bfd_mach_mips4100              4100
 109 #define bfd_mach_mips4300              4300
 110 #define bfd_mach_mips4400              4400
 111 #define bfd_mach_mips4600              4600
 112 #define bfd_mach_mips4650              4650
 113 #define bfd_mach_mips5000              5000
 114 #define bfd_mach_mips6000              6000
 115 #define bfd_mach_mips8000              8000
 116 #define bfd_mach_mips10000             10000
 117 #define bfd_mach_mips16                16
 118   bfd_arch_i386,       /* Intel 386 */
 119 #define bfd_mach_i386_i386 0
 120 #define bfd_mach_i386_i8086 1
 121 #define bfd_mach_i386_i386_intel_syntax 2
 122 #define bfd_mach_x86_64 3
 123 #define bfd_mach_x86_64_intel_syntax 4
 124   bfd_arch_we32k,      /* AT&T WE32xxx */
 125   bfd_arch_tahoe,      /* CCI/Harris Tahoe */
 126   bfd_arch_i860,       /* Intel 860 */
 127   bfd_arch_romp,       /* IBM ROMP PC/RT */
 128   bfd_arch_alliant,    /* Alliant */
 129   bfd_arch_convex,     /* Convex */
 130   bfd_arch_m88k,       /* Motorola 88xxx */
 131   bfd_arch_pyramid,    /* Pyramid Technology */
 132   bfd_arch_h8300,      /* Hitachi H8/300 */
 133 #define bfd_mach_h8300   1
 134 #define bfd_mach_h8300h  2
 135 #define bfd_mach_h8300s  3
 136   bfd_arch_powerpc,    /* PowerPC */
 137 #define bfd_mach_ppc           0
 138 #define bfd_mach_ppc64         1
 139 #define bfd_mach_ppc_403       403
 140 #define bfd_mach_ppc_403gc     4030
 141 #define bfd_mach_ppc_e500      500
 142 #define bfd_mach_ppc_505       505
 143 #define bfd_mach_ppc_601       601
 144 #define bfd_mach_ppc_602       602
 145 #define bfd_mach_ppc_603       603
 146 #define bfd_mach_ppc_ec603e    6031
 147 #define bfd_mach_ppc_604       604
 148 #define bfd_mach_ppc_620       620
 149 #define bfd_mach_ppc_630       630
 150 #define bfd_mach_ppc_750       750
 151 #define bfd_mach_ppc_860       860
 152 #define bfd_mach_ppc_a35       35
 153 #define bfd_mach_ppc_rs64ii    642
 154 #define bfd_mach_ppc_rs64iii   643
 155 #define bfd_mach_ppc_7400      7400
 156   bfd_arch_rs6000,     /* IBM RS/6000 */
 157   bfd_arch_hppa,       /* HP PA RISC */
 158 #define bfd_mach_hppa10        10
 159 #define bfd_mach_hppa11        11
 160 #define bfd_mach_hppa20        20
 161 #define bfd_mach_hppa20w       25
 162   bfd_arch_d10v,       /* Mitsubishi D10V */
 163   bfd_arch_z8k,        /* Zilog Z8000 */
 164 #define bfd_mach_z8001         1
 165 #define bfd_mach_z8002         2
 166   bfd_arch_h8500,      /* Hitachi H8/500 */
 167   bfd_arch_sh,         /* Hitachi SH */
 168 #define bfd_mach_sh            1
 169 #define bfd_mach_sh2        0x20
 170 #define bfd_mach_sh_dsp     0x2d
 171 #define bfd_mach_sh2a       0x2a
 172 #define bfd_mach_sh2a_nofpu 0x2b
 173 #define bfd_mach_sh2e       0x2e
 174 #define bfd_mach_sh3        0x30
 175 #define bfd_mach_sh3_nommu  0x31
 176 #define bfd_mach_sh3_dsp    0x3d
 177 #define bfd_mach_sh3e       0x3e
 178 #define bfd_mach_sh4        0x40
 179 #define bfd_mach_sh4_nofpu  0x41
 180 #define bfd_mach_sh4_nommu_nofpu  0x42
 181 #define bfd_mach_sh4a       0x4a
 182 #define bfd_mach_sh4a_nofpu 0x4b
 183 #define bfd_mach_sh4al_dsp  0x4d
 184 #define bfd_mach_sh5        0x50
 185   bfd_arch_alpha,      /* Dec Alpha */
 186 #define bfd_mach_alpha 1
 187 #define bfd_mach_alpha_ev4  0x10
 188 #define bfd_mach_alpha_ev5  0x20
 189 #define bfd_mach_alpha_ev6  0x30
 190   bfd_arch_arm,        /* Advanced Risc Machines ARM */
 191 #define bfd_mach_arm_unknown    0
 192 #define bfd_mach_arm_2          1
 193 #define bfd_mach_arm_2a         2
 194 #define bfd_mach_arm_3          3
 195 #define bfd_mach_arm_3M         4
 196 #define bfd_mach_arm_4          5
 197 #define bfd_mach_arm_4T         6
 198 #define bfd_mach_arm_5          7
 199 #define bfd_mach_arm_5T         8
 200 #define bfd_mach_arm_5TE        9
 201 #define bfd_mach_arm_XScale     10
 202 #define bfd_mach_arm_ep9312     11
 203 #define bfd_mach_arm_iWMMXt     12
 204 #define bfd_mach_arm_iWMMXt2    13
 205   bfd_arch_ns32k,      /* National Semiconductors ns32000 */
 206   bfd_arch_w65,        /* WDC 65816 */
 207   bfd_arch_tic30,      /* Texas Instruments TMS320C30 */
 208   bfd_arch_v850,       /* NEC V850 */
 209 #define bfd_mach_v850          0
 210   bfd_arch_arc,        /* Argonaut RISC Core */
 211 #define bfd_mach_arc_base 0
 212   bfd_arch_m32r,       /* Mitsubishi M32R/D */
 213 #define bfd_mach_m32r          0  /* backwards compatibility */
 214   bfd_arch_mn10200,    /* Matsushita MN10200 */
 215   bfd_arch_mn10300,    /* Matsushita MN10300 */
 216   bfd_arch_cris,       /* Axis CRIS */
 217 #define bfd_mach_cris_v0_v10   255
 218 #define bfd_mach_cris_v32      32
 219 #define bfd_mach_cris_v10_v32  1032
 220   bfd_arch_microblaze, /* Xilinx MicroBlaze.  */
 221   bfd_arch_ia64,      /* HP/Intel ia64 */
 222 #define bfd_mach_ia64_elf64    64
 223 #define bfd_mach_ia64_elf32    32
 224   bfd_arch_last
 225   };
 226 #define bfd_mach_s390_31 31
 227 #define bfd_mach_s390_64 64
 228
 229 typedef struct symbol_cache_entry
 230 {
 231     const char *name;
 232     union
 233     {
 234         PTR p;
 235         bfd_vma i;
 236     } udata;
 237 } asymbol;
 238
 239 enum dis_insn_type {
 240   dis_noninsn,                  /* Not a valid instruction */
 241   dis_nonbranch,                /* Not a branch instruction */
 242   dis_branch,                   /* Unconditional branch */
 243   dis_condbranch,               /* Conditional branch */
 244   dis_jsr,                      /* Jump to subroutine */
 245   dis_condjsr,                  /* Conditional jump to subroutine */
 246   dis_dref,                     /* Data reference instruction */
 247   dis_dref2                     /* Two data references in instruction */
 248 };
 249
 250 /* This struct is passed into the instruction decoding routine,
 251    and is passed back out into each callback.  The various fields are used
 252    for conveying information from your main routine into your callbacks,
 253    for passing information into the instruction decoders (such as the
 254    addresses of the callback functions), or for passing information
 255    back from the instruction decoders to their callers.
 256
 257    It must be initialized before it is first passed; this can be done
 258    by hand, or using one of the initialization macros below.  */
 259
 260 typedef struct disassemble_info {
 261   fprintf_function fprintf_func;
 262   FILE *stream;
 263   PTR application_data;
 264
 265   /* Target description.  We could replace this with a pointer to the bfd,
 266      but that would require one.  There currently isn't any such requirement
 267      so to avoid introducing one we record these explicitly.  */
 268   /* The bfd_flavour.  This can be bfd_target_unknown_flavour.  */
 269   enum bfd_flavour flavour;
 270   /* The bfd_arch value.  */
 271   enum bfd_architecture arch;
 272   /* The bfd_mach value.  */
 273   unsigned long mach;
 274   /* Endianness (for bi-endian cpus).  Mono-endian cpus can ignore this.  */
 275   enum bfd_endian endian;
 276
 277   /* An array of pointers to symbols either at the location being disassembled
 278      or at the start of the function being disassembled.  The array is sorted
 279      so that the first symbol is intended to be the one used.  The others are
 280      present for any misc. purposes.  This is not set reliably, but if it is
 281      not NULL, it is correct.  */
 282   asymbol **symbols;
 283   /* Number of symbols in array.  */
 284   int num_symbols;
 285
 286   /* For use by the disassembler.
 287      The top 16 bits are reserved for public use (and are documented here).
 288      The bottom 16 bits are for the internal use of the disassembler.  */
 289   unsigned long flags;
 290 #define INSN_HAS_RELOC  0x80000000
 291   PTR private_data;
 292
 293   /* Function used to get bytes to disassemble.  MEMADDR is the
 294      address of the stuff to be disassembled, MYADDR is the address to
 295      put the bytes in, and LENGTH is the number of bytes to read.
 296      INFO is a pointer to this struct.
 297      Returns an errno value or 0 for success.  */
 298   int (*read_memory_func)
 299     (bfd_vma memaddr, bfd_byte *myaddr, int length,
 300              struct disassemble_info *info);
 301
 302   /* Function which should be called if we get an error that we can't
 303      recover from.  STATUS is the errno value from read_memory_func and
 304      MEMADDR is the address that we were trying to read.  INFO is a
 305      pointer to this struct.  */
 306   void (*memory_error_func)
 307     (int status, bfd_vma memaddr, struct disassemble_info *info);
 308
 309   /* Function called to print ADDR.  */
 310   void (*print_address_func)
 311     (bfd_vma addr, struct disassemble_info *info);
 312
 313   /* Function called to determine if there is a symbol at the given ADDR.
 314      If there is, the function returns 1, otherwise it returns 0.
 315      This is used by ports which support an overlay manager where
 316      the overlay number is held in the top part of an address.  In
 317      some circumstances we want to include the overlay number in the
 318      address, (normally because there is a symbol associated with
 319      that address), but sometimes we want to mask out the overlay bits.  */
 320   int (* symbol_at_address_func)
 321     (bfd_vma addr, struct disassemble_info * info);
 322
 323   /* These are for buffer_read_memory.  */
 324   bfd_byte *buffer;
 325   bfd_vma buffer_vma;
 326   int buffer_length;
 327
 328   /* This variable may be set by the instruction decoder.  It suggests
 329       the number of bytes objdump should display on a single line.  If
 330       the instruction decoder sets this, it should always set it to
 331       the same value in order to get reasonable looking output.  */
 332   int bytes_per_line;
 333
 334   /* the next two variables control the way objdump displays the raw data */
 335   /* For example, if bytes_per_line is 8 and bytes_per_chunk is 4, the */
 336   /* output will look like this:
 337      00:   00000000 00000000
 338      with the chunks displayed according to "display_endian". */
 339   int bytes_per_chunk;
 340   enum bfd_endian display_endian;
 341
 342   /* Results from instruction decoders.  Not all decoders yet support
 343      this information.  This info is set each time an instruction is
 344      decoded, and is only valid for the last such instruction.
 345
 346      To determine whether this decoder supports this information, set
 347      insn_info_valid to 0, decode an instruction, then check it.  */
 348
 349   char insn_info_valid;         /* Branch info has been set. */
 350   char branch_delay_insns;      /* How many sequential insn's will run before
 351                                    a branch takes effect.  (0 = normal) */
 352   char data_size;               /* Size of data reference in insn, in bytes */
 353   enum dis_insn_type insn_type; /* Type of instruction */
 354   bfd_vma target;               /* Target address of branch or dref, if known;
 355                                    zero if unknown.  */
 356   bfd_vma target2;              /* Second target address for dref2 */
 357
 358   /* Command line options specific to the target disassembler.  */
 359   char * disassembler_options;
 360
 361 } disassemble_info;
 362
 363 \f
 364 /* Standard disassemblers.  Disassemble one instruction at the given
 365    target address.  Return number of bytes processed.  */
 366 typedef int (*disassembler_ftype) (bfd_vma, disassemble_info *);
 367
 368 int print_insn_big_mips         (bfd_vma, disassemble_info*);
 369 int print_insn_little_mips      (bfd_vma, disassemble_info*);
 370 int print_insn_i386             (bfd_vma, disassemble_info*);
 371 int print_insn_m68k             (bfd_vma, disassemble_info*);
 372 int print_insn_z8001            (bfd_vma, disassemble_info*);
 373 int print_insn_z8002            (bfd_vma, disassemble_info*);
 374 int print_insn_h8300            (bfd_vma, disassemble_info*);
 375 int print_insn_h8300h           (bfd_vma, disassemble_info*);
 376 int print_insn_h8300s           (bfd_vma, disassemble_info*);
 377 int print_insn_h8500            (bfd_vma, disassemble_info*);
 378 int print_insn_alpha            (bfd_vma, disassemble_info*);
 379 disassembler_ftype arc_get_disassembler (int, int);
 380 int print_insn_arm              (bfd_vma, disassemble_info*);
 381 int print_insn_sparc            (bfd_vma, disassemble_info*);
 382 int print_insn_big_a29k         (bfd_vma, disassemble_info*);
 383 int print_insn_little_a29k      (bfd_vma, disassemble_info*);
 384 int print_insn_i960             (bfd_vma, disassemble_info*);
 385 int print_insn_sh               (bfd_vma, disassemble_info*);
 386 int print_insn_shl              (bfd_vma, disassemble_info*);
 387 int print_insn_hppa             (bfd_vma, disassemble_info*);
 388 int print_insn_m32r             (bfd_vma, disassemble_info*);
 389 int print_insn_m88k             (bfd_vma, disassemble_info*);
 390 int print_insn_mn10200          (bfd_vma, disassemble_info*);
 391 int print_insn_mn10300          (bfd_vma, disassemble_info*);
 392 int print_insn_ns32k            (bfd_vma, disassemble_info*);
 393 int print_insn_big_powerpc      (bfd_vma, disassemble_info*);
 394 int print_insn_little_powerpc   (bfd_vma, disassemble_info*);
 395 int print_insn_rs6000           (bfd_vma, disassemble_info*);
 396 int print_insn_w65              (bfd_vma, disassemble_info*);
 397 int print_insn_d10v             (bfd_vma, disassemble_info*);
 398 int print_insn_v850             (bfd_vma, disassemble_info*);
 399 int print_insn_tic30            (bfd_vma, disassemble_info*);
 400 int print_insn_ppc              (bfd_vma, disassemble_info*);
 401 int print_insn_s390             (bfd_vma, disassemble_info*);
 402 int print_insn_crisv32          (bfd_vma, disassemble_info*);
 403 int print_insn_crisv10          (bfd_vma, disassemble_info*);
 404 int print_insn_microblaze       (bfd_vma, disassemble_info*);
 405 int print_insn_ia64             (bfd_vma, disassemble_info*);
 406
 407 #if 0
 408 /* Fetch the disassembler for a given BFD, if that support is available.  */
 409 disassembler_ftype disassembler(bfd *);
 410 #endif
 411
 412 \f
 413 /* This block of definitions is for particular callers who read instructions
 414    into a buffer before calling the instruction decoder.  */
 415
 416 /* Here is a function which callers may wish to use for read_memory_func.
 417    It gets bytes from a buffer.  */
 418 int buffer_read_memory(bfd_vma, bfd_byte *, int, struct disassemble_info *);
 419
 420 /* This function goes with buffer_read_memory.
 421    It prints a message using info->fprintf_func and info->stream.  */
 422 void perror_memory(int, bfd_vma, struct disassemble_info *);
 423
 424
 425 /* Just print the address in hex.  This is included for completeness even
 426    though both GDB and objdump provide their own (to print symbolic
 427    addresses).  */
 428 void generic_print_address(bfd_vma, struct disassemble_info *);
 429
 430 /* Always true.  */
 431 int generic_symbol_at_address(bfd_vma, struct disassemble_info *);
 432
 433 /* Macro to initialize a disassemble_info struct.  This should be called
 434    by all applications creating such a struct.  */
 435 #define INIT_DISASSEMBLE_INFO(INFO, STREAM, FPRINTF_FUNC) \
 436   (INFO).flavour = bfd_target_unknown_flavour, \
 437   (INFO).arch = bfd_arch_unknown, \
 438   (INFO).mach = 0, \
 439   (INFO).endian = BFD_ENDIAN_UNKNOWN, \
 440   INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC)
 441
 442 /* Call this macro to initialize only the internal variables for the
 443    disassembler.  Architecture dependent things such as byte order, or machine
 444    variant are not touched by this macro.  This makes things much easier for
 445    GDB which must initialize these things separately.  */
 446
 447 #define INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC) \
 448   (INFO).fprintf_func = (FPRINTF_FUNC), \
 449   (INFO).stream = (STREAM), \
 450   (INFO).symbols = NULL, \
 451   (INFO).num_symbols = 0, \
 452   (INFO).private_data = NULL, \
 453   (INFO).buffer = NULL, \
 454   (INFO).buffer_vma = 0, \
 455   (INFO).buffer_length = 0, \
 456   (INFO).read_memory_func = buffer_read_memory, \
 457   (INFO).memory_error_func = perror_memory, \
 458   (INFO).print_address_func = generic_print_address, \
 459   (INFO).symbol_at_address_func = generic_symbol_at_address, \
 460   (INFO).flags = 0, \
 461   (INFO).bytes_per_line = 0, \
 462   (INFO).bytes_per_chunk = 0, \
 463   (INFO).display_endian = BFD_ENDIAN_UNKNOWN, \
 464   (INFO).disassembler_options = NULL, \
 465   (INFO).insn_info_valid = 0
 466
 467 #define _(x) x
 468 #define ATTRIBUTE_UNUSED __attribute__((unused))
 469
 470 /* from libbfd */
 471
 472 bfd_vma bfd_getl64 (const bfd_byte *addr);
 473 bfd_vma bfd_getl32 (const bfd_byte *addr);
 474 bfd_vma bfd_getb32 (const bfd_byte *addr);
 475 bfd_vma bfd_getl16 (const bfd_byte *addr);
 476 bfd_vma bfd_getb16 (const bfd_byte *addr);
 477 typedef bool bfd_boolean;
 478
 479 #endif /* ! defined (DIS_ASM_H) */