tcg/tcg.h

   1 /*
   2  * Tiny Code Generator for QEMU
   3  *
   4  * Copyright (c) 2008 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #ifndef TCG_H
  26 #define TCG_H
  27
  28 #include "qemu-common.h"
  29 #include "qemu/bitops.h"
  30 #include "tcg-target.h"
  31
  32 /* Default target word size to pointer size.  */
  33 #ifndef TCG_TARGET_REG_BITS
  34 # if UINTPTR_MAX == UINT32_MAX
  35 #  define TCG_TARGET_REG_BITS 32
  36 # elif UINTPTR_MAX == UINT64_MAX
  37 #  define TCG_TARGET_REG_BITS 64
  38 # else
  39 #  error Unknown pointer size for tcg target
  40 # endif
  41 #endif
  42
  43 #if TCG_TARGET_REG_BITS == 32
  44 typedef int32_t tcg_target_long;
  45 typedef uint32_t tcg_target_ulong;
  46 #define TCG_PRIlx PRIx32
  47 #define TCG_PRIld PRId32
  48 #elif TCG_TARGET_REG_BITS == 64
  49 typedef int64_t tcg_target_long;
  50 typedef uint64_t tcg_target_ulong;
  51 #define TCG_PRIlx PRIx64
  52 #define TCG_PRIld PRId64
  53 #else
  54 #error unsupported
  55 #endif
  56
  57 #include "tcg-runtime.h"
  58
  59 #if TCG_TARGET_NB_REGS <= 32
  60 typedef uint32_t TCGRegSet;
  61 #elif TCG_TARGET_NB_REGS <= 64
  62 typedef uint64_t TCGRegSet;
  63 #else
  64 #error unsupported
  65 #endif
  66
  67 #if TCG_TARGET_REG_BITS == 32
  68 /* Turn some undef macros into false macros.  */
  69 #define TCG_TARGET_HAS_div_i64          0
  70 #define TCG_TARGET_HAS_rem_i64          0
  71 #define TCG_TARGET_HAS_div2_i64         0
  72 #define TCG_TARGET_HAS_rot_i64          0
  73 #define TCG_TARGET_HAS_ext8s_i64        0
  74 #define TCG_TARGET_HAS_ext16s_i64       0
  75 #define TCG_TARGET_HAS_ext32s_i64       0
  76 #define TCG_TARGET_HAS_ext8u_i64        0
  77 #define TCG_TARGET_HAS_ext16u_i64       0
  78 #define TCG_TARGET_HAS_ext32u_i64       0
  79 #define TCG_TARGET_HAS_bswap16_i64      0
  80 #define TCG_TARGET_HAS_bswap32_i64      0
  81 #define TCG_TARGET_HAS_bswap64_i64      0
  82 #define TCG_TARGET_HAS_neg_i64          0
  83 #define TCG_TARGET_HAS_not_i64          0
  84 #define TCG_TARGET_HAS_andc_i64         0
  85 #define TCG_TARGET_HAS_orc_i64          0
  86 #define TCG_TARGET_HAS_eqv_i64          0
  87 #define TCG_TARGET_HAS_nand_i64         0
  88 #define TCG_TARGET_HAS_nor_i64          0
  89 #define TCG_TARGET_HAS_deposit_i64      0
  90 #define TCG_TARGET_HAS_movcond_i64      0
  91 #define TCG_TARGET_HAS_add2_i64         0
  92 #define TCG_TARGET_HAS_sub2_i64         0
  93 #define TCG_TARGET_HAS_mulu2_i64        0
  94 #define TCG_TARGET_HAS_muls2_i64        0
  95 #define TCG_TARGET_HAS_muluh_i64        0
  96 #define TCG_TARGET_HAS_mulsh_i64        0
  97 /* Turn some undef macros into true macros.  */
  98 #define TCG_TARGET_HAS_add2_i32         1
  99 #define TCG_TARGET_HAS_sub2_i32         1
 100 #endif
 101
 102 #ifndef TCG_TARGET_deposit_i32_valid
 103 #define TCG_TARGET_deposit_i32_valid(ofs, len) 1
 104 #endif
 105 #ifndef TCG_TARGET_deposit_i64_valid
 106 #define TCG_TARGET_deposit_i64_valid(ofs, len) 1
 107 #endif
 108
 109 /* Only one of DIV or DIV2 should be defined.  */
 110 #if defined(TCG_TARGET_HAS_div_i32)
 111 #define TCG_TARGET_HAS_div2_i32         0
 112 #elif defined(TCG_TARGET_HAS_div2_i32)
 113 #define TCG_TARGET_HAS_div_i32          0
 114 #define TCG_TARGET_HAS_rem_i32          0
 115 #endif
 116 #if defined(TCG_TARGET_HAS_div_i64)
 117 #define TCG_TARGET_HAS_div2_i64         0
 118 #elif defined(TCG_TARGET_HAS_div2_i64)
 119 #define TCG_TARGET_HAS_div_i64          0
 120 #define TCG_TARGET_HAS_rem_i64          0
 121 #endif
 122
 123 /* For 32-bit targets, some sort of unsigned widening multiply is required.  */
 124 #if TCG_TARGET_REG_BITS == 32 \
 125     && !(defined(TCG_TARGET_HAS_mulu2_i32) \
 126          || defined(TCG_TARGET_HAS_muluh_i32))
 127 # error "Missing unsigned widening multiply"
 128 #endif
 129
 130 typedef enum TCGOpcode {
 131 #define DEF(name, oargs, iargs, cargs, flags) INDEX_op_ ## name,
 132 #include "tcg-opc.h"
 133 #undef DEF
 134     NB_OPS,
 135 } TCGOpcode;
 136
 137 #define tcg_regset_clear(d) (d) = 0
 138 #define tcg_regset_set(d, s) (d) = (s)
 139 #define tcg_regset_set32(d, reg, val32) (d) |= (val32) << (reg)
 140 #define tcg_regset_set_reg(d, r) (d) |= 1L << (r)
 141 #define tcg_regset_reset_reg(d, r) (d) &= ~(1L << (r))
 142 #define tcg_regset_test_reg(d, r) (((d) >> (r)) & 1)
 143 #define tcg_regset_or(d, a, b) (d) = (a) | (b)
 144 #define tcg_regset_and(d, a, b) (d) = (a) & (b)
 145 #define tcg_regset_andnot(d, a, b) (d) = (a) & ~(b)
 146 #define tcg_regset_not(d, a) (d) = ~(a)
 147
 148 typedef struct TCGRelocation {
 149     struct TCGRelocation *next;
 150     int type;
 151     uint8_t *ptr;
 152     intptr_t addend;
 153 } TCGRelocation;
 154
 155 typedef struct TCGLabel {
 156     int has_value;
 157     union {
 158         uintptr_t value;
 159         TCGRelocation *first_reloc;
 160     } u;
 161 } TCGLabel;
 162
 163 typedef struct TCGPool {
 164     struct TCGPool *next;
 165     int size;
 166     uint8_t data[0] __attribute__ ((aligned));
 167 } TCGPool;
 168
 169 #define TCG_POOL_CHUNK_SIZE 32768
 170
 171 #define TCG_MAX_LABELS 512
 172
 173 #define TCG_MAX_TEMPS 512
 174
 175 /* when the size of the arguments of a called function is smaller than
 176    this value, they are statically allocated in the TB stack frame */
 177 #define TCG_STATIC_CALL_ARGS_SIZE 128
 178
 179 typedef enum TCGType {
 180     TCG_TYPE_I32,
 181     TCG_TYPE_I64,
 182     TCG_TYPE_COUNT, /* number of different types */
 183
 184     /* An alias for the size of the host register.  */
 185 #if TCG_TARGET_REG_BITS == 32
 186     TCG_TYPE_REG = TCG_TYPE_I32,
 187 #else
 188     TCG_TYPE_REG = TCG_TYPE_I64,
 189 #endif
 190
 191     /* An alias for the size of the native pointer.  */
 192 #if UINTPTR_MAX == UINT32_MAX
 193     TCG_TYPE_PTR = TCG_TYPE_I32,
 194 #else
 195     TCG_TYPE_PTR = TCG_TYPE_I64,
 196 #endif
 197
 198     /* An alias for the size of the target "long", aka register.  */
 199 #if TARGET_LONG_BITS == 64
 200     TCG_TYPE_TL = TCG_TYPE_I64,
 201 #else
 202     TCG_TYPE_TL = TCG_TYPE_I32,
 203 #endif
 204 } TCGType;
 205
 206 /* Constants for qemu_ld and qemu_st for the Memory Operation field.  */
 207 typedef enum TCGMemOp {
 208     MO_8     = 0,
 209     MO_16    = 1,
 210     MO_32    = 2,
 211     MO_64    = 3,
 212     MO_SIZE  = 3,   /* Mask for the above.  */
 213
 214     MO_SIGN  = 4,   /* Sign-extended, otherwise zero-extended.  */
 215
 216     MO_BSWAP = 8,   /* Host reverse endian.  */
 217 #ifdef HOST_WORDS_BIGENDIAN
 218     MO_LE    = MO_BSWAP,
 219     MO_BE    = 0,
 220 #else
 221     MO_LE    = 0,
 222     MO_BE    = MO_BSWAP,
 223 #endif
 224 #ifdef TARGET_WORDS_BIGENDIAN
 225     MO_TE    = MO_BE,
 226 #else
 227     MO_TE    = MO_LE,
 228 #endif
 229
 230     /* Combinations of the above, for ease of use.  */
 231     MO_UB    = MO_8,
 232     MO_UW    = MO_16,
 233     MO_UL    = MO_32,
 234     MO_SB    = MO_SIGN | MO_8,
 235     MO_SW    = MO_SIGN | MO_16,
 236     MO_SL    = MO_SIGN | MO_32,
 237     MO_Q     = MO_64,
 238
 239     MO_LEUW  = MO_LE | MO_UW,
 240     MO_LEUL  = MO_LE | MO_UL,
 241     MO_LESW  = MO_LE | MO_SW,
 242     MO_LESL  = MO_LE | MO_SL,
 243     MO_LEQ   = MO_LE | MO_Q,
 244
 245     MO_BEUW  = MO_BE | MO_UW,
 246     MO_BEUL  = MO_BE | MO_UL,
 247     MO_BESW  = MO_BE | MO_SW,
 248     MO_BESL  = MO_BE | MO_SL,
 249     MO_BEQ   = MO_BE | MO_Q,
 250
 251     MO_TEUW  = MO_TE | MO_UW,
 252     MO_TEUL  = MO_TE | MO_UL,
 253     MO_TESW  = MO_TE | MO_SW,
 254     MO_TESL  = MO_TE | MO_SL,
 255     MO_TEQ   = MO_TE | MO_Q,
 256
 257     MO_SSIZE = MO_SIZE | MO_SIGN,
 258 } TCGMemOp;
 259
 260 typedef tcg_target_ulong TCGArg;
 261
 262 /* Define a type and accessor macros for variables.  Using a struct is
 263    nice because it gives some level of type safely.  Ideally the compiler
 264    be able to see through all this.  However in practice this is not true,
 265    especially on targets with braindamaged ABIs (e.g. i386).
 266    We use plain int by default to avoid this runtime overhead.
 267    Users of tcg_gen_* don't need to know about any of this, and should
 268    treat TCGv as an opaque type.
 269    In addition we do typechecking for different types of variables.  TCGv_i32
 270    and TCGv_i64 are 32/64-bit variables respectively.  TCGv and TCGv_ptr
 271    are aliases for target_ulong and host pointer sized values respectively.
 272  */
 273
 274 #ifdef CONFIG_DEBUG_TCG
 275 #define DEBUG_TCGV 1
 276 #endif
 277
 278 #ifdef DEBUG_TCGV
 279
 280 typedef struct
 281 {
 282     int i32;
 283 } TCGv_i32;
 284
 285 typedef struct
 286 {
 287     int i64;
 288 } TCGv_i64;
 289
 290 typedef struct {
 291     int iptr;
 292 } TCGv_ptr;
 293
 294 #define MAKE_TCGV_I32(i) __extension__                  \
 295     ({ TCGv_i32 make_tcgv_tmp = {i}; make_tcgv_tmp;})
 296 #define MAKE_TCGV_I64(i) __extension__                  \
 297     ({ TCGv_i64 make_tcgv_tmp = {i}; make_tcgv_tmp;})
 298 #define MAKE_TCGV_PTR(i) __extension__                  \
 299     ({ TCGv_ptr make_tcgv_tmp = {i}; make_tcgv_tmp; })
 300 #define GET_TCGV_I32(t) ((t).i32)
 301 #define GET_TCGV_I64(t) ((t).i64)
 302 #define GET_TCGV_PTR(t) ((t).iptr)
 303 #if TCG_TARGET_REG_BITS == 32
 304 #define TCGV_LOW(t) MAKE_TCGV_I32(GET_TCGV_I64(t))
 305 #define TCGV_HIGH(t) MAKE_TCGV_I32(GET_TCGV_I64(t) + 1)
 306 #endif
 307
 308 #else /* !DEBUG_TCGV */
 309
 310 typedef int TCGv_i32;
 311 typedef int TCGv_i64;
 312 #if TCG_TARGET_REG_BITS == 32
 313 #define TCGv_ptr TCGv_i32
 314 #else
 315 #define TCGv_ptr TCGv_i64
 316 #endif
 317 #define MAKE_TCGV_I32(x) (x)
 318 #define MAKE_TCGV_I64(x) (x)
 319 #define MAKE_TCGV_PTR(x) (x)
 320 #define GET_TCGV_I32(t) (t)
 321 #define GET_TCGV_I64(t) (t)
 322 #define GET_TCGV_PTR(t) (t)
 323
 324 #if TCG_TARGET_REG_BITS == 32
 325 #define TCGV_LOW(t) (t)
 326 #define TCGV_HIGH(t) ((t) + 1)
 327 #endif
 328
 329 #endif /* DEBUG_TCGV */
 330
 331 #define TCGV_EQUAL_I32(a, b) (GET_TCGV_I32(a) == GET_TCGV_I32(b))
 332 #define TCGV_EQUAL_I64(a, b) (GET_TCGV_I64(a) == GET_TCGV_I64(b))
 333 #define TCGV_EQUAL_PTR(a, b) (GET_TCGV_PTR(a) == GET_TCGV_PTR(b))
 334
 335 /* Dummy definition to avoid compiler warnings.  */
 336 #define TCGV_UNUSED_I32(x) x = MAKE_TCGV_I32(-1)
 337 #define TCGV_UNUSED_I64(x) x = MAKE_TCGV_I64(-1)
 338 #define TCGV_UNUSED_PTR(x) x = MAKE_TCGV_PTR(-1)
 339
 340 #define TCGV_IS_UNUSED_I32(x) (GET_TCGV_I32(x) == -1)
 341 #define TCGV_IS_UNUSED_I64(x) (GET_TCGV_I64(x) == -1)
 342 #define TCGV_IS_UNUSED_PTR(x) (GET_TCGV_PTR(x) == -1)
 343
 344 /* call flags */
 345 /* Helper does not read globals (either directly or through an exception). It
 346    implies TCG_CALL_NO_WRITE_GLOBALS. */
 347 #define TCG_CALL_NO_READ_GLOBALS    0x0010
 348 /* Helper does not write globals */
 349 #define TCG_CALL_NO_WRITE_GLOBALS   0x0020
 350 /* Helper can be safely suppressed if the return value is not used. */
 351 #define TCG_CALL_NO_SIDE_EFFECTS    0x0040
 352
 353 /* convenience version of most used call flags */
 354 #define TCG_CALL_NO_RWG         TCG_CALL_NO_READ_GLOBALS
 355 #define TCG_CALL_NO_WG          TCG_CALL_NO_WRITE_GLOBALS
 356 #define TCG_CALL_NO_SE          TCG_CALL_NO_SIDE_EFFECTS
 357 #define TCG_CALL_NO_RWG_SE      (TCG_CALL_NO_RWG | TCG_CALL_NO_SE)
 358 #define TCG_CALL_NO_WG_SE       (TCG_CALL_NO_WG | TCG_CALL_NO_SE)
 359
 360 /* used to align parameters */
 361 #define TCG_CALL_DUMMY_TCGV     MAKE_TCGV_I32(-1)
 362 #define TCG_CALL_DUMMY_ARG      ((TCGArg)(-1))
 363
 364 /* Conditions.  Note that these are laid out for easy manipulation by
 365    the functions below:
 366      bit 0 is used for inverting;
 367      bit 1 is signed,
 368      bit 2 is unsigned,
 369      bit 3 is used with bit 0 for swapping signed/unsigned.  */
 370 typedef enum {
 371     /* non-signed */
 372     TCG_COND_NEVER  = 0 | 0 | 0 | 0,
 373     TCG_COND_ALWAYS = 0 | 0 | 0 | 1,
 374     TCG_COND_EQ     = 8 | 0 | 0 | 0,
 375     TCG_COND_NE     = 8 | 0 | 0 | 1,
 376     /* signed */
 377     TCG_COND_LT     = 0 | 0 | 2 | 0,
 378     TCG_COND_GE     = 0 | 0 | 2 | 1,
 379     TCG_COND_LE     = 8 | 0 | 2 | 0,
 380     TCG_COND_GT     = 8 | 0 | 2 | 1,
 381     /* unsigned */
 382     TCG_COND_LTU    = 0 | 4 | 0 | 0,
 383     TCG_COND_GEU    = 0 | 4 | 0 | 1,
 384     TCG_COND_LEU    = 8 | 4 | 0 | 0,
 385     TCG_COND_GTU    = 8 | 4 | 0 | 1,
 386 } TCGCond;
 387
 388 /* Invert the sense of the comparison.  */
 389 static inline TCGCond tcg_invert_cond(TCGCond c)
 390 {
 391     return (TCGCond)(c ^ 1);
 392 }
 393
 394 /* Swap the operands in a comparison.  */
 395 static inline TCGCond tcg_swap_cond(TCGCond c)
 396 {
 397     return c & 6 ? (TCGCond)(c ^ 9) : c;
 398 }
 399
 400 /* Create an "unsigned" version of a "signed" comparison.  */
 401 static inline TCGCond tcg_unsigned_cond(TCGCond c)
 402 {
 403     return c & 2 ? (TCGCond)(c ^ 6) : c;
 404 }
 405
 406 /* Must a comparison be considered unsigned?  */
 407 static inline bool is_unsigned_cond(TCGCond c)
 408 {
 409     return (c & 4) != 0;
 410 }
 411
 412 /* Create a "high" version of a double-word comparison.
 413    This removes equality from a LTE or GTE comparison.  */
 414 static inline TCGCond tcg_high_cond(TCGCond c)
 415 {
 416     switch (c) {
 417     case TCG_COND_GE:
 418     case TCG_COND_LE:
 419     case TCG_COND_GEU:
 420     case TCG_COND_LEU:
 421         return (TCGCond)(c ^ 8);
 422     default:
 423         return c;
 424     }
 425 }
 426
 427 #define TEMP_VAL_DEAD  0
 428 #define TEMP_VAL_REG   1
 429 #define TEMP_VAL_MEM   2
 430 #define TEMP_VAL_CONST 3
 431
 432 /* XXX: optimize memory layout */
 433 typedef struct TCGTemp {
 434     TCGType base_type;
 435     TCGType type;
 436     int val_type;
 437     int reg;
 438     tcg_target_long val;
 439     int mem_reg;
 440     intptr_t mem_offset;
 441     unsigned int fixed_reg:1;
 442     unsigned int mem_coherent:1;
 443     unsigned int mem_allocated:1;
 444     unsigned int temp_local:1; /* If true, the temp is saved across
 445                                   basic blocks. Otherwise, it is not
 446                                   preserved across basic blocks. */
 447     unsigned int temp_allocated:1; /* never used for code gen */
 448     const char *name;
 449 } TCGTemp;
 450
 451 typedef struct TCGContext TCGContext;
 452
 453 typedef struct TCGTempSet {
 454     unsigned long l[BITS_TO_LONGS(TCG_MAX_TEMPS)];
 455 } TCGTempSet;
 456
 457 struct TCGContext {
 458     uint8_t *pool_cur, *pool_end;
 459     TCGPool *pool_first, *pool_current, *pool_first_large;
 460     TCGLabel *labels;
 461     int nb_labels;
 462     int nb_globals;
 463     int nb_temps;
 464
 465     /* goto_tb support */
 466     uint8_t *code_buf;
 467     uintptr_t *tb_next;
 468     uint16_t *tb_next_offset;
 469     uint16_t *tb_jmp_offset; /* != NULL if USE_DIRECT_JUMP */
 470
 471     /* liveness analysis */
 472     uint16_t *op_dead_args; /* for each operation, each bit tells if the
 473                                corresponding argument is dead */
 474     uint8_t *op_sync_args;  /* for each operation, each bit tells if the
 475                                corresponding output argument needs to be
 476                                sync to memory. */
 477
 478     /* tells in which temporary a given register is. It does not take
 479        into account fixed registers */
 480     int reg_to_temp[TCG_TARGET_NB_REGS];
 481     TCGRegSet reserved_regs;
 482     intptr_t current_frame_offset;
 483     intptr_t frame_start;
 484     intptr_t frame_end;
 485     int frame_reg;
 486
 487     uint8_t *code_ptr;
 488     TCGTemp temps[TCG_MAX_TEMPS]; /* globals first, temps after */
 489     TCGTempSet free_temps[TCG_TYPE_COUNT * 2];
 490
 491     GHashTable *helpers;
 492
 493 #ifdef CONFIG_PROFILER
 494     /* profiling info */
 495     int64_t tb_count1;
 496     int64_t tb_count;
 497     int64_t op_count; /* total insn count */
 498     int op_count_max; /* max insn per TB */
 499     int64_t temp_count;
 500     int temp_count_max;
 501     int64_t del_op_count;
 502     int64_t code_in_len;
 503     int64_t code_out_len;
 504     int64_t interm_time;
 505     int64_t code_time;
 506     int64_t la_time;
 507     int64_t opt_time;
 508     int64_t restore_count;
 509     int64_t restore_time;
 510 #endif
 511
 512 #ifdef CONFIG_DEBUG_TCG
 513     int temps_in_use;
 514     int goto_tb_issue_mask;
 515 #endif
 516
 517     uint16_t gen_opc_buf[OPC_BUF_SIZE];
 518     TCGArg gen_opparam_buf[OPPARAM_BUF_SIZE];
 519
 520     uint16_t *gen_opc_ptr;
 521     TCGArg *gen_opparam_ptr;
 522     target_ulong gen_opc_pc[OPC_BUF_SIZE];
 523     uint16_t gen_opc_icount[OPC_BUF_SIZE];
 524     uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
 525
 526     /* Code generation */
 527     int code_gen_max_blocks;
 528     uint8_t *code_gen_prologue;
 529     uint8_t *code_gen_buffer;
 530     size_t code_gen_buffer_size;
 531     /* threshold to flush the translated code buffer */
 532     size_t code_gen_buffer_max_size;
 533     uint8_t *code_gen_ptr;
 534
 535     TBContext tb_ctx;
 536
 537     /* The TCGBackendData structure is private to tcg-target.c.  */
 538     struct TCGBackendData *be;
 539 };
 540
 541 extern TCGContext tcg_ctx;
 542
 543 /* pool based memory allocation */
 544
 545 void *tcg_malloc_internal(TCGContext *s, int size);
 546 void tcg_pool_reset(TCGContext *s);
 547 void tcg_pool_delete(TCGContext *s);
 548
 549 static inline void *tcg_malloc(int size)
 550 {
 551     TCGContext *s = &tcg_ctx;
 552     uint8_t *ptr, *ptr_end;
 553     size = (size + sizeof(long) - 1) & ~(sizeof(long) - 1);
 554     ptr = s->pool_cur;
 555     ptr_end = ptr + size;
 556     if (unlikely(ptr_end > s->pool_end)) {
 557         return tcg_malloc_internal(&tcg_ctx, size);
 558     } else {
 559         s->pool_cur = ptr_end;
 560         return ptr;
 561     }
 562 }
 563
 564 void tcg_context_init(TCGContext *s);
 565 void tcg_prologue_init(TCGContext *s);
 566 void tcg_func_start(TCGContext *s);
 567
 568 int tcg_gen_code(TCGContext *s, uint8_t *gen_code_buf);
 569 int tcg_gen_code_search_pc(TCGContext *s, uint8_t *gen_code_buf, long offset);
 570
 571 void tcg_set_frame(TCGContext *s, int reg, intptr_t start, intptr_t size);
 572
 573 TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name);
 574 TCGv_i32 tcg_global_mem_new_i32(int reg, intptr_t offset, const char *name);
 575 TCGv_i32 tcg_temp_new_internal_i32(int temp_local);
 576 static inline TCGv_i32 tcg_temp_new_i32(void)
 577 {
 578     return tcg_temp_new_internal_i32(0);
 579 }
 580 static inline TCGv_i32 tcg_temp_local_new_i32(void)
 581 {
 582     return tcg_temp_new_internal_i32(1);
 583 }
 584 void tcg_temp_free_i32(TCGv_i32 arg);
 585 char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg);
 586
 587 TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name);
 588 TCGv_i64 tcg_global_mem_new_i64(int reg, intptr_t offset, const char *name);
 589 TCGv_i64 tcg_temp_new_internal_i64(int temp_local);
 590 static inline TCGv_i64 tcg_temp_new_i64(void)
 591 {
 592     return tcg_temp_new_internal_i64(0);
 593 }
 594 static inline TCGv_i64 tcg_temp_local_new_i64(void)
 595 {
 596     return tcg_temp_new_internal_i64(1);
 597 }
 598 void tcg_temp_free_i64(TCGv_i64 arg);
 599 char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg);
 600
 601 #if defined(CONFIG_DEBUG_TCG)
 602 /* If you call tcg_clear_temp_count() at the start of a section of
 603  * code which is not supposed to leak any TCG temporaries, then
 604  * calling tcg_check_temp_count() at the end of the section will
 605  * return 1 if the section did in fact leak a temporary.
 606  */
 607 void tcg_clear_temp_count(void);
 608 int tcg_check_temp_count(void);
 609 #else
 610 #define tcg_clear_temp_count() do { } while (0)
 611 #define tcg_check_temp_count() 0
 612 #endif
 613
 614 void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf);
 615
 616 #define TCG_CT_ALIAS  0x80
 617 #define TCG_CT_IALIAS 0x40
 618 #define TCG_CT_REG    0x01
 619 #define TCG_CT_CONST  0x02 /* any constant of register size */
 620
 621 typedef struct TCGArgConstraint {
 622     uint16_t ct;
 623     uint8_t alias_index;
 624     union {
 625         TCGRegSet regs;
 626     } u;
 627 } TCGArgConstraint;
 628
 629 #define TCG_MAX_OP_ARGS 16
 630
 631 /* Bits for TCGOpDef->flags, 8 bits available.  */
 632 enum {
 633     /* Instruction defines the end of a basic block.  */
 634     TCG_OPF_BB_END       = 0x01,
 635     /* Instruction clobbers call registers and potentially update globals.  */
 636     TCG_OPF_CALL_CLOBBER = 0x02,
 637     /* Instruction has side effects: it cannot be removed if its outputs
 638        are not used, and might trigger exceptions.  */
 639     TCG_OPF_SIDE_EFFECTS = 0x04,
 640     /* Instruction operands are 64-bits (otherwise 32-bits).  */
 641     TCG_OPF_64BIT        = 0x08,
 642     /* Instruction is optional and not implemented by the host, or insn
 643        is generic and should not be implemened by the host.  */
 644     TCG_OPF_NOT_PRESENT  = 0x10,
 645 };
 646
 647 typedef struct TCGOpDef {
 648     const char *name;
 649     uint8_t nb_oargs, nb_iargs, nb_cargs, nb_args;
 650     uint8_t flags;
 651     TCGArgConstraint *args_ct;
 652     int *sorted_args;
 653 #if defined(CONFIG_DEBUG_TCG)
 654     int used;
 655 #endif
 656 } TCGOpDef;
 657
 658 extern TCGOpDef tcg_op_defs[];
 659 extern const size_t tcg_op_defs_max;
 660
 661 typedef struct TCGTargetOpDef {
 662     TCGOpcode op;
 663     const char *args_ct_str[TCG_MAX_OP_ARGS];
 664 } TCGTargetOpDef;
 665
 666 #define tcg_abort() \
 667 do {\
 668     fprintf(stderr, "%s:%d: tcg fatal error\n", __FILE__, __LINE__);\
 669     abort();\
 670 } while (0)
 671
 672 #ifdef CONFIG_DEBUG_TCG
 673 # define tcg_debug_assert(X) do { assert(X); } while (0)
 674 #elif QEMU_GNUC_PREREQ(4, 5)
 675 # define tcg_debug_assert(X) \
 676     do { if (!(X)) { __builtin_unreachable(); } } while (0)
 677 #else
 678 # define tcg_debug_assert(X) do { (void)(X); } while (0)
 679 #endif
 680
 681 void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs);
 682
 683 #if UINTPTR_MAX == UINT32_MAX
 684 #define TCGV_NAT_TO_PTR(n) MAKE_TCGV_PTR(GET_TCGV_I32(n))
 685 #define TCGV_PTR_TO_NAT(n) MAKE_TCGV_I32(GET_TCGV_PTR(n))
 686
 687 #define tcg_const_ptr(V) TCGV_NAT_TO_PTR(tcg_const_i32((intptr_t)(V)))
 688 #define tcg_global_reg_new_ptr(R, N) \
 689     TCGV_NAT_TO_PTR(tcg_global_reg_new_i32((R), (N)))
 690 #define tcg_global_mem_new_ptr(R, O, N) \
 691     TCGV_NAT_TO_PTR(tcg_global_mem_new_i32((R), (O), (N)))
 692 #define tcg_temp_new_ptr() TCGV_NAT_TO_PTR(tcg_temp_new_i32())
 693 #define tcg_temp_free_ptr(T) tcg_temp_free_i32(TCGV_PTR_TO_NAT(T))
 694 #else
 695 #define TCGV_NAT_TO_PTR(n) MAKE_TCGV_PTR(GET_TCGV_I64(n))
 696 #define TCGV_PTR_TO_NAT(n) MAKE_TCGV_I64(GET_TCGV_PTR(n))
 697
 698 #define tcg_const_ptr(V) TCGV_NAT_TO_PTR(tcg_const_i64((intptr_t)(V)))
 699 #define tcg_global_reg_new_ptr(R, N) \
 700     TCGV_NAT_TO_PTR(tcg_global_reg_new_i64((R), (N)))
 701 #define tcg_global_mem_new_ptr(R, O, N) \
 702     TCGV_NAT_TO_PTR(tcg_global_mem_new_i64((R), (O), (N)))
 703 #define tcg_temp_new_ptr() TCGV_NAT_TO_PTR(tcg_temp_new_i64())
 704 #define tcg_temp_free_ptr(T) tcg_temp_free_i64(TCGV_PTR_TO_NAT(T))
 705 #endif
 706
 707 void tcg_gen_callN(TCGContext *s, TCGv_ptr func, unsigned int flags,
 708                    int sizemask, TCGArg ret, int nargs, TCGArg *args);
 709
 710 void tcg_gen_shifti_i64(TCGv_i64 ret, TCGv_i64 arg1,
 711                         int c, int right, int arith);
 712
 713 TCGArg *tcg_optimize(TCGContext *s, uint16_t *tcg_opc_ptr, TCGArg *args,
 714                      TCGOpDef *tcg_op_def);
 715
 716 /* only used for debugging purposes */
 717 void tcg_dump_ops(TCGContext *s);
 718
 719 void dump_ops(const uint16_t *opc_buf, const TCGArg *opparam_buf);
 720 TCGv_i32 tcg_const_i32(int32_t val);
 721 TCGv_i64 tcg_const_i64(int64_t val);
 722 TCGv_i32 tcg_const_local_i32(int32_t val);
 723 TCGv_i64 tcg_const_local_i64(int64_t val);
 724
 725 /**
 726  * tcg_qemu_tb_exec:
 727  * @env: CPUArchState * for the CPU
 728  * @tb_ptr: address of generated code for the TB to execute
 729  *
 730  * Start executing code from a given translation block.
 731  * Where translation blocks have been linked, execution
 732  * may proceed from the given TB into successive ones.
 733  * Control eventually returns only when some action is needed
 734  * from the top-level loop: either control must pass to a TB
 735  * which has not yet been directly linked, or an asynchronous
 736  * event such as an interrupt needs handling.
 737  *
 738  * The return value is a pointer to the next TB to execute
 739  * (if known; otherwise zero). This pointer is assumed to be
 740  * 4-aligned, and the bottom two bits are used to return further
 741  * information:
 742  *  0, 1: the link between this TB and the next is via the specified
 743  *        TB index (0 or 1). That is, we left the TB via (the equivalent
 744  *        of) "goto_tb <index>". The main loop uses this to determine
 745  *        how to link the TB just executed to the next.
 746  *  2:    we are using instruction counting code generation, and we
 747  *        did not start executing this TB because the instruction counter
 748  *        would hit zero midway through it. In this case the next-TB pointer
 749  *        returned is the TB we were about to execute, and the caller must
 750  *        arrange to execute the remaining count of instructions.
 751  *  3:    we stopped because the CPU's exit_request flag was set
 752  *        (usually meaning that there is an interrupt that needs to be
 753  *        handled). The next-TB pointer returned is the TB we were
 754  *        about to execute when we noticed the pending exit request.
 755  *
 756  * If the bottom two bits indicate an exit-via-index then the CPU
 757  * state is correctly synchronised and ready for execution of the next
 758  * TB (and in particular the guest PC is the address to execute next).
 759  * Otherwise, we gave up on execution of this TB before it started, and
 760  * the caller must fix up the CPU state by calling cpu_pc_from_tb()
 761  * with the next-TB pointer we return.
 762  *
 763  * Note that TCG targets may use a different definition of tcg_qemu_tb_exec
 764  * to this default (which just calls the prologue.code emitted by
 765  * tcg_target_qemu_prologue()).
 766  */
 767 #define TB_EXIT_MASK 3
 768 #define TB_EXIT_IDX0 0
 769 #define TB_EXIT_IDX1 1
 770 #define TB_EXIT_ICOUNT_EXPIRED 2
 771 #define TB_EXIT_REQUESTED 3
 772
 773 #if !defined(tcg_qemu_tb_exec)
 774 # define tcg_qemu_tb_exec(env, tb_ptr) \
 775     ((uintptr_t (*)(void *, void *))tcg_ctx.code_gen_prologue)(env, tb_ptr)
 776 #endif
 777
 778 void tcg_register_jit(void *buf, size_t buf_size);
 779
 780 /*
 781  * Memory helpers that will be used by TCG generated code.
 782  */
 783 #ifdef CONFIG_SOFTMMU
 784 /* Value zero-extended to tcg register size.  */
 785 tcg_target_ulong helper_ret_ldub_mmu(CPUArchState *env, target_ulong addr,
 786                                      int mmu_idx, uintptr_t retaddr);
 787 tcg_target_ulong helper_le_lduw_mmu(CPUArchState *env, target_ulong addr,
 788                                     int mmu_idx, uintptr_t retaddr);
 789 tcg_target_ulong helper_le_ldul_mmu(CPUArchState *env, target_ulong addr,
 790                                     int mmu_idx, uintptr_t retaddr);
 791 uint64_t helper_le_ldq_mmu(CPUArchState *env, target_ulong addr,
 792                            int mmu_idx, uintptr_t retaddr);
 793 tcg_target_ulong helper_be_lduw_mmu(CPUArchState *env, target_ulong addr,
 794                                     int mmu_idx, uintptr_t retaddr);
 795 tcg_target_ulong helper_be_ldul_mmu(CPUArchState *env, target_ulong addr,
 796                                     int mmu_idx, uintptr_t retaddr);
 797 uint64_t helper_be_ldq_mmu(CPUArchState *env, target_ulong addr,
 798                            int mmu_idx, uintptr_t retaddr);
 799
 800 /* Value sign-extended to tcg register size.  */
 801 tcg_target_ulong helper_ret_ldsb_mmu(CPUArchState *env, target_ulong addr,
 802                                      int mmu_idx, uintptr_t retaddr);
 803 tcg_target_ulong helper_le_ldsw_mmu(CPUArchState *env, target_ulong addr,
 804                                     int mmu_idx, uintptr_t retaddr);
 805 tcg_target_ulong helper_le_ldsl_mmu(CPUArchState *env, target_ulong addr,
 806                                     int mmu_idx, uintptr_t retaddr);
 807 tcg_target_ulong helper_be_ldsw_mmu(CPUArchState *env, target_ulong addr,
 808                                     int mmu_idx, uintptr_t retaddr);
 809 tcg_target_ulong helper_be_ldsl_mmu(CPUArchState *env, target_ulong addr,
 810                                     int mmu_idx, uintptr_t retaddr);
 811
 812 void helper_ret_stb_mmu(CPUArchState *env, target_ulong addr, uint8_t val,
 813                         int mmu_idx, uintptr_t retaddr);
 814 void helper_le_stw_mmu(CPUArchState *env, target_ulong addr, uint16_t val,
 815                        int mmu_idx, uintptr_t retaddr);
 816 void helper_le_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val,
 817                        int mmu_idx, uintptr_t retaddr);
 818 void helper_le_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,
 819                        int mmu_idx, uintptr_t retaddr);
 820 void helper_be_stw_mmu(CPUArchState *env, target_ulong addr, uint16_t val,
 821                        int mmu_idx, uintptr_t retaddr);
 822 void helper_be_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val,
 823                        int mmu_idx, uintptr_t retaddr);
 824 void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,
 825                        int mmu_idx, uintptr_t retaddr);
 826
 827 /* Temporary aliases until backends are converted.  */
 828 #ifdef TARGET_WORDS_BIGENDIAN
 829 # define helper_ret_ldsw_mmu  helper_be_ldsw_mmu
 830 # define helper_ret_lduw_mmu  helper_be_lduw_mmu
 831 # define helper_ret_ldsl_mmu  helper_be_ldsl_mmu
 832 # define helper_ret_ldul_mmu  helper_be_ldul_mmu
 833 # define helper_ret_ldq_mmu   helper_be_ldq_mmu
 834 # define helper_ret_stw_mmu   helper_be_stw_mmu
 835 # define helper_ret_stl_mmu   helper_be_stl_mmu
 836 # define helper_ret_stq_mmu   helper_be_stq_mmu
 837 #else
 838 # define helper_ret_ldsw_mmu  helper_le_ldsw_mmu
 839 # define helper_ret_lduw_mmu  helper_le_lduw_mmu
 840 # define helper_ret_ldsl_mmu  helper_le_ldsl_mmu
 841 # define helper_ret_ldul_mmu  helper_le_ldul_mmu
 842 # define helper_ret_ldq_mmu   helper_le_ldq_mmu
 843 # define helper_ret_stw_mmu   helper_le_stw_mmu
 844 # define helper_ret_stl_mmu   helper_le_stl_mmu
 845 # define helper_ret_stq_mmu   helper_le_stq_mmu
 846 #endif
 847
 848 uint8_t helper_ldb_mmu(CPUArchState *env, target_ulong addr, int mmu_idx);
 849 uint16_t helper_ldw_mmu(CPUArchState *env, target_ulong addr, int mmu_idx);
 850 uint32_t helper_ldl_mmu(CPUArchState *env, target_ulong addr, int mmu_idx);
 851 uint64_t helper_ldq_mmu(CPUArchState *env, target_ulong addr, int mmu_idx);
 852
 853 void helper_stb_mmu(CPUArchState *env, target_ulong addr,
 854                     uint8_t val, int mmu_idx);
 855 void helper_stw_mmu(CPUArchState *env, target_ulong addr,
 856                     uint16_t val, int mmu_idx);
 857 void helper_stl_mmu(CPUArchState *env, target_ulong addr,
 858                     uint32_t val, int mmu_idx);
 859 void helper_stq_mmu(CPUArchState *env, target_ulong addr,
 860                     uint64_t val, int mmu_idx);
 861 #endif /* CONFIG_SOFTMMU */
 862
 863 #endif /* TCG_H */