2 * Copyright (C) 2010-2012 Guan Xuetao
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
8 * Contributions from 2012-04-01 on are considered under GPL version 2,
9 * or (at your option) any later version.
12 #include "qemu/osdep.h"
14 #include "exec/exec-all.h"
15 #include "exec/gdbstub.h"
16 #include "exec/helper-proto.h"
17 #include "qemu/host-utils.h"
18 #ifndef CONFIG_USER_ONLY
19 #include "ui/console.h"
25 #define DPRINTF(fmt, ...) printf("%s: " fmt , __func__, ## __VA_ARGS__)
27 #define DPRINTF(fmt, ...) do {} while (0)
30 UniCore32CPU
*uc32_cpu_init(const char *cpu_model
)
32 return UNICORE32_CPU(cpu_generic_init(TYPE_UNICORE32_CPU
, cpu_model
));
35 #ifndef CONFIG_USER_ONLY
36 void helper_cp0_set(CPUUniCore32State
*env
, uint32_t val
, uint32_t creg
,
39 UniCore32CPU
*cpu
= uc32_env_get_cpu(env
);
42 * movc pp.nn, rn, #imm9
46 * 2: page table base reg.
47 * 3: data fault status reg.
48 * 4: insn fault status reg.
51 * imm9: split UCOP_IMM10 with bit5 is 0
58 env
->cp0
.c1_sys
= val
;
64 env
->cp0
.c2_base
= val
;
70 env
->cp0
.c3_faultstatus
= val
;
76 env
->cp0
.c4_faultaddr
= val
;
81 DPRINTF("Invalidate Entire I&D cache\n");
84 DPRINTF("Invalidate Entire Icache\n");
87 DPRINTF("Invalidate Entire Dcache\n");
90 DPRINTF("Clean Entire Dcache\n");
93 DPRINTF("Flush Entire Dcache\n");
96 DPRINTF("Invalidate Dcache line\n");
99 DPRINTF("Clean Dcache line\n");
102 DPRINTF("Flush Dcache line\n");
107 if ((cop
<= 6) && (cop
>= 2)) {
108 /* invalid all tlb */
118 DPRINTF("Wrong register (%d) or wrong operation (%d) in cp0_set!\n",
122 uint32_t helper_cp0_get(CPUUniCore32State
*env
, uint32_t creg
, uint32_t cop
)
125 * movc rd, pp.nn, #imm9
128 * 0: cpuid and cachetype
129 * 1: sys control reg.
130 * 2: page table base reg.
131 * 3: data fault status reg.
132 * 4: insn fault status reg.
133 * imm9: split UCOP_IMM10 with bit5 is 0
139 return env
->cp0
.c0_cpuid
;
141 return env
->cp0
.c0_cachetype
;
146 return env
->cp0
.c1_sys
;
151 return env
->cp0
.c2_base
;
156 return env
->cp0
.c3_faultstatus
;
161 return env
->cp0
.c4_faultaddr
;
165 DPRINTF("Wrong register (%d) or wrong operation (%d) in cp0_set!\n",
173 * 1. curses windows will be blank when switching back
174 * 2. backspace is not handled yet
176 static void putc_on_screen(unsigned char ch
)
178 static WINDOW
*localwin
;
182 /* Assume 80 * 30 screen to minimize the implementation */
183 localwin
= newwin(30, 80, 0, 0);
184 scrollok(localwin
, TRUE
);
189 wprintw(localwin
, "%c", ch
);
193 wprintw(localwin
, "%c", ch
);
196 /* If '\r' is put before '\n', the curses window will destroy the
197 * last print line. And meanwhile, '\n' implifies '\r' inside. */
199 default: /* Not handled, so just print it hex code */
200 wprintw(localwin
, "-- 0x%x --", ch
);
207 #define putc_on_screen(c) do { } while (0)
210 void helper_cp1_putc(target_ulong x
)
212 putc_on_screen((unsigned char)x
); /* Output to screen */
213 DPRINTF("%c", x
); /* Output to stdout */
217 #ifdef CONFIG_USER_ONLY
218 void switch_mode(CPUUniCore32State
*env
, int mode
)
220 UniCore32CPU
*cpu
= uc32_env_get_cpu(env
);
222 if (mode
!= ASR_MODE_USER
) {
223 cpu_abort(CPU(cpu
), "Tried to switch out of user mode\n");
227 void uc32_cpu_do_interrupt(CPUState
*cs
)
229 cpu_abort(cs
, "NO interrupt in user mode\n");
232 int uc32_cpu_handle_mmu_fault(CPUState
*cs
, vaddr address
,
233 int access_type
, int mmu_idx
)
235 cpu_abort(cs
, "NO mmu fault in user mode\n");
240 bool uc32_cpu_exec_interrupt(CPUState
*cs
, int interrupt_request
)
242 if (interrupt_request
& CPU_INTERRUPT_HARD
) {
243 UniCore32CPU
*cpu
= UNICORE32_CPU(cs
);
244 CPUUniCore32State
*env
= &cpu
->env
;
246 if (!(env
->uncached_asr
& ASR_I
)) {
247 cs
->exception_index
= UC32_EXCP_INTR
;
248 uc32_cpu_do_interrupt(cs
);