?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
spapr_iommu: translate sPAPRTCEAccess to IOMMUAccessFlags
[qemu/ar7.git] / memory.c
blob5a0cc66982dc8c165a40aa8abaac1c8016339381
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "exec/memory.h"
17 #include "exec/address-spaces.h"
18 #include "exec/ioport.h"
19 #include "qapi/visitor.h"
20 #include "qemu/bitops.h"
21 #include "qom/object.h"
22 #include "trace.h"
23 #include <assert.h>
24
25 #include "exec/memory-internal.h"
26 #include "exec/ram_addr.h"
27 #include "sysemu/sysemu.h"
28
29 //#define DEBUG_UNASSIGNED
30
31 #define RAM_ADDR_INVALID (~(ram_addr_t)0)
32
33 static unsigned memory_region_transaction_depth;
34 static bool memory_region_update_pending;
35 static bool ioeventfd_update_pending;
36 static bool global_dirty_log = false;
37
38 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
39 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
40
41 static QTAILQ_HEAD(, AddressSpace) address_spaces
42 = QTAILQ_HEAD_INITIALIZER(address_spaces);
43
44 typedef struct AddrRange AddrRange;
45
46 /*
47 * Note that signed integers are needed for negative offsetting in aliases
48 * (large MemoryRegion::alias_offset).
49 */
50 struct AddrRange {
51 Int128 start;
52 Int128 size;
53 };
54
55 static AddrRange addrrange_make(Int128 start, Int128 size)
56 {
57 return (AddrRange) { start, size };
58 }
59
60 static bool addrrange_equal(AddrRange r1, AddrRange r2)
61 {
62 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
63 }
64
65 static Int128 addrrange_end(AddrRange r)
66 {
67 return int128_add(r.start, r.size);
68 }
69
70 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
71 {
72 int128_addto(&range.start, delta);
73 return range;
74 }
75
76 static bool addrrange_contains(AddrRange range, Int128 addr)
77 {
78 return int128_ge(addr, range.start)
79 && int128_lt(addr, addrrange_end(range));
80 }
81
82 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
83 {
84 return addrrange_contains(r1, r2.start)
85 || addrrange_contains(r2, r1.start);
86 }
87
88 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
89 {
90 Int128 start = int128_max(r1.start, r2.start);
91 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
92 return addrrange_make(start, int128_sub(end, start));
93 }
94
95 enum ListenerDirection { Forward, Reverse };
96
97 static bool memory_listener_match(MemoryListener *listener,
98 MemoryRegionSection *section)
99 {
100 return !listener->address_space_filter
101 || listener->address_space_filter == section->address_space;
102 }
103
104 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
105 do { \
106 MemoryListener *_listener; \
107 \
108 switch (_direction) { \
109 case Forward: \
110 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
111 if (_listener->_callback) { \
112 _listener->_callback(_listener, ##_args); \
113 } \
114 } \
115 break; \
116 case Reverse: \
117 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
118 memory_listeners, link) { \
119 if (_listener->_callback) { \
120 _listener->_callback(_listener, ##_args); \
121 } \
122 } \
123 break; \
124 default: \
125 abort(); \
126 } \
127 } while (0)
128
129 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
130 do { \
131 MemoryListener *_listener; \
132 \
133 switch (_direction) { \
134 case Forward: \
135 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
136 if (_listener->_callback \
137 && memory_listener_match(_listener, _section)) { \
138 _listener->_callback(_listener, _section, ##_args); \
139 } \
140 } \
141 break; \
142 case Reverse: \
143 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
144 memory_listeners, link) { \
145 if (_listener->_callback \
146 && memory_listener_match(_listener, _section)) { \
147 _listener->_callback(_listener, _section, ##_args); \
148 } \
149 } \
150 break; \
151 default: \
152 abort(); \
153 } \
154 } while (0)
155
156 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
157 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
158 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
159 .mr = (fr)->mr, \
160 .address_space = (as), \
161 .offset_within_region = (fr)->offset_in_region, \
162 .size = (fr)->addr.size, \
163 .offset_within_address_space = int128_get64((fr)->addr.start), \
164 .readonly = (fr)->readonly, \
165 }), ##_args)
166
167 struct CoalescedMemoryRange {
168 AddrRange addr;
169 QTAILQ_ENTRY(CoalescedMemoryRange) link;
170 };
171
172 struct MemoryRegionIoeventfd {
173 AddrRange addr;
174 bool match_data;
175 uint64_t data;
176 EventNotifier *e;
177 };
178
179 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
180 MemoryRegionIoeventfd b)
181 {
182 if (int128_lt(a.addr.start, b.addr.start)) {
183 return true;
184 } else if (int128_gt(a.addr.start, b.addr.start)) {
185 return false;
186 } else if (int128_lt(a.addr.size, b.addr.size)) {
187 return true;
188 } else if (int128_gt(a.addr.size, b.addr.size)) {
189 return false;
190 } else if (a.match_data < b.match_data) {
191 return true;
192 } else if (a.match_data > b.match_data) {
193 return false;
194 } else if (a.match_data) {
195 if (a.data < b.data) {
196 return true;
197 } else if (a.data > b.data) {
198 return false;
199 }
200 }
201 if (a.e < b.e) {
202 return true;
203 } else if (a.e > b.e) {
204 return false;
205 }
206 return false;
207 }
208
209 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
210 MemoryRegionIoeventfd b)
211 {
212 return !memory_region_ioeventfd_before(a, b)
213 && !memory_region_ioeventfd_before(b, a);
214 }
215
216 typedef struct FlatRange FlatRange;
217 typedef struct FlatView FlatView;
218
219 /* Range of memory in the global map. Addresses are absolute. */
220 struct FlatRange {
221 MemoryRegion *mr;
222 hwaddr offset_in_region;
223 AddrRange addr;
224 uint8_t dirty_log_mask;
225 bool romd_mode;
226 bool readonly;
227 };
228
229 /* Flattened global view of current active memory hierarchy. Kept in sorted
230 * order.
231 */
232 struct FlatView {
233 struct rcu_head rcu;
234 unsigned ref;
235 FlatRange *ranges;
236 unsigned nr;
237 unsigned nr_allocated;
238 };
239
240 typedef struct AddressSpaceOps AddressSpaceOps;
241
242 #define FOR_EACH_FLAT_RANGE(var, view) \
243 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
244
245 static bool flatrange_equal(FlatRange *a, FlatRange *b)
246 {
247 return a->mr == b->mr
248 && addrrange_equal(a->addr, b->addr)
249 && a->offset_in_region == b->offset_in_region
250 && a->romd_mode == b->romd_mode
251 && a->readonly == b->readonly;
252 }
253
254 static void flatview_init(FlatView *view)
255 {
256 view->ref = 1;
257 view->ranges = NULL;
258 view->nr = 0;
259 view->nr_allocated = 0;
260 }
261
262 /* Insert a range into a given position. Caller is responsible for maintaining
263 * sorting order.
264 */
265 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
266 {
267 if (view->nr == view->nr_allocated) {
268 view->nr_allocated = MAX(2 * view->nr, 10);
269 view->ranges = g_realloc(view->ranges,
270 view->nr_allocated * sizeof(*view->ranges));
271 }
272 memmove(view->ranges + pos + 1, view->ranges + pos,
273 (view->nr - pos) * sizeof(FlatRange));
274 view->ranges[pos] = *range;
275 memory_region_ref(range->mr);
276 ++view->nr;
277 }
278
279 static void flatview_destroy(FlatView *view)
280 {
281 int i;
282
283 for (i = 0; i < view->nr; i++) {
284 memory_region_unref(view->ranges[i].mr);
285 }
286 g_free(view->ranges);
287 g_free(view);
288 }
289
290 static void flatview_ref(FlatView *view)
291 {
292 atomic_inc(&view->ref);
293 }
294
295 static void flatview_unref(FlatView *view)
296 {
297 if (atomic_fetch_dec(&view->ref) == 1) {
298 flatview_destroy(view);
299 }
300 }
301
302 static bool can_merge(FlatRange *r1, FlatRange *r2)
303 {
304 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
305 && r1->mr == r2->mr
306 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
307 r1->addr.size),
308 int128_make64(r2->offset_in_region))
309 && r1->dirty_log_mask == r2->dirty_log_mask
310 && r1->romd_mode == r2->romd_mode
311 && r1->readonly == r2->readonly;
312 }
313
314 /* Attempt to simplify a view by merging adjacent ranges */
315 static void flatview_simplify(FlatView *view)
316 {
317 unsigned i, j;
318
319 i = 0;
320 while (i < view->nr) {
321 j = i + 1;
322 while (j < view->nr
323 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
324 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
325 ++j;
326 }
327 ++i;
328 memmove(&view->ranges[i], &view->ranges[j],
329 (view->nr - j) * sizeof(view->ranges[j]));
330 view->nr -= j - i;
331 }
332 }
333
334 static bool memory_region_big_endian(MemoryRegion *mr)
335 {
336 #ifdef TARGET_WORDS_BIGENDIAN
337 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
338 #else
339 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
340 #endif
341 }
342
343 static bool memory_region_wrong_endianness(MemoryRegion *mr)
344 {
345 #ifdef TARGET_WORDS_BIGENDIAN
346 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
347 #else
348 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
349 #endif
350 }
351
352 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
353 {
354 if (memory_region_wrong_endianness(mr)) {
355 switch (size) {
356 case 1:
357 break;
358 case 2:
359 *data = bswap16(*data);
360 break;
361 case 4:
362 *data = bswap32(*data);
363 break;
364 case 8:
365 *data = bswap64(*data);
366 break;
367 default:
368 abort();
369 }
370 }
371 }
372
373 static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
374 hwaddr addr,
375 uint64_t *value,
376 unsigned size,
377 unsigned shift,
378 uint64_t mask,
379 MemTxAttrs attrs)
380 {
381 uint64_t tmp;
382
383 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
384 trace_memory_region_ops_read(mr, addr, tmp, size);
385 *value |= (tmp & mask) << shift;
386 return MEMTX_OK;
387 }
388
389 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
390 hwaddr addr,
391 uint64_t *value,
392 unsigned size,
393 unsigned shift,
394 uint64_t mask,
395 MemTxAttrs attrs)
396 {
397 uint64_t tmp;
398
399 tmp = mr->ops->read(mr->opaque, addr, size);
400 trace_memory_region_ops_read(mr, addr, tmp, size);
401 *value |= (tmp & mask) << shift;
402 return MEMTX_OK;
403 }
404
405 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
406 hwaddr addr,
407 uint64_t *value,
408 unsigned size,
409 unsigned shift,
410 uint64_t mask,
411 MemTxAttrs attrs)
412 {
413 uint64_t tmp = 0;
414 MemTxResult r;
415
416 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
417 trace_memory_region_ops_read(mr, addr, tmp, size);
418 *value |= (tmp & mask) << shift;
419 return r;
420 }
421
422 static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
423 hwaddr addr,
424 uint64_t *value,
425 unsigned size,
426 unsigned shift,
427 uint64_t mask,
428 MemTxAttrs attrs)
429 {
430 uint64_t tmp;
431
432 tmp = (*value >> shift) & mask;
433 trace_memory_region_ops_write(mr, addr, tmp, size);
434 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
435 return MEMTX_OK;
436 }
437
438 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
439 hwaddr addr,
440 uint64_t *value,
441 unsigned size,
442 unsigned shift,
443 uint64_t mask,
444 MemTxAttrs attrs)
445 {
446 uint64_t tmp;
447
448 tmp = (*value >> shift) & mask;
449 trace_memory_region_ops_write(mr, addr, tmp, size);
450 mr->ops->write(mr->opaque, addr, tmp, size);
451 return MEMTX_OK;
452 }
453
454 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
455 hwaddr addr,
456 uint64_t *value,
457 unsigned size,
458 unsigned shift,
459 uint64_t mask,
460 MemTxAttrs attrs)
461 {
462 uint64_t tmp;
463
464 tmp = (*value >> shift) & mask;
465 trace_memory_region_ops_write(mr, addr, tmp, size);
466 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
467 }
468
469 static MemTxResult access_with_adjusted_size(hwaddr addr,
470 uint64_t *value,
471 unsigned size,
472 unsigned access_size_min,
473 unsigned access_size_max,
474 MemTxResult (*access)(MemoryRegion *mr,
475 hwaddr addr,
476 uint64_t *value,
477 unsigned size,
478 unsigned shift,
479 uint64_t mask,
480 MemTxAttrs attrs),
481 MemoryRegion *mr,
482 MemTxAttrs attrs)
483 {
484 uint64_t access_mask;
485 unsigned access_size;
486 unsigned i;
487 MemTxResult r = MEMTX_OK;
488
489 if (!access_size_min) {
490 access_size_min = 1;
491 }
492 if (!access_size_max) {
493 access_size_max = 4;
494 }
495
496 /* FIXME: support unaligned access? */
497 access_size = MAX(MIN(size, access_size_max), access_size_min);
498 access_mask = -1ULL >> (64 - access_size * 8);
499 if (memory_region_big_endian(mr)) {
500 for (i = 0; i < size; i += access_size) {
501 r |= access(mr, addr + i, value, access_size,
502 (size - access_size - i) * 8, access_mask, attrs);
503 }
504 } else {
505 for (i = 0; i < size; i += access_size) {
506 r |= access(mr, addr + i, value, access_size, i * 8,
507 access_mask, attrs);
508 }
509 }
510 return r;
511 }
512
513 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
514 {
515 AddressSpace *as;
516
517 while (mr->container) {
518 mr = mr->container;
519 }
520 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
521 if (mr == as->root) {
522 return as;
523 }
524 }
525 return NULL;
526 }
527
528 /* Render a memory region into the global view. Ranges in @view obscure
529 * ranges in @mr.
530 */
531 static void render_memory_region(FlatView *view,
532 MemoryRegion *mr,
533 Int128 base,
534 AddrRange clip,
535 bool readonly)
536 {
537 MemoryRegion *subregion;
538 unsigned i;
539 hwaddr offset_in_region;
540 Int128 remain;
541 Int128 now;
542 FlatRange fr;
543 AddrRange tmp;
544
545 if (!mr->enabled) {
546 return;
547 }
548
549 int128_addto(&base, int128_make64(mr->addr));
550 readonly |= mr->readonly;
551
552 tmp = addrrange_make(base, mr->size);
553
554 if (!addrrange_intersects(tmp, clip)) {
555 return;
556 }
557
558 clip = addrrange_intersection(tmp, clip);
559
560 if (mr->alias) {
561 int128_subfrom(&base, int128_make64(mr->alias->addr));
562 int128_subfrom(&base, int128_make64(mr->alias_offset));
563 render_memory_region(view, mr->alias, base, clip, readonly);
564 return;
565 }
566
567 /* Render subregions in priority order. */
568 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
569 render_memory_region(view, subregion, base, clip, readonly);
570 }
571
572 if (!mr->terminates) {
573 return;
574 }
575
576 offset_in_region = int128_get64(int128_sub(clip.start, base));
577 base = clip.start;
578 remain = clip.size;
579
580 fr.mr = mr;
581 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
582 fr.romd_mode = mr->romd_mode;
583 fr.readonly = readonly;
584
585 /* Render the region itself into any gaps left by the current view. */
586 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
587 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
588 continue;
589 }
590 if (int128_lt(base, view->ranges[i].addr.start)) {
591 now = int128_min(remain,
592 int128_sub(view->ranges[i].addr.start, base));
593 fr.offset_in_region = offset_in_region;
594 fr.addr = addrrange_make(base, now);
595 flatview_insert(view, i, &fr);
596 ++i;
597 int128_addto(&base, now);
598 offset_in_region += int128_get64(now);
599 int128_subfrom(&remain, now);
600 }
601 now = int128_sub(int128_min(int128_add(base, remain),
602 addrrange_end(view->ranges[i].addr)),
603 base);
604 int128_addto(&base, now);
605 offset_in_region += int128_get64(now);
606 int128_subfrom(&remain, now);
607 }
608 if (int128_nz(remain)) {
609 fr.offset_in_region = offset_in_region;
610 fr.addr = addrrange_make(base, remain);
611 flatview_insert(view, i, &fr);
612 }
613 }
614
615 /* Render a memory topology into a list of disjoint absolute ranges. */
616 static FlatView *generate_memory_topology(MemoryRegion *mr)
617 {
618 FlatView *view;
619
620 view = g_new(FlatView, 1);
621 flatview_init(view);
622
623 if (mr) {
624 render_memory_region(view, mr, int128_zero(),
625 addrrange_make(int128_zero(), int128_2_64()), false);
626 }
627 flatview_simplify(view);
628
629 return view;
630 }
631
632 static void address_space_add_del_ioeventfds(AddressSpace *as,
633 MemoryRegionIoeventfd *fds_new,
634 unsigned fds_new_nb,
635 MemoryRegionIoeventfd *fds_old,
636 unsigned fds_old_nb)
637 {
638 unsigned iold, inew;
639 MemoryRegionIoeventfd *fd;
640 MemoryRegionSection section;
641
642 /* Generate a symmetric difference of the old and new fd sets, adding
643 * and deleting as necessary.
644 */
645
646 iold = inew = 0;
647 while (iold < fds_old_nb || inew < fds_new_nb) {
648 if (iold < fds_old_nb
649 && (inew == fds_new_nb
650 || memory_region_ioeventfd_before(fds_old[iold],
651 fds_new[inew]))) {
652 fd = &fds_old[iold];
653 section = (MemoryRegionSection) {
654 .address_space = as,
655 .offset_within_address_space = int128_get64(fd->addr.start),
656 .size = fd->addr.size,
657 };
658 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
659 fd->match_data, fd->data, fd->e);
660 ++iold;
661 } else if (inew < fds_new_nb
662 && (iold == fds_old_nb
663 || memory_region_ioeventfd_before(fds_new[inew],
664 fds_old[iold]))) {
665 fd = &fds_new[inew];
666 section = (MemoryRegionSection) {
667 .address_space = as,
668 .offset_within_address_space = int128_get64(fd->addr.start),
669 .size = fd->addr.size,
670 };
671 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
672 fd->match_data, fd->data, fd->e);
673 ++inew;
674 } else {
675 ++iold;
676 ++inew;
677 }
678 }
679 }
680
681 static FlatView *address_space_get_flatview(AddressSpace *as)
682 {
683 FlatView *view;
684
685 rcu_read_lock();
686 view = atomic_rcu_read(&as->current_map);
687 flatview_ref(view);
688 rcu_read_unlock();
689 return view;
690 }
691
692 static void address_space_update_ioeventfds(AddressSpace *as)
693 {
694 FlatView *view;
695 FlatRange *fr;
696 unsigned ioeventfd_nb = 0;
697 MemoryRegionIoeventfd *ioeventfds = NULL;
698 AddrRange tmp;
699 unsigned i;
700
701 view = address_space_get_flatview(as);
702 FOR_EACH_FLAT_RANGE(fr, view) {
703 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
704 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
705 int128_sub(fr->addr.start,
706 int128_make64(fr->offset_in_region)));
707 if (addrrange_intersects(fr->addr, tmp)) {
708 ++ioeventfd_nb;
709 ioeventfds = g_realloc(ioeventfds,
710 ioeventfd_nb * sizeof(*ioeventfds));
711 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
712 ioeventfds[ioeventfd_nb-1].addr = tmp;
713 }
714 }
715 }
716
717 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
718 as->ioeventfds, as->ioeventfd_nb);
719
720 g_free(as->ioeventfds);
721 as->ioeventfds = ioeventfds;
722 as->ioeventfd_nb = ioeventfd_nb;
723 flatview_unref(view);
724 }
725
726 static void address_space_update_topology_pass(AddressSpace *as,
727 const FlatView *old_view,
728 const FlatView *new_view,
729 bool adding)
730 {
731 unsigned iold, inew;
732 FlatRange *frold, *frnew;
733
734 /* Generate a symmetric difference of the old and new memory maps.
735 * Kill ranges in the old map, and instantiate ranges in the new map.
736 */
737 iold = inew = 0;
738 while (iold < old_view->nr || inew < new_view->nr) {
739 if (iold < old_view->nr) {
740 frold = &old_view->ranges[iold];
741 } else {
742 frold = NULL;
743 }
744 if (inew < new_view->nr) {
745 frnew = &new_view->ranges[inew];
746 } else {
747 frnew = NULL;
748 }
749
750 if (frold
751 && (!frnew
752 || int128_lt(frold->addr.start, frnew->addr.start)
753 || (int128_eq(frold->addr.start, frnew->addr.start)
754 && !flatrange_equal(frold, frnew)))) {
755 /* In old but not in new, or in both but attributes changed. */
756
757 if (!adding) {
758 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
759 }
760
761 ++iold;
762 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
763 /* In both and unchanged (except logging may have changed) */
764
765 if (adding) {
766 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
767 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
768 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
769 frold->dirty_log_mask,
770 frnew->dirty_log_mask);
771 }
772 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
773 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
774 frold->dirty_log_mask,
775 frnew->dirty_log_mask);
776 }
777 }
778
779 ++iold;
780 ++inew;
781 } else {
782 /* In new */
783
784 if (adding) {
785 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
786 }
787
788 ++inew;
789 }
790 }
791 }
792
793
794 static void address_space_update_topology(AddressSpace *as)
795 {
796 FlatView *old_view = address_space_get_flatview(as);
797 FlatView *new_view = generate_memory_topology(as->root);
798
799 address_space_update_topology_pass(as, old_view, new_view, false);
800 address_space_update_topology_pass(as, old_view, new_view, true);
801
802 /* Writes are protected by the BQL. */
803 atomic_rcu_set(&as->current_map, new_view);
804 call_rcu(old_view, flatview_unref, rcu);
805
806 /* Note that all the old MemoryRegions are still alive up to this
807 * point. This relieves most MemoryListeners from the need to
808 * ref/unref the MemoryRegions they get---unless they use them
809 * outside the iothread mutex, in which case precise reference
810 * counting is necessary.
811 */
812 flatview_unref(old_view);
813
814 address_space_update_ioeventfds(as);
815 }
816
817 void memory_region_transaction_begin(void)
818 {
819 qemu_flush_coalesced_mmio_buffer();
820 ++memory_region_transaction_depth;
821 }
822
823 static void memory_region_clear_pending(void)
824 {
825 memory_region_update_pending = false;
826 ioeventfd_update_pending = false;
827 }
828
829 void memory_region_transaction_commit(void)
830 {
831 AddressSpace *as;
832
833 assert(memory_region_transaction_depth);
834 --memory_region_transaction_depth;
835 if (!memory_region_transaction_depth) {
836 if (memory_region_update_pending) {
837 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
838
839 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
840 address_space_update_topology(as);
841 }
842
843 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
844 } else if (ioeventfd_update_pending) {
845 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
846 address_space_update_ioeventfds(as);
847 }
848 }
849 memory_region_clear_pending();
850 }
851 }
852
853 static void memory_region_destructor_none(MemoryRegion *mr)
854 {
855 }
856
857 static void memory_region_destructor_ram(MemoryRegion *mr)
858 {
859 qemu_ram_free(mr->ram_addr);
860 }
861
862 static void memory_region_destructor_alias(MemoryRegion *mr)
863 {
864 memory_region_unref(mr->alias);
865 }
866
867 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
868 {
869 qemu_ram_free_from_ptr(mr->ram_addr);
870 }
871
872 static void memory_region_destructor_rom_device(MemoryRegion *mr)
873 {
874 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
875 }
876
877 static bool memory_region_need_escape(char c)
878 {
879 return c == '/' || c == '[' || c == '\\' || c == ']';
880 }
881
882 static char *memory_region_escape_name(const char *name)
883 {
884 const char *p;
885 char *escaped, *q;
886 uint8_t c;
887 size_t bytes = 0;
888
889 for (p = name; *p; p++) {
890 bytes += memory_region_need_escape(*p) ? 4 : 1;
891 }
892 if (bytes == p - name) {
893 return g_memdup(name, bytes + 1);
894 }
895
896 escaped = g_malloc(bytes + 1);
897 for (p = name, q = escaped; *p; p++) {
898 c = *p;
899 if (unlikely(memory_region_need_escape(c))) {
900 *q++ = '\\';
901 *q++ = 'x';
902 *q++ = "0123456789abcdef"[c >> 4];
903 c = "0123456789abcdef"[c & 15];
904 }
905 *q++ = c;
906 }
907 *q = 0;
908 return escaped;
909 }
910
911 void memory_region_init(MemoryRegion *mr,
912 Object *owner,
913 const char *name,
914 uint64_t size)
915 {
916 if (!owner) {
917 owner = container_get(qdev_get_machine(), "/unattached");
918 }
919
920 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
921 mr->size = int128_make64(size);
922 if (size == UINT64_MAX) {
923 mr->size = int128_2_64();
924 }
925 mr->name = g_strdup(name);
926
927 if (name) {
928 char *escaped_name = memory_region_escape_name(name);
929 char *name_array = g_strdup_printf("%s[*]", escaped_name);
930 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
931 object_unref(OBJECT(mr));
932 g_free(name_array);
933 g_free(escaped_name);
934 }
935 }
936
937 static void memory_region_get_addr(Object *obj, Visitor *v, void *opaque,
938 const char *name, Error **errp)
939 {
940 MemoryRegion *mr = MEMORY_REGION(obj);
941 uint64_t value = mr->addr;
942
943 visit_type_uint64(v, &value, name, errp);
944 }
945
946 static void memory_region_get_container(Object *obj, Visitor *v, void *opaque,
947 const char *name, Error **errp)
948 {
949 MemoryRegion *mr = MEMORY_REGION(obj);
950 gchar *path = (gchar *)"";
951
952 if (mr->container) {
953 path = object_get_canonical_path(OBJECT(mr->container));
954 }
955 visit_type_str(v, &path, name, errp);
956 if (mr->container) {
957 g_free(path);
958 }
959 }
960
961 static Object *memory_region_resolve_container(Object *obj, void *opaque,
962 const char *part)
963 {
964 MemoryRegion *mr = MEMORY_REGION(obj);
965
966 return OBJECT(mr->container);
967 }
968
969 static void memory_region_get_priority(Object *obj, Visitor *v, void *opaque,
970 const char *name, Error **errp)
971 {
972 MemoryRegion *mr = MEMORY_REGION(obj);
973 int32_t value = mr->priority;
974
975 visit_type_int32(v, &value, name, errp);
976 }
977
978 static bool memory_region_get_may_overlap(Object *obj, Error **errp)
979 {
980 MemoryRegion *mr = MEMORY_REGION(obj);
981
982 return mr->may_overlap;
983 }
984
985 static void memory_region_get_size(Object *obj, Visitor *v, void *opaque,
986 const char *name, Error **errp)
987 {
988 MemoryRegion *mr = MEMORY_REGION(obj);
989 uint64_t value = memory_region_size(mr);
990
991 visit_type_uint64(v, &value, name, errp);
992 }
993
994 static void memory_region_initfn(Object *obj)
995 {
996 MemoryRegion *mr = MEMORY_REGION(obj);
997 ObjectProperty *op;
998
999 mr->ops = &unassigned_mem_ops;
1000 mr->ram_addr = RAM_ADDR_INVALID;
1001 mr->enabled = true;
1002 mr->romd_mode = true;
1003 mr->global_locking = true;
1004 mr->destructor = memory_region_destructor_none;
1005 QTAILQ_INIT(&mr->subregions);
1006 QTAILQ_INIT(&mr->coalesced);
1007
1008 op = object_property_add(OBJECT(mr), "container",
1009 "link<" TYPE_MEMORY_REGION ">",
1010 memory_region_get_container,
1011 NULL, /* memory_region_set_container */
1012 NULL, NULL, &error_abort);
1013 op->resolve = memory_region_resolve_container;
1014
1015 object_property_add(OBJECT(mr), "addr", "uint64",
1016 memory_region_get_addr,
1017 NULL, /* memory_region_set_addr */
1018 NULL, NULL, &error_abort);
1019 object_property_add(OBJECT(mr), "priority", "uint32",
1020 memory_region_get_priority,
1021 NULL, /* memory_region_set_priority */
1022 NULL, NULL, &error_abort);
1023 object_property_add_bool(OBJECT(mr), "may-overlap",
1024 memory_region_get_may_overlap,
1025 NULL, /* memory_region_set_may_overlap */
1026 &error_abort);
1027 object_property_add(OBJECT(mr), "size", "uint64",
1028 memory_region_get_size,
1029 NULL, /* memory_region_set_size, */
1030 NULL, NULL, &error_abort);
1031 }
1032
1033 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1034 unsigned size)
1035 {
1036 #ifdef DEBUG_UNASSIGNED
1037 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1038 #endif
1039 if (current_cpu != NULL) {
1040 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
1041 }
1042 return 0;
1043 }
1044
1045 static void unassigned_mem_write(void *opaque, hwaddr addr,
1046 uint64_t val, unsigned size)
1047 {
1048 #ifdef DEBUG_UNASSIGNED
1049 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1050 #endif
1051 if (current_cpu != NULL) {
1052 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1053 }
1054 }
1055
1056 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1057 unsigned size, bool is_write)
1058 {
1059 return false;
1060 }
1061
1062 const MemoryRegionOps unassigned_mem_ops = {
1063 .valid.accepts = unassigned_mem_accepts,
1064 .endianness = DEVICE_NATIVE_ENDIAN,
1065 };
1066
1067 bool memory_region_access_valid(MemoryRegion *mr,
1068 hwaddr addr,
1069 unsigned size,
1070 bool is_write)
1071 {
1072 int access_size_min, access_size_max;
1073 int access_size, i;
1074
1075 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1076 return false;
1077 }
1078
1079 if (!mr->ops->valid.accepts) {
1080 return true;
1081 }
1082
1083 access_size_min = mr->ops->valid.min_access_size;
1084 if (!mr->ops->valid.min_access_size) {
1085 access_size_min = 1;
1086 }
1087
1088 access_size_max = mr->ops->valid.max_access_size;
1089 if (!mr->ops->valid.max_access_size) {
1090 access_size_max = 4;
1091 }
1092
1093 access_size = MAX(MIN(size, access_size_max), access_size_min);
1094 for (i = 0; i < size; i += access_size) {
1095 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1096 is_write)) {
1097 return false;
1098 }
1099 }
1100
1101 return true;
1102 }
1103
1104 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1105 hwaddr addr,
1106 uint64_t *pval,
1107 unsigned size,
1108 MemTxAttrs attrs)
1109 {
1110 *pval = 0;
1111
1112 if (mr->ops->read) {
1113 return access_with_adjusted_size(addr, pval, size,
1114 mr->ops->impl.min_access_size,
1115 mr->ops->impl.max_access_size,
1116 memory_region_read_accessor,
1117 mr, attrs);
1118 } else if (mr->ops->read_with_attrs) {
1119 return access_with_adjusted_size(addr, pval, size,
1120 mr->ops->impl.min_access_size,
1121 mr->ops->impl.max_access_size,
1122 memory_region_read_with_attrs_accessor,
1123 mr, attrs);
1124 } else {
1125 return access_with_adjusted_size(addr, pval, size, 1, 4,
1126 memory_region_oldmmio_read_accessor,
1127 mr, attrs);
1128 }
1129 }
1130
1131 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1132 hwaddr addr,
1133 uint64_t *pval,
1134 unsigned size,
1135 MemTxAttrs attrs)
1136 {
1137 MemTxResult r;
1138
1139 if (!memory_region_access_valid(mr, addr, size, false)) {
1140 *pval = unassigned_mem_read(mr, addr, size);
1141 return MEMTX_DECODE_ERROR;
1142 }
1143
1144 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1145 adjust_endianness(mr, pval, size);
1146 return r;
1147 }
1148
1149 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1150 hwaddr addr,
1151 uint64_t data,
1152 unsigned size,
1153 MemTxAttrs attrs)
1154 {
1155 if (!memory_region_access_valid(mr, addr, size, true)) {
1156 unassigned_mem_write(mr, addr, data, size);
1157 return MEMTX_DECODE_ERROR;
1158 }
1159
1160 adjust_endianness(mr, &data, size);
1161
1162 if (mr->ops->write) {
1163 return access_with_adjusted_size(addr, &data, size,
1164 mr->ops->impl.min_access_size,
1165 mr->ops->impl.max_access_size,
1166 memory_region_write_accessor, mr,
1167 attrs);
1168 } else if (mr->ops->write_with_attrs) {
1169 return
1170 access_with_adjusted_size(addr, &data, size,
1171 mr->ops->impl.min_access_size,
1172 mr->ops->impl.max_access_size,
1173 memory_region_write_with_attrs_accessor,
1174 mr, attrs);
1175 } else {
1176 return access_with_adjusted_size(addr, &data, size, 1, 4,
1177 memory_region_oldmmio_write_accessor,
1178 mr, attrs);
1179 }
1180 }
1181
1182 void memory_region_init_io(MemoryRegion *mr,
1183 Object *owner,
1184 const MemoryRegionOps *ops,
1185 void *opaque,
1186 const char *name,
1187 uint64_t size)
1188 {
1189 memory_region_init(mr, owner, name, size);
1190 mr->ops = ops;
1191 mr->opaque = opaque;
1192 mr->terminates = true;
1193 }
1194
1195 void memory_region_init_ram(MemoryRegion *mr,
1196 Object *owner,
1197 const char *name,
1198 uint64_t size,
1199 Error **errp)
1200 {
1201 memory_region_init(mr, owner, name, size);
1202 mr->ram = true;
1203 mr->terminates = true;
1204 mr->destructor = memory_region_destructor_ram;
1205 mr->ram_addr = qemu_ram_alloc(size, mr, errp);
1206 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1207 }
1208
1209 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1210 Object *owner,
1211 const char *name,
1212 uint64_t size,
1213 uint64_t max_size,
1214 void (*resized)(const char*,
1215 uint64_t length,
1216 void *host),
1217 Error **errp)
1218 {
1219 memory_region_init(mr, owner, name, size);
1220 mr->ram = true;
1221 mr->terminates = true;
1222 mr->destructor = memory_region_destructor_ram;
1223 mr->ram_addr = qemu_ram_alloc_resizeable(size, max_size, resized, mr, errp);
1224 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1225 }
1226
1227 #ifdef __linux__
1228 void memory_region_init_ram_from_file(MemoryRegion *mr,
1229 struct Object *owner,
1230 const char *name,
1231 uint64_t size,
1232 bool share,
1233 const char *path,
1234 Error **errp)
1235 {
1236 memory_region_init(mr, owner, name, size);
1237 mr->ram = true;
1238 mr->terminates = true;
1239 mr->destructor = memory_region_destructor_ram;
1240 mr->ram_addr = qemu_ram_alloc_from_file(size, mr, share, path, errp);
1241 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1242 }
1243 #endif
1244
1245 void memory_region_init_ram_ptr(MemoryRegion *mr,
1246 Object *owner,
1247 const char *name,
1248 uint64_t size,
1249 void *ptr)
1250 {
1251 memory_region_init(mr, owner, name, size);
1252 mr->ram = true;
1253 mr->terminates = true;
1254 mr->destructor = memory_region_destructor_ram_from_ptr;
1255 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1256
1257 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1258 assert(ptr != NULL);
1259 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_abort);
1260 }
1261
1262 void memory_region_set_skip_dump(MemoryRegion *mr)
1263 {
1264 mr->skip_dump = true;
1265 }
1266
1267 void memory_region_init_alias(MemoryRegion *mr,
1268 Object *owner,
1269 const char *name,
1270 MemoryRegion *orig,
1271 hwaddr offset,
1272 uint64_t size)
1273 {
1274 memory_region_init(mr, owner, name, size);
1275 memory_region_ref(orig);
1276 mr->destructor = memory_region_destructor_alias;
1277 mr->alias = orig;
1278 mr->alias_offset = offset;
1279 }
1280
1281 void memory_region_init_rom_device(MemoryRegion *mr,
1282 Object *owner,
1283 const MemoryRegionOps *ops,
1284 void *opaque,
1285 const char *name,
1286 uint64_t size,
1287 Error **errp)
1288 {
1289 memory_region_init(mr, owner, name, size);
1290 mr->ops = ops;
1291 mr->opaque = opaque;
1292 mr->terminates = true;
1293 mr->rom_device = true;
1294 mr->destructor = memory_region_destructor_rom_device;
1295 mr->ram_addr = qemu_ram_alloc(size, mr, errp);
1296 }
1297
1298 void memory_region_init_iommu(MemoryRegion *mr,
1299 Object *owner,
1300 const MemoryRegionIOMMUOps *ops,
1301 const char *name,
1302 uint64_t size)
1303 {
1304 memory_region_init(mr, owner, name, size);
1305 mr->iommu_ops = ops,
1306 mr->terminates = true; /* then re-forwards */
1307 notifier_list_init(&mr->iommu_notify);
1308 }
1309
1310 void memory_region_init_reservation(MemoryRegion *mr,
1311 Object *owner,
1312 const char *name,
1313 uint64_t size)
1314 {
1315 memory_region_init_io(mr, owner, &unassigned_mem_ops, mr, name, size);
1316 }
1317
1318 static void memory_region_finalize(Object *obj)
1319 {
1320 MemoryRegion *mr = MEMORY_REGION(obj);
1321
1322 assert(QTAILQ_EMPTY(&mr->subregions));
1323 mr->destructor(mr);
1324 memory_region_clear_coalescing(mr);
1325 g_free((char *)mr->name);
1326 g_free(mr->ioeventfds);
1327 }
1328
1329 Object *memory_region_owner(MemoryRegion *mr)
1330 {
1331 Object *obj = OBJECT(mr);
1332 return obj->parent;
1333 }
1334
1335 void memory_region_ref(MemoryRegion *mr)
1336 {
1337 /* MMIO callbacks most likely will access data that belongs
1338 * to the owner, hence the need to ref/unref the owner whenever
1339 * the memory region is in use.
1340 *
1341 * The memory region is a child of its owner. As long as the
1342 * owner doesn't call unparent itself on the memory region,
1343 * ref-ing the owner will also keep the memory region alive.
1344 * Memory regions without an owner are supposed to never go away,
1345 * but we still ref/unref them for debugging purposes.
1346 */
1347 Object *obj = OBJECT(mr);
1348 if (obj && obj->parent) {
1349 object_ref(obj->parent);
1350 } else {
1351 object_ref(obj);
1352 }
1353 }
1354
1355 void memory_region_unref(MemoryRegion *mr)
1356 {
1357 Object *obj = OBJECT(mr);
1358 if (obj && obj->parent) {
1359 object_unref(obj->parent);
1360 } else {
1361 object_unref(obj);
1362 }
1363 }
1364
1365 uint64_t memory_region_size(MemoryRegion *mr)
1366 {
1367 if (int128_eq(mr->size, int128_2_64())) {
1368 return UINT64_MAX;
1369 }
1370 return int128_get64(mr->size);
1371 }
1372
1373 const char *memory_region_name(const MemoryRegion *mr)
1374 {
1375 if (!mr->name) {
1376 ((MemoryRegion *)mr)->name =
1377 object_get_canonical_path_component(OBJECT(mr));
1378 }
1379 return mr->name;
1380 }
1381
1382 bool memory_region_is_ram(MemoryRegion *mr)
1383 {
1384 return mr->ram;
1385 }
1386
1387 bool memory_region_is_skip_dump(MemoryRegion *mr)
1388 {
1389 return mr->skip_dump;
1390 }
1391
1392 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1393 {
1394 uint8_t mask = mr->dirty_log_mask;
1395 if (global_dirty_log) {
1396 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1397 }
1398 return mask;
1399 }
1400
1401 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1402 {
1403 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1404 }
1405
1406 bool memory_region_is_rom(MemoryRegion *mr)
1407 {
1408 return mr->ram && mr->readonly;
1409 }
1410
1411 bool memory_region_is_iommu(MemoryRegion *mr)
1412 {
1413 return mr->iommu_ops;
1414 }
1415
1416 void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1417 {
1418 notifier_list_add(&mr->iommu_notify, n);
1419 }
1420
1421 void memory_region_unregister_iommu_notifier(Notifier *n)
1422 {
1423 notifier_remove(n);
1424 }
1425
1426 void memory_region_notify_iommu(MemoryRegion *mr,
1427 IOMMUTLBEntry entry)
1428 {
1429 assert(memory_region_is_iommu(mr));
1430 notifier_list_notify(&mr->iommu_notify, &entry);
1431 }
1432
1433 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1434 {
1435 uint8_t mask = 1 << client;
1436
1437 assert(client == DIRTY_MEMORY_VGA);
1438 memory_region_transaction_begin();
1439 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1440 memory_region_update_pending |= mr->enabled;
1441 memory_region_transaction_commit();
1442 }
1443
1444 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1445 hwaddr size, unsigned client)
1446 {
1447 assert(mr->ram_addr != RAM_ADDR_INVALID);
1448 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client);
1449 }
1450
1451 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1452 hwaddr size)
1453 {
1454 assert(mr->ram_addr != RAM_ADDR_INVALID);
1455 cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size,
1456 memory_region_get_dirty_log_mask(mr));
1457 }
1458
1459 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1460 hwaddr size, unsigned client)
1461 {
1462 assert(mr->ram_addr != RAM_ADDR_INVALID);
1463 return cpu_physical_memory_test_and_clear_dirty(mr->ram_addr + addr,
1464 size, client);
1465 }
1466
1467
1468 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1469 {
1470 AddressSpace *as;
1471 FlatRange *fr;
1472
1473 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1474 FlatView *view = address_space_get_flatview(as);
1475 FOR_EACH_FLAT_RANGE(fr, view) {
1476 if (fr->mr == mr) {
1477 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1478 }
1479 }
1480 flatview_unref(view);
1481 }
1482 }
1483
1484 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1485 {
1486 if (mr->readonly != readonly) {
1487 memory_region_transaction_begin();
1488 mr->readonly = readonly;
1489 memory_region_update_pending |= mr->enabled;
1490 memory_region_transaction_commit();
1491 }
1492 }
1493
1494 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1495 {
1496 if (mr->romd_mode != romd_mode) {
1497 memory_region_transaction_begin();
1498 mr->romd_mode = romd_mode;
1499 memory_region_update_pending |= mr->enabled;
1500 memory_region_transaction_commit();
1501 }
1502 }
1503
1504 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1505 hwaddr size, unsigned client)
1506 {
1507 assert(mr->ram_addr != RAM_ADDR_INVALID);
1508 cpu_physical_memory_test_and_clear_dirty(mr->ram_addr + addr, size,
1509 client);
1510 }
1511
1512 int memory_region_get_fd(MemoryRegion *mr)
1513 {
1514 if (mr->alias) {
1515 return memory_region_get_fd(mr->alias);
1516 }
1517
1518 assert(mr->ram_addr != RAM_ADDR_INVALID);
1519
1520 return qemu_get_ram_fd(mr->ram_addr & TARGET_PAGE_MASK);
1521 }
1522
1523 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1524 {
1525 if (mr->alias) {
1526 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1527 }
1528
1529 assert(mr->ram_addr != RAM_ADDR_INVALID);
1530
1531 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1532 }
1533
1534 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
1535 {
1536 assert(mr->ram_addr != RAM_ADDR_INVALID);
1537
1538 qemu_ram_resize(mr->ram_addr, newsize, errp);
1539 }
1540
1541 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1542 {
1543 FlatView *view;
1544 FlatRange *fr;
1545 CoalescedMemoryRange *cmr;
1546 AddrRange tmp;
1547 MemoryRegionSection section;
1548
1549 view = address_space_get_flatview(as);
1550 FOR_EACH_FLAT_RANGE(fr, view) {
1551 if (fr->mr == mr) {
1552 section = (MemoryRegionSection) {
1553 .address_space = as,
1554 .offset_within_address_space = int128_get64(fr->addr.start),
1555 .size = fr->addr.size,
1556 };
1557
1558 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1559 int128_get64(fr->addr.start),
1560 int128_get64(fr->addr.size));
1561 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1562 tmp = addrrange_shift(cmr->addr,
1563 int128_sub(fr->addr.start,
1564 int128_make64(fr->offset_in_region)));
1565 if (!addrrange_intersects(tmp, fr->addr)) {
1566 continue;
1567 }
1568 tmp = addrrange_intersection(tmp, fr->addr);
1569 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1570 int128_get64(tmp.start),
1571 int128_get64(tmp.size));
1572 }
1573 }
1574 }
1575 flatview_unref(view);
1576 }
1577
1578 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1579 {
1580 AddressSpace *as;
1581
1582 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1583 memory_region_update_coalesced_range_as(mr, as);
1584 }
1585 }
1586
1587 void memory_region_set_coalescing(MemoryRegion *mr)
1588 {
1589 memory_region_clear_coalescing(mr);
1590 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1591 }
1592
1593 void memory_region_add_coalescing(MemoryRegion *mr,
1594 hwaddr offset,
1595 uint64_t size)
1596 {
1597 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1598
1599 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1600 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1601 memory_region_update_coalesced_range(mr);
1602 memory_region_set_flush_coalesced(mr);
1603 }
1604
1605 void memory_region_clear_coalescing(MemoryRegion *mr)
1606 {
1607 CoalescedMemoryRange *cmr;
1608 bool updated = false;
1609
1610 qemu_flush_coalesced_mmio_buffer();
1611 mr->flush_coalesced_mmio = false;
1612
1613 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1614 cmr = QTAILQ_FIRST(&mr->coalesced);
1615 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1616 g_free(cmr);
1617 updated = true;
1618 }
1619
1620 if (updated) {
1621 memory_region_update_coalesced_range(mr);
1622 }
1623 }
1624
1625 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1626 {
1627 mr->flush_coalesced_mmio = true;
1628 }
1629
1630 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1631 {
1632 qemu_flush_coalesced_mmio_buffer();
1633 if (QTAILQ_EMPTY(&mr->coalesced)) {
1634 mr->flush_coalesced_mmio = false;
1635 }
1636 }
1637
1638 void memory_region_set_global_locking(MemoryRegion *mr)
1639 {
1640 mr->global_locking = true;
1641 }
1642
1643 void memory_region_clear_global_locking(MemoryRegion *mr)
1644 {
1645 mr->global_locking = false;
1646 }
1647
1648 void memory_region_add_eventfd(MemoryRegion *mr,
1649 hwaddr addr,
1650 unsigned size,
1651 bool match_data,
1652 uint64_t data,
1653 EventNotifier *e)
1654 {
1655 MemoryRegionIoeventfd mrfd = {
1656 .addr.start = int128_make64(addr),
1657 .addr.size = int128_make64(size),
1658 .match_data = match_data,
1659 .data = data,
1660 .e = e,
1661 };
1662 unsigned i;
1663
1664 adjust_endianness(mr, &mrfd.data, size);
1665 memory_region_transaction_begin();
1666 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1667 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1668 break;
1669 }
1670 }
1671 ++mr->ioeventfd_nb;
1672 mr->ioeventfds = g_realloc(mr->ioeventfds,
1673 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1674 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1675 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1676 mr->ioeventfds[i] = mrfd;
1677 ioeventfd_update_pending |= mr->enabled;
1678 memory_region_transaction_commit();
1679 }
1680
1681 void memory_region_del_eventfd(MemoryRegion *mr,
1682 hwaddr addr,
1683 unsigned size,
1684 bool match_data,
1685 uint64_t data,
1686 EventNotifier *e)
1687 {
1688 MemoryRegionIoeventfd mrfd = {
1689 .addr.start = int128_make64(addr),
1690 .addr.size = int128_make64(size),
1691 .match_data = match_data,
1692 .data = data,
1693 .e = e,
1694 };
1695 unsigned i;
1696
1697 adjust_endianness(mr, &mrfd.data, size);
1698 memory_region_transaction_begin();
1699 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1700 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1701 break;
1702 }
1703 }
1704 assert(i != mr->ioeventfd_nb);
1705 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1706 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1707 --mr->ioeventfd_nb;
1708 mr->ioeventfds = g_realloc(mr->ioeventfds,
1709 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1710 ioeventfd_update_pending |= mr->enabled;
1711 memory_region_transaction_commit();
1712 }
1713
1714 static void memory_region_update_container_subregions(MemoryRegion *subregion)
1715 {
1716 hwaddr offset = subregion->addr;
1717 MemoryRegion *mr = subregion->container;
1718 MemoryRegion *other;
1719
1720 memory_region_transaction_begin();
1721
1722 memory_region_ref(subregion);
1723 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1724 if (subregion->may_overlap || other->may_overlap) {
1725 continue;
1726 }
1727 if (int128_ge(int128_make64(offset),
1728 int128_add(int128_make64(other->addr), other->size))
1729 || int128_le(int128_add(int128_make64(offset), subregion->size),
1730 int128_make64(other->addr))) {
1731 continue;
1732 }
1733 #if 0
1734 printf("warning: subregion collision %llx/%llx (%s) "
1735 "vs %llx/%llx (%s)\n",
1736 (unsigned long long)offset,
1737 (unsigned long long)int128_get64(subregion->size),
1738 subregion->name,
1739 (unsigned long long)other->addr,
1740 (unsigned long long)int128_get64(other->size),
1741 other->name);
1742 #endif
1743 }
1744 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1745 if (subregion->priority >= other->priority) {
1746 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1747 goto done;
1748 }
1749 }
1750 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1751 done:
1752 memory_region_update_pending |= mr->enabled && subregion->enabled;
1753 memory_region_transaction_commit();
1754 }
1755
1756 static void memory_region_add_subregion_common(MemoryRegion *mr,
1757 hwaddr offset,
1758 MemoryRegion *subregion)
1759 {
1760 assert(!subregion->container);
1761 subregion->container = mr;
1762 subregion->addr = offset;
1763 memory_region_update_container_subregions(subregion);
1764 }
1765
1766 void memory_region_add_subregion(MemoryRegion *mr,
1767 hwaddr offset,
1768 MemoryRegion *subregion)
1769 {
1770 subregion->may_overlap = false;
1771 subregion->priority = 0;
1772 memory_region_add_subregion_common(mr, offset, subregion);
1773 }
1774
1775 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1776 hwaddr offset,
1777 MemoryRegion *subregion,
1778 int priority)
1779 {
1780 subregion->may_overlap = true;
1781 subregion->priority = priority;
1782 memory_region_add_subregion_common(mr, offset, subregion);
1783 }
1784
1785 void memory_region_del_subregion(MemoryRegion *mr,
1786 MemoryRegion *subregion)
1787 {
1788 memory_region_transaction_begin();
1789 assert(subregion->container == mr);
1790 subregion->container = NULL;
1791 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1792 memory_region_unref(subregion);
1793 memory_region_update_pending |= mr->enabled && subregion->enabled;
1794 memory_region_transaction_commit();
1795 }
1796
1797 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1798 {
1799 if (enabled == mr->enabled) {
1800 return;
1801 }
1802 memory_region_transaction_begin();
1803 mr->enabled = enabled;
1804 memory_region_update_pending = true;
1805 memory_region_transaction_commit();
1806 }
1807
1808 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
1809 {
1810 Int128 s = int128_make64(size);
1811
1812 if (size == UINT64_MAX) {
1813 s = int128_2_64();
1814 }
1815 if (int128_eq(s, mr->size)) {
1816 return;
1817 }
1818 memory_region_transaction_begin();
1819 mr->size = s;
1820 memory_region_update_pending = true;
1821 memory_region_transaction_commit();
1822 }
1823
1824 static void memory_region_readd_subregion(MemoryRegion *mr)
1825 {
1826 MemoryRegion *container = mr->container;
1827
1828 if (container) {
1829 memory_region_transaction_begin();
1830 memory_region_ref(mr);
1831 memory_region_del_subregion(container, mr);
1832 mr->container = container;
1833 memory_region_update_container_subregions(mr);
1834 memory_region_unref(mr);
1835 memory_region_transaction_commit();
1836 }
1837 }
1838
1839 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1840 {
1841 if (addr != mr->addr) {
1842 mr->addr = addr;
1843 memory_region_readd_subregion(mr);
1844 }
1845 }
1846
1847 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
1848 {
1849 assert(mr->alias);
1850
1851 if (offset == mr->alias_offset) {
1852 return;
1853 }
1854
1855 memory_region_transaction_begin();
1856 mr->alias_offset = offset;
1857 memory_region_update_pending |= mr->enabled;
1858 memory_region_transaction_commit();
1859 }
1860
1861 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1862 {
1863 return mr->ram_addr;
1864 }
1865
1866 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
1867 {
1868 return mr->align;
1869 }
1870
1871 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1872 {
1873 const AddrRange *addr = addr_;
1874 const FlatRange *fr = fr_;
1875
1876 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1877 return -1;
1878 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1879 return 1;
1880 }
1881 return 0;
1882 }
1883
1884 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
1885 {
1886 return bsearch(&addr, view->ranges, view->nr,
1887 sizeof(FlatRange), cmp_flatrange_addr);
1888 }
1889
1890 bool memory_region_present(MemoryRegion *container, hwaddr addr)
1891 {
1892 MemoryRegion *mr = memory_region_find(container, addr, 1).mr;
1893 if (!mr || (mr == container)) {
1894 return false;
1895 }
1896 memory_region_unref(mr);
1897 return true;
1898 }
1899
1900 bool memory_region_is_mapped(MemoryRegion *mr)
1901 {
1902 return mr->container ? true : false;
1903 }
1904
1905 MemoryRegionSection memory_region_find(MemoryRegion *mr,
1906 hwaddr addr, uint64_t size)
1907 {
1908 MemoryRegionSection ret = { .mr = NULL };
1909 MemoryRegion *root;
1910 AddressSpace *as;
1911 AddrRange range;
1912 FlatView *view;
1913 FlatRange *fr;
1914
1915 addr += mr->addr;
1916 for (root = mr; root->container; ) {
1917 root = root->container;
1918 addr += root->addr;
1919 }
1920
1921 as = memory_region_to_address_space(root);
1922 if (!as) {
1923 return ret;
1924 }
1925 range = addrrange_make(int128_make64(addr), int128_make64(size));
1926
1927 rcu_read_lock();
1928 view = atomic_rcu_read(&as->current_map);
1929 fr = flatview_lookup(view, range);
1930 if (!fr) {
1931 goto out;
1932 }
1933
1934 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
1935 --fr;
1936 }
1937
1938 ret.mr = fr->mr;
1939 ret.address_space = as;
1940 range = addrrange_intersection(range, fr->addr);
1941 ret.offset_within_region = fr->offset_in_region;
1942 ret.offset_within_region += int128_get64(int128_sub(range.start,
1943 fr->addr.start));
1944 ret.size = range.size;
1945 ret.offset_within_address_space = int128_get64(range.start);
1946 ret.readonly = fr->readonly;
1947 memory_region_ref(ret.mr);
1948 out:
1949 rcu_read_unlock();
1950 return ret;
1951 }
1952
1953 void address_space_sync_dirty_bitmap(AddressSpace *as)
1954 {
1955 FlatView *view;
1956 FlatRange *fr;
1957
1958 view = address_space_get_flatview(as);
1959 FOR_EACH_FLAT_RANGE(fr, view) {
1960 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1961 }
1962 flatview_unref(view);
1963 }
1964
1965 void memory_global_dirty_log_start(void)
1966 {
1967 global_dirty_log = true;
1968
1969 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
1970
1971 /* Refresh DIRTY_LOG_MIGRATION bit. */
1972 memory_region_transaction_begin();
1973 memory_region_update_pending = true;
1974 memory_region_transaction_commit();
1975 }
1976
1977 void memory_global_dirty_log_stop(void)
1978 {
1979 global_dirty_log = false;
1980
1981 /* Refresh DIRTY_LOG_MIGRATION bit. */
1982 memory_region_transaction_begin();
1983 memory_region_update_pending = true;
1984 memory_region_transaction_commit();
1985
1986 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
1987 }
1988
1989 static void listener_add_address_space(MemoryListener *listener,
1990 AddressSpace *as)
1991 {
1992 FlatView *view;
1993 FlatRange *fr;
1994
1995 if (listener->address_space_filter
1996 && listener->address_space_filter != as) {
1997 return;
1998 }
1999
2000 if (global_dirty_log) {
2001 if (listener->log_global_start) {
2002 listener->log_global_start(listener);
2003 }
2004 }
2005
2006 view = address_space_get_flatview(as);
2007 FOR_EACH_FLAT_RANGE(fr, view) {
2008 MemoryRegionSection section = {
2009 .mr = fr->mr,
2010 .address_space = as,
2011 .offset_within_region = fr->offset_in_region,
2012 .size = fr->addr.size,
2013 .offset_within_address_space = int128_get64(fr->addr.start),
2014 .readonly = fr->readonly,
2015 };
2016 if (listener->region_add) {
2017 listener->region_add(listener, &section);
2018 }
2019 }
2020 flatview_unref(view);
2021 }
2022
2023 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
2024 {
2025 MemoryListener *other = NULL;
2026 AddressSpace *as;
2027
2028 listener->address_space_filter = filter;
2029 if (QTAILQ_EMPTY(&memory_listeners)
2030 || listener->priority >= QTAILQ_LAST(&memory_listeners,
2031 memory_listeners)->priority) {
2032 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2033 } else {
2034 QTAILQ_FOREACH(other, &memory_listeners, link) {
2035 if (listener->priority < other->priority) {
2036 break;
2037 }
2038 }
2039 QTAILQ_INSERT_BEFORE(other, listener, link);
2040 }
2041
2042 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2043 listener_add_address_space(listener, as);
2044 }
2045 }
2046
2047 void memory_listener_unregister(MemoryListener *listener)
2048 {
2049 QTAILQ_REMOVE(&memory_listeners, listener, link);
2050 }
2051
2052 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2053 {
2054 memory_region_ref(root);
2055 memory_region_transaction_begin();
2056 as->root = root;
2057 as->current_map = g_new(FlatView, 1);
2058 flatview_init(as->current_map);
2059 as->ioeventfd_nb = 0;
2060 as->ioeventfds = NULL;
2061 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2062 as->name = g_strdup(name ? name : "anonymous");
2063 address_space_init_dispatch(as);
2064 memory_region_update_pending |= root->enabled;
2065 memory_region_transaction_commit();
2066 }
2067
2068 static void do_address_space_destroy(AddressSpace *as)
2069 {
2070 MemoryListener *listener;
2071
2072 address_space_destroy_dispatch(as);
2073
2074 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2075 assert(listener->address_space_filter != as);
2076 }
2077
2078 flatview_unref(as->current_map);
2079 g_free(as->name);
2080 g_free(as->ioeventfds);
2081 memory_region_unref(as->root);
2082 }
2083
2084 void address_space_destroy(AddressSpace *as)
2085 {
2086 MemoryRegion *root = as->root;
2087
2088 /* Flush out anything from MemoryListeners listening in on this */
2089 memory_region_transaction_begin();
2090 as->root = NULL;
2091 memory_region_transaction_commit();
2092 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2093 address_space_unregister(as);
2094
2095 /* At this point, as->dispatch and as->current_map are dummy
2096 * entries that the guest should never use. Wait for the old
2097 * values to expire before freeing the data.
2098 */
2099 as->root = root;
2100 call_rcu(as, do_address_space_destroy, rcu);
2101 }
2102
2103 typedef struct MemoryRegionList MemoryRegionList;
2104
2105 struct MemoryRegionList {
2106 const MemoryRegion *mr;
2107 QTAILQ_ENTRY(MemoryRegionList) queue;
2108 };
2109
2110 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
2111
2112 static void mtree_print_mr(fprintf_function mon_printf, void *f,
2113 const MemoryRegion *mr, unsigned int level,
2114 hwaddr base,
2115 MemoryRegionListHead *alias_print_queue)
2116 {
2117 MemoryRegionList *new_ml, *ml, *next_ml;
2118 MemoryRegionListHead submr_print_queue;
2119 const MemoryRegion *submr;
2120 unsigned int i;
2121
2122 if (!mr) {
2123 return;
2124 }
2125
2126 for (i = 0; i < level; i++) {
2127 mon_printf(f, " ");
2128 }
2129
2130 if (mr->alias) {
2131 MemoryRegionList *ml;
2132 bool found = false;
2133
2134 /* check if the alias is already in the queue */
2135 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
2136 if (ml->mr == mr->alias) {
2137 found = true;
2138 }
2139 }
2140
2141 if (!found) {
2142 ml = g_new(MemoryRegionList, 1);
2143 ml->mr = mr->alias;
2144 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
2145 }
2146 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2147 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
2148 "-" TARGET_FMT_plx "%s\n",
2149 base + mr->addr,
2150 base + mr->addr
2151 + (int128_nz(mr->size) ?
2152 (hwaddr)int128_get64(int128_sub(mr->size,
2153 int128_one())) : 0),
2154 mr->priority,
2155 mr->romd_mode ? 'R' : '-',
2156 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2157 : '-',
2158 memory_region_name(mr),
2159 memory_region_name(mr->alias),
2160 mr->alias_offset,
2161 mr->alias_offset
2162 + (int128_nz(mr->size) ?
2163 (hwaddr)int128_get64(int128_sub(mr->size,
2164 int128_one())) : 0),
2165 mr->enabled ? "" : " [disabled]");
2166 } else {
2167 mon_printf(f,
2168 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s%s\n",
2169 base + mr->addr,
2170 base + mr->addr
2171 + (int128_nz(mr->size) ?
2172 (hwaddr)int128_get64(int128_sub(mr->size,
2173 int128_one())) : 0),
2174 mr->priority,
2175 mr->romd_mode ? 'R' : '-',
2176 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2177 : '-',
2178 memory_region_name(mr),
2179 mr->enabled ? "" : " [disabled]");
2180 }
2181
2182 QTAILQ_INIT(&submr_print_queue);
2183
2184 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2185 new_ml = g_new(MemoryRegionList, 1);
2186 new_ml->mr = submr;
2187 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2188 if (new_ml->mr->addr < ml->mr->addr ||
2189 (new_ml->mr->addr == ml->mr->addr &&
2190 new_ml->mr->priority > ml->mr->priority)) {
2191 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2192 new_ml = NULL;
2193 break;
2194 }
2195 }
2196 if (new_ml) {
2197 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2198 }
2199 }
2200
2201 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2202 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
2203 alias_print_queue);
2204 }
2205
2206 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
2207 g_free(ml);
2208 }
2209 }
2210
2211 void mtree_info(fprintf_function mon_printf, void *f)
2212 {
2213 MemoryRegionListHead ml_head;
2214 MemoryRegionList *ml, *ml2;
2215 AddressSpace *as;
2216
2217 QTAILQ_INIT(&ml_head);
2218
2219 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2220 mon_printf(f, "address-space: %s\n", as->name);
2221 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
2222 mon_printf(f, "\n");
2223 }
2224
2225 /* print aliased regions */
2226 QTAILQ_FOREACH(ml, &ml_head, queue) {
2227 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
2228 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
2229 mon_printf(f, "\n");
2230 }
2231
2232 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
2233 g_free(ml);
2234 }
2235 }
2236
2237 static const TypeInfo memory_region_info = {
2238 .parent = TYPE_OBJECT,
2239 .name = TYPE_MEMORY_REGION,
2240 .instance_size = sizeof(MemoryRegion),
2241 .instance_init = memory_region_initfn,
2242 .instance_finalize = memory_region_finalize,
2243 };
2244
2245 static void memory_register_types(void)
2246 {
2247 type_register_static(&memory_region_info);
2248 }
2249
2250 type_init(memory_register_types)
AR7 emulation for QEMU