tcg/tcg.h

   1 /*
   2  * Tiny Code Generator for QEMU
   3  *
   4  * Copyright (c) 2008 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #ifndef TCG_H
  26 #define TCG_H
  27
  28 #include "qemu-common.h"
  29 #include "qemu/bitops.h"
  30 #include "tcg-target.h"
  31
  32 /* Default target word size to pointer size.  */
  33 #ifndef TCG_TARGET_REG_BITS
  34 # if UINTPTR_MAX == UINT32_MAX
  35 #  define TCG_TARGET_REG_BITS 32
  36 # elif UINTPTR_MAX == UINT64_MAX
  37 #  define TCG_TARGET_REG_BITS 64
  38 # else
  39 #  error Unknown pointer size for tcg target
  40 # endif
  41 #endif
  42
  43 #if TCG_TARGET_REG_BITS == 32
  44 typedef int32_t tcg_target_long;
  45 typedef uint32_t tcg_target_ulong;
  46 #define TCG_PRIlx PRIx32
  47 #define TCG_PRIld PRId32
  48 #elif TCG_TARGET_REG_BITS == 64
  49 typedef int64_t tcg_target_long;
  50 typedef uint64_t tcg_target_ulong;
  51 #define TCG_PRIlx PRIx64
  52 #define TCG_PRIld PRId64
  53 #else
  54 #error unsupported
  55 #endif
  56
  57 #if TCG_TARGET_NB_REGS <= 32
  58 typedef uint32_t TCGRegSet;
  59 #elif TCG_TARGET_NB_REGS <= 64
  60 typedef uint64_t TCGRegSet;
  61 #else
  62 #error unsupported
  63 #endif
  64
  65 #if TCG_TARGET_REG_BITS == 32
  66 /* Turn some undef macros into false macros.  */
  67 #define TCG_TARGET_HAS_trunc_shr_i32    0
  68 #define TCG_TARGET_HAS_div_i64          0
  69 #define TCG_TARGET_HAS_rem_i64          0
  70 #define TCG_TARGET_HAS_div2_i64         0
  71 #define TCG_TARGET_HAS_rot_i64          0
  72 #define TCG_TARGET_HAS_ext8s_i64        0
  73 #define TCG_TARGET_HAS_ext16s_i64       0
  74 #define TCG_TARGET_HAS_ext32s_i64       0
  75 #define TCG_TARGET_HAS_ext8u_i64        0
  76 #define TCG_TARGET_HAS_ext16u_i64       0
  77 #define TCG_TARGET_HAS_ext32u_i64       0
  78 #define TCG_TARGET_HAS_bswap16_i64      0
  79 #define TCG_TARGET_HAS_bswap32_i64      0
  80 #define TCG_TARGET_HAS_bswap64_i64      0
  81 #define TCG_TARGET_HAS_neg_i64          0
  82 #define TCG_TARGET_HAS_not_i64          0
  83 #define TCG_TARGET_HAS_andc_i64         0
  84 #define TCG_TARGET_HAS_orc_i64          0
  85 #define TCG_TARGET_HAS_eqv_i64          0
  86 #define TCG_TARGET_HAS_nand_i64         0
  87 #define TCG_TARGET_HAS_nor_i64          0
  88 #define TCG_TARGET_HAS_deposit_i64      0
  89 #define TCG_TARGET_HAS_movcond_i64      0
  90 #define TCG_TARGET_HAS_add2_i64         0
  91 #define TCG_TARGET_HAS_sub2_i64         0
  92 #define TCG_TARGET_HAS_mulu2_i64        0
  93 #define TCG_TARGET_HAS_muls2_i64        0
  94 #define TCG_TARGET_HAS_muluh_i64        0
  95 #define TCG_TARGET_HAS_mulsh_i64        0
  96 /* Turn some undef macros into true macros.  */
  97 #define TCG_TARGET_HAS_add2_i32         1
  98 #define TCG_TARGET_HAS_sub2_i32         1
  99 #endif
 100
 101 #ifndef TCG_TARGET_deposit_i32_valid
 102 #define TCG_TARGET_deposit_i32_valid(ofs, len) 1
 103 #endif
 104 #ifndef TCG_TARGET_deposit_i64_valid
 105 #define TCG_TARGET_deposit_i64_valid(ofs, len) 1
 106 #endif
 107
 108 /* Only one of DIV or DIV2 should be defined.  */
 109 #if defined(TCG_TARGET_HAS_div_i32)
 110 #define TCG_TARGET_HAS_div2_i32         0
 111 #elif defined(TCG_TARGET_HAS_div2_i32)
 112 #define TCG_TARGET_HAS_div_i32          0
 113 #define TCG_TARGET_HAS_rem_i32          0
 114 #endif
 115 #if defined(TCG_TARGET_HAS_div_i64)
 116 #define TCG_TARGET_HAS_div2_i64         0
 117 #elif defined(TCG_TARGET_HAS_div2_i64)
 118 #define TCG_TARGET_HAS_div_i64          0
 119 #define TCG_TARGET_HAS_rem_i64          0
 120 #endif
 121
 122 /* For 32-bit targets, some sort of unsigned widening multiply is required.  */
 123 #if TCG_TARGET_REG_BITS == 32 \
 124     && !(defined(TCG_TARGET_HAS_mulu2_i32) \
 125          || defined(TCG_TARGET_HAS_muluh_i32))
 126 # error "Missing unsigned widening multiply"
 127 #endif
 128
 129 typedef enum TCGOpcode {
 130 #define DEF(name, oargs, iargs, cargs, flags) INDEX_op_ ## name,
 131 #include "tcg-opc.h"
 132 #undef DEF
 133     NB_OPS,
 134 } TCGOpcode;
 135
 136 #define tcg_regset_clear(d) (d) = 0
 137 #define tcg_regset_set(d, s) (d) = (s)
 138 #define tcg_regset_set32(d, reg, val32) (d) |= (val32) << (reg)
 139 #define tcg_regset_set_reg(d, r) (d) |= 1L << (r)
 140 #define tcg_regset_reset_reg(d, r) (d) &= ~(1L << (r))
 141 #define tcg_regset_test_reg(d, r) (((d) >> (r)) & 1)
 142 #define tcg_regset_or(d, a, b) (d) = (a) | (b)
 143 #define tcg_regset_and(d, a, b) (d) = (a) & (b)
 144 #define tcg_regset_andnot(d, a, b) (d) = (a) & ~(b)
 145 #define tcg_regset_not(d, a) (d) = ~(a)
 146
 147 #ifndef TCG_TARGET_INSN_UNIT_SIZE
 148 # error "Missing TCG_TARGET_INSN_UNIT_SIZE"
 149 #elif TCG_TARGET_INSN_UNIT_SIZE == 1
 150 typedef uint8_t tcg_insn_unit;
 151 #elif TCG_TARGET_INSN_UNIT_SIZE == 2
 152 typedef uint16_t tcg_insn_unit;
 153 #elif TCG_TARGET_INSN_UNIT_SIZE == 4
 154 typedef uint32_t tcg_insn_unit;
 155 #elif TCG_TARGET_INSN_UNIT_SIZE == 8
 156 typedef uint64_t tcg_insn_unit;
 157 #else
 158 /* The port better have done this.  */
 159 #endif
 160
 161
 162 typedef struct TCGRelocation {
 163     struct TCGRelocation *next;
 164     int type;
 165     tcg_insn_unit *ptr;
 166     intptr_t addend;
 167 } TCGRelocation;
 168
 169 typedef struct TCGLabel {
 170     int has_value;
 171     union {
 172         uintptr_t value;
 173         tcg_insn_unit *value_ptr;
 174         TCGRelocation *first_reloc;
 175     } u;
 176 } TCGLabel;
 177
 178 typedef struct TCGPool {
 179     struct TCGPool *next;
 180     int size;
 181     uint8_t data[0] __attribute__ ((aligned));
 182 } TCGPool;
 183
 184 #define TCG_POOL_CHUNK_SIZE 32768
 185
 186 #define TCG_MAX_LABELS 512
 187
 188 #define TCG_MAX_TEMPS 512
 189
 190 /* when the size of the arguments of a called function is smaller than
 191    this value, they are statically allocated in the TB stack frame */
 192 #define TCG_STATIC_CALL_ARGS_SIZE 128
 193
 194 typedef enum TCGType {
 195     TCG_TYPE_I32,
 196     TCG_TYPE_I64,
 197     TCG_TYPE_COUNT, /* number of different types */
 198
 199     /* An alias for the size of the host register.  */
 200 #if TCG_TARGET_REG_BITS == 32
 201     TCG_TYPE_REG = TCG_TYPE_I32,
 202 #else
 203     TCG_TYPE_REG = TCG_TYPE_I64,
 204 #endif
 205
 206     /* An alias for the size of the native pointer.  */
 207 #if UINTPTR_MAX == UINT32_MAX
 208     TCG_TYPE_PTR = TCG_TYPE_I32,
 209 #else
 210     TCG_TYPE_PTR = TCG_TYPE_I64,
 211 #endif
 212
 213     /* An alias for the size of the target "long", aka register.  */
 214 #if TARGET_LONG_BITS == 64
 215     TCG_TYPE_TL = TCG_TYPE_I64,
 216 #else
 217     TCG_TYPE_TL = TCG_TYPE_I32,
 218 #endif
 219 } TCGType;
 220
 221 /* Constants for qemu_ld and qemu_st for the Memory Operation field.  */
 222 typedef enum TCGMemOp {
 223     MO_8     = 0,
 224     MO_16    = 1,
 225     MO_32    = 2,
 226     MO_64    = 3,
 227     MO_SIZE  = 3,   /* Mask for the above.  */
 228
 229     MO_SIGN  = 4,   /* Sign-extended, otherwise zero-extended.  */
 230
 231     MO_BSWAP = 8,   /* Host reverse endian.  */
 232 #ifdef HOST_WORDS_BIGENDIAN
 233     MO_LE    = MO_BSWAP,
 234     MO_BE    = 0,
 235 #else
 236     MO_LE    = 0,
 237     MO_BE    = MO_BSWAP,
 238 #endif
 239 #ifdef TARGET_WORDS_BIGENDIAN
 240     MO_TE    = MO_BE,
 241 #else
 242     MO_TE    = MO_LE,
 243 #endif
 244
 245     /* Combinations of the above, for ease of use.  */
 246     MO_UB    = MO_8,
 247     MO_UW    = MO_16,
 248     MO_UL    = MO_32,
 249     MO_SB    = MO_SIGN | MO_8,
 250     MO_SW    = MO_SIGN | MO_16,
 251     MO_SL    = MO_SIGN | MO_32,
 252     MO_Q     = MO_64,
 253
 254     MO_LEUW  = MO_LE | MO_UW,
 255     MO_LEUL  = MO_LE | MO_UL,
 256     MO_LESW  = MO_LE | MO_SW,
 257     MO_LESL  = MO_LE | MO_SL,
 258     MO_LEQ   = MO_LE | MO_Q,
 259
 260     MO_BEUW  = MO_BE | MO_UW,
 261     MO_BEUL  = MO_BE | MO_UL,
 262     MO_BESW  = MO_BE | MO_SW,
 263     MO_BESL  = MO_BE | MO_SL,
 264     MO_BEQ   = MO_BE | MO_Q,
 265
 266     MO_TEUW  = MO_TE | MO_UW,
 267     MO_TEUL  = MO_TE | MO_UL,
 268     MO_TESW  = MO_TE | MO_SW,
 269     MO_TESL  = MO_TE | MO_SL,
 270     MO_TEQ   = MO_TE | MO_Q,
 271
 272     MO_SSIZE = MO_SIZE | MO_SIGN,
 273 } TCGMemOp;
 274
 275 typedef tcg_target_ulong TCGArg;
 276
 277 /* Define a type and accessor macros for variables.  Using a struct is
 278    nice because it gives some level of type safely.  Ideally the compiler
 279    be able to see through all this.  However in practice this is not true,
 280    especially on targets with braindamaged ABIs (e.g. i386).
 281    We use plain int by default to avoid this runtime overhead.
 282    Users of tcg_gen_* don't need to know about any of this, and should
 283    treat TCGv as an opaque type.
 284    In addition we do typechecking for different types of variables.  TCGv_i32
 285    and TCGv_i64 are 32/64-bit variables respectively.  TCGv and TCGv_ptr
 286    are aliases for target_ulong and host pointer sized values respectively.
 287  */
 288
 289 #ifdef CONFIG_DEBUG_TCG
 290 #define DEBUG_TCGV 1
 291 #endif
 292
 293 #ifdef DEBUG_TCGV
 294
 295 typedef struct
 296 {
 297     int i32;
 298 } TCGv_i32;
 299
 300 typedef struct
 301 {
 302     int i64;
 303 } TCGv_i64;
 304
 305 typedef struct {
 306     int iptr;
 307 } TCGv_ptr;
 308
 309 #define MAKE_TCGV_I32(i) __extension__                  \
 310     ({ TCGv_i32 make_tcgv_tmp = {i}; make_tcgv_tmp;})
 311 #define MAKE_TCGV_I64(i) __extension__                  \
 312     ({ TCGv_i64 make_tcgv_tmp = {i}; make_tcgv_tmp;})
 313 #define MAKE_TCGV_PTR(i) __extension__                  \
 314     ({ TCGv_ptr make_tcgv_tmp = {i}; make_tcgv_tmp; })
 315 #define GET_TCGV_I32(t) ((t).i32)
 316 #define GET_TCGV_I64(t) ((t).i64)
 317 #define GET_TCGV_PTR(t) ((t).iptr)
 318 #if TCG_TARGET_REG_BITS == 32
 319 #define TCGV_LOW(t) MAKE_TCGV_I32(GET_TCGV_I64(t))
 320 #define TCGV_HIGH(t) MAKE_TCGV_I32(GET_TCGV_I64(t) + 1)
 321 #endif
 322
 323 #else /* !DEBUG_TCGV */
 324
 325 typedef int TCGv_i32;
 326 typedef int TCGv_i64;
 327 #if TCG_TARGET_REG_BITS == 32
 328 #define TCGv_ptr TCGv_i32
 329 #else
 330 #define TCGv_ptr TCGv_i64
 331 #endif
 332 #define MAKE_TCGV_I32(x) (x)
 333 #define MAKE_TCGV_I64(x) (x)
 334 #define MAKE_TCGV_PTR(x) (x)
 335 #define GET_TCGV_I32(t) (t)
 336 #define GET_TCGV_I64(t) (t)
 337 #define GET_TCGV_PTR(t) (t)
 338
 339 #if TCG_TARGET_REG_BITS == 32
 340 #define TCGV_LOW(t) (t)
 341 #define TCGV_HIGH(t) ((t) + 1)
 342 #endif
 343
 344 #endif /* DEBUG_TCGV */
 345
 346 #define TCGV_EQUAL_I32(a, b) (GET_TCGV_I32(a) == GET_TCGV_I32(b))
 347 #define TCGV_EQUAL_I64(a, b) (GET_TCGV_I64(a) == GET_TCGV_I64(b))
 348 #define TCGV_EQUAL_PTR(a, b) (GET_TCGV_PTR(a) == GET_TCGV_PTR(b))
 349
 350 /* Dummy definition to avoid compiler warnings.  */
 351 #define TCGV_UNUSED_I32(x) x = MAKE_TCGV_I32(-1)
 352 #define TCGV_UNUSED_I64(x) x = MAKE_TCGV_I64(-1)
 353 #define TCGV_UNUSED_PTR(x) x = MAKE_TCGV_PTR(-1)
 354
 355 #define TCGV_IS_UNUSED_I32(x) (GET_TCGV_I32(x) == -1)
 356 #define TCGV_IS_UNUSED_I64(x) (GET_TCGV_I64(x) == -1)
 357 #define TCGV_IS_UNUSED_PTR(x) (GET_TCGV_PTR(x) == -1)
 358
 359 /* call flags */
 360 /* Helper does not read globals (either directly or through an exception). It
 361    implies TCG_CALL_NO_WRITE_GLOBALS. */
 362 #define TCG_CALL_NO_READ_GLOBALS    0x0010
 363 /* Helper does not write globals */
 364 #define TCG_CALL_NO_WRITE_GLOBALS   0x0020
 365 /* Helper can be safely suppressed if the return value is not used. */
 366 #define TCG_CALL_NO_SIDE_EFFECTS    0x0040
 367
 368 /* convenience version of most used call flags */
 369 #define TCG_CALL_NO_RWG         TCG_CALL_NO_READ_GLOBALS
 370 #define TCG_CALL_NO_WG          TCG_CALL_NO_WRITE_GLOBALS
 371 #define TCG_CALL_NO_SE          TCG_CALL_NO_SIDE_EFFECTS
 372 #define TCG_CALL_NO_RWG_SE      (TCG_CALL_NO_RWG | TCG_CALL_NO_SE)
 373 #define TCG_CALL_NO_WG_SE       (TCG_CALL_NO_WG | TCG_CALL_NO_SE)
 374
 375 /* used to align parameters */
 376 #define TCG_CALL_DUMMY_TCGV     MAKE_TCGV_I32(-1)
 377 #define TCG_CALL_DUMMY_ARG      ((TCGArg)(-1))
 378
 379 /* Conditions.  Note that these are laid out for easy manipulation by
 380    the functions below:
 381      bit 0 is used for inverting;
 382      bit 1 is signed,
 383      bit 2 is unsigned,
 384      bit 3 is used with bit 0 for swapping signed/unsigned.  */
 385 typedef enum {
 386     /* non-signed */
 387     TCG_COND_NEVER  = 0 | 0 | 0 | 0,
 388     TCG_COND_ALWAYS = 0 | 0 | 0 | 1,
 389     TCG_COND_EQ     = 8 | 0 | 0 | 0,
 390     TCG_COND_NE     = 8 | 0 | 0 | 1,
 391     /* signed */
 392     TCG_COND_LT     = 0 | 0 | 2 | 0,
 393     TCG_COND_GE     = 0 | 0 | 2 | 1,
 394     TCG_COND_LE     = 8 | 0 | 2 | 0,
 395     TCG_COND_GT     = 8 | 0 | 2 | 1,
 396     /* unsigned */
 397     TCG_COND_LTU    = 0 | 4 | 0 | 0,
 398     TCG_COND_GEU    = 0 | 4 | 0 | 1,
 399     TCG_COND_LEU    = 8 | 4 | 0 | 0,
 400     TCG_COND_GTU    = 8 | 4 | 0 | 1,
 401 } TCGCond;
 402
 403 /* Invert the sense of the comparison.  */
 404 static inline TCGCond tcg_invert_cond(TCGCond c)
 405 {
 406     return (TCGCond)(c ^ 1);
 407 }
 408
 409 /* Swap the operands in a comparison.  */
 410 static inline TCGCond tcg_swap_cond(TCGCond c)
 411 {
 412     return c & 6 ? (TCGCond)(c ^ 9) : c;
 413 }
 414
 415 /* Create an "unsigned" version of a "signed" comparison.  */
 416 static inline TCGCond tcg_unsigned_cond(TCGCond c)
 417 {
 418     return c & 2 ? (TCGCond)(c ^ 6) : c;
 419 }
 420
 421 /* Must a comparison be considered unsigned?  */
 422 static inline bool is_unsigned_cond(TCGCond c)
 423 {
 424     return (c & 4) != 0;
 425 }
 426
 427 /* Create a "high" version of a double-word comparison.
 428    This removes equality from a LTE or GTE comparison.  */
 429 static inline TCGCond tcg_high_cond(TCGCond c)
 430 {
 431     switch (c) {
 432     case TCG_COND_GE:
 433     case TCG_COND_LE:
 434     case TCG_COND_GEU:
 435     case TCG_COND_LEU:
 436         return (TCGCond)(c ^ 8);
 437     default:
 438         return c;
 439     }
 440 }
 441
 442 #define TEMP_VAL_DEAD  0
 443 #define TEMP_VAL_REG   1
 444 #define TEMP_VAL_MEM   2
 445 #define TEMP_VAL_CONST 3
 446
 447 /* XXX: optimize memory layout */
 448 typedef struct TCGTemp {
 449     TCGType base_type;
 450     TCGType type;
 451     int val_type;
 452     int reg;
 453     tcg_target_long val;
 454     int mem_reg;
 455     intptr_t mem_offset;
 456     unsigned int fixed_reg:1;
 457     unsigned int mem_coherent:1;
 458     unsigned int mem_allocated:1;
 459     unsigned int temp_local:1; /* If true, the temp is saved across
 460                                   basic blocks. Otherwise, it is not
 461                                   preserved across basic blocks. */
 462     unsigned int temp_allocated:1; /* never used for code gen */
 463     const char *name;
 464 } TCGTemp;
 465
 466 typedef struct TCGContext TCGContext;
 467
 468 typedef struct TCGTempSet {
 469     unsigned long l[BITS_TO_LONGS(TCG_MAX_TEMPS)];
 470 } TCGTempSet;
 471
 472 struct TCGContext {
 473     uint8_t *pool_cur, *pool_end;
 474     TCGPool *pool_first, *pool_current, *pool_first_large;
 475     TCGLabel *labels;
 476     int nb_labels;
 477     int nb_globals;
 478     int nb_temps;
 479
 480     /* goto_tb support */
 481     tcg_insn_unit *code_buf;
 482     uintptr_t *tb_next;
 483     uint16_t *tb_next_offset;
 484     uint16_t *tb_jmp_offset; /* != NULL if USE_DIRECT_JUMP */
 485
 486     /* liveness analysis */
 487     uint16_t *op_dead_args; /* for each operation, each bit tells if the
 488                                corresponding argument is dead */
 489     uint8_t *op_sync_args;  /* for each operation, each bit tells if the
 490                                corresponding output argument needs to be
 491                                sync to memory. */
 492
 493     /* tells in which temporary a given register is. It does not take
 494        into account fixed registers */
 495     int reg_to_temp[TCG_TARGET_NB_REGS];
 496     TCGRegSet reserved_regs;
 497     intptr_t current_frame_offset;
 498     intptr_t frame_start;
 499     intptr_t frame_end;
 500     int frame_reg;
 501
 502     tcg_insn_unit *code_ptr;
 503     TCGTemp temps[TCG_MAX_TEMPS]; /* globals first, temps after */
 504     TCGTempSet free_temps[TCG_TYPE_COUNT * 2];
 505
 506     GHashTable *helpers;
 507
 508 #ifdef CONFIG_PROFILER
 509     /* profiling info */
 510     int64_t tb_count1;
 511     int64_t tb_count;
 512     int64_t op_count; /* total insn count */
 513     int op_count_max; /* max insn per TB */
 514     int64_t temp_count;
 515     int temp_count_max;
 516     int64_t del_op_count;
 517     int64_t code_in_len;
 518     int64_t code_out_len;
 519     int64_t interm_time;
 520     int64_t code_time;
 521     int64_t la_time;
 522     int64_t opt_time;
 523     int64_t restore_count;
 524     int64_t restore_time;
 525 #endif
 526
 527 #ifdef CONFIG_DEBUG_TCG
 528     int temps_in_use;
 529     int goto_tb_issue_mask;
 530 #endif
 531
 532     uint16_t gen_opc_buf[OPC_BUF_SIZE];
 533     TCGArg gen_opparam_buf[OPPARAM_BUF_SIZE];
 534
 535     uint16_t *gen_opc_ptr;
 536     TCGArg *gen_opparam_ptr;
 537     target_ulong gen_opc_pc[OPC_BUF_SIZE];
 538     uint16_t gen_opc_icount[OPC_BUF_SIZE];
 539     uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
 540
 541     /* Code generation.  Note that we specifically do not use tcg_insn_unit
 542        here, because there's too much arithmetic throughout that relies
 543        on addition and subtraction working on bytes.  Rely on the GCC
 544        extension that allows arithmetic on void*.  */
 545     int code_gen_max_blocks;
 546     void *code_gen_prologue;
 547     void *code_gen_buffer;
 548     size_t code_gen_buffer_size;
 549     /* threshold to flush the translated code buffer */
 550     size_t code_gen_buffer_max_size;
 551     void *code_gen_ptr;
 552
 553     TBContext tb_ctx;
 554
 555     /* The TCGBackendData structure is private to tcg-target.c.  */
 556     struct TCGBackendData *be;
 557 };
 558
 559 extern TCGContext tcg_ctx;
 560
 561 /* pool based memory allocation */
 562
 563 void *tcg_malloc_internal(TCGContext *s, int size);
 564 void tcg_pool_reset(TCGContext *s);
 565 void tcg_pool_delete(TCGContext *s);
 566
 567 static inline void *tcg_malloc(int size)
 568 {
 569     TCGContext *s = &tcg_ctx;
 570     uint8_t *ptr, *ptr_end;
 571     size = (size + sizeof(long) - 1) & ~(sizeof(long) - 1);
 572     ptr = s->pool_cur;
 573     ptr_end = ptr + size;
 574     if (unlikely(ptr_end > s->pool_end)) {
 575         return tcg_malloc_internal(&tcg_ctx, size);
 576     } else {
 577         s->pool_cur = ptr_end;
 578         return ptr;
 579     }
 580 }
 581
 582 void tcg_context_init(TCGContext *s);
 583 void tcg_prologue_init(TCGContext *s);
 584 void tcg_func_start(TCGContext *s);
 585
 586 int tcg_gen_code(TCGContext *s, tcg_insn_unit *gen_code_buf);
 587 int tcg_gen_code_search_pc(TCGContext *s, tcg_insn_unit *gen_code_buf,
 588                            long offset);
 589
 590 void tcg_set_frame(TCGContext *s, int reg, intptr_t start, intptr_t size);
 591
 592 TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name);
 593 TCGv_i32 tcg_global_mem_new_i32(int reg, intptr_t offset, const char *name);
 594 TCGv_i32 tcg_temp_new_internal_i32(int temp_local);
 595 static inline TCGv_i32 tcg_temp_new_i32(void)
 596 {
 597     return tcg_temp_new_internal_i32(0);
 598 }
 599 static inline TCGv_i32 tcg_temp_local_new_i32(void)
 600 {
 601     return tcg_temp_new_internal_i32(1);
 602 }
 603 void tcg_temp_free_i32(TCGv_i32 arg);
 604 char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg);
 605
 606 TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name);
 607 TCGv_i64 tcg_global_mem_new_i64(int reg, intptr_t offset, const char *name);
 608 TCGv_i64 tcg_temp_new_internal_i64(int temp_local);
 609 static inline TCGv_i64 tcg_temp_new_i64(void)
 610 {
 611     return tcg_temp_new_internal_i64(0);
 612 }
 613 static inline TCGv_i64 tcg_temp_local_new_i64(void)
 614 {
 615     return tcg_temp_new_internal_i64(1);
 616 }
 617 void tcg_temp_free_i64(TCGv_i64 arg);
 618 char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg);
 619
 620 #if defined(CONFIG_DEBUG_TCG)
 621 /* If you call tcg_clear_temp_count() at the start of a section of
 622  * code which is not supposed to leak any TCG temporaries, then
 623  * calling tcg_check_temp_count() at the end of the section will
 624  * return 1 if the section did in fact leak a temporary.
 625  */
 626 void tcg_clear_temp_count(void);
 627 int tcg_check_temp_count(void);
 628 #else
 629 #define tcg_clear_temp_count() do { } while (0)
 630 #define tcg_check_temp_count() 0
 631 #endif
 632
 633 void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf);
 634
 635 #define TCG_CT_ALIAS  0x80
 636 #define TCG_CT_IALIAS 0x40
 637 #define TCG_CT_REG    0x01
 638 #define TCG_CT_CONST  0x02 /* any constant of register size */
 639
 640 typedef struct TCGArgConstraint {
 641     uint16_t ct;
 642     uint8_t alias_index;
 643     union {
 644         TCGRegSet regs;
 645     } u;
 646 } TCGArgConstraint;
 647
 648 #define TCG_MAX_OP_ARGS 16
 649
 650 /* Bits for TCGOpDef->flags, 8 bits available.  */
 651 enum {
 652     /* Instruction defines the end of a basic block.  */
 653     TCG_OPF_BB_END       = 0x01,
 654     /* Instruction clobbers call registers and potentially update globals.  */
 655     TCG_OPF_CALL_CLOBBER = 0x02,
 656     /* Instruction has side effects: it cannot be removed if its outputs
 657        are not used, and might trigger exceptions.  */
 658     TCG_OPF_SIDE_EFFECTS = 0x04,
 659     /* Instruction operands are 64-bits (otherwise 32-bits).  */
 660     TCG_OPF_64BIT        = 0x08,
 661     /* Instruction is optional and not implemented by the host, or insn
 662        is generic and should not be implemened by the host.  */
 663     TCG_OPF_NOT_PRESENT  = 0x10,
 664 };
 665
 666 typedef struct TCGOpDef {
 667     const char *name;
 668     uint8_t nb_oargs, nb_iargs, nb_cargs, nb_args;
 669     uint8_t flags;
 670     TCGArgConstraint *args_ct;
 671     int *sorted_args;
 672 #if defined(CONFIG_DEBUG_TCG)
 673     int used;
 674 #endif
 675 } TCGOpDef;
 676
 677 extern TCGOpDef tcg_op_defs[];
 678 extern const size_t tcg_op_defs_max;
 679
 680 typedef struct TCGTargetOpDef {
 681     TCGOpcode op;
 682     const char *args_ct_str[TCG_MAX_OP_ARGS];
 683 } TCGTargetOpDef;
 684
 685 #define tcg_abort() \
 686 do {\
 687     fprintf(stderr, "%s:%d: tcg fatal error\n", __FILE__, __LINE__);\
 688     abort();\
 689 } while (0)
 690
 691 #ifdef CONFIG_DEBUG_TCG
 692 # define tcg_debug_assert(X) do { assert(X); } while (0)
 693 #elif QEMU_GNUC_PREREQ(4, 5)
 694 # define tcg_debug_assert(X) \
 695     do { if (!(X)) { __builtin_unreachable(); } } while (0)
 696 #else
 697 # define tcg_debug_assert(X) do { (void)(X); } while (0)
 698 #endif
 699
 700 void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs);
 701
 702 #if UINTPTR_MAX == UINT32_MAX
 703 #define TCGV_NAT_TO_PTR(n) MAKE_TCGV_PTR(GET_TCGV_I32(n))
 704 #define TCGV_PTR_TO_NAT(n) MAKE_TCGV_I32(GET_TCGV_PTR(n))
 705
 706 #define tcg_const_ptr(V) TCGV_NAT_TO_PTR(tcg_const_i32((intptr_t)(V)))
 707 #define tcg_global_reg_new_ptr(R, N) \
 708     TCGV_NAT_TO_PTR(tcg_global_reg_new_i32((R), (N)))
 709 #define tcg_global_mem_new_ptr(R, O, N) \
 710     TCGV_NAT_TO_PTR(tcg_global_mem_new_i32((R), (O), (N)))
 711 #define tcg_temp_new_ptr() TCGV_NAT_TO_PTR(tcg_temp_new_i32())
 712 #define tcg_temp_free_ptr(T) tcg_temp_free_i32(TCGV_PTR_TO_NAT(T))
 713 #else
 714 #define TCGV_NAT_TO_PTR(n) MAKE_TCGV_PTR(GET_TCGV_I64(n))
 715 #define TCGV_PTR_TO_NAT(n) MAKE_TCGV_I64(GET_TCGV_PTR(n))
 716
 717 #define tcg_const_ptr(V) TCGV_NAT_TO_PTR(tcg_const_i64((intptr_t)(V)))
 718 #define tcg_global_reg_new_ptr(R, N) \
 719     TCGV_NAT_TO_PTR(tcg_global_reg_new_i64((R), (N)))
 720 #define tcg_global_mem_new_ptr(R, O, N) \
 721     TCGV_NAT_TO_PTR(tcg_global_mem_new_i64((R), (O), (N)))
 722 #define tcg_temp_new_ptr() TCGV_NAT_TO_PTR(tcg_temp_new_i64())
 723 #define tcg_temp_free_ptr(T) tcg_temp_free_i64(TCGV_PTR_TO_NAT(T))
 724 #endif
 725
 726 void tcg_gen_callN(TCGContext *s, void *func,
 727                    TCGArg ret, int nargs, TCGArg *args);
 728
 729 void tcg_gen_shifti_i64(TCGv_i64 ret, TCGv_i64 arg1,
 730                         int c, int right, int arith);
 731
 732 TCGArg *tcg_optimize(TCGContext *s, uint16_t *tcg_opc_ptr, TCGArg *args,
 733                      TCGOpDef *tcg_op_def);
 734
 735 /* only used for debugging purposes */
 736 void tcg_dump_ops(TCGContext *s);
 737
 738 void dump_ops(const uint16_t *opc_buf, const TCGArg *opparam_buf);
 739 TCGv_i32 tcg_const_i32(int32_t val);
 740 TCGv_i64 tcg_const_i64(int64_t val);
 741 TCGv_i32 tcg_const_local_i32(int32_t val);
 742 TCGv_i64 tcg_const_local_i64(int64_t val);
 743
 744 /**
 745  * tcg_ptr_byte_diff
 746  * @a, @b: addresses to be differenced
 747  *
 748  * There are many places within the TCG backends where we need a byte
 749  * difference between two pointers.  While this can be accomplished
 750  * with local casting, it's easy to get wrong -- especially if one is
 751  * concerned with the signedness of the result.
 752  *
 753  * This version relies on GCC's void pointer arithmetic to get the
 754  * correct result.
 755  */
 756
 757 static inline ptrdiff_t tcg_ptr_byte_diff(void *a, void *b)
 758 {
 759     return a - b;
 760 }
 761
 762 /**
 763  * tcg_pcrel_diff
 764  * @s: the tcg context
 765  * @target: address of the target
 766  *
 767  * Produce a pc-relative difference, from the current code_ptr
 768  * to the destination address.
 769  */
 770
 771 static inline ptrdiff_t tcg_pcrel_diff(TCGContext *s, void *target)
 772 {
 773     return tcg_ptr_byte_diff(target, s->code_ptr);
 774 }
 775
 776 /**
 777  * tcg_current_code_size
 778  * @s: the tcg context
 779  *
 780  * Compute the current code size within the translation block.
 781  * This is used to fill in qemu's data structures for goto_tb.
 782  */
 783
 784 static inline size_t tcg_current_code_size(TCGContext *s)
 785 {
 786     return tcg_ptr_byte_diff(s->code_ptr, s->code_buf);
 787 }
 788
 789 /**
 790  * tcg_qemu_tb_exec:
 791  * @env: CPUArchState * for the CPU
 792  * @tb_ptr: address of generated code for the TB to execute
 793  *
 794  * Start executing code from a given translation block.
 795  * Where translation blocks have been linked, execution
 796  * may proceed from the given TB into successive ones.
 797  * Control eventually returns only when some action is needed
 798  * from the top-level loop: either control must pass to a TB
 799  * which has not yet been directly linked, or an asynchronous
 800  * event such as an interrupt needs handling.
 801  *
 802  * The return value is a pointer to the next TB to execute
 803  * (if known; otherwise zero). This pointer is assumed to be
 804  * 4-aligned, and the bottom two bits are used to return further
 805  * information:
 806  *  0, 1: the link between this TB and the next is via the specified
 807  *        TB index (0 or 1). That is, we left the TB via (the equivalent
 808  *        of) "goto_tb <index>". The main loop uses this to determine
 809  *        how to link the TB just executed to the next.
 810  *  2:    we are using instruction counting code generation, and we
 811  *        did not start executing this TB because the instruction counter
 812  *        would hit zero midway through it. In this case the next-TB pointer
 813  *        returned is the TB we were about to execute, and the caller must
 814  *        arrange to execute the remaining count of instructions.
 815  *  3:    we stopped because the CPU's exit_request flag was set
 816  *        (usually meaning that there is an interrupt that needs to be
 817  *        handled). The next-TB pointer returned is the TB we were
 818  *        about to execute when we noticed the pending exit request.
 819  *
 820  * If the bottom two bits indicate an exit-via-index then the CPU
 821  * state is correctly synchronised and ready for execution of the next
 822  * TB (and in particular the guest PC is the address to execute next).
 823  * Otherwise, we gave up on execution of this TB before it started, and
 824  * the caller must fix up the CPU state by calling cpu_pc_from_tb()
 825  * with the next-TB pointer we return.
 826  *
 827  * Note that TCG targets may use a different definition of tcg_qemu_tb_exec
 828  * to this default (which just calls the prologue.code emitted by
 829  * tcg_target_qemu_prologue()).
 830  */
 831 #define TB_EXIT_MASK 3
 832 #define TB_EXIT_IDX0 0
 833 #define TB_EXIT_IDX1 1
 834 #define TB_EXIT_ICOUNT_EXPIRED 2
 835 #define TB_EXIT_REQUESTED 3
 836
 837 #if !defined(tcg_qemu_tb_exec)
 838 # define tcg_qemu_tb_exec(env, tb_ptr) \
 839     ((uintptr_t (*)(void *, void *))tcg_ctx.code_gen_prologue)(env, tb_ptr)
 840 #endif
 841
 842 void tcg_register_jit(void *buf, size_t buf_size);
 843
 844 /*
 845  * Memory helpers that will be used by TCG generated code.
 846  */
 847 #ifdef CONFIG_SOFTMMU
 848 /* Value zero-extended to tcg register size.  */
 849 tcg_target_ulong helper_ret_ldub_mmu(CPUArchState *env, target_ulong addr,
 850                                      int mmu_idx, uintptr_t retaddr);
 851 tcg_target_ulong helper_le_lduw_mmu(CPUArchState *env, target_ulong addr,
 852                                     int mmu_idx, uintptr_t retaddr);
 853 tcg_target_ulong helper_le_ldul_mmu(CPUArchState *env, target_ulong addr,
 854                                     int mmu_idx, uintptr_t retaddr);
 855 uint64_t helper_le_ldq_mmu(CPUArchState *env, target_ulong addr,
 856                            int mmu_idx, uintptr_t retaddr);
 857 tcg_target_ulong helper_be_lduw_mmu(CPUArchState *env, target_ulong addr,
 858                                     int mmu_idx, uintptr_t retaddr);
 859 tcg_target_ulong helper_be_ldul_mmu(CPUArchState *env, target_ulong addr,
 860                                     int mmu_idx, uintptr_t retaddr);
 861 uint64_t helper_be_ldq_mmu(CPUArchState *env, target_ulong addr,
 862                            int mmu_idx, uintptr_t retaddr);
 863
 864 /* Value sign-extended to tcg register size.  */
 865 tcg_target_ulong helper_ret_ldsb_mmu(CPUArchState *env, target_ulong addr,
 866                                      int mmu_idx, uintptr_t retaddr);
 867 tcg_target_ulong helper_le_ldsw_mmu(CPUArchState *env, target_ulong addr,
 868                                     int mmu_idx, uintptr_t retaddr);
 869 tcg_target_ulong helper_le_ldsl_mmu(CPUArchState *env, target_ulong addr,
 870                                     int mmu_idx, uintptr_t retaddr);
 871 tcg_target_ulong helper_be_ldsw_mmu(CPUArchState *env, target_ulong addr,
 872                                     int mmu_idx, uintptr_t retaddr);
 873 tcg_target_ulong helper_be_ldsl_mmu(CPUArchState *env, target_ulong addr,
 874                                     int mmu_idx, uintptr_t retaddr);
 875
 876 void helper_ret_stb_mmu(CPUArchState *env, target_ulong addr, uint8_t val,
 877                         int mmu_idx, uintptr_t retaddr);
 878 void helper_le_stw_mmu(CPUArchState *env, target_ulong addr, uint16_t val,
 879                        int mmu_idx, uintptr_t retaddr);
 880 void helper_le_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val,
 881                        int mmu_idx, uintptr_t retaddr);
 882 void helper_le_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,
 883                        int mmu_idx, uintptr_t retaddr);
 884 void helper_be_stw_mmu(CPUArchState *env, target_ulong addr, uint16_t val,
 885                        int mmu_idx, uintptr_t retaddr);
 886 void helper_be_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val,
 887                        int mmu_idx, uintptr_t retaddr);
 888 void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,
 889                        int mmu_idx, uintptr_t retaddr);
 890
 891 /* Temporary aliases until backends are converted.  */
 892 #ifdef TARGET_WORDS_BIGENDIAN
 893 # define helper_ret_ldsw_mmu  helper_be_ldsw_mmu
 894 # define helper_ret_lduw_mmu  helper_be_lduw_mmu
 895 # define helper_ret_ldsl_mmu  helper_be_ldsl_mmu
 896 # define helper_ret_ldul_mmu  helper_be_ldul_mmu
 897 # define helper_ret_ldq_mmu   helper_be_ldq_mmu
 898 # define helper_ret_stw_mmu   helper_be_stw_mmu
 899 # define helper_ret_stl_mmu   helper_be_stl_mmu
 900 # define helper_ret_stq_mmu   helper_be_stq_mmu
 901 #else
 902 # define helper_ret_ldsw_mmu  helper_le_ldsw_mmu
 903 # define helper_ret_lduw_mmu  helper_le_lduw_mmu
 904 # define helper_ret_ldsl_mmu  helper_le_ldsl_mmu
 905 # define helper_ret_ldul_mmu  helper_le_ldul_mmu
 906 # define helper_ret_ldq_mmu   helper_le_ldq_mmu
 907 # define helper_ret_stw_mmu   helper_le_stw_mmu
 908 # define helper_ret_stl_mmu   helper_le_stl_mmu
 909 # define helper_ret_stq_mmu   helper_le_stq_mmu
 910 #endif
 911
 912 #endif /* CONFIG_SOFTMMU */
 913
 914 #endif /* TCG_H */