sparc tcg cpus: Fix Lesser GPL version number
[qemu/ar7.git] / hw / arm / msf2-som.c
blobf9b61c36ddbaa7452d12147a86bc2f46eda1fea8
1 /*
2 * SmartFusion2 SOM starter kit(from Emcraft) emulation.
4 * Copyright (c) 2017 Subbaraya Sundeep <sundeep.lkml@gmail.com>
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
25 #include "qemu/osdep.h"
26 #include "qemu/units.h"
27 #include "qapi/error.h"
28 #include "qemu/error-report.h"
29 #include "hw/boards.h"
30 #include "hw/qdev-properties.h"
31 #include "hw/arm/boot.h"
32 #include "exec/address-spaces.h"
33 #include "hw/arm/msf2-soc.h"
34 #include "cpu.h"
36 #define DDR_BASE_ADDRESS 0xA0000000
37 #define DDR_SIZE (64 * MiB)
39 #define M2S010_ENVM_SIZE (256 * KiB)
40 #define M2S010_ESRAM_SIZE (64 * KiB)
42 static void emcraft_sf2_s2s010_init(MachineState *machine)
44 DeviceState *dev;
45 DeviceState *spi_flash;
46 MSF2State *soc;
47 MachineClass *mc = MACHINE_GET_CLASS(machine);
48 DriveInfo *dinfo = drive_get_next(IF_MTD);
49 qemu_irq cs_line;
50 BusState *spi_bus;
51 MemoryRegion *sysmem = get_system_memory();
52 MemoryRegion *ddr = g_new(MemoryRegion, 1);
54 if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) {
55 error_report("This board can only be used with CPU %s",
56 mc->default_cpu_type);
57 exit(1);
60 memory_region_init_ram(ddr, NULL, "ddr-ram", DDR_SIZE,
61 &error_fatal);
62 memory_region_add_subregion(sysmem, DDR_BASE_ADDRESS, ddr);
64 dev = qdev_new(TYPE_MSF2_SOC);
65 qdev_prop_set_string(dev, "part-name", "M2S010");
66 qdev_prop_set_string(dev, "cpu-type", mc->default_cpu_type);
68 qdev_prop_set_uint64(dev, "eNVM-size", M2S010_ENVM_SIZE);
69 qdev_prop_set_uint64(dev, "eSRAM-size", M2S010_ESRAM_SIZE);
72 * CPU clock and peripheral clocks(APB0, APB1)are configurable
73 * in Libero. CPU clock is divided by APB0 and APB1 divisors for
74 * peripherals. Emcraft's SoM kit comes with these settings by default.
76 qdev_prop_set_uint32(dev, "m3clk", 142 * 1000000);
77 qdev_prop_set_uint32(dev, "apb0div", 2);
78 qdev_prop_set_uint32(dev, "apb1div", 2);
80 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
82 soc = MSF2_SOC(dev);
84 /* Attach SPI flash to SPI0 controller */
85 spi_bus = qdev_get_child_bus(dev, "spi0");
86 spi_flash = qdev_new("s25sl12801");
87 qdev_prop_set_uint8(spi_flash, "spansion-cr2nv", 1);
88 if (dinfo) {
89 qdev_prop_set_drive_err(spi_flash, "drive",
90 blk_by_legacy_dinfo(dinfo), &error_fatal);
92 qdev_realize_and_unref(spi_flash, spi_bus, &error_fatal);
93 cs_line = qdev_get_gpio_in_named(spi_flash, SSI_GPIO_CS, 0);
94 sysbus_connect_irq(SYS_BUS_DEVICE(&soc->spi[0]), 1, cs_line);
96 armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename,
97 soc->envm_size);
100 static void emcraft_sf2_machine_init(MachineClass *mc)
102 mc->desc = "SmartFusion2 SOM kit from Emcraft (M2S010)";
103 mc->init = emcraft_sf2_s2s010_init;
104 mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m3");
107 DEFINE_MACHINE("emcraft-sf2", emcraft_sf2_machine_init)