tcg/s390/tcg-target.h

   1 /*
   2  * Tiny Code Generator for QEMU
   3  *
   4  * Copyright (c) 2009 Ulrich Hecht <uli@suse.de>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #ifndef TCG_TARGET_S390
  25 #define TCG_TARGET_S390 1
  26
  27 #define TCG_TARGET_WORDS_BIGENDIAN
  28
  29 typedef enum TCGReg {
  30     TCG_REG_R0 = 0,
  31     TCG_REG_R1,
  32     TCG_REG_R2,
  33     TCG_REG_R3,
  34     TCG_REG_R4,
  35     TCG_REG_R5,
  36     TCG_REG_R6,
  37     TCG_REG_R7,
  38     TCG_REG_R8,
  39     TCG_REG_R9,
  40     TCG_REG_R10,
  41     TCG_REG_R11,
  42     TCG_REG_R12,
  43     TCG_REG_R13,
  44     TCG_REG_R14,
  45     TCG_REG_R15
  46 } TCGReg;
  47
  48 #define TCG_TARGET_NB_REGS 16
  49
  50 /* optional instructions */
  51 #define TCG_TARGET_HAS_div2_i32         1
  52 #define TCG_TARGET_HAS_rot_i32          1
  53 #define TCG_TARGET_HAS_ext8s_i32        1
  54 #define TCG_TARGET_HAS_ext16s_i32       1
  55 #define TCG_TARGET_HAS_ext8u_i32        1
  56 #define TCG_TARGET_HAS_ext16u_i32       1
  57 #define TCG_TARGET_HAS_bswap16_i32      1
  58 #define TCG_TARGET_HAS_bswap32_i32      1
  59 #define TCG_TARGET_HAS_not_i32          0
  60 #define TCG_TARGET_HAS_neg_i32          1
  61 #define TCG_TARGET_HAS_andc_i32         0
  62 #define TCG_TARGET_HAS_orc_i32          0
  63 #define TCG_TARGET_HAS_eqv_i32          0
  64 #define TCG_TARGET_HAS_nand_i32         0
  65 #define TCG_TARGET_HAS_nor_i32          0
  66 #define TCG_TARGET_HAS_deposit_i32      1
  67 #define TCG_TARGET_HAS_movcond_i32      1
  68 #define TCG_TARGET_HAS_add2_i32         1
  69 #define TCG_TARGET_HAS_sub2_i32         1
  70 #define TCG_TARGET_HAS_mulu2_i32        0
  71 #define TCG_TARGET_HAS_muls2_i32        0
  72
  73 #define TCG_TARGET_HAS_div2_i64         1
  74 #define TCG_TARGET_HAS_rot_i64          1
  75 #define TCG_TARGET_HAS_ext8s_i64        1
  76 #define TCG_TARGET_HAS_ext16s_i64       1
  77 #define TCG_TARGET_HAS_ext32s_i64       1
  78 #define TCG_TARGET_HAS_ext8u_i64        1
  79 #define TCG_TARGET_HAS_ext16u_i64       1
  80 #define TCG_TARGET_HAS_ext32u_i64       1
  81 #define TCG_TARGET_HAS_bswap16_i64      1
  82 #define TCG_TARGET_HAS_bswap32_i64      1
  83 #define TCG_TARGET_HAS_bswap64_i64      1
  84 #define TCG_TARGET_HAS_not_i64          0
  85 #define TCG_TARGET_HAS_neg_i64          1
  86 #define TCG_TARGET_HAS_andc_i64         0
  87 #define TCG_TARGET_HAS_orc_i64          0
  88 #define TCG_TARGET_HAS_eqv_i64          0
  89 #define TCG_TARGET_HAS_nand_i64         0
  90 #define TCG_TARGET_HAS_nor_i64          0
  91 #define TCG_TARGET_HAS_deposit_i64      1
  92 #define TCG_TARGET_HAS_movcond_i64      1
  93 #define TCG_TARGET_HAS_add2_i64         1
  94 #define TCG_TARGET_HAS_sub2_i64         1
  95 #define TCG_TARGET_HAS_mulu2_i64        1
  96 #define TCG_TARGET_HAS_muls2_i64        0
  97
  98 extern bool tcg_target_deposit_valid(int ofs, int len);
  99 #define TCG_TARGET_deposit_i32_valid  tcg_target_deposit_valid
 100 #define TCG_TARGET_deposit_i64_valid  tcg_target_deposit_valid
 101
 102 /* used for function call generation */
 103 #define TCG_REG_CALL_STACK              TCG_REG_R15
 104 #define TCG_TARGET_STACK_ALIGN          8
 105 #define TCG_TARGET_CALL_STACK_OFFSET    160
 106
 107 #define TCG_TARGET_EXTEND_ARGS 1
 108
 109 enum {
 110     TCG_AREG0 = TCG_REG_R10,
 111 };
 112
 113 static inline void flush_icache_range(tcg_target_ulong start,
 114                                       tcg_target_ulong stop)
 115 {
 116 }
 117
 118 #endif