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i.MX: Add SOC support for i.MX31
[qemu/ar7.git] / memory.c
blob0d8b2d96a993273ea0ac000bc6fecdb0fdd3f6a6
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "exec/memory.h"
17 #include "exec/address-spaces.h"
18 #include "exec/ioport.h"
19 #include "qapi/visitor.h"
20 #include "qemu/bitops.h"
21 #include "qom/object.h"
22 #include "trace.h"
23 #include <assert.h>
24
25 #include "exec/memory-internal.h"
26 #include "exec/ram_addr.h"
27 #include "sysemu/sysemu.h"
28
29 //#define DEBUG_UNASSIGNED
30
31 #define RAM_ADDR_INVALID (~(ram_addr_t)0)
32
33 static unsigned memory_region_transaction_depth;
34 static bool memory_region_update_pending;
35 static bool ioeventfd_update_pending;
36 static bool global_dirty_log = false;
37
38 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
39 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
40
41 static QTAILQ_HEAD(, AddressSpace) address_spaces
42 = QTAILQ_HEAD_INITIALIZER(address_spaces);
43
44 typedef struct AddrRange AddrRange;
45
46 /*
47 * Note that signed integers are needed for negative offsetting in aliases
48 * (large MemoryRegion::alias_offset).
49 */
50 struct AddrRange {
51 Int128 start;
52 Int128 size;
53 };
54
55 static AddrRange addrrange_make(Int128 start, Int128 size)
56 {
57 return (AddrRange) { start, size };
58 }
59
60 static bool addrrange_equal(AddrRange r1, AddrRange r2)
61 {
62 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
63 }
64
65 static Int128 addrrange_end(AddrRange r)
66 {
67 return int128_add(r.start, r.size);
68 }
69
70 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
71 {
72 int128_addto(&range.start, delta);
73 return range;
74 }
75
76 static bool addrrange_contains(AddrRange range, Int128 addr)
77 {
78 return int128_ge(addr, range.start)
79 && int128_lt(addr, addrrange_end(range));
80 }
81
82 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
83 {
84 return addrrange_contains(r1, r2.start)
85 || addrrange_contains(r2, r1.start);
86 }
87
88 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
89 {
90 Int128 start = int128_max(r1.start, r2.start);
91 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
92 return addrrange_make(start, int128_sub(end, start));
93 }
94
95 enum ListenerDirection { Forward, Reverse };
96
97 static bool memory_listener_match(MemoryListener *listener,
98 MemoryRegionSection *section)
99 {
100 return !listener->address_space_filter
101 || listener->address_space_filter == section->address_space;
102 }
103
104 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
105 do { \
106 MemoryListener *_listener; \
107 \
108 switch (_direction) { \
109 case Forward: \
110 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
111 if (_listener->_callback) { \
112 _listener->_callback(_listener, ##_args); \
113 } \
114 } \
115 break; \
116 case Reverse: \
117 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
118 memory_listeners, link) { \
119 if (_listener->_callback) { \
120 _listener->_callback(_listener, ##_args); \
121 } \
122 } \
123 break; \
124 default: \
125 abort(); \
126 } \
127 } while (0)
128
129 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
130 do { \
131 MemoryListener *_listener; \
132 \
133 switch (_direction) { \
134 case Forward: \
135 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
136 if (_listener->_callback \
137 && memory_listener_match(_listener, _section)) { \
138 _listener->_callback(_listener, _section, ##_args); \
139 } \
140 } \
141 break; \
142 case Reverse: \
143 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
144 memory_listeners, link) { \
145 if (_listener->_callback \
146 && memory_listener_match(_listener, _section)) { \
147 _listener->_callback(_listener, _section, ##_args); \
148 } \
149 } \
150 break; \
151 default: \
152 abort(); \
153 } \
154 } while (0)
155
156 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
157 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
158 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
159 .mr = (fr)->mr, \
160 .address_space = (as), \
161 .offset_within_region = (fr)->offset_in_region, \
162 .size = (fr)->addr.size, \
163 .offset_within_address_space = int128_get64((fr)->addr.start), \
164 .readonly = (fr)->readonly, \
165 }), ##_args)
166
167 struct CoalescedMemoryRange {
168 AddrRange addr;
169 QTAILQ_ENTRY(CoalescedMemoryRange) link;
170 };
171
172 struct MemoryRegionIoeventfd {
173 AddrRange addr;
174 bool match_data;
175 uint64_t data;
176 EventNotifier *e;
177 };
178
179 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
180 MemoryRegionIoeventfd b)
181 {
182 if (int128_lt(a.addr.start, b.addr.start)) {
183 return true;
184 } else if (int128_gt(a.addr.start, b.addr.start)) {
185 return false;
186 } else if (int128_lt(a.addr.size, b.addr.size)) {
187 return true;
188 } else if (int128_gt(a.addr.size, b.addr.size)) {
189 return false;
190 } else if (a.match_data < b.match_data) {
191 return true;
192 } else if (a.match_data > b.match_data) {
193 return false;
194 } else if (a.match_data) {
195 if (a.data < b.data) {
196 return true;
197 } else if (a.data > b.data) {
198 return false;
199 }
200 }
201 if (a.e < b.e) {
202 return true;
203 } else if (a.e > b.e) {
204 return false;
205 }
206 return false;
207 }
208
209 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
210 MemoryRegionIoeventfd b)
211 {
212 return !memory_region_ioeventfd_before(a, b)
213 && !memory_region_ioeventfd_before(b, a);
214 }
215
216 typedef struct FlatRange FlatRange;
217 typedef struct FlatView FlatView;
218
219 /* Range of memory in the global map. Addresses are absolute. */
220 struct FlatRange {
221 MemoryRegion *mr;
222 hwaddr offset_in_region;
223 AddrRange addr;
224 uint8_t dirty_log_mask;
225 bool romd_mode;
226 bool readonly;
227 };
228
229 /* Flattened global view of current active memory hierarchy. Kept in sorted
230 * order.
231 */
232 struct FlatView {
233 struct rcu_head rcu;
234 unsigned ref;
235 FlatRange *ranges;
236 unsigned nr;
237 unsigned nr_allocated;
238 };
239
240 typedef struct AddressSpaceOps AddressSpaceOps;
241
242 #define FOR_EACH_FLAT_RANGE(var, view) \
243 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
244
245 static bool flatrange_equal(FlatRange *a, FlatRange *b)
246 {
247 return a->mr == b->mr
248 && addrrange_equal(a->addr, b->addr)
249 && a->offset_in_region == b->offset_in_region
250 && a->romd_mode == b->romd_mode
251 && a->readonly == b->readonly;
252 }
253
254 static void flatview_init(FlatView *view)
255 {
256 view->ref = 1;
257 view->ranges = NULL;
258 view->nr = 0;
259 view->nr_allocated = 0;
260 }
261
262 /* Insert a range into a given position. Caller is responsible for maintaining
263 * sorting order.
264 */
265 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
266 {
267 if (view->nr == view->nr_allocated) {
268 view->nr_allocated = MAX(2 * view->nr, 10);
269 view->ranges = g_realloc(view->ranges,
270 view->nr_allocated * sizeof(*view->ranges));
271 }
272 memmove(view->ranges + pos + 1, view->ranges + pos,
273 (view->nr - pos) * sizeof(FlatRange));
274 view->ranges[pos] = *range;
275 memory_region_ref(range->mr);
276 ++view->nr;
277 }
278
279 static void flatview_destroy(FlatView *view)
280 {
281 int i;
282
283 for (i = 0; i < view->nr; i++) {
284 memory_region_unref(view->ranges[i].mr);
285 }
286 g_free(view->ranges);
287 g_free(view);
288 }
289
290 static void flatview_ref(FlatView *view)
291 {
292 atomic_inc(&view->ref);
293 }
294
295 static void flatview_unref(FlatView *view)
296 {
297 if (atomic_fetch_dec(&view->ref) == 1) {
298 flatview_destroy(view);
299 }
300 }
301
302 static bool can_merge(FlatRange *r1, FlatRange *r2)
303 {
304 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
305 && r1->mr == r2->mr
306 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
307 r1->addr.size),
308 int128_make64(r2->offset_in_region))
309 && r1->dirty_log_mask == r2->dirty_log_mask
310 && r1->romd_mode == r2->romd_mode
311 && r1->readonly == r2->readonly;
312 }
313
314 /* Attempt to simplify a view by merging adjacent ranges */
315 static void flatview_simplify(FlatView *view)
316 {
317 unsigned i, j;
318
319 i = 0;
320 while (i < view->nr) {
321 j = i + 1;
322 while (j < view->nr
323 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
324 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
325 ++j;
326 }
327 ++i;
328 memmove(&view->ranges[i], &view->ranges[j],
329 (view->nr - j) * sizeof(view->ranges[j]));
330 view->nr -= j - i;
331 }
332 }
333
334 static bool memory_region_big_endian(MemoryRegion *mr)
335 {
336 #ifdef TARGET_WORDS_BIGENDIAN
337 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
338 #else
339 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
340 #endif
341 }
342
343 static bool memory_region_wrong_endianness(MemoryRegion *mr)
344 {
345 #ifdef TARGET_WORDS_BIGENDIAN
346 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
347 #else
348 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
349 #endif
350 }
351
352 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
353 {
354 if (memory_region_wrong_endianness(mr)) {
355 switch (size) {
356 case 1:
357 break;
358 case 2:
359 *data = bswap16(*data);
360 break;
361 case 4:
362 *data = bswap32(*data);
363 break;
364 case 8:
365 *data = bswap64(*data);
366 break;
367 default:
368 abort();
369 }
370 }
371 }
372
373 static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
374 hwaddr addr,
375 uint64_t *value,
376 unsigned size,
377 unsigned shift,
378 uint64_t mask,
379 MemTxAttrs attrs)
380 {
381 uint64_t tmp;
382
383 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
384 trace_memory_region_ops_read(mr, addr, tmp, size);
385 *value |= (tmp & mask) << shift;
386 return MEMTX_OK;
387 }
388
389 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
390 hwaddr addr,
391 uint64_t *value,
392 unsigned size,
393 unsigned shift,
394 uint64_t mask,
395 MemTxAttrs attrs)
396 {
397 uint64_t tmp;
398
399 tmp = mr->ops->read(mr->opaque, addr, size);
400 trace_memory_region_ops_read(mr, addr, tmp, size);
401 *value |= (tmp & mask) << shift;
402 return MEMTX_OK;
403 }
404
405 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
406 hwaddr addr,
407 uint64_t *value,
408 unsigned size,
409 unsigned shift,
410 uint64_t mask,
411 MemTxAttrs attrs)
412 {
413 uint64_t tmp = 0;
414 MemTxResult r;
415
416 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
417 trace_memory_region_ops_read(mr, addr, tmp, size);
418 *value |= (tmp & mask) << shift;
419 return r;
420 }
421
422 static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
423 hwaddr addr,
424 uint64_t *value,
425 unsigned size,
426 unsigned shift,
427 uint64_t mask,
428 MemTxAttrs attrs)
429 {
430 uint64_t tmp;
431
432 tmp = (*value >> shift) & mask;
433 trace_memory_region_ops_write(mr, addr, tmp, size);
434 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
435 return MEMTX_OK;
436 }
437
438 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
439 hwaddr addr,
440 uint64_t *value,
441 unsigned size,
442 unsigned shift,
443 uint64_t mask,
444 MemTxAttrs attrs)
445 {
446 uint64_t tmp;
447
448 tmp = (*value >> shift) & mask;
449 trace_memory_region_ops_write(mr, addr, tmp, size);
450 mr->ops->write(mr->opaque, addr, tmp, size);
451 return MEMTX_OK;
452 }
453
454 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
455 hwaddr addr,
456 uint64_t *value,
457 unsigned size,
458 unsigned shift,
459 uint64_t mask,
460 MemTxAttrs attrs)
461 {
462 uint64_t tmp;
463
464 tmp = (*value >> shift) & mask;
465 trace_memory_region_ops_write(mr, addr, tmp, size);
466 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
467 }
468
469 static MemTxResult access_with_adjusted_size(hwaddr addr,
470 uint64_t *value,
471 unsigned size,
472 unsigned access_size_min,
473 unsigned access_size_max,
474 MemTxResult (*access)(MemoryRegion *mr,
475 hwaddr addr,
476 uint64_t *value,
477 unsigned size,
478 unsigned shift,
479 uint64_t mask,
480 MemTxAttrs attrs),
481 MemoryRegion *mr,
482 MemTxAttrs attrs)
483 {
484 uint64_t access_mask;
485 unsigned access_size;
486 unsigned i;
487 MemTxResult r = MEMTX_OK;
488
489 if (!access_size_min) {
490 access_size_min = 1;
491 }
492 if (!access_size_max) {
493 access_size_max = 4;
494 }
495
496 /* FIXME: support unaligned access? */
497 access_size = MAX(MIN(size, access_size_max), access_size_min);
498 access_mask = -1ULL >> (64 - access_size * 8);
499 if (memory_region_big_endian(mr)) {
500 for (i = 0; i < size; i += access_size) {
501 r |= access(mr, addr + i, value, access_size,
502 (size - access_size - i) * 8, access_mask, attrs);
503 }
504 } else {
505 for (i = 0; i < size; i += access_size) {
506 r |= access(mr, addr + i, value, access_size, i * 8,
507 access_mask, attrs);
508 }
509 }
510 return r;
511 }
512
513 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
514 {
515 AddressSpace *as;
516
517 while (mr->container) {
518 mr = mr->container;
519 }
520 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
521 if (mr == as->root) {
522 return as;
523 }
524 }
525 return NULL;
526 }
527
528 /* Render a memory region into the global view. Ranges in @view obscure
529 * ranges in @mr.
530 */
531 static void render_memory_region(FlatView *view,
532 MemoryRegion *mr,
533 Int128 base,
534 AddrRange clip,
535 bool readonly)
536 {
537 MemoryRegion *subregion;
538 unsigned i;
539 hwaddr offset_in_region;
540 Int128 remain;
541 Int128 now;
542 FlatRange fr;
543 AddrRange tmp;
544
545 if (!mr->enabled) {
546 return;
547 }
548
549 int128_addto(&base, int128_make64(mr->addr));
550 readonly |= mr->readonly;
551
552 tmp = addrrange_make(base, mr->size);
553
554 if (!addrrange_intersects(tmp, clip)) {
555 return;
556 }
557
558 clip = addrrange_intersection(tmp, clip);
559
560 if (mr->alias) {
561 int128_subfrom(&base, int128_make64(mr->alias->addr));
562 int128_subfrom(&base, int128_make64(mr->alias_offset));
563 render_memory_region(view, mr->alias, base, clip, readonly);
564 return;
565 }
566
567 /* Render subregions in priority order. */
568 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
569 render_memory_region(view, subregion, base, clip, readonly);
570 }
571
572 if (!mr->terminates) {
573 return;
574 }
575
576 offset_in_region = int128_get64(int128_sub(clip.start, base));
577 base = clip.start;
578 remain = clip.size;
579
580 fr.mr = mr;
581 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
582 fr.romd_mode = mr->romd_mode;
583 fr.readonly = readonly;
584
585 /* Render the region itself into any gaps left by the current view. */
586 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
587 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
588 continue;
589 }
590 if (int128_lt(base, view->ranges[i].addr.start)) {
591 now = int128_min(remain,
592 int128_sub(view->ranges[i].addr.start, base));
593 fr.offset_in_region = offset_in_region;
594 fr.addr = addrrange_make(base, now);
595 flatview_insert(view, i, &fr);
596 ++i;
597 int128_addto(&base, now);
598 offset_in_region += int128_get64(now);
599 int128_subfrom(&remain, now);
600 }
601 now = int128_sub(int128_min(int128_add(base, remain),
602 addrrange_end(view->ranges[i].addr)),
603 base);
604 int128_addto(&base, now);
605 offset_in_region += int128_get64(now);
606 int128_subfrom(&remain, now);
607 }
608 if (int128_nz(remain)) {
609 fr.offset_in_region = offset_in_region;
610 fr.addr = addrrange_make(base, remain);
611 flatview_insert(view, i, &fr);
612 }
613 }
614
615 /* Render a memory topology into a list of disjoint absolute ranges. */
616 static FlatView *generate_memory_topology(MemoryRegion *mr)
617 {
618 FlatView *view;
619
620 view = g_new(FlatView, 1);
621 flatview_init(view);
622
623 if (mr) {
624 render_memory_region(view, mr, int128_zero(),
625 addrrange_make(int128_zero(), int128_2_64()), false);
626 }
627 flatview_simplify(view);
628
629 return view;
630 }
631
632 static void address_space_add_del_ioeventfds(AddressSpace *as,
633 MemoryRegionIoeventfd *fds_new,
634 unsigned fds_new_nb,
635 MemoryRegionIoeventfd *fds_old,
636 unsigned fds_old_nb)
637 {
638 unsigned iold, inew;
639 MemoryRegionIoeventfd *fd;
640 MemoryRegionSection section;
641
642 /* Generate a symmetric difference of the old and new fd sets, adding
643 * and deleting as necessary.
644 */
645
646 iold = inew = 0;
647 while (iold < fds_old_nb || inew < fds_new_nb) {
648 if (iold < fds_old_nb
649 && (inew == fds_new_nb
650 || memory_region_ioeventfd_before(fds_old[iold],
651 fds_new[inew]))) {
652 fd = &fds_old[iold];
653 section = (MemoryRegionSection) {
654 .address_space = as,
655 .offset_within_address_space = int128_get64(fd->addr.start),
656 .size = fd->addr.size,
657 };
658 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
659 fd->match_data, fd->data, fd->e);
660 ++iold;
661 } else if (inew < fds_new_nb
662 && (iold == fds_old_nb
663 || memory_region_ioeventfd_before(fds_new[inew],
664 fds_old[iold]))) {
665 fd = &fds_new[inew];
666 section = (MemoryRegionSection) {
667 .address_space = as,
668 .offset_within_address_space = int128_get64(fd->addr.start),
669 .size = fd->addr.size,
670 };
671 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
672 fd->match_data, fd->data, fd->e);
673 ++inew;
674 } else {
675 ++iold;
676 ++inew;
677 }
678 }
679 }
680
681 static FlatView *address_space_get_flatview(AddressSpace *as)
682 {
683 FlatView *view;
684
685 rcu_read_lock();
686 view = atomic_rcu_read(&as->current_map);
687 flatview_ref(view);
688 rcu_read_unlock();
689 return view;
690 }
691
692 static void address_space_update_ioeventfds(AddressSpace *as)
693 {
694 FlatView *view;
695 FlatRange *fr;
696 unsigned ioeventfd_nb = 0;
697 MemoryRegionIoeventfd *ioeventfds = NULL;
698 AddrRange tmp;
699 unsigned i;
700
701 view = address_space_get_flatview(as);
702 FOR_EACH_FLAT_RANGE(fr, view) {
703 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
704 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
705 int128_sub(fr->addr.start,
706 int128_make64(fr->offset_in_region)));
707 if (addrrange_intersects(fr->addr, tmp)) {
708 ++ioeventfd_nb;
709 ioeventfds = g_realloc(ioeventfds,
710 ioeventfd_nb * sizeof(*ioeventfds));
711 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
712 ioeventfds[ioeventfd_nb-1].addr = tmp;
713 }
714 }
715 }
716
717 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
718 as->ioeventfds, as->ioeventfd_nb);
719
720 g_free(as->ioeventfds);
721 as->ioeventfds = ioeventfds;
722 as->ioeventfd_nb = ioeventfd_nb;
723 flatview_unref(view);
724 }
725
726 static void address_space_update_topology_pass(AddressSpace *as,
727 const FlatView *old_view,
728 const FlatView *new_view,
729 bool adding)
730 {
731 unsigned iold, inew;
732 FlatRange *frold, *frnew;
733
734 /* Generate a symmetric difference of the old and new memory maps.
735 * Kill ranges in the old map, and instantiate ranges in the new map.
736 */
737 iold = inew = 0;
738 while (iold < old_view->nr || inew < new_view->nr) {
739 if (iold < old_view->nr) {
740 frold = &old_view->ranges[iold];
741 } else {
742 frold = NULL;
743 }
744 if (inew < new_view->nr) {
745 frnew = &new_view->ranges[inew];
746 } else {
747 frnew = NULL;
748 }
749
750 if (frold
751 && (!frnew
752 || int128_lt(frold->addr.start, frnew->addr.start)
753 || (int128_eq(frold->addr.start, frnew->addr.start)
754 && !flatrange_equal(frold, frnew)))) {
755 /* In old but not in new, or in both but attributes changed. */
756
757 if (!adding) {
758 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
759 }
760
761 ++iold;
762 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
763 /* In both and unchanged (except logging may have changed) */
764
765 if (adding) {
766 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
767 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
768 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
769 frold->dirty_log_mask,
770 frnew->dirty_log_mask);
771 }
772 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
773 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
774 frold->dirty_log_mask,
775 frnew->dirty_log_mask);
776 }
777 }
778
779 ++iold;
780 ++inew;
781 } else {
782 /* In new */
783
784 if (adding) {
785 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
786 }
787
788 ++inew;
789 }
790 }
791 }
792
793
794 static void address_space_update_topology(AddressSpace *as)
795 {
796 FlatView *old_view = address_space_get_flatview(as);
797 FlatView *new_view = generate_memory_topology(as->root);
798
799 address_space_update_topology_pass(as, old_view, new_view, false);
800 address_space_update_topology_pass(as, old_view, new_view, true);
801
802 /* Writes are protected by the BQL. */
803 atomic_rcu_set(&as->current_map, new_view);
804 call_rcu(old_view, flatview_unref, rcu);
805
806 /* Note that all the old MemoryRegions are still alive up to this
807 * point. This relieves most MemoryListeners from the need to
808 * ref/unref the MemoryRegions they get---unless they use them
809 * outside the iothread mutex, in which case precise reference
810 * counting is necessary.
811 */
812 flatview_unref(old_view);
813
814 address_space_update_ioeventfds(as);
815 }
816
817 void memory_region_transaction_begin(void)
818 {
819 qemu_flush_coalesced_mmio_buffer();
820 ++memory_region_transaction_depth;
821 }
822
823 static void memory_region_clear_pending(void)
824 {
825 memory_region_update_pending = false;
826 ioeventfd_update_pending = false;
827 }
828
829 void memory_region_transaction_commit(void)
830 {
831 AddressSpace *as;
832
833 assert(memory_region_transaction_depth);
834 --memory_region_transaction_depth;
835 if (!memory_region_transaction_depth) {
836 if (memory_region_update_pending) {
837 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
838
839 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
840 address_space_update_topology(as);
841 }
842
843 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
844 } else if (ioeventfd_update_pending) {
845 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
846 address_space_update_ioeventfds(as);
847 }
848 }
849 memory_region_clear_pending();
850 }
851 }
852
853 static void memory_region_destructor_none(MemoryRegion *mr)
854 {
855 }
856
857 static void memory_region_destructor_ram(MemoryRegion *mr)
858 {
859 qemu_ram_free(mr->ram_addr);
860 }
861
862 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
863 {
864 qemu_ram_free_from_ptr(mr->ram_addr);
865 }
866
867 static void memory_region_destructor_rom_device(MemoryRegion *mr)
868 {
869 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
870 }
871
872 static bool memory_region_need_escape(char c)
873 {
874 return c == '/' || c == '[' || c == '\\' || c == ']';
875 }
876
877 static char *memory_region_escape_name(const char *name)
878 {
879 const char *p;
880 char *escaped, *q;
881 uint8_t c;
882 size_t bytes = 0;
883
884 for (p = name; *p; p++) {
885 bytes += memory_region_need_escape(*p) ? 4 : 1;
886 }
887 if (bytes == p - name) {
888 return g_memdup(name, bytes + 1);
889 }
890
891 escaped = g_malloc(bytes + 1);
892 for (p = name, q = escaped; *p; p++) {
893 c = *p;
894 if (unlikely(memory_region_need_escape(c))) {
895 *q++ = '\\';
896 *q++ = 'x';
897 *q++ = "0123456789abcdef"[c >> 4];
898 c = "0123456789abcdef"[c & 15];
899 }
900 *q++ = c;
901 }
902 *q = 0;
903 return escaped;
904 }
905
906 void memory_region_init(MemoryRegion *mr,
907 Object *owner,
908 const char *name,
909 uint64_t size)
910 {
911 if (!owner) {
912 owner = container_get(qdev_get_machine(), "/unattached");
913 }
914
915 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
916 mr->size = int128_make64(size);
917 if (size == UINT64_MAX) {
918 mr->size = int128_2_64();
919 }
920 mr->name = g_strdup(name);
921
922 if (name) {
923 char *escaped_name = memory_region_escape_name(name);
924 char *name_array = g_strdup_printf("%s[*]", escaped_name);
925 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
926 object_unref(OBJECT(mr));
927 g_free(name_array);
928 g_free(escaped_name);
929 }
930 }
931
932 static void memory_region_get_addr(Object *obj, Visitor *v, void *opaque,
933 const char *name, Error **errp)
934 {
935 MemoryRegion *mr = MEMORY_REGION(obj);
936 uint64_t value = mr->addr;
937
938 visit_type_uint64(v, &value, name, errp);
939 }
940
941 static void memory_region_get_container(Object *obj, Visitor *v, void *opaque,
942 const char *name, Error **errp)
943 {
944 MemoryRegion *mr = MEMORY_REGION(obj);
945 gchar *path = (gchar *)"";
946
947 if (mr->container) {
948 path = object_get_canonical_path(OBJECT(mr->container));
949 }
950 visit_type_str(v, &path, name, errp);
951 if (mr->container) {
952 g_free(path);
953 }
954 }
955
956 static Object *memory_region_resolve_container(Object *obj, void *opaque,
957 const char *part)
958 {
959 MemoryRegion *mr = MEMORY_REGION(obj);
960
961 return OBJECT(mr->container);
962 }
963
964 static void memory_region_get_priority(Object *obj, Visitor *v, void *opaque,
965 const char *name, Error **errp)
966 {
967 MemoryRegion *mr = MEMORY_REGION(obj);
968 int32_t value = mr->priority;
969
970 visit_type_int32(v, &value, name, errp);
971 }
972
973 static bool memory_region_get_may_overlap(Object *obj, Error **errp)
974 {
975 MemoryRegion *mr = MEMORY_REGION(obj);
976
977 return mr->may_overlap;
978 }
979
980 static void memory_region_get_size(Object *obj, Visitor *v, void *opaque,
981 const char *name, Error **errp)
982 {
983 MemoryRegion *mr = MEMORY_REGION(obj);
984 uint64_t value = memory_region_size(mr);
985
986 visit_type_uint64(v, &value, name, errp);
987 }
988
989 static void memory_region_initfn(Object *obj)
990 {
991 MemoryRegion *mr = MEMORY_REGION(obj);
992 ObjectProperty *op;
993
994 mr->ops = &unassigned_mem_ops;
995 mr->ram_addr = RAM_ADDR_INVALID;
996 mr->enabled = true;
997 mr->romd_mode = true;
998 mr->global_locking = true;
999 mr->destructor = memory_region_destructor_none;
1000 QTAILQ_INIT(&mr->subregions);
1001 QTAILQ_INIT(&mr->coalesced);
1002
1003 op = object_property_add(OBJECT(mr), "container",
1004 "link<" TYPE_MEMORY_REGION ">",
1005 memory_region_get_container,
1006 NULL, /* memory_region_set_container */
1007 NULL, NULL, &error_abort);
1008 op->resolve = memory_region_resolve_container;
1009
1010 object_property_add(OBJECT(mr), "addr", "uint64",
1011 memory_region_get_addr,
1012 NULL, /* memory_region_set_addr */
1013 NULL, NULL, &error_abort);
1014 object_property_add(OBJECT(mr), "priority", "uint32",
1015 memory_region_get_priority,
1016 NULL, /* memory_region_set_priority */
1017 NULL, NULL, &error_abort);
1018 object_property_add_bool(OBJECT(mr), "may-overlap",
1019 memory_region_get_may_overlap,
1020 NULL, /* memory_region_set_may_overlap */
1021 &error_abort);
1022 object_property_add(OBJECT(mr), "size", "uint64",
1023 memory_region_get_size,
1024 NULL, /* memory_region_set_size, */
1025 NULL, NULL, &error_abort);
1026 }
1027
1028 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1029 unsigned size)
1030 {
1031 #ifdef DEBUG_UNASSIGNED
1032 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1033 #endif
1034 if (current_cpu != NULL) {
1035 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
1036 }
1037 return 0;
1038 }
1039
1040 static void unassigned_mem_write(void *opaque, hwaddr addr,
1041 uint64_t val, unsigned size)
1042 {
1043 #ifdef DEBUG_UNASSIGNED
1044 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1045 #endif
1046 if (current_cpu != NULL) {
1047 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1048 }
1049 }
1050
1051 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1052 unsigned size, bool is_write)
1053 {
1054 return false;
1055 }
1056
1057 const MemoryRegionOps unassigned_mem_ops = {
1058 .valid.accepts = unassigned_mem_accepts,
1059 .endianness = DEVICE_NATIVE_ENDIAN,
1060 };
1061
1062 bool memory_region_access_valid(MemoryRegion *mr,
1063 hwaddr addr,
1064 unsigned size,
1065 bool is_write)
1066 {
1067 int access_size_min, access_size_max;
1068 int access_size, i;
1069
1070 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1071 return false;
1072 }
1073
1074 if (!mr->ops->valid.accepts) {
1075 return true;
1076 }
1077
1078 access_size_min = mr->ops->valid.min_access_size;
1079 if (!mr->ops->valid.min_access_size) {
1080 access_size_min = 1;
1081 }
1082
1083 access_size_max = mr->ops->valid.max_access_size;
1084 if (!mr->ops->valid.max_access_size) {
1085 access_size_max = 4;
1086 }
1087
1088 access_size = MAX(MIN(size, access_size_max), access_size_min);
1089 for (i = 0; i < size; i += access_size) {
1090 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1091 is_write)) {
1092 return false;
1093 }
1094 }
1095
1096 return true;
1097 }
1098
1099 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1100 hwaddr addr,
1101 uint64_t *pval,
1102 unsigned size,
1103 MemTxAttrs attrs)
1104 {
1105 *pval = 0;
1106
1107 if (mr->ops->read) {
1108 return access_with_adjusted_size(addr, pval, size,
1109 mr->ops->impl.min_access_size,
1110 mr->ops->impl.max_access_size,
1111 memory_region_read_accessor,
1112 mr, attrs);
1113 } else if (mr->ops->read_with_attrs) {
1114 return access_with_adjusted_size(addr, pval, size,
1115 mr->ops->impl.min_access_size,
1116 mr->ops->impl.max_access_size,
1117 memory_region_read_with_attrs_accessor,
1118 mr, attrs);
1119 } else {
1120 return access_with_adjusted_size(addr, pval, size, 1, 4,
1121 memory_region_oldmmio_read_accessor,
1122 mr, attrs);
1123 }
1124 }
1125
1126 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1127 hwaddr addr,
1128 uint64_t *pval,
1129 unsigned size,
1130 MemTxAttrs attrs)
1131 {
1132 MemTxResult r;
1133
1134 if (!memory_region_access_valid(mr, addr, size, false)) {
1135 *pval = unassigned_mem_read(mr, addr, size);
1136 return MEMTX_DECODE_ERROR;
1137 }
1138
1139 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1140 adjust_endianness(mr, pval, size);
1141 return r;
1142 }
1143
1144 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1145 hwaddr addr,
1146 uint64_t data,
1147 unsigned size,
1148 MemTxAttrs attrs)
1149 {
1150 if (!memory_region_access_valid(mr, addr, size, true)) {
1151 unassigned_mem_write(mr, addr, data, size);
1152 return MEMTX_DECODE_ERROR;
1153 }
1154
1155 adjust_endianness(mr, &data, size);
1156
1157 if (mr->ops->write) {
1158 return access_with_adjusted_size(addr, &data, size,
1159 mr->ops->impl.min_access_size,
1160 mr->ops->impl.max_access_size,
1161 memory_region_write_accessor, mr,
1162 attrs);
1163 } else if (mr->ops->write_with_attrs) {
1164 return
1165 access_with_adjusted_size(addr, &data, size,
1166 mr->ops->impl.min_access_size,
1167 mr->ops->impl.max_access_size,
1168 memory_region_write_with_attrs_accessor,
1169 mr, attrs);
1170 } else {
1171 return access_with_adjusted_size(addr, &data, size, 1, 4,
1172 memory_region_oldmmio_write_accessor,
1173 mr, attrs);
1174 }
1175 }
1176
1177 void memory_region_init_io(MemoryRegion *mr,
1178 Object *owner,
1179 const MemoryRegionOps *ops,
1180 void *opaque,
1181 const char *name,
1182 uint64_t size)
1183 {
1184 memory_region_init(mr, owner, name, size);
1185 mr->ops = ops ? ops : &unassigned_mem_ops;
1186 mr->opaque = opaque;
1187 mr->terminates = true;
1188 }
1189
1190 void memory_region_init_ram(MemoryRegion *mr,
1191 Object *owner,
1192 const char *name,
1193 uint64_t size,
1194 Error **errp)
1195 {
1196 memory_region_init(mr, owner, name, size);
1197 mr->ram = true;
1198 mr->terminates = true;
1199 mr->destructor = memory_region_destructor_ram;
1200 mr->ram_addr = qemu_ram_alloc(size, mr, errp);
1201 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1202 }
1203
1204 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1205 Object *owner,
1206 const char *name,
1207 uint64_t size,
1208 uint64_t max_size,
1209 void (*resized)(const char*,
1210 uint64_t length,
1211 void *host),
1212 Error **errp)
1213 {
1214 memory_region_init(mr, owner, name, size);
1215 mr->ram = true;
1216 mr->terminates = true;
1217 mr->destructor = memory_region_destructor_ram;
1218 mr->ram_addr = qemu_ram_alloc_resizeable(size, max_size, resized, mr, errp);
1219 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1220 }
1221
1222 #ifdef __linux__
1223 void memory_region_init_ram_from_file(MemoryRegion *mr,
1224 struct Object *owner,
1225 const char *name,
1226 uint64_t size,
1227 bool share,
1228 const char *path,
1229 Error **errp)
1230 {
1231 memory_region_init(mr, owner, name, size);
1232 mr->ram = true;
1233 mr->terminates = true;
1234 mr->destructor = memory_region_destructor_ram;
1235 mr->ram_addr = qemu_ram_alloc_from_file(size, mr, share, path, errp);
1236 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1237 }
1238 #endif
1239
1240 void memory_region_init_ram_ptr(MemoryRegion *mr,
1241 Object *owner,
1242 const char *name,
1243 uint64_t size,
1244 void *ptr)
1245 {
1246 memory_region_init(mr, owner, name, size);
1247 mr->ram = true;
1248 mr->terminates = true;
1249 mr->destructor = memory_region_destructor_ram_from_ptr;
1250 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1251
1252 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1253 assert(ptr != NULL);
1254 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_abort);
1255 }
1256
1257 void memory_region_set_skip_dump(MemoryRegion *mr)
1258 {
1259 mr->skip_dump = true;
1260 }
1261
1262 void memory_region_init_alias(MemoryRegion *mr,
1263 Object *owner,
1264 const char *name,
1265 MemoryRegion *orig,
1266 hwaddr offset,
1267 uint64_t size)
1268 {
1269 memory_region_init(mr, owner, name, size);
1270 mr->alias = orig;
1271 mr->alias_offset = offset;
1272 }
1273
1274 void memory_region_init_rom_device(MemoryRegion *mr,
1275 Object *owner,
1276 const MemoryRegionOps *ops,
1277 void *opaque,
1278 const char *name,
1279 uint64_t size,
1280 Error **errp)
1281 {
1282 memory_region_init(mr, owner, name, size);
1283 mr->ops = ops;
1284 mr->opaque = opaque;
1285 mr->terminates = true;
1286 mr->rom_device = true;
1287 mr->destructor = memory_region_destructor_rom_device;
1288 mr->ram_addr = qemu_ram_alloc(size, mr, errp);
1289 }
1290
1291 void memory_region_init_iommu(MemoryRegion *mr,
1292 Object *owner,
1293 const MemoryRegionIOMMUOps *ops,
1294 const char *name,
1295 uint64_t size)
1296 {
1297 memory_region_init(mr, owner, name, size);
1298 mr->iommu_ops = ops,
1299 mr->terminates = true; /* then re-forwards */
1300 notifier_list_init(&mr->iommu_notify);
1301 }
1302
1303 static void memory_region_finalize(Object *obj)
1304 {
1305 MemoryRegion *mr = MEMORY_REGION(obj);
1306
1307 assert(QTAILQ_EMPTY(&mr->subregions));
1308 mr->destructor(mr);
1309 memory_region_clear_coalescing(mr);
1310 g_free((char *)mr->name);
1311 g_free(mr->ioeventfds);
1312 }
1313
1314 Object *memory_region_owner(MemoryRegion *mr)
1315 {
1316 Object *obj = OBJECT(mr);
1317 return obj->parent;
1318 }
1319
1320 void memory_region_ref(MemoryRegion *mr)
1321 {
1322 /* MMIO callbacks most likely will access data that belongs
1323 * to the owner, hence the need to ref/unref the owner whenever
1324 * the memory region is in use.
1325 *
1326 * The memory region is a child of its owner. As long as the
1327 * owner doesn't call unparent itself on the memory region,
1328 * ref-ing the owner will also keep the memory region alive.
1329 * Memory regions without an owner are supposed to never go away,
1330 * but we still ref/unref them for debugging purposes.
1331 */
1332 Object *obj = OBJECT(mr);
1333 if (obj && obj->parent) {
1334 object_ref(obj->parent);
1335 } else {
1336 object_ref(obj);
1337 }
1338 }
1339
1340 void memory_region_unref(MemoryRegion *mr)
1341 {
1342 Object *obj = OBJECT(mr);
1343 if (obj && obj->parent) {
1344 object_unref(obj->parent);
1345 } else {
1346 object_unref(obj);
1347 }
1348 }
1349
1350 uint64_t memory_region_size(MemoryRegion *mr)
1351 {
1352 if (int128_eq(mr->size, int128_2_64())) {
1353 return UINT64_MAX;
1354 }
1355 return int128_get64(mr->size);
1356 }
1357
1358 const char *memory_region_name(const MemoryRegion *mr)
1359 {
1360 if (!mr->name) {
1361 ((MemoryRegion *)mr)->name =
1362 object_get_canonical_path_component(OBJECT(mr));
1363 }
1364 return mr->name;
1365 }
1366
1367 bool memory_region_is_ram(MemoryRegion *mr)
1368 {
1369 return mr->ram;
1370 }
1371
1372 bool memory_region_is_skip_dump(MemoryRegion *mr)
1373 {
1374 return mr->skip_dump;
1375 }
1376
1377 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1378 {
1379 uint8_t mask = mr->dirty_log_mask;
1380 if (global_dirty_log) {
1381 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1382 }
1383 return mask;
1384 }
1385
1386 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1387 {
1388 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1389 }
1390
1391 bool memory_region_is_rom(MemoryRegion *mr)
1392 {
1393 return mr->ram && mr->readonly;
1394 }
1395
1396 bool memory_region_is_iommu(MemoryRegion *mr)
1397 {
1398 return mr->iommu_ops;
1399 }
1400
1401 void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1402 {
1403 notifier_list_add(&mr->iommu_notify, n);
1404 }
1405
1406 void memory_region_unregister_iommu_notifier(Notifier *n)
1407 {
1408 notifier_remove(n);
1409 }
1410
1411 void memory_region_notify_iommu(MemoryRegion *mr,
1412 IOMMUTLBEntry entry)
1413 {
1414 assert(memory_region_is_iommu(mr));
1415 notifier_list_notify(&mr->iommu_notify, &entry);
1416 }
1417
1418 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1419 {
1420 uint8_t mask = 1 << client;
1421 uint8_t old_logging;
1422
1423 assert(client == DIRTY_MEMORY_VGA);
1424 old_logging = mr->vga_logging_count;
1425 mr->vga_logging_count += log ? 1 : -1;
1426 if (!!old_logging == !!mr->vga_logging_count) {
1427 return;
1428 }
1429
1430 memory_region_transaction_begin();
1431 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1432 memory_region_update_pending |= mr->enabled;
1433 memory_region_transaction_commit();
1434 }
1435
1436 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1437 hwaddr size, unsigned client)
1438 {
1439 assert(mr->ram_addr != RAM_ADDR_INVALID);
1440 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client);
1441 }
1442
1443 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1444 hwaddr size)
1445 {
1446 assert(mr->ram_addr != RAM_ADDR_INVALID);
1447 cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size,
1448 memory_region_get_dirty_log_mask(mr));
1449 }
1450
1451 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1452 hwaddr size, unsigned client)
1453 {
1454 assert(mr->ram_addr != RAM_ADDR_INVALID);
1455 return cpu_physical_memory_test_and_clear_dirty(mr->ram_addr + addr,
1456 size, client);
1457 }
1458
1459
1460 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1461 {
1462 AddressSpace *as;
1463 FlatRange *fr;
1464
1465 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1466 FlatView *view = address_space_get_flatview(as);
1467 FOR_EACH_FLAT_RANGE(fr, view) {
1468 if (fr->mr == mr) {
1469 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1470 }
1471 }
1472 flatview_unref(view);
1473 }
1474 }
1475
1476 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1477 {
1478 if (mr->readonly != readonly) {
1479 memory_region_transaction_begin();
1480 mr->readonly = readonly;
1481 memory_region_update_pending |= mr->enabled;
1482 memory_region_transaction_commit();
1483 }
1484 }
1485
1486 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1487 {
1488 if (mr->romd_mode != romd_mode) {
1489 memory_region_transaction_begin();
1490 mr->romd_mode = romd_mode;
1491 memory_region_update_pending |= mr->enabled;
1492 memory_region_transaction_commit();
1493 }
1494 }
1495
1496 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1497 hwaddr size, unsigned client)
1498 {
1499 assert(mr->ram_addr != RAM_ADDR_INVALID);
1500 cpu_physical_memory_test_and_clear_dirty(mr->ram_addr + addr, size,
1501 client);
1502 }
1503
1504 int memory_region_get_fd(MemoryRegion *mr)
1505 {
1506 if (mr->alias) {
1507 return memory_region_get_fd(mr->alias);
1508 }
1509
1510 assert(mr->ram_addr != RAM_ADDR_INVALID);
1511
1512 return qemu_get_ram_fd(mr->ram_addr & TARGET_PAGE_MASK);
1513 }
1514
1515 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1516 {
1517 if (mr->alias) {
1518 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1519 }
1520
1521 assert(mr->ram_addr != RAM_ADDR_INVALID);
1522
1523 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1524 }
1525
1526 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
1527 {
1528 assert(mr->ram_addr != RAM_ADDR_INVALID);
1529
1530 qemu_ram_resize(mr->ram_addr, newsize, errp);
1531 }
1532
1533 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1534 {
1535 FlatView *view;
1536 FlatRange *fr;
1537 CoalescedMemoryRange *cmr;
1538 AddrRange tmp;
1539 MemoryRegionSection section;
1540
1541 view = address_space_get_flatview(as);
1542 FOR_EACH_FLAT_RANGE(fr, view) {
1543 if (fr->mr == mr) {
1544 section = (MemoryRegionSection) {
1545 .address_space = as,
1546 .offset_within_address_space = int128_get64(fr->addr.start),
1547 .size = fr->addr.size,
1548 };
1549
1550 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1551 int128_get64(fr->addr.start),
1552 int128_get64(fr->addr.size));
1553 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1554 tmp = addrrange_shift(cmr->addr,
1555 int128_sub(fr->addr.start,
1556 int128_make64(fr->offset_in_region)));
1557 if (!addrrange_intersects(tmp, fr->addr)) {
1558 continue;
1559 }
1560 tmp = addrrange_intersection(tmp, fr->addr);
1561 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1562 int128_get64(tmp.start),
1563 int128_get64(tmp.size));
1564 }
1565 }
1566 }
1567 flatview_unref(view);
1568 }
1569
1570 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1571 {
1572 AddressSpace *as;
1573
1574 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1575 memory_region_update_coalesced_range_as(mr, as);
1576 }
1577 }
1578
1579 void memory_region_set_coalescing(MemoryRegion *mr)
1580 {
1581 memory_region_clear_coalescing(mr);
1582 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1583 }
1584
1585 void memory_region_add_coalescing(MemoryRegion *mr,
1586 hwaddr offset,
1587 uint64_t size)
1588 {
1589 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1590
1591 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1592 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1593 memory_region_update_coalesced_range(mr);
1594 memory_region_set_flush_coalesced(mr);
1595 }
1596
1597 void memory_region_clear_coalescing(MemoryRegion *mr)
1598 {
1599 CoalescedMemoryRange *cmr;
1600 bool updated = false;
1601
1602 qemu_flush_coalesced_mmio_buffer();
1603 mr->flush_coalesced_mmio = false;
1604
1605 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1606 cmr = QTAILQ_FIRST(&mr->coalesced);
1607 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1608 g_free(cmr);
1609 updated = true;
1610 }
1611
1612 if (updated) {
1613 memory_region_update_coalesced_range(mr);
1614 }
1615 }
1616
1617 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1618 {
1619 mr->flush_coalesced_mmio = true;
1620 }
1621
1622 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1623 {
1624 qemu_flush_coalesced_mmio_buffer();
1625 if (QTAILQ_EMPTY(&mr->coalesced)) {
1626 mr->flush_coalesced_mmio = false;
1627 }
1628 }
1629
1630 void memory_region_set_global_locking(MemoryRegion *mr)
1631 {
1632 mr->global_locking = true;
1633 }
1634
1635 void memory_region_clear_global_locking(MemoryRegion *mr)
1636 {
1637 mr->global_locking = false;
1638 }
1639
1640 void memory_region_add_eventfd(MemoryRegion *mr,
1641 hwaddr addr,
1642 unsigned size,
1643 bool match_data,
1644 uint64_t data,
1645 EventNotifier *e)
1646 {
1647 MemoryRegionIoeventfd mrfd = {
1648 .addr.start = int128_make64(addr),
1649 .addr.size = int128_make64(size),
1650 .match_data = match_data,
1651 .data = data,
1652 .e = e,
1653 };
1654 unsigned i;
1655
1656 adjust_endianness(mr, &mrfd.data, size);
1657 memory_region_transaction_begin();
1658 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1659 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1660 break;
1661 }
1662 }
1663 ++mr->ioeventfd_nb;
1664 mr->ioeventfds = g_realloc(mr->ioeventfds,
1665 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1666 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1667 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1668 mr->ioeventfds[i] = mrfd;
1669 ioeventfd_update_pending |= mr->enabled;
1670 memory_region_transaction_commit();
1671 }
1672
1673 void memory_region_del_eventfd(MemoryRegion *mr,
1674 hwaddr addr,
1675 unsigned size,
1676 bool match_data,
1677 uint64_t data,
1678 EventNotifier *e)
1679 {
1680 MemoryRegionIoeventfd mrfd = {
1681 .addr.start = int128_make64(addr),
1682 .addr.size = int128_make64(size),
1683 .match_data = match_data,
1684 .data = data,
1685 .e = e,
1686 };
1687 unsigned i;
1688
1689 adjust_endianness(mr, &mrfd.data, size);
1690 memory_region_transaction_begin();
1691 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1692 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1693 break;
1694 }
1695 }
1696 assert(i != mr->ioeventfd_nb);
1697 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1698 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1699 --mr->ioeventfd_nb;
1700 mr->ioeventfds = g_realloc(mr->ioeventfds,
1701 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1702 ioeventfd_update_pending |= mr->enabled;
1703 memory_region_transaction_commit();
1704 }
1705
1706 static void memory_region_update_container_subregions(MemoryRegion *subregion)
1707 {
1708 hwaddr offset = subregion->addr;
1709 MemoryRegion *mr = subregion->container;
1710 MemoryRegion *other;
1711
1712 memory_region_transaction_begin();
1713
1714 memory_region_ref(subregion);
1715 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1716 if (subregion->may_overlap || other->may_overlap) {
1717 continue;
1718 }
1719 if (int128_ge(int128_make64(offset),
1720 int128_add(int128_make64(other->addr), other->size))
1721 || int128_le(int128_add(int128_make64(offset), subregion->size),
1722 int128_make64(other->addr))) {
1723 continue;
1724 }
1725 #if 0
1726 printf("warning: subregion collision %llx/%llx (%s) "
1727 "vs %llx/%llx (%s)\n",
1728 (unsigned long long)offset,
1729 (unsigned long long)int128_get64(subregion->size),
1730 subregion->name,
1731 (unsigned long long)other->addr,
1732 (unsigned long long)int128_get64(other->size),
1733 other->name);
1734 #endif
1735 }
1736 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1737 if (subregion->priority >= other->priority) {
1738 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1739 goto done;
1740 }
1741 }
1742 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1743 done:
1744 memory_region_update_pending |= mr->enabled && subregion->enabled;
1745 memory_region_transaction_commit();
1746 }
1747
1748 static void memory_region_add_subregion_common(MemoryRegion *mr,
1749 hwaddr offset,
1750 MemoryRegion *subregion)
1751 {
1752 assert(!subregion->container);
1753 subregion->container = mr;
1754 subregion->addr = offset;
1755 memory_region_update_container_subregions(subregion);
1756 }
1757
1758 void memory_region_add_subregion(MemoryRegion *mr,
1759 hwaddr offset,
1760 MemoryRegion *subregion)
1761 {
1762 subregion->may_overlap = false;
1763 subregion->priority = 0;
1764 memory_region_add_subregion_common(mr, offset, subregion);
1765 }
1766
1767 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1768 hwaddr offset,
1769 MemoryRegion *subregion,
1770 int priority)
1771 {
1772 subregion->may_overlap = true;
1773 subregion->priority = priority;
1774 memory_region_add_subregion_common(mr, offset, subregion);
1775 }
1776
1777 void memory_region_del_subregion(MemoryRegion *mr,
1778 MemoryRegion *subregion)
1779 {
1780 memory_region_transaction_begin();
1781 assert(subregion->container == mr);
1782 subregion->container = NULL;
1783 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1784 memory_region_unref(subregion);
1785 memory_region_update_pending |= mr->enabled && subregion->enabled;
1786 memory_region_transaction_commit();
1787 }
1788
1789 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1790 {
1791 if (enabled == mr->enabled) {
1792 return;
1793 }
1794 memory_region_transaction_begin();
1795 mr->enabled = enabled;
1796 memory_region_update_pending = true;
1797 memory_region_transaction_commit();
1798 }
1799
1800 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
1801 {
1802 Int128 s = int128_make64(size);
1803
1804 if (size == UINT64_MAX) {
1805 s = int128_2_64();
1806 }
1807 if (int128_eq(s, mr->size)) {
1808 return;
1809 }
1810 memory_region_transaction_begin();
1811 mr->size = s;
1812 memory_region_update_pending = true;
1813 memory_region_transaction_commit();
1814 }
1815
1816 static void memory_region_readd_subregion(MemoryRegion *mr)
1817 {
1818 MemoryRegion *container = mr->container;
1819
1820 if (container) {
1821 memory_region_transaction_begin();
1822 memory_region_ref(mr);
1823 memory_region_del_subregion(container, mr);
1824 mr->container = container;
1825 memory_region_update_container_subregions(mr);
1826 memory_region_unref(mr);
1827 memory_region_transaction_commit();
1828 }
1829 }
1830
1831 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1832 {
1833 if (addr != mr->addr) {
1834 mr->addr = addr;
1835 memory_region_readd_subregion(mr);
1836 }
1837 }
1838
1839 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
1840 {
1841 assert(mr->alias);
1842
1843 if (offset == mr->alias_offset) {
1844 return;
1845 }
1846
1847 memory_region_transaction_begin();
1848 mr->alias_offset = offset;
1849 memory_region_update_pending |= mr->enabled;
1850 memory_region_transaction_commit();
1851 }
1852
1853 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1854 {
1855 return mr->ram_addr;
1856 }
1857
1858 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
1859 {
1860 return mr->align;
1861 }
1862
1863 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1864 {
1865 const AddrRange *addr = addr_;
1866 const FlatRange *fr = fr_;
1867
1868 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1869 return -1;
1870 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1871 return 1;
1872 }
1873 return 0;
1874 }
1875
1876 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
1877 {
1878 return bsearch(&addr, view->ranges, view->nr,
1879 sizeof(FlatRange), cmp_flatrange_addr);
1880 }
1881
1882 bool memory_region_is_mapped(MemoryRegion *mr)
1883 {
1884 return mr->container ? true : false;
1885 }
1886
1887 /* Same as memory_region_find, but it does not add a reference to the
1888 * returned region. It must be called from an RCU critical section.
1889 */
1890 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
1891 hwaddr addr, uint64_t size)
1892 {
1893 MemoryRegionSection ret = { .mr = NULL };
1894 MemoryRegion *root;
1895 AddressSpace *as;
1896 AddrRange range;
1897 FlatView *view;
1898 FlatRange *fr;
1899
1900 addr += mr->addr;
1901 for (root = mr; root->container; ) {
1902 root = root->container;
1903 addr += root->addr;
1904 }
1905
1906 as = memory_region_to_address_space(root);
1907 if (!as) {
1908 return ret;
1909 }
1910 range = addrrange_make(int128_make64(addr), int128_make64(size));
1911
1912 view = atomic_rcu_read(&as->current_map);
1913 fr = flatview_lookup(view, range);
1914 if (!fr) {
1915 return ret;
1916 }
1917
1918 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
1919 --fr;
1920 }
1921
1922 ret.mr = fr->mr;
1923 ret.address_space = as;
1924 range = addrrange_intersection(range, fr->addr);
1925 ret.offset_within_region = fr->offset_in_region;
1926 ret.offset_within_region += int128_get64(int128_sub(range.start,
1927 fr->addr.start));
1928 ret.size = range.size;
1929 ret.offset_within_address_space = int128_get64(range.start);
1930 ret.readonly = fr->readonly;
1931 return ret;
1932 }
1933
1934 MemoryRegionSection memory_region_find(MemoryRegion *mr,
1935 hwaddr addr, uint64_t size)
1936 {
1937 MemoryRegionSection ret;
1938 rcu_read_lock();
1939 ret = memory_region_find_rcu(mr, addr, size);
1940 if (ret.mr) {
1941 memory_region_ref(ret.mr);
1942 }
1943 rcu_read_unlock();
1944 return ret;
1945 }
1946
1947 bool memory_region_present(MemoryRegion *container, hwaddr addr)
1948 {
1949 MemoryRegion *mr;
1950
1951 rcu_read_lock();
1952 mr = memory_region_find_rcu(container, addr, 1).mr;
1953 rcu_read_unlock();
1954 return mr && mr != container;
1955 }
1956
1957 void address_space_sync_dirty_bitmap(AddressSpace *as)
1958 {
1959 FlatView *view;
1960 FlatRange *fr;
1961
1962 view = address_space_get_flatview(as);
1963 FOR_EACH_FLAT_RANGE(fr, view) {
1964 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1965 }
1966 flatview_unref(view);
1967 }
1968
1969 void memory_global_dirty_log_start(void)
1970 {
1971 global_dirty_log = true;
1972
1973 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
1974
1975 /* Refresh DIRTY_LOG_MIGRATION bit. */
1976 memory_region_transaction_begin();
1977 memory_region_update_pending = true;
1978 memory_region_transaction_commit();
1979 }
1980
1981 void memory_global_dirty_log_stop(void)
1982 {
1983 global_dirty_log = false;
1984
1985 /* Refresh DIRTY_LOG_MIGRATION bit. */
1986 memory_region_transaction_begin();
1987 memory_region_update_pending = true;
1988 memory_region_transaction_commit();
1989
1990 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
1991 }
1992
1993 static void listener_add_address_space(MemoryListener *listener,
1994 AddressSpace *as)
1995 {
1996 FlatView *view;
1997 FlatRange *fr;
1998
1999 if (listener->address_space_filter
2000 && listener->address_space_filter != as) {
2001 return;
2002 }
2003
2004 if (global_dirty_log) {
2005 if (listener->log_global_start) {
2006 listener->log_global_start(listener);
2007 }
2008 }
2009
2010 view = address_space_get_flatview(as);
2011 FOR_EACH_FLAT_RANGE(fr, view) {
2012 MemoryRegionSection section = {
2013 .mr = fr->mr,
2014 .address_space = as,
2015 .offset_within_region = fr->offset_in_region,
2016 .size = fr->addr.size,
2017 .offset_within_address_space = int128_get64(fr->addr.start),
2018 .readonly = fr->readonly,
2019 };
2020 if (listener->region_add) {
2021 listener->region_add(listener, &section);
2022 }
2023 }
2024 flatview_unref(view);
2025 }
2026
2027 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
2028 {
2029 MemoryListener *other = NULL;
2030 AddressSpace *as;
2031
2032 listener->address_space_filter = filter;
2033 if (QTAILQ_EMPTY(&memory_listeners)
2034 || listener->priority >= QTAILQ_LAST(&memory_listeners,
2035 memory_listeners)->priority) {
2036 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2037 } else {
2038 QTAILQ_FOREACH(other, &memory_listeners, link) {
2039 if (listener->priority < other->priority) {
2040 break;
2041 }
2042 }
2043 QTAILQ_INSERT_BEFORE(other, listener, link);
2044 }
2045
2046 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2047 listener_add_address_space(listener, as);
2048 }
2049 }
2050
2051 void memory_listener_unregister(MemoryListener *listener)
2052 {
2053 QTAILQ_REMOVE(&memory_listeners, listener, link);
2054 }
2055
2056 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2057 {
2058 memory_region_ref(root);
2059 memory_region_transaction_begin();
2060 as->root = root;
2061 as->current_map = g_new(FlatView, 1);
2062 flatview_init(as->current_map);
2063 as->ioeventfd_nb = 0;
2064 as->ioeventfds = NULL;
2065 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2066 as->name = g_strdup(name ? name : "anonymous");
2067 address_space_init_dispatch(as);
2068 memory_region_update_pending |= root->enabled;
2069 memory_region_transaction_commit();
2070 }
2071
2072 static void do_address_space_destroy(AddressSpace *as)
2073 {
2074 MemoryListener *listener;
2075
2076 address_space_destroy_dispatch(as);
2077
2078 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2079 assert(listener->address_space_filter != as);
2080 }
2081
2082 flatview_unref(as->current_map);
2083 g_free(as->name);
2084 g_free(as->ioeventfds);
2085 memory_region_unref(as->root);
2086 }
2087
2088 void address_space_destroy(AddressSpace *as)
2089 {
2090 MemoryRegion *root = as->root;
2091
2092 /* Flush out anything from MemoryListeners listening in on this */
2093 memory_region_transaction_begin();
2094 as->root = NULL;
2095 memory_region_transaction_commit();
2096 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2097 address_space_unregister(as);
2098
2099 /* At this point, as->dispatch and as->current_map are dummy
2100 * entries that the guest should never use. Wait for the old
2101 * values to expire before freeing the data.
2102 */
2103 as->root = root;
2104 call_rcu(as, do_address_space_destroy, rcu);
2105 }
2106
2107 typedef struct MemoryRegionList MemoryRegionList;
2108
2109 struct MemoryRegionList {
2110 const MemoryRegion *mr;
2111 QTAILQ_ENTRY(MemoryRegionList) queue;
2112 };
2113
2114 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
2115
2116 static void mtree_print_mr(fprintf_function mon_printf, void *f,
2117 const MemoryRegion *mr, unsigned int level,
2118 hwaddr base,
2119 MemoryRegionListHead *alias_print_queue)
2120 {
2121 MemoryRegionList *new_ml, *ml, *next_ml;
2122 MemoryRegionListHead submr_print_queue;
2123 const MemoryRegion *submr;
2124 unsigned int i;
2125
2126 if (!mr) {
2127 return;
2128 }
2129
2130 for (i = 0; i < level; i++) {
2131 mon_printf(f, " ");
2132 }
2133
2134 if (mr->alias) {
2135 MemoryRegionList *ml;
2136 bool found = false;
2137
2138 /* check if the alias is already in the queue */
2139 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
2140 if (ml->mr == mr->alias) {
2141 found = true;
2142 }
2143 }
2144
2145 if (!found) {
2146 ml = g_new(MemoryRegionList, 1);
2147 ml->mr = mr->alias;
2148 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
2149 }
2150 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2151 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
2152 "-" TARGET_FMT_plx "%s\n",
2153 base + mr->addr,
2154 base + mr->addr
2155 + (int128_nz(mr->size) ?
2156 (hwaddr)int128_get64(int128_sub(mr->size,
2157 int128_one())) : 0),
2158 mr->priority,
2159 mr->romd_mode ? 'R' : '-',
2160 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2161 : '-',
2162 memory_region_name(mr),
2163 memory_region_name(mr->alias),
2164 mr->alias_offset,
2165 mr->alias_offset
2166 + (int128_nz(mr->size) ?
2167 (hwaddr)int128_get64(int128_sub(mr->size,
2168 int128_one())) : 0),
2169 mr->enabled ? "" : " [disabled]");
2170 } else {
2171 mon_printf(f,
2172 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s%s\n",
2173 base + mr->addr,
2174 base + mr->addr
2175 + (int128_nz(mr->size) ?
2176 (hwaddr)int128_get64(int128_sub(mr->size,
2177 int128_one())) : 0),
2178 mr->priority,
2179 mr->romd_mode ? 'R' : '-',
2180 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2181 : '-',
2182 memory_region_name(mr),
2183 mr->enabled ? "" : " [disabled]");
2184 }
2185
2186 QTAILQ_INIT(&submr_print_queue);
2187
2188 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2189 new_ml = g_new(MemoryRegionList, 1);
2190 new_ml->mr = submr;
2191 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2192 if (new_ml->mr->addr < ml->mr->addr ||
2193 (new_ml->mr->addr == ml->mr->addr &&
2194 new_ml->mr->priority > ml->mr->priority)) {
2195 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2196 new_ml = NULL;
2197 break;
2198 }
2199 }
2200 if (new_ml) {
2201 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2202 }
2203 }
2204
2205 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2206 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
2207 alias_print_queue);
2208 }
2209
2210 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
2211 g_free(ml);
2212 }
2213 }
2214
2215 void mtree_info(fprintf_function mon_printf, void *f)
2216 {
2217 MemoryRegionListHead ml_head;
2218 MemoryRegionList *ml, *ml2;
2219 AddressSpace *as;
2220
2221 QTAILQ_INIT(&ml_head);
2222
2223 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2224 mon_printf(f, "address-space: %s\n", as->name);
2225 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
2226 mon_printf(f, "\n");
2227 }
2228
2229 /* print aliased regions */
2230 QTAILQ_FOREACH(ml, &ml_head, queue) {
2231 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
2232 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
2233 mon_printf(f, "\n");
2234 }
2235
2236 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
2237 g_free(ml);
2238 }
2239 }
2240
2241 static const TypeInfo memory_region_info = {
2242 .parent = TYPE_OBJECT,
2243 .name = TYPE_MEMORY_REGION,
2244 .instance_size = sizeof(MemoryRegion),
2245 .instance_init = memory_region_initfn,
2246 .instance_finalize = memory_region_finalize,
2247 };
2248
2249 static void memory_register_types(void)
2250 {
2251 type_register_static(&memory_region_info);
2252 }
2253
2254 type_init(memory_register_types)
AR7 emulation for QEMU