1 riscv_ss = ss.source_set()
2 riscv_ss.add(files('boot.c'), fdt)
3 riscv_ss.add(files('numa.c'))
4 riscv_ss.add(when: 'CONFIG_HART', if_true: files('riscv_hart.c'))
5 riscv_ss.add(when: 'CONFIG_OPENTITAN', if_true: files('opentitan.c'))
6 riscv_ss.add(when: 'CONFIG_RISCV_VIRT', if_true: files('virt.c'))
7 riscv_ss.add(when: 'CONFIG_SIFIVE', if_true: files('sifive_clint.c'))
8 riscv_ss.add(when: 'CONFIG_SIFIVE', if_true: files('sifive_gpio.c'))
9 riscv_ss.add(when: 'CONFIG_SIFIVE', if_true: files('sifive_plic.c'))
10 riscv_ss.add(when: 'CONFIG_SIFIVE', if_true: files('sifive_test.c'))
11 riscv_ss.add(when: 'CONFIG_SIFIVE', if_true: files('sifive_uart.c'))
12 riscv_ss.add(when: 'CONFIG_SIFIVE_E', if_true: files('sifive_e.c'))
13 riscv_ss.add(when: 'CONFIG_SIFIVE_E', if_true: files('sifive_e_prci.c'))
14 riscv_ss.add(when: 'CONFIG_SIFIVE_U', if_true: files('sifive_u.c'))
15 riscv_ss.add(when: 'CONFIG_SIFIVE_U', if_true: files('sifive_u_otp.c'))
16 riscv_ss.add(when: 'CONFIG_SIFIVE_U', if_true: files('sifive_u_prci.c'))
17 riscv_ss.add(when: 'CONFIG_SPIKE', if_true: files('riscv_htif.c'))
18 riscv_ss.add(when: 'CONFIG_SPIKE', if_true: files('spike.c'))
20 hw_arch += {'riscv': riscv_ss}