4 * Copyright (C) 2014 Red Hat Inc
7 * Marcel Apfelbaum <marcel.a@redhat.com>
9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
13 #include "qemu/osdep.h"
14 #include "qemu/option.h"
15 #include "qapi/qmp/qerror.h"
16 #include "sysemu/replay.h"
17 #include "qemu/units.h"
18 #include "hw/boards.h"
19 #include "hw/loader.h"
20 #include "qapi/error.h"
21 #include "qapi/qapi-visit-common.h"
22 #include "qapi/visitor.h"
23 #include "hw/sysbus.h"
24 #include "sysemu/cpus.h"
25 #include "sysemu/sysemu.h"
26 #include "sysemu/reset.h"
27 #include "sysemu/runstate.h"
28 #include "sysemu/numa.h"
29 #include "qemu/error-report.h"
30 #include "sysemu/qtest.h"
31 #include "hw/pci/pci.h"
32 #include "hw/mem/nvdimm.h"
33 #include "migration/global_state.h"
34 #include "migration/vmstate.h"
36 GlobalProperty hw_compat_5_2
[] = {};
37 const size_t hw_compat_5_2_len
= G_N_ELEMENTS(hw_compat_5_2
);
39 GlobalProperty hw_compat_5_1
[] = {
40 { "vhost-scsi", "num_queues", "1"},
41 { "vhost-user-blk", "num-queues", "1"},
42 { "vhost-user-scsi", "num_queues", "1"},
43 { "virtio-blk-device", "num-queues", "1"},
44 { "virtio-scsi-device", "num_queues", "1"},
45 { "nvme", "use-intel-id", "on"},
46 { "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */
48 const size_t hw_compat_5_1_len
= G_N_ELEMENTS(hw_compat_5_1
);
50 GlobalProperty hw_compat_5_0
[] = {
51 { "pci-host-bridge", "x-config-reg-migration-enabled", "off" },
52 { "virtio-balloon-device", "page-poison", "false" },
53 { "vmport", "x-read-set-eax", "off" },
54 { "vmport", "x-signal-unsupported-cmd", "off" },
55 { "vmport", "x-report-vmx-type", "off" },
56 { "vmport", "x-cmds-v2", "off" },
57 { "virtio-device", "x-disable-legacy-check", "true" },
59 const size_t hw_compat_5_0_len
= G_N_ELEMENTS(hw_compat_5_0
);
61 GlobalProperty hw_compat_4_2
[] = {
62 { "virtio-blk-device", "queue-size", "128"},
63 { "virtio-scsi-device", "virtqueue_size", "128"},
64 { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" },
65 { "virtio-blk-device", "seg-max-adjust", "off"},
66 { "virtio-scsi-device", "seg_max_adjust", "off"},
67 { "vhost-blk-device", "seg_max_adjust", "off"},
68 { "usb-host", "suppress-remote-wake", "off" },
69 { "usb-redir", "suppress-remote-wake", "off" },
70 { "qxl", "revision", "4" },
71 { "qxl-vga", "revision", "4" },
72 { "fw_cfg", "acpi-mr-restore", "false" },
74 const size_t hw_compat_4_2_len
= G_N_ELEMENTS(hw_compat_4_2
);
76 GlobalProperty hw_compat_4_1
[] = {
77 { "virtio-pci", "x-pcie-flr-init", "off" },
78 { "virtio-device", "use-disabled-flag", "false" },
80 const size_t hw_compat_4_1_len
= G_N_ELEMENTS(hw_compat_4_1
);
82 GlobalProperty hw_compat_4_0
[] = {
83 { "VGA", "edid", "false" },
84 { "secondary-vga", "edid", "false" },
85 { "bochs-display", "edid", "false" },
86 { "virtio-vga", "edid", "false" },
87 { "virtio-gpu-device", "edid", "false" },
88 { "virtio-device", "use-started", "false" },
89 { "virtio-balloon-device", "qemu-4-0-config-size", "true" },
90 { "pl031", "migrate-tick-offset", "false" },
92 const size_t hw_compat_4_0_len
= G_N_ELEMENTS(hw_compat_4_0
);
94 GlobalProperty hw_compat_3_1
[] = {
95 { "pcie-root-port", "x-speed", "2_5" },
96 { "pcie-root-port", "x-width", "1" },
97 { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" },
98 { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" },
99 { "tpm-crb", "ppi", "false" },
100 { "tpm-tis", "ppi", "false" },
101 { "usb-kbd", "serial", "42" },
102 { "usb-mouse", "serial", "42" },
103 { "usb-tablet", "serial", "42" },
104 { "virtio-blk-device", "discard", "false" },
105 { "virtio-blk-device", "write-zeroes", "false" },
106 { "virtio-balloon-device", "qemu-4-0-config-size", "false" },
107 { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */
109 const size_t hw_compat_3_1_len
= G_N_ELEMENTS(hw_compat_3_1
);
111 GlobalProperty hw_compat_3_0
[] = {};
112 const size_t hw_compat_3_0_len
= G_N_ELEMENTS(hw_compat_3_0
);
114 GlobalProperty hw_compat_2_12
[] = {
115 { "migration", "decompress-error-check", "off" },
116 { "hda-audio", "use-timer", "false" },
117 { "cirrus-vga", "global-vmstate", "true" },
118 { "VGA", "global-vmstate", "true" },
119 { "vmware-svga", "global-vmstate", "true" },
120 { "qxl-vga", "global-vmstate", "true" },
122 const size_t hw_compat_2_12_len
= G_N_ELEMENTS(hw_compat_2_12
);
124 GlobalProperty hw_compat_2_11
[] = {
125 { "hpet", "hpet-offset-saved", "false" },
126 { "virtio-blk-pci", "vectors", "2" },
127 { "vhost-user-blk-pci", "vectors", "2" },
128 { "e1000", "migrate_tso_props", "off" },
130 const size_t hw_compat_2_11_len
= G_N_ELEMENTS(hw_compat_2_11
);
132 GlobalProperty hw_compat_2_10
[] = {
133 { "virtio-mouse-device", "wheel-axis", "false" },
134 { "virtio-tablet-device", "wheel-axis", "false" },
136 const size_t hw_compat_2_10_len
= G_N_ELEMENTS(hw_compat_2_10
);
138 GlobalProperty hw_compat_2_9
[] = {
139 { "pci-bridge", "shpc", "off" },
140 { "intel-iommu", "pt", "off" },
141 { "virtio-net-device", "x-mtu-bypass-backend", "off" },
142 { "pcie-root-port", "x-migrate-msix", "false" },
144 const size_t hw_compat_2_9_len
= G_N_ELEMENTS(hw_compat_2_9
);
146 GlobalProperty hw_compat_2_8
[] = {
147 { "fw_cfg_mem", "x-file-slots", "0x10" },
148 { "fw_cfg_io", "x-file-slots", "0x10" },
149 { "pflash_cfi01", "old-multiple-chip-handling", "on" },
150 { "pci-bridge", "shpc", "on" },
151 { TYPE_PCI_DEVICE
, "x-pcie-extcap-init", "off" },
152 { "virtio-pci", "x-pcie-deverr-init", "off" },
153 { "virtio-pci", "x-pcie-lnkctl-init", "off" },
154 { "virtio-pci", "x-pcie-pm-init", "off" },
155 { "cirrus-vga", "vgamem_mb", "8" },
156 { "isa-cirrus-vga", "vgamem_mb", "8" },
158 const size_t hw_compat_2_8_len
= G_N_ELEMENTS(hw_compat_2_8
);
160 GlobalProperty hw_compat_2_7
[] = {
161 { "virtio-pci", "page-per-vq", "on" },
162 { "virtio-serial-device", "emergency-write", "off" },
163 { "ioapic", "version", "0x11" },
164 { "intel-iommu", "x-buggy-eim", "true" },
165 { "virtio-pci", "x-ignore-backend-features", "on" },
167 const size_t hw_compat_2_7_len
= G_N_ELEMENTS(hw_compat_2_7
);
169 GlobalProperty hw_compat_2_6
[] = {
170 { "virtio-mmio", "format_transport_address", "off" },
171 /* Optional because not all virtio-pci devices support legacy mode */
172 { "virtio-pci", "disable-modern", "on", .optional
= true },
173 { "virtio-pci", "disable-legacy", "off", .optional
= true },
175 const size_t hw_compat_2_6_len
= G_N_ELEMENTS(hw_compat_2_6
);
177 GlobalProperty hw_compat_2_5
[] = {
178 { "isa-fdc", "fallback", "144" },
179 { "pvscsi", "x-old-pci-configuration", "on" },
180 { "pvscsi", "x-disable-pcie", "on" },
181 { "vmxnet3", "x-old-msi-offsets", "on" },
182 { "vmxnet3", "x-disable-pcie", "on" },
184 const size_t hw_compat_2_5_len
= G_N_ELEMENTS(hw_compat_2_5
);
186 GlobalProperty hw_compat_2_4
[] = {
187 /* Optional because the 'scsi' property is Linux-only */
188 { "virtio-blk-device", "scsi", "true", .optional
= true },
189 { "e1000", "extra_mac_registers", "off" },
190 { "virtio-pci", "x-disable-pcie", "on" },
191 { "virtio-pci", "migrate-extra", "off" },
192 { "fw_cfg_mem", "dma_enabled", "off" },
193 { "fw_cfg_io", "dma_enabled", "off" }
195 const size_t hw_compat_2_4_len
= G_N_ELEMENTS(hw_compat_2_4
);
197 GlobalProperty hw_compat_2_3
[] = {
198 { "virtio-blk-pci", "any_layout", "off" },
199 { "virtio-balloon-pci", "any_layout", "off" },
200 { "virtio-serial-pci", "any_layout", "off" },
201 { "virtio-9p-pci", "any_layout", "off" },
202 { "virtio-rng-pci", "any_layout", "off" },
203 { TYPE_PCI_DEVICE
, "x-pcie-lnksta-dllla", "off" },
204 { "migration", "send-configuration", "off" },
205 { "migration", "send-section-footer", "off" },
206 { "migration", "store-global-state", "off" },
208 const size_t hw_compat_2_3_len
= G_N_ELEMENTS(hw_compat_2_3
);
210 GlobalProperty hw_compat_2_2
[] = {};
211 const size_t hw_compat_2_2_len
= G_N_ELEMENTS(hw_compat_2_2
);
213 GlobalProperty hw_compat_2_1
[] = {
214 { "intel-hda", "old_msi_addr", "on" },
215 { "VGA", "qemu-extended-regs", "off" },
216 { "secondary-vga", "qemu-extended-regs", "off" },
217 { "virtio-scsi-pci", "any_layout", "off" },
218 { "usb-mouse", "usb_version", "1" },
219 { "usb-kbd", "usb_version", "1" },
220 { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" },
222 const size_t hw_compat_2_1_len
= G_N_ELEMENTS(hw_compat_2_1
);
224 MachineState
*current_machine
;
226 static char *machine_get_kernel(Object
*obj
, Error
**errp
)
228 MachineState
*ms
= MACHINE(obj
);
230 return g_strdup(ms
->kernel_filename
);
233 static void machine_set_kernel(Object
*obj
, const char *value
, Error
**errp
)
235 MachineState
*ms
= MACHINE(obj
);
237 g_free(ms
->kernel_filename
);
238 ms
->kernel_filename
= g_strdup(value
);
241 static char *machine_get_initrd(Object
*obj
, Error
**errp
)
243 MachineState
*ms
= MACHINE(obj
);
245 return g_strdup(ms
->initrd_filename
);
248 static void machine_set_initrd(Object
*obj
, const char *value
, Error
**errp
)
250 MachineState
*ms
= MACHINE(obj
);
252 g_free(ms
->initrd_filename
);
253 ms
->initrd_filename
= g_strdup(value
);
256 static char *machine_get_append(Object
*obj
, Error
**errp
)
258 MachineState
*ms
= MACHINE(obj
);
260 return g_strdup(ms
->kernel_cmdline
);
263 static void machine_set_append(Object
*obj
, const char *value
, Error
**errp
)
265 MachineState
*ms
= MACHINE(obj
);
267 g_free(ms
->kernel_cmdline
);
268 ms
->kernel_cmdline
= g_strdup(value
);
271 static char *machine_get_dtb(Object
*obj
, Error
**errp
)
273 MachineState
*ms
= MACHINE(obj
);
275 return g_strdup(ms
->dtb
);
278 static void machine_set_dtb(Object
*obj
, const char *value
, Error
**errp
)
280 MachineState
*ms
= MACHINE(obj
);
283 ms
->dtb
= g_strdup(value
);
286 static char *machine_get_dumpdtb(Object
*obj
, Error
**errp
)
288 MachineState
*ms
= MACHINE(obj
);
290 return g_strdup(ms
->dumpdtb
);
293 static void machine_set_dumpdtb(Object
*obj
, const char *value
, Error
**errp
)
295 MachineState
*ms
= MACHINE(obj
);
298 ms
->dumpdtb
= g_strdup(value
);
301 static void machine_get_phandle_start(Object
*obj
, Visitor
*v
,
302 const char *name
, void *opaque
,
305 MachineState
*ms
= MACHINE(obj
);
306 int64_t value
= ms
->phandle_start
;
308 visit_type_int(v
, name
, &value
, errp
);
311 static void machine_set_phandle_start(Object
*obj
, Visitor
*v
,
312 const char *name
, void *opaque
,
315 MachineState
*ms
= MACHINE(obj
);
318 if (!visit_type_int(v
, name
, &value
, errp
)) {
322 ms
->phandle_start
= value
;
325 static char *machine_get_dt_compatible(Object
*obj
, Error
**errp
)
327 MachineState
*ms
= MACHINE(obj
);
329 return g_strdup(ms
->dt_compatible
);
332 static void machine_set_dt_compatible(Object
*obj
, const char *value
, Error
**errp
)
334 MachineState
*ms
= MACHINE(obj
);
336 g_free(ms
->dt_compatible
);
337 ms
->dt_compatible
= g_strdup(value
);
340 static bool machine_get_dump_guest_core(Object
*obj
, Error
**errp
)
342 MachineState
*ms
= MACHINE(obj
);
344 return ms
->dump_guest_core
;
347 static void machine_set_dump_guest_core(Object
*obj
, bool value
, Error
**errp
)
349 MachineState
*ms
= MACHINE(obj
);
351 ms
->dump_guest_core
= value
;
354 static bool machine_get_mem_merge(Object
*obj
, Error
**errp
)
356 MachineState
*ms
= MACHINE(obj
);
358 return ms
->mem_merge
;
361 static void machine_set_mem_merge(Object
*obj
, bool value
, Error
**errp
)
363 MachineState
*ms
= MACHINE(obj
);
365 ms
->mem_merge
= value
;
368 static bool machine_get_usb(Object
*obj
, Error
**errp
)
370 MachineState
*ms
= MACHINE(obj
);
375 static void machine_set_usb(Object
*obj
, bool value
, Error
**errp
)
377 MachineState
*ms
= MACHINE(obj
);
380 ms
->usb_disabled
= !value
;
383 static bool machine_get_graphics(Object
*obj
, Error
**errp
)
385 MachineState
*ms
= MACHINE(obj
);
387 return ms
->enable_graphics
;
390 static void machine_set_graphics(Object
*obj
, bool value
, Error
**errp
)
392 MachineState
*ms
= MACHINE(obj
);
394 ms
->enable_graphics
= value
;
397 static char *machine_get_firmware(Object
*obj
, Error
**errp
)
399 MachineState
*ms
= MACHINE(obj
);
401 return g_strdup(ms
->firmware
);
404 static void machine_set_firmware(Object
*obj
, const char *value
, Error
**errp
)
406 MachineState
*ms
= MACHINE(obj
);
408 g_free(ms
->firmware
);
409 ms
->firmware
= g_strdup(value
);
412 static void machine_set_suppress_vmdesc(Object
*obj
, bool value
, Error
**errp
)
414 MachineState
*ms
= MACHINE(obj
);
416 ms
->suppress_vmdesc
= value
;
419 static bool machine_get_suppress_vmdesc(Object
*obj
, Error
**errp
)
421 MachineState
*ms
= MACHINE(obj
);
423 return ms
->suppress_vmdesc
;
426 static char *machine_get_memory_encryption(Object
*obj
, Error
**errp
)
428 MachineState
*ms
= MACHINE(obj
);
430 return g_strdup(ms
->memory_encryption
);
433 static void machine_set_memory_encryption(Object
*obj
, const char *value
,
436 MachineState
*ms
= MACHINE(obj
);
438 g_free(ms
->memory_encryption
);
439 ms
->memory_encryption
= g_strdup(value
);
442 * With memory encryption, the host can't see the real contents of RAM,
443 * so there's no point in it trying to merge areas.
446 machine_set_mem_merge(obj
, false, errp
);
450 static bool machine_get_nvdimm(Object
*obj
, Error
**errp
)
452 MachineState
*ms
= MACHINE(obj
);
454 return ms
->nvdimms_state
->is_enabled
;
457 static void machine_set_nvdimm(Object
*obj
, bool value
, Error
**errp
)
459 MachineState
*ms
= MACHINE(obj
);
461 ms
->nvdimms_state
->is_enabled
= value
;
464 static bool machine_get_hmat(Object
*obj
, Error
**errp
)
466 MachineState
*ms
= MACHINE(obj
);
468 return ms
->numa_state
->hmat_enabled
;
471 static void machine_set_hmat(Object
*obj
, bool value
, Error
**errp
)
473 MachineState
*ms
= MACHINE(obj
);
475 ms
->numa_state
->hmat_enabled
= value
;
478 static char *machine_get_nvdimm_persistence(Object
*obj
, Error
**errp
)
480 MachineState
*ms
= MACHINE(obj
);
482 return g_strdup(ms
->nvdimms_state
->persistence_string
);
485 static void machine_set_nvdimm_persistence(Object
*obj
, const char *value
,
488 MachineState
*ms
= MACHINE(obj
);
489 NVDIMMState
*nvdimms_state
= ms
->nvdimms_state
;
491 if (strcmp(value
, "cpu") == 0) {
492 nvdimms_state
->persistence
= 3;
493 } else if (strcmp(value
, "mem-ctrl") == 0) {
494 nvdimms_state
->persistence
= 2;
496 error_setg(errp
, "-machine nvdimm-persistence=%s: unsupported option",
501 g_free(nvdimms_state
->persistence_string
);
502 nvdimms_state
->persistence_string
= g_strdup(value
);
505 void machine_class_allow_dynamic_sysbus_dev(MachineClass
*mc
, const char *type
)
507 QAPI_LIST_PREPEND(mc
->allowed_dynamic_sysbus_devices
, g_strdup(type
));
510 static void validate_sysbus_device(SysBusDevice
*sbdev
, void *opaque
)
512 MachineState
*machine
= opaque
;
513 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
514 bool allowed
= false;
517 for (wl
= mc
->allowed_dynamic_sysbus_devices
;
520 allowed
|= !!object_dynamic_cast(OBJECT(sbdev
), wl
->value
);
524 error_report("Option '-device %s' cannot be handled by this machine",
525 object_class_get_name(object_get_class(OBJECT(sbdev
))));
530 static char *machine_get_memdev(Object
*obj
, Error
**errp
)
532 MachineState
*ms
= MACHINE(obj
);
534 return g_strdup(ms
->ram_memdev_id
);
537 static void machine_set_memdev(Object
*obj
, const char *value
, Error
**errp
)
539 MachineState
*ms
= MACHINE(obj
);
541 g_free(ms
->ram_memdev_id
);
542 ms
->ram_memdev_id
= g_strdup(value
);
546 static void machine_init_notify(Notifier
*notifier
, void *data
)
548 MachineState
*machine
= MACHINE(qdev_get_machine());
551 * Loop through all dynamically created sysbus devices and check if they are
552 * all allowed. If a device is not allowed, error out.
554 foreach_dynamic_sysbus_device(validate_sysbus_device
, machine
);
557 HotpluggableCPUList
*machine_query_hotpluggable_cpus(MachineState
*machine
)
560 HotpluggableCPUList
*head
= NULL
;
561 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
563 /* force board to initialize possible_cpus if it hasn't been done yet */
564 mc
->possible_cpu_arch_ids(machine
);
566 for (i
= 0; i
< machine
->possible_cpus
->len
; i
++) {
568 HotpluggableCPU
*cpu_item
= g_new0(typeof(*cpu_item
), 1);
570 cpu_item
->type
= g_strdup(machine
->possible_cpus
->cpus
[i
].type
);
571 cpu_item
->vcpus_count
= machine
->possible_cpus
->cpus
[i
].vcpus_count
;
572 cpu_item
->props
= g_memdup(&machine
->possible_cpus
->cpus
[i
].props
,
573 sizeof(*cpu_item
->props
));
575 cpu
= machine
->possible_cpus
->cpus
[i
].cpu
;
577 cpu_item
->has_qom_path
= true;
578 cpu_item
->qom_path
= object_get_canonical_path(cpu
);
580 QAPI_LIST_PREPEND(head
, cpu_item
);
586 * machine_set_cpu_numa_node:
587 * @machine: machine object to modify
588 * @props: specifies which cpu objects to assign to
589 * numa node specified by @props.node_id
590 * @errp: if an error occurs, a pointer to an area to store the error
592 * Associate NUMA node specified by @props.node_id with cpu slots that
593 * match socket/core/thread-ids specified by @props. It's recommended to use
594 * query-hotpluggable-cpus.props values to specify affected cpu slots,
595 * which would lead to exact 1:1 mapping of cpu slots to NUMA node.
597 * However for CLI convenience it's possible to pass in subset of properties,
598 * which would affect all cpu slots that match it.
600 * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \
601 * -numa cpu,node-id=0,socket_id=0 \
602 * -numa cpu,node-id=1,socket_id=1
603 * will assign all child cores of socket 0 to node 0 and
604 * of socket 1 to node 1.
606 * On attempt of reassigning (already assigned) cpu slot to another NUMA node,
608 * Empty subset is disallowed and function will return with error in this case.
610 void machine_set_cpu_numa_node(MachineState
*machine
,
611 const CpuInstanceProperties
*props
, Error
**errp
)
613 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
614 NodeInfo
*numa_info
= machine
->numa_state
->nodes
;
618 if (!mc
->possible_cpu_arch_ids
) {
619 error_setg(errp
, "mapping of CPUs to NUMA node is not supported");
623 /* disabling node mapping is not supported, forbid it */
624 assert(props
->has_node_id
);
626 /* force board to initialize possible_cpus if it hasn't been done yet */
627 mc
->possible_cpu_arch_ids(machine
);
629 for (i
= 0; i
< machine
->possible_cpus
->len
; i
++) {
630 CPUArchId
*slot
= &machine
->possible_cpus
->cpus
[i
];
632 /* reject unsupported by board properties */
633 if (props
->has_thread_id
&& !slot
->props
.has_thread_id
) {
634 error_setg(errp
, "thread-id is not supported");
638 if (props
->has_core_id
&& !slot
->props
.has_core_id
) {
639 error_setg(errp
, "core-id is not supported");
643 if (props
->has_socket_id
&& !slot
->props
.has_socket_id
) {
644 error_setg(errp
, "socket-id is not supported");
648 if (props
->has_die_id
&& !slot
->props
.has_die_id
) {
649 error_setg(errp
, "die-id is not supported");
653 /* skip slots with explicit mismatch */
654 if (props
->has_thread_id
&& props
->thread_id
!= slot
->props
.thread_id
) {
658 if (props
->has_core_id
&& props
->core_id
!= slot
->props
.core_id
) {
662 if (props
->has_die_id
&& props
->die_id
!= slot
->props
.die_id
) {
666 if (props
->has_socket_id
&& props
->socket_id
!= slot
->props
.socket_id
) {
670 /* reject assignment if slot is already assigned, for compatibility
671 * of legacy cpu_index mapping with SPAPR core based mapping do not
672 * error out if cpu thread and matched core have the same node-id */
673 if (slot
->props
.has_node_id
&&
674 slot
->props
.node_id
!= props
->node_id
) {
675 error_setg(errp
, "CPU is already assigned to node-id: %" PRId64
,
676 slot
->props
.node_id
);
680 /* assign slot to node as it's matched '-numa cpu' key */
682 slot
->props
.node_id
= props
->node_id
;
683 slot
->props
.has_node_id
= props
->has_node_id
;
685 if (machine
->numa_state
->hmat_enabled
) {
686 if ((numa_info
[props
->node_id
].initiator
< MAX_NODES
) &&
687 (props
->node_id
!= numa_info
[props
->node_id
].initiator
)) {
688 error_setg(errp
, "The initiator of CPU NUMA node %" PRId64
689 " should be itself", props
->node_id
);
692 numa_info
[props
->node_id
].has_cpu
= true;
693 numa_info
[props
->node_id
].initiator
= props
->node_id
;
698 error_setg(errp
, "no match found");
702 static void smp_parse(MachineState
*ms
, QemuOpts
*opts
)
705 unsigned cpus
= qemu_opt_get_number(opts
, "cpus", 0);
706 unsigned sockets
= qemu_opt_get_number(opts
, "sockets", 0);
707 unsigned cores
= qemu_opt_get_number(opts
, "cores", 0);
708 unsigned threads
= qemu_opt_get_number(opts
, "threads", 0);
710 /* compute missing values, prefer sockets over cores over threads */
711 if (cpus
== 0 || sockets
== 0) {
712 cores
= cores
> 0 ? cores
: 1;
713 threads
= threads
> 0 ? threads
: 1;
715 sockets
= sockets
> 0 ? sockets
: 1;
716 cpus
= cores
* threads
* sockets
;
719 qemu_opt_get_number(opts
, "maxcpus", cpus
);
720 sockets
= ms
->smp
.max_cpus
/ (cores
* threads
);
722 } else if (cores
== 0) {
723 threads
= threads
> 0 ? threads
: 1;
724 cores
= cpus
/ (sockets
* threads
);
725 cores
= cores
> 0 ? cores
: 1;
726 } else if (threads
== 0) {
727 threads
= cpus
/ (cores
* sockets
);
728 threads
= threads
> 0 ? threads
: 1;
729 } else if (sockets
* cores
* threads
< cpus
) {
730 error_report("cpu topology: "
731 "sockets (%u) * cores (%u) * threads (%u) < "
733 sockets
, cores
, threads
, cpus
);
738 qemu_opt_get_number(opts
, "maxcpus", cpus
);
740 if (ms
->smp
.max_cpus
< cpus
) {
741 error_report("maxcpus must be equal to or greater than smp");
745 if (sockets
* cores
* threads
!= ms
->smp
.max_cpus
) {
746 error_report("Invalid CPU topology: "
747 "sockets (%u) * cores (%u) * threads (%u) "
749 sockets
, cores
, threads
,
755 ms
->smp
.cores
= cores
;
756 ms
->smp
.threads
= threads
;
757 ms
->smp
.sockets
= sockets
;
760 if (ms
->smp
.cpus
> 1) {
761 Error
*blocker
= NULL
;
762 error_setg(&blocker
, QERR_REPLAY_NOT_SUPPORTED
, "smp");
763 replay_add_blocker(blocker
);
767 static void machine_class_init(ObjectClass
*oc
, void *data
)
769 MachineClass
*mc
= MACHINE_CLASS(oc
);
771 /* Default 128 MB as guest ram size */
772 mc
->default_ram_size
= 128 * MiB
;
773 mc
->rom_file_has_mr
= true;
774 mc
->smp_parse
= smp_parse
;
776 /* numa node memory size aligned on 8MB by default.
777 * On Linux, each node's border has to be 8MB aligned
779 mc
->numa_mem_align_shift
= 23;
781 object_class_property_add_str(oc
, "kernel",
782 machine_get_kernel
, machine_set_kernel
);
783 object_class_property_set_description(oc
, "kernel",
784 "Linux kernel image file");
786 object_class_property_add_str(oc
, "initrd",
787 machine_get_initrd
, machine_set_initrd
);
788 object_class_property_set_description(oc
, "initrd",
789 "Linux initial ramdisk file");
791 object_class_property_add_str(oc
, "append",
792 machine_get_append
, machine_set_append
);
793 object_class_property_set_description(oc
, "append",
794 "Linux kernel command line");
796 object_class_property_add_str(oc
, "dtb",
797 machine_get_dtb
, machine_set_dtb
);
798 object_class_property_set_description(oc
, "dtb",
799 "Linux kernel device tree file");
801 object_class_property_add_str(oc
, "dumpdtb",
802 machine_get_dumpdtb
, machine_set_dumpdtb
);
803 object_class_property_set_description(oc
, "dumpdtb",
804 "Dump current dtb to a file and quit");
806 object_class_property_add(oc
, "phandle-start", "int",
807 machine_get_phandle_start
, machine_set_phandle_start
,
809 object_class_property_set_description(oc
, "phandle-start",
810 "The first phandle ID we may generate dynamically");
812 object_class_property_add_str(oc
, "dt-compatible",
813 machine_get_dt_compatible
, machine_set_dt_compatible
);
814 object_class_property_set_description(oc
, "dt-compatible",
815 "Overrides the \"compatible\" property of the dt root node");
817 object_class_property_add_bool(oc
, "dump-guest-core",
818 machine_get_dump_guest_core
, machine_set_dump_guest_core
);
819 object_class_property_set_description(oc
, "dump-guest-core",
820 "Include guest memory in a core dump");
822 object_class_property_add_bool(oc
, "mem-merge",
823 machine_get_mem_merge
, machine_set_mem_merge
);
824 object_class_property_set_description(oc
, "mem-merge",
825 "Enable/disable memory merge support");
827 object_class_property_add_bool(oc
, "usb",
828 machine_get_usb
, machine_set_usb
);
829 object_class_property_set_description(oc
, "usb",
830 "Set on/off to enable/disable usb");
832 object_class_property_add_bool(oc
, "graphics",
833 machine_get_graphics
, machine_set_graphics
);
834 object_class_property_set_description(oc
, "graphics",
835 "Set on/off to enable/disable graphics emulation");
837 object_class_property_add_str(oc
, "firmware",
838 machine_get_firmware
, machine_set_firmware
);
839 object_class_property_set_description(oc
, "firmware",
842 object_class_property_add_bool(oc
, "suppress-vmdesc",
843 machine_get_suppress_vmdesc
, machine_set_suppress_vmdesc
);
844 object_class_property_set_description(oc
, "suppress-vmdesc",
845 "Set on to disable self-describing migration");
847 object_class_property_add_str(oc
, "memory-encryption",
848 machine_get_memory_encryption
, machine_set_memory_encryption
);
849 object_class_property_set_description(oc
, "memory-encryption",
850 "Set memory encryption object to use");
852 object_class_property_add_str(oc
, "memory-backend",
853 machine_get_memdev
, machine_set_memdev
);
854 object_class_property_set_description(oc
, "memory-backend",
856 "Valid value is ID of hostmem based backend");
859 static void machine_class_base_init(ObjectClass
*oc
, void *data
)
861 MachineClass
*mc
= MACHINE_CLASS(oc
);
862 mc
->max_cpus
= mc
->max_cpus
?: 1;
863 mc
->min_cpus
= mc
->min_cpus
?: 1;
864 mc
->default_cpus
= mc
->default_cpus
?: 1;
866 if (!object_class_is_abstract(oc
)) {
867 const char *cname
= object_class_get_name(oc
);
868 assert(g_str_has_suffix(cname
, TYPE_MACHINE_SUFFIX
));
869 mc
->name
= g_strndup(cname
,
870 strlen(cname
) - strlen(TYPE_MACHINE_SUFFIX
));
871 mc
->compat_props
= g_ptr_array_new();
875 static void machine_initfn(Object
*obj
)
877 MachineState
*ms
= MACHINE(obj
);
878 MachineClass
*mc
= MACHINE_GET_CLASS(obj
);
880 container_get(obj
, "/peripheral");
881 container_get(obj
, "/peripheral-anon");
883 ms
->dump_guest_core
= true;
884 ms
->mem_merge
= true;
885 ms
->enable_graphics
= true;
886 ms
->kernel_cmdline
= g_strdup("");
888 if (mc
->nvdimm_supported
) {
889 Object
*obj
= OBJECT(ms
);
891 ms
->nvdimms_state
= g_new0(NVDIMMState
, 1);
892 object_property_add_bool(obj
, "nvdimm",
893 machine_get_nvdimm
, machine_set_nvdimm
);
894 object_property_set_description(obj
, "nvdimm",
895 "Set on/off to enable/disable "
896 "NVDIMM instantiation");
898 object_property_add_str(obj
, "nvdimm-persistence",
899 machine_get_nvdimm_persistence
,
900 machine_set_nvdimm_persistence
);
901 object_property_set_description(obj
, "nvdimm-persistence",
902 "Set NVDIMM persistence"
903 "Valid values are cpu, mem-ctrl");
906 if (mc
->cpu_index_to_instance_props
&& mc
->get_default_cpu_node_id
) {
907 ms
->numa_state
= g_new0(NumaState
, 1);
908 object_property_add_bool(obj
, "hmat",
909 machine_get_hmat
, machine_set_hmat
);
910 object_property_set_description(obj
, "hmat",
911 "Set on/off to enable/disable "
912 "ACPI Heterogeneous Memory Attribute "
916 /* Register notifier when init is done for sysbus sanity checks */
917 ms
->sysbus_notifier
.notify
= machine_init_notify
;
918 qemu_add_machine_init_done_notifier(&ms
->sysbus_notifier
);
920 /* default to mc->default_cpus */
921 ms
->smp
.cpus
= mc
->default_cpus
;
922 ms
->smp
.max_cpus
= mc
->default_cpus
;
928 static void machine_finalize(Object
*obj
)
930 MachineState
*ms
= MACHINE(obj
);
932 g_free(ms
->kernel_filename
);
933 g_free(ms
->initrd_filename
);
934 g_free(ms
->kernel_cmdline
);
937 g_free(ms
->dt_compatible
);
938 g_free(ms
->firmware
);
939 g_free(ms
->device_memory
);
940 g_free(ms
->nvdimms_state
);
941 g_free(ms
->numa_state
);
944 bool machine_usb(MachineState
*machine
)
949 int machine_phandle_start(MachineState
*machine
)
951 return machine
->phandle_start
;
954 bool machine_dump_guest_core(MachineState
*machine
)
956 return machine
->dump_guest_core
;
959 bool machine_mem_merge(MachineState
*machine
)
961 return machine
->mem_merge
;
964 static char *cpu_slot_to_string(const CPUArchId
*cpu
)
966 GString
*s
= g_string_new(NULL
);
967 if (cpu
->props
.has_socket_id
) {
968 g_string_append_printf(s
, "socket-id: %"PRId64
, cpu
->props
.socket_id
);
970 if (cpu
->props
.has_die_id
) {
971 g_string_append_printf(s
, "die-id: %"PRId64
, cpu
->props
.die_id
);
973 if (cpu
->props
.has_core_id
) {
975 g_string_append_printf(s
, ", ");
977 g_string_append_printf(s
, "core-id: %"PRId64
, cpu
->props
.core_id
);
979 if (cpu
->props
.has_thread_id
) {
981 g_string_append_printf(s
, ", ");
983 g_string_append_printf(s
, "thread-id: %"PRId64
, cpu
->props
.thread_id
);
985 return g_string_free(s
, false);
988 static void numa_validate_initiator(NumaState
*numa_state
)
991 NodeInfo
*numa_info
= numa_state
->nodes
;
993 for (i
= 0; i
< numa_state
->num_nodes
; i
++) {
994 if (numa_info
[i
].initiator
== MAX_NODES
) {
995 error_report("The initiator of NUMA node %d is missing, use "
996 "'-numa node,initiator' option to declare it", i
);
1000 if (!numa_info
[numa_info
[i
].initiator
].present
) {
1001 error_report("NUMA node %" PRIu16
" is missing, use "
1002 "'-numa node' option to declare it first",
1003 numa_info
[i
].initiator
);
1007 if (!numa_info
[numa_info
[i
].initiator
].has_cpu
) {
1008 error_report("The initiator of NUMA node %d is invalid", i
);
1014 static void machine_numa_finish_cpu_init(MachineState
*machine
)
1017 bool default_mapping
;
1018 GString
*s
= g_string_new(NULL
);
1019 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
1020 const CPUArchIdList
*possible_cpus
= mc
->possible_cpu_arch_ids(machine
);
1022 assert(machine
->numa_state
->num_nodes
);
1023 for (i
= 0; i
< possible_cpus
->len
; i
++) {
1024 if (possible_cpus
->cpus
[i
].props
.has_node_id
) {
1028 default_mapping
= (i
== possible_cpus
->len
);
1030 for (i
= 0; i
< possible_cpus
->len
; i
++) {
1031 const CPUArchId
*cpu_slot
= &possible_cpus
->cpus
[i
];
1033 if (!cpu_slot
->props
.has_node_id
) {
1034 /* fetch default mapping from board and enable it */
1035 CpuInstanceProperties props
= cpu_slot
->props
;
1037 props
.node_id
= mc
->get_default_cpu_node_id(machine
, i
);
1038 if (!default_mapping
) {
1039 /* record slots with not set mapping,
1040 * TODO: make it hard error in future */
1041 char *cpu_str
= cpu_slot_to_string(cpu_slot
);
1042 g_string_append_printf(s
, "%sCPU %d [%s]",
1043 s
->len
? ", " : "", i
, cpu_str
);
1046 /* non mapped cpus used to fallback to node 0 */
1050 props
.has_node_id
= true;
1051 machine_set_cpu_numa_node(machine
, &props
, &error_fatal
);
1055 if (machine
->numa_state
->hmat_enabled
) {
1056 numa_validate_initiator(machine
->numa_state
);
1059 if (s
->len
&& !qtest_enabled()) {
1060 warn_report("CPU(s) not present in any NUMA nodes: %s",
1062 warn_report("All CPU(s) up to maxcpus should be described "
1063 "in NUMA config, ability to start up with partial NUMA "
1064 "mappings is obsoleted and will be removed in future");
1066 g_string_free(s
, true);
1069 MemoryRegion
*machine_consume_memdev(MachineState
*machine
,
1070 HostMemoryBackend
*backend
)
1072 MemoryRegion
*ret
= host_memory_backend_get_memory(backend
);
1074 if (memory_region_is_mapped(ret
)) {
1075 error_report("memory backend %s can't be used multiple times.",
1076 object_get_canonical_path_component(OBJECT(backend
)));
1079 host_memory_backend_set_mapped(backend
, true);
1080 vmstate_register_ram_global(ret
);
1084 bool machine_smp_parse(MachineState
*ms
, QemuOpts
*opts
, Error
**errp
)
1086 MachineClass
*mc
= MACHINE_GET_CLASS(ms
);
1088 mc
->smp_parse(ms
, opts
);
1090 /* sanity-check smp_cpus and max_cpus against mc */
1091 if (ms
->smp
.cpus
< mc
->min_cpus
) {
1092 error_setg(errp
, "Invalid SMP CPUs %d. The min CPUs "
1093 "supported by machine '%s' is %d",
1095 mc
->name
, mc
->min_cpus
);
1097 } else if (ms
->smp
.max_cpus
> mc
->max_cpus
) {
1098 error_setg(errp
, "Invalid SMP CPUs %d. The max CPUs "
1099 "supported by machine '%s' is %d",
1100 current_machine
->smp
.max_cpus
,
1101 mc
->name
, mc
->max_cpus
);
1107 void machine_run_board_init(MachineState
*machine
)
1109 MachineClass
*machine_class
= MACHINE_GET_CLASS(machine
);
1110 ObjectClass
*oc
= object_class_by_name(machine
->cpu_type
);
1113 /* This checkpoint is required by replay to separate prior clock
1114 reading from the other reads, because timer polling functions query
1115 clock values from the log. */
1116 replay_checkpoint(CHECKPOINT_INIT
);
1118 if (machine
->ram_memdev_id
) {
1120 o
= object_resolve_path_type(machine
->ram_memdev_id
,
1121 TYPE_MEMORY_BACKEND
, NULL
);
1122 machine
->ram
= machine_consume_memdev(machine
, MEMORY_BACKEND(o
));
1125 if (machine
->numa_state
) {
1126 numa_complete_configuration(machine
);
1127 if (machine
->numa_state
->num_nodes
) {
1128 machine_numa_finish_cpu_init(machine
);
1132 /* If the machine supports the valid_cpu_types check and the user
1133 * specified a CPU with -cpu check here that the user CPU is supported.
1135 if (machine_class
->valid_cpu_types
&& machine
->cpu_type
) {
1138 for (i
= 0; machine_class
->valid_cpu_types
[i
]; i
++) {
1139 if (object_class_dynamic_cast(oc
,
1140 machine_class
->valid_cpu_types
[i
])) {
1141 /* The user specificed CPU is in the valid field, we are
1148 if (!machine_class
->valid_cpu_types
[i
]) {
1149 /* The user specified CPU is not valid */
1150 error_report("Invalid CPU type: %s", machine
->cpu_type
);
1151 error_printf("The valid types are: %s",
1152 machine_class
->valid_cpu_types
[0]);
1153 for (i
= 1; machine_class
->valid_cpu_types
[i
]; i
++) {
1154 error_printf(", %s", machine_class
->valid_cpu_types
[i
]);
1162 /* Check if CPU type is deprecated and warn if so */
1164 if (cc
&& cc
->deprecation_note
) {
1165 warn_report("CPU model %s is deprecated -- %s", machine
->cpu_type
,
1166 cc
->deprecation_note
);
1169 machine_class
->init(machine
);
1170 phase_advance(PHASE_MACHINE_INITIALIZED
);
1173 static NotifierList machine_init_done_notifiers
=
1174 NOTIFIER_LIST_INITIALIZER(machine_init_done_notifiers
);
1176 void qemu_add_machine_init_done_notifier(Notifier
*notify
)
1178 notifier_list_add(&machine_init_done_notifiers
, notify
);
1179 if (phase_check(PHASE_MACHINE_READY
)) {
1180 notify
->notify(notify
, NULL
);
1184 void qemu_remove_machine_init_done_notifier(Notifier
*notify
)
1186 notifier_remove(notify
);
1189 void qdev_machine_creation_done(void)
1191 cpu_synchronize_all_post_init();
1193 if (current_machine
->boot_once
) {
1194 qemu_boot_set(current_machine
->boot_once
, &error_fatal
);
1195 qemu_register_reset(restore_boot_order
, g_strdup(current_machine
->boot_order
));
1199 * ok, initial machine setup is done, starting from now we can
1200 * only create hotpluggable devices
1202 phase_advance(PHASE_MACHINE_READY
);
1203 qdev_assert_realized_properly();
1205 /* TODO: once all bus devices are qdevified, this should be done
1206 * when bus is created by qdev.c */
1208 * TODO: If we had a main 'reset container' that the whole system
1209 * lived in, we could reset that using the multi-phase reset
1210 * APIs. For the moment, we just reset the sysbus, which will cause
1211 * all devices hanging off it (and all their child buses, recursively)
1212 * to be reset. Note that this will *not* reset any Device objects
1213 * which are not attached to some part of the qbus tree!
1215 qemu_register_reset(resettable_cold_reset_fn
, sysbus_get_default());
1217 notifier_list_notify(&machine_init_done_notifiers
, NULL
);
1219 if (rom_check_and_register_reset() != 0) {
1225 /* This checkpoint is required by replay to separate prior clock
1226 reading from the other reads, because timer polling functions query
1227 clock values from the log. */
1228 replay_checkpoint(CHECKPOINT_RESET
);
1229 qemu_system_reset(SHUTDOWN_CAUSE_NONE
);
1230 register_global_state();
1233 static const TypeInfo machine_info
= {
1234 .name
= TYPE_MACHINE
,
1235 .parent
= TYPE_OBJECT
,
1237 .class_size
= sizeof(MachineClass
),
1238 .class_init
= machine_class_init
,
1239 .class_base_init
= machine_class_base_init
,
1240 .instance_size
= sizeof(MachineState
),
1241 .instance_init
= machine_initfn
,
1242 .instance_finalize
= machine_finalize
,
1245 static void machine_register_types(void)
1247 type_register_static(&machine_info
);
1250 type_init(machine_register_types
)