include/standard-headers/linux/virtio_gpu.h

   1 /*
   2  * Virtio GPU Device
   3  *
   4  * Copyright Red Hat, Inc. 2013-2014
   5  *
   6  * Authors:
   7  *     Dave Airlie <airlied@redhat.com>
   8  *     Gerd Hoffmann <kraxel@redhat.com>
   9  *
  10  * This header is BSD licensed so anyone can use the definitions
  11  * to implement compatible drivers/servers:
  12  *
  13  * Redistribution and use in source and binary forms, with or without
  14  * modification, are permitted provided that the following conditions
  15  * are met:
  16  * 1. Redistributions of source code must retain the above copyright
  17  *    notice, this list of conditions and the following disclaimer.
  18  * 2. Redistributions in binary form must reproduce the above copyright
  19  *    notice, this list of conditions and the following disclaimer in the
  20  *    documentation and/or other materials provided with the distribution.
  21  * 3. Neither the name of IBM nor the names of its contributors
  22  *    may be used to endorse or promote products derived from this software
  23  *    without specific prior written permission.
  24  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  25  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  26  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  27  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL IBM OR
  28  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  29  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  30  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  31  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  32  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  33  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  34  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  35  * SUCH DAMAGE.
  36  */
  37
  38 #ifndef VIRTIO_GPU_HW_H
  39 #define VIRTIO_GPU_HW_H
  40
  41 enum virtio_gpu_ctrl_type {
  42         VIRTIO_GPU_UNDEFINED = 0,
  43
  44         /* 2d commands */
  45         VIRTIO_GPU_CMD_GET_DISPLAY_INFO = 0x0100,
  46         VIRTIO_GPU_CMD_RESOURCE_CREATE_2D,
  47         VIRTIO_GPU_CMD_RESOURCE_UNREF,
  48         VIRTIO_GPU_CMD_SET_SCANOUT,
  49         VIRTIO_GPU_CMD_RESOURCE_FLUSH,
  50         VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D,
  51         VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING,
  52         VIRTIO_GPU_CMD_RESOURCE_DETACH_BACKING,
  53
  54         /* cursor commands */
  55         VIRTIO_GPU_CMD_UPDATE_CURSOR = 0x0300,
  56         VIRTIO_GPU_CMD_MOVE_CURSOR,
  57
  58         /* success responses */
  59         VIRTIO_GPU_RESP_OK_NODATA = 0x1100,
  60         VIRTIO_GPU_RESP_OK_DISPLAY_INFO,
  61
  62         /* error responses */
  63         VIRTIO_GPU_RESP_ERR_UNSPEC = 0x1200,
  64         VIRTIO_GPU_RESP_ERR_OUT_OF_MEMORY,
  65         VIRTIO_GPU_RESP_ERR_INVALID_SCANOUT_ID,
  66         VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID,
  67         VIRTIO_GPU_RESP_ERR_INVALID_CONTEXT_ID,
  68         VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER,
  69 };
  70
  71 #define VIRTIO_GPU_FLAG_FENCE (1 << 0)
  72
  73 struct virtio_gpu_ctrl_hdr {
  74         uint32_t type;
  75         uint32_t flags;
  76         uint64_t fence_id;
  77         uint32_t ctx_id;
  78         uint32_t padding;
  79 };
  80
  81 /* data passed in the cursor vq */
  82
  83 struct virtio_gpu_cursor_pos {
  84         uint32_t scanout_id;
  85         uint32_t x;
  86         uint32_t y;
  87         uint32_t padding;
  88 };
  89
  90 /* VIRTIO_GPU_CMD_UPDATE_CURSOR, VIRTIO_GPU_CMD_MOVE_CURSOR */
  91 struct virtio_gpu_update_cursor {
  92         struct virtio_gpu_ctrl_hdr hdr;
  93         struct virtio_gpu_cursor_pos pos;  /* update & move */
  94         uint32_t resource_id;           /* update only */
  95         uint32_t hot_x;                 /* update only */
  96         uint32_t hot_y;                 /* update only */
  97         uint32_t padding;
  98 };
  99
 100 /* data passed in the control vq, 2d related */
 101
 102 struct virtio_gpu_rect {
 103         uint32_t x;
 104         uint32_t y;
 105         uint32_t width;
 106         uint32_t height;
 107 };
 108
 109 /* VIRTIO_GPU_CMD_RESOURCE_UNREF */
 110 struct virtio_gpu_resource_unref {
 111         struct virtio_gpu_ctrl_hdr hdr;
 112         uint32_t resource_id;
 113         uint32_t padding;
 114 };
 115
 116 /* VIRTIO_GPU_CMD_RESOURCE_CREATE_2D: create a 2d resource with a format */
 117 struct virtio_gpu_resource_create_2d {
 118         struct virtio_gpu_ctrl_hdr hdr;
 119         uint32_t resource_id;
 120         uint32_t format;
 121         uint32_t width;
 122         uint32_t height;
 123 };
 124
 125 /* VIRTIO_GPU_CMD_SET_SCANOUT */
 126 struct virtio_gpu_set_scanout {
 127         struct virtio_gpu_ctrl_hdr hdr;
 128         struct virtio_gpu_rect r;
 129         uint32_t scanout_id;
 130         uint32_t resource_id;
 131 };
 132
 133 /* VIRTIO_GPU_CMD_RESOURCE_FLUSH */
 134 struct virtio_gpu_resource_flush {
 135         struct virtio_gpu_ctrl_hdr hdr;
 136         struct virtio_gpu_rect r;
 137         uint32_t resource_id;
 138         uint32_t padding;
 139 };
 140
 141 /* VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D: simple transfer to_host */
 142 struct virtio_gpu_transfer_to_host_2d {
 143         struct virtio_gpu_ctrl_hdr hdr;
 144         struct virtio_gpu_rect r;
 145         uint64_t offset;
 146         uint32_t resource_id;
 147         uint32_t padding;
 148 };
 149
 150 struct virtio_gpu_mem_entry {
 151         uint64_t addr;
 152         uint32_t length;
 153         uint32_t padding;
 154 };
 155
 156 /* VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING */
 157 struct virtio_gpu_resource_attach_backing {
 158         struct virtio_gpu_ctrl_hdr hdr;
 159         uint32_t resource_id;
 160         uint32_t nr_entries;
 161 };
 162
 163 /* VIRTIO_GPU_CMD_RESOURCE_DETACH_BACKING */
 164 struct virtio_gpu_resource_detach_backing {
 165         struct virtio_gpu_ctrl_hdr hdr;
 166         uint32_t resource_id;
 167         uint32_t padding;
 168 };
 169
 170 /* VIRTIO_GPU_RESP_OK_DISPLAY_INFO */
 171 #define VIRTIO_GPU_MAX_SCANOUTS 16
 172 struct virtio_gpu_resp_display_info {
 173         struct virtio_gpu_ctrl_hdr hdr;
 174         struct virtio_gpu_display_one {
 175                 struct virtio_gpu_rect r;
 176                 uint32_t enabled;
 177                 uint32_t flags;
 178         } pmodes[VIRTIO_GPU_MAX_SCANOUTS];
 179 };
 180
 181 #define VIRTIO_GPU_EVENT_DISPLAY (1 << 0)
 182
 183 struct virtio_gpu_config {
 184         uint32_t events_read;
 185         uint32_t events_clear;
 186         uint32_t num_scanouts;
 187         uint32_t reserved;
 188 };
 189
 190 /* simple formats for fbcon/X use */
 191 enum virtio_gpu_formats {
 192         VIRTIO_GPU_FORMAT_B8G8R8A8_UNORM  = 1,
 193         VIRTIO_GPU_FORMAT_B8G8R8X8_UNORM  = 2,
 194         VIRTIO_GPU_FORMAT_A8R8G8B8_UNORM  = 3,
 195         VIRTIO_GPU_FORMAT_X8R8G8B8_UNORM  = 4,
 196
 197         VIRTIO_GPU_FORMAT_R8G8B8A8_UNORM  = 67,
 198         VIRTIO_GPU_FORMAT_X8B8G8R8_UNORM  = 68,
 199
 200         VIRTIO_GPU_FORMAT_A8B8G8R8_UNORM  = 121,
 201         VIRTIO_GPU_FORMAT_R8G8B8X8_UNORM  = 134,
 202 };
 203
 204 #endif