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[qemu/ar7.git] / target-sparc / helper.c
blob6600834d4aa70c467009a1f33bb01eda2b8ff14a
1 /*
2 * Misc Sparc helpers
4 * Copyright (c) 2003-2005 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "cpu.h"
21 #include "qemu/host-utils.h"
22 #include "exec/helper-proto.h"
23 #include "sysemu/sysemu.h"
25 void helper_raise_exception(CPUSPARCState *env, int tt)
27 CPUState *cs = CPU(sparc_env_get_cpu(env));
29 cs->exception_index = tt;
30 cpu_loop_exit(cs);
33 void helper_debug(CPUSPARCState *env)
35 CPUState *cs = CPU(sparc_env_get_cpu(env));
37 cs->exception_index = EXCP_DEBUG;
38 cpu_loop_exit(cs);
41 #ifdef TARGET_SPARC64
42 target_ulong helper_popc(target_ulong val)
44 return ctpop64(val);
47 void helper_tick_set_count(void *opaque, uint64_t count)
49 #if !defined(CONFIG_USER_ONLY)
50 cpu_tick_set_count(opaque, count);
51 #endif
54 uint64_t helper_tick_get_count(CPUSPARCState *env, void *opaque, int mem_idx)
56 #if !defined(CONFIG_USER_ONLY)
57 CPUTimer *timer = opaque;
59 if (timer->npt && mem_idx < MMU_KERNEL_IDX) {
60 helper_raise_exception(env, TT_PRIV_INSN);
63 return cpu_tick_get_count(timer);
64 #else
65 return 0;
66 #endif
69 void helper_tick_set_limit(void *opaque, uint64_t limit)
71 #if !defined(CONFIG_USER_ONLY)
72 cpu_tick_set_limit(opaque, limit);
73 #endif
75 #endif
77 static target_ulong helper_udiv_common(CPUSPARCState *env, target_ulong a,
78 target_ulong b, int cc)
80 SPARCCPU *cpu = sparc_env_get_cpu(env);
81 int overflow = 0;
82 uint64_t x0;
83 uint32_t x1;
85 x0 = (a & 0xffffffff) | ((int64_t) (env->y) << 32);
86 x1 = (b & 0xffffffff);
88 if (x1 == 0) {
89 cpu_restore_state(CPU(cpu), GETPC());
90 helper_raise_exception(env, TT_DIV_ZERO);
93 x0 = x0 / x1;
94 if (x0 > UINT32_MAX) {
95 x0 = UINT32_MAX;
96 overflow = 1;
99 if (cc) {
100 env->cc_dst = x0;
101 env->cc_src2 = overflow;
102 env->cc_op = CC_OP_DIV;
104 return x0;
107 target_ulong helper_udiv(CPUSPARCState *env, target_ulong a, target_ulong b)
109 return helper_udiv_common(env, a, b, 0);
112 target_ulong helper_udiv_cc(CPUSPARCState *env, target_ulong a, target_ulong b)
114 return helper_udiv_common(env, a, b, 1);
117 static target_ulong helper_sdiv_common(CPUSPARCState *env, target_ulong a,
118 target_ulong b, int cc)
120 SPARCCPU *cpu = sparc_env_get_cpu(env);
121 int overflow = 0;
122 int64_t x0;
123 int32_t x1;
125 x0 = (a & 0xffffffff) | ((int64_t) (env->y) << 32);
126 x1 = (b & 0xffffffff);
128 if (x1 == 0) {
129 cpu_restore_state(CPU(cpu), GETPC());
130 helper_raise_exception(env, TT_DIV_ZERO);
131 } else if (x1 == -1 && x0 == INT64_MIN) {
132 x0 = INT32_MAX;
133 overflow = 1;
134 } else {
135 x0 = x0 / x1;
136 if ((int32_t) x0 != x0) {
137 x0 = x0 < 0 ? INT32_MIN : INT32_MAX;
138 overflow = 1;
142 if (cc) {
143 env->cc_dst = x0;
144 env->cc_src2 = overflow;
145 env->cc_op = CC_OP_DIV;
147 return x0;
150 target_ulong helper_sdiv(CPUSPARCState *env, target_ulong a, target_ulong b)
152 return helper_sdiv_common(env, a, b, 0);
155 target_ulong helper_sdiv_cc(CPUSPARCState *env, target_ulong a, target_ulong b)
157 return helper_sdiv_common(env, a, b, 1);
160 #ifdef TARGET_SPARC64
161 int64_t helper_sdivx(CPUSPARCState *env, int64_t a, int64_t b)
163 if (b == 0) {
164 /* Raise divide by zero trap. */
165 SPARCCPU *cpu = sparc_env_get_cpu(env);
167 cpu_restore_state(CPU(cpu), GETPC());
168 helper_raise_exception(env, TT_DIV_ZERO);
169 } else if (b == -1) {
170 /* Avoid overflow trap with i386 divide insn. */
171 return -a;
172 } else {
173 return a / b;
177 uint64_t helper_udivx(CPUSPARCState *env, uint64_t a, uint64_t b)
179 if (b == 0) {
180 /* Raise divide by zero trap. */
181 SPARCCPU *cpu = sparc_env_get_cpu(env);
183 cpu_restore_state(CPU(cpu), GETPC());
184 helper_raise_exception(env, TT_DIV_ZERO);
186 return a / b;
188 #endif
190 target_ulong helper_taddcctv(CPUSPARCState *env, target_ulong src1,
191 target_ulong src2)
193 SPARCCPU *cpu = sparc_env_get_cpu(env);
194 target_ulong dst;
196 /* Tag overflow occurs if either input has bits 0 or 1 set. */
197 if ((src1 | src2) & 3) {
198 goto tag_overflow;
201 dst = src1 + src2;
203 /* Tag overflow occurs if the addition overflows. */
204 if (~(src1 ^ src2) & (src1 ^ dst) & (1u << 31)) {
205 goto tag_overflow;
208 /* Only modify the CC after any exceptions have been generated. */
209 env->cc_op = CC_OP_TADDTV;
210 env->cc_src = src1;
211 env->cc_src2 = src2;
212 env->cc_dst = dst;
213 return dst;
215 tag_overflow:
216 cpu_restore_state(CPU(cpu), GETPC());
217 helper_raise_exception(env, TT_TOVF);
220 target_ulong helper_tsubcctv(CPUSPARCState *env, target_ulong src1,
221 target_ulong src2)
223 SPARCCPU *cpu = sparc_env_get_cpu(env);
224 target_ulong dst;
226 /* Tag overflow occurs if either input has bits 0 or 1 set. */
227 if ((src1 | src2) & 3) {
228 goto tag_overflow;
231 dst = src1 - src2;
233 /* Tag overflow occurs if the subtraction overflows. */
234 if ((src1 ^ src2) & (src1 ^ dst) & (1u << 31)) {
235 goto tag_overflow;
238 /* Only modify the CC after any exceptions have been generated. */
239 env->cc_op = CC_OP_TSUBTV;
240 env->cc_src = src1;
241 env->cc_src2 = src2;
242 env->cc_dst = dst;
243 return dst;
245 tag_overflow:
246 cpu_restore_state(CPU(cpu), GETPC());
247 helper_raise_exception(env, TT_TOVF);
250 #ifndef TARGET_SPARC64
251 void helper_power_down(CPUSPARCState *env)
253 CPUState *cs = CPU(sparc_env_get_cpu(env));
255 cs->halted = 1;
256 cs->exception_index = EXCP_HLT;
257 env->pc = env->npc;
258 env->npc = env->pc + 4;
259 cpu_loop_exit(cs);
261 #endif