tcg/ppc: Support 128-bit load/store
[qemu/ar7.git] / tcg / ppc / tcg-target-con-str.h
blob20846901de9fbc1fa0edc941ef8d4db09e24943f
1 /* SPDX-License-Identifier: MIT */
2 /*
3 * Define PowerPC target-specific operand constraints.
4 * Copyright (c) 2021 Linaro
5 */
7 /*
8 * Define constraint letters for register sets:
9 * REGS(letter, register_mask)
11 REGS('r', ALL_GENERAL_REGS)
12 REGS('o', ALL_GENERAL_REGS & 0xAAAAAAAAu) /* odd registers */
13 REGS('v', ALL_VECTOR_REGS)
16 * Define constraint letters for constants:
17 * CONST(letter, TCG_CT_CONST_* bit set)
19 CONST('I', TCG_CT_CONST_S16)
20 CONST('M', TCG_CT_CONST_MONE)
21 CONST('T', TCG_CT_CONST_S32)
22 CONST('U', TCG_CT_CONST_U32)
23 CONST('W', TCG_CT_CONST_WSZ)
24 CONST('Z', TCG_CT_CONST_ZERO)