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audio: rework pcspk_init()
[qemu/ar7.git] / hw / i386 / pc.c
blob4fc1b7048b28744097bad13434454a5241a96fc5
1 /*
2 * QEMU PC System Emulator
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25 #include "qemu/osdep.h"
26 #include "qemu/units.h"
27 #include "hw/i386/x86.h"
28 #include "hw/i386/pc.h"
29 #include "hw/char/serial.h"
30 #include "hw/char/parallel.h"
31 #include "hw/i386/apic.h"
32 #include "hw/i386/topology.h"
33 #include "hw/i386/fw_cfg.h"
34 #include "hw/i386/vmport.h"
35 #include "sysemu/cpus.h"
36 #include "hw/block/fdc.h"
37 #include "hw/ide.h"
38 #include "hw/pci/pci.h"
39 #include "hw/pci/pci_bus.h"
40 #include "hw/nvram/fw_cfg.h"
41 #include "hw/timer/hpet.h"
42 #include "hw/firmware/smbios.h"
43 #include "hw/loader.h"
44 #include "elf.h"
45 #include "migration/vmstate.h"
46 #include "multiboot.h"
47 #include "hw/rtc/mc146818rtc.h"
48 #include "hw/intc/i8259.h"
49 #include "hw/dma/i8257.h"
50 #include "hw/timer/i8254.h"
51 #include "hw/input/i8042.h"
52 #include "hw/irq.h"
53 #include "hw/audio/pcspk.h"
54 #include "hw/pci/msi.h"
55 #include "hw/sysbus.h"
56 #include "sysemu/sysemu.h"
57 #include "sysemu/tcg.h"
58 #include "sysemu/numa.h"
59 #include "sysemu/kvm.h"
60 #include "sysemu/xen.h"
61 #include "sysemu/qtest.h"
62 #include "sysemu/reset.h"
63 #include "sysemu/runstate.h"
64 #include "kvm_i386.h"
65 #include "hw/xen/xen.h"
66 #include "hw/xen/start_info.h"
67 #include "ui/qemu-spice.h"
68 #include "exec/memory.h"
69 #include "exec/address-spaces.h"
70 #include "sysemu/arch_init.h"
71 #include "qemu/bitmap.h"
72 #include "qemu/config-file.h"
73 #include "qemu/error-report.h"
74 #include "qemu/option.h"
75 #include "qemu/cutils.h"
76 #include "hw/acpi/acpi.h"
77 #include "hw/acpi/cpu_hotplug.h"
78 #include "hw/boards.h"
79 #include "acpi-build.h"
80 #include "hw/mem/pc-dimm.h"
81 #include "hw/mem/nvdimm.h"
82 #include "qapi/error.h"
83 #include "qapi/qapi-visit-common.h"
84 #include "qapi/visitor.h"
85 #include "hw/core/cpu.h"
86 #include "hw/usb.h"
87 #include "hw/i386/intel_iommu.h"
88 #include "hw/net/ne2000-isa.h"
89 #include "standard-headers/asm-x86/bootparam.h"
90 #include "hw/virtio/virtio-pmem-pci.h"
91 #include "hw/mem/memory-device.h"
92 #include "sysemu/replay.h"
93 #include "qapi/qmp/qerror.h"
94 #include "config-devices.h"
95 #include "e820_memory_layout.h"
96 #include "fw_cfg.h"
97 #include "trace.h"
98
99 GlobalProperty pc_compat_5_0[] = {};
100 const size_t pc_compat_5_0_len = G_N_ELEMENTS(pc_compat_5_0);
101
102 GlobalProperty pc_compat_4_2[] = {
103 { "mch", "smbase-smram", "off" },
104 };
105 const size_t pc_compat_4_2_len = G_N_ELEMENTS(pc_compat_4_2);
106
107 GlobalProperty pc_compat_4_1[] = {};
108 const size_t pc_compat_4_1_len = G_N_ELEMENTS(pc_compat_4_1);
109
110 GlobalProperty pc_compat_4_0[] = {};
111 const size_t pc_compat_4_0_len = G_N_ELEMENTS(pc_compat_4_0);
112
113 GlobalProperty pc_compat_3_1[] = {
114 { "intel-iommu", "dma-drain", "off" },
115 { "Opteron_G3" "-" TYPE_X86_CPU, "rdtscp", "off" },
116 { "Opteron_G4" "-" TYPE_X86_CPU, "rdtscp", "off" },
117 { "Opteron_G4" "-" TYPE_X86_CPU, "npt", "off" },
118 { "Opteron_G4" "-" TYPE_X86_CPU, "nrip-save", "off" },
119 { "Opteron_G5" "-" TYPE_X86_CPU, "rdtscp", "off" },
120 { "Opteron_G5" "-" TYPE_X86_CPU, "npt", "off" },
121 { "Opteron_G5" "-" TYPE_X86_CPU, "nrip-save", "off" },
122 { "EPYC" "-" TYPE_X86_CPU, "npt", "off" },
123 { "EPYC" "-" TYPE_X86_CPU, "nrip-save", "off" },
124 { "EPYC-IBPB" "-" TYPE_X86_CPU, "npt", "off" },
125 { "EPYC-IBPB" "-" TYPE_X86_CPU, "nrip-save", "off" },
126 { "Skylake-Client" "-" TYPE_X86_CPU, "mpx", "on" },
127 { "Skylake-Client-IBRS" "-" TYPE_X86_CPU, "mpx", "on" },
128 { "Skylake-Server" "-" TYPE_X86_CPU, "mpx", "on" },
129 { "Skylake-Server-IBRS" "-" TYPE_X86_CPU, "mpx", "on" },
130 { "Cascadelake-Server" "-" TYPE_X86_CPU, "mpx", "on" },
131 { "Icelake-Client" "-" TYPE_X86_CPU, "mpx", "on" },
132 { "Icelake-Server" "-" TYPE_X86_CPU, "mpx", "on" },
133 { "Cascadelake-Server" "-" TYPE_X86_CPU, "stepping", "5" },
134 { TYPE_X86_CPU, "x-intel-pt-auto-level", "off" },
135 };
136 const size_t pc_compat_3_1_len = G_N_ELEMENTS(pc_compat_3_1);
137
138 GlobalProperty pc_compat_3_0[] = {
139 { TYPE_X86_CPU, "x-hv-synic-kvm-only", "on" },
140 { "Skylake-Server" "-" TYPE_X86_CPU, "pku", "off" },
141 { "Skylake-Server-IBRS" "-" TYPE_X86_CPU, "pku", "off" },
142 };
143 const size_t pc_compat_3_0_len = G_N_ELEMENTS(pc_compat_3_0);
144
145 GlobalProperty pc_compat_2_12[] = {
146 { TYPE_X86_CPU, "legacy-cache", "on" },
147 { TYPE_X86_CPU, "topoext", "off" },
148 { "EPYC-" TYPE_X86_CPU, "xlevel", "0x8000000a" },
149 { "EPYC-IBPB-" TYPE_X86_CPU, "xlevel", "0x8000000a" },
150 };
151 const size_t pc_compat_2_12_len = G_N_ELEMENTS(pc_compat_2_12);
152
153 GlobalProperty pc_compat_2_11[] = {
154 { TYPE_X86_CPU, "x-migrate-smi-count", "off" },
155 { "Skylake-Server" "-" TYPE_X86_CPU, "clflushopt", "off" },
156 };
157 const size_t pc_compat_2_11_len = G_N_ELEMENTS(pc_compat_2_11);
158
159 GlobalProperty pc_compat_2_10[] = {
160 { TYPE_X86_CPU, "x-hv-max-vps", "0x40" },
161 { "i440FX-pcihost", "x-pci-hole64-fix", "off" },
162 { "q35-pcihost", "x-pci-hole64-fix", "off" },
163 };
164 const size_t pc_compat_2_10_len = G_N_ELEMENTS(pc_compat_2_10);
165
166 GlobalProperty pc_compat_2_9[] = {
167 { "mch", "extended-tseg-mbytes", "0" },
168 };
169 const size_t pc_compat_2_9_len = G_N_ELEMENTS(pc_compat_2_9);
170
171 GlobalProperty pc_compat_2_8[] = {
172 { TYPE_X86_CPU, "tcg-cpuid", "off" },
173 { "kvmclock", "x-mach-use-reliable-get-clock", "off" },
174 { "ICH9-LPC", "x-smi-broadcast", "off" },
175 { TYPE_X86_CPU, "vmware-cpuid-freq", "off" },
176 { "Haswell-" TYPE_X86_CPU, "stepping", "1" },
177 };
178 const size_t pc_compat_2_8_len = G_N_ELEMENTS(pc_compat_2_8);
179
180 GlobalProperty pc_compat_2_7[] = {
181 { TYPE_X86_CPU, "l3-cache", "off" },
182 { TYPE_X86_CPU, "full-cpuid-auto-level", "off" },
183 { "Opteron_G3" "-" TYPE_X86_CPU, "family", "15" },
184 { "Opteron_G3" "-" TYPE_X86_CPU, "model", "6" },
185 { "Opteron_G3" "-" TYPE_X86_CPU, "stepping", "1" },
186 { "isa-pcspk", "migrate", "off" },
187 };
188 const size_t pc_compat_2_7_len = G_N_ELEMENTS(pc_compat_2_7);
189
190 GlobalProperty pc_compat_2_6[] = {
191 { TYPE_X86_CPU, "cpuid-0xb", "off" },
192 { "vmxnet3", "romfile", "" },
193 { TYPE_X86_CPU, "fill-mtrr-mask", "off" },
194 { "apic-common", "legacy-instance-id", "on", }
195 };
196 const size_t pc_compat_2_6_len = G_N_ELEMENTS(pc_compat_2_6);
197
198 GlobalProperty pc_compat_2_5[] = {};
199 const size_t pc_compat_2_5_len = G_N_ELEMENTS(pc_compat_2_5);
200
201 GlobalProperty pc_compat_2_4[] = {
202 PC_CPU_MODEL_IDS("2.4.0")
203 { "Haswell-" TYPE_X86_CPU, "abm", "off" },
204 { "Haswell-noTSX-" TYPE_X86_CPU, "abm", "off" },
205 { "Broadwell-" TYPE_X86_CPU, "abm", "off" },
206 { "Broadwell-noTSX-" TYPE_X86_CPU, "abm", "off" },
207 { "host" "-" TYPE_X86_CPU, "host-cache-info", "on" },
208 { TYPE_X86_CPU, "check", "off" },
209 { "qemu64" "-" TYPE_X86_CPU, "sse4a", "on" },
210 { "qemu64" "-" TYPE_X86_CPU, "abm", "on" },
211 { "qemu64" "-" TYPE_X86_CPU, "popcnt", "on" },
212 { "qemu32" "-" TYPE_X86_CPU, "popcnt", "on" },
213 { "Opteron_G2" "-" TYPE_X86_CPU, "rdtscp", "on" },
214 { "Opteron_G3" "-" TYPE_X86_CPU, "rdtscp", "on" },
215 { "Opteron_G4" "-" TYPE_X86_CPU, "rdtscp", "on" },
216 { "Opteron_G5" "-" TYPE_X86_CPU, "rdtscp", "on", }
217 };
218 const size_t pc_compat_2_4_len = G_N_ELEMENTS(pc_compat_2_4);
219
220 GlobalProperty pc_compat_2_3[] = {
221 PC_CPU_MODEL_IDS("2.3.0")
222 { TYPE_X86_CPU, "arat", "off" },
223 { "qemu64" "-" TYPE_X86_CPU, "min-level", "4" },
224 { "kvm64" "-" TYPE_X86_CPU, "min-level", "5" },
225 { "pentium3" "-" TYPE_X86_CPU, "min-level", "2" },
226 { "n270" "-" TYPE_X86_CPU, "min-level", "5" },
227 { "Conroe" "-" TYPE_X86_CPU, "min-level", "4" },
228 { "Penryn" "-" TYPE_X86_CPU, "min-level", "4" },
229 { "Nehalem" "-" TYPE_X86_CPU, "min-level", "4" },
230 { "n270" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" },
231 { "Penryn" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" },
232 { "Conroe" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" },
233 { "Nehalem" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" },
234 { "Westmere" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" },
235 { "SandyBridge" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" },
236 { "IvyBridge" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" },
237 { "Haswell" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" },
238 { "Haswell-noTSX" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" },
239 { "Broadwell" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" },
240 { "Broadwell-noTSX" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" },
241 { TYPE_X86_CPU, "kvm-no-smi-migration", "on" },
242 };
243 const size_t pc_compat_2_3_len = G_N_ELEMENTS(pc_compat_2_3);
244
245 GlobalProperty pc_compat_2_2[] = {
246 PC_CPU_MODEL_IDS("2.2.0")
247 { "kvm64" "-" TYPE_X86_CPU, "vme", "off" },
248 { "kvm32" "-" TYPE_X86_CPU, "vme", "off" },
249 { "Conroe" "-" TYPE_X86_CPU, "vme", "off" },
250 { "Penryn" "-" TYPE_X86_CPU, "vme", "off" },
251 { "Nehalem" "-" TYPE_X86_CPU, "vme", "off" },
252 { "Westmere" "-" TYPE_X86_CPU, "vme", "off" },
253 { "SandyBridge" "-" TYPE_X86_CPU, "vme", "off" },
254 { "Haswell" "-" TYPE_X86_CPU, "vme", "off" },
255 { "Broadwell" "-" TYPE_X86_CPU, "vme", "off" },
256 { "Opteron_G1" "-" TYPE_X86_CPU, "vme", "off" },
257 { "Opteron_G2" "-" TYPE_X86_CPU, "vme", "off" },
258 { "Opteron_G3" "-" TYPE_X86_CPU, "vme", "off" },
259 { "Opteron_G4" "-" TYPE_X86_CPU, "vme", "off" },
260 { "Opteron_G5" "-" TYPE_X86_CPU, "vme", "off" },
261 { "Haswell" "-" TYPE_X86_CPU, "f16c", "off" },
262 { "Haswell" "-" TYPE_X86_CPU, "rdrand", "off" },
263 { "Broadwell" "-" TYPE_X86_CPU, "f16c", "off" },
264 { "Broadwell" "-" TYPE_X86_CPU, "rdrand", "off" },
265 };
266 const size_t pc_compat_2_2_len = G_N_ELEMENTS(pc_compat_2_2);
267
268 GlobalProperty pc_compat_2_1[] = {
269 PC_CPU_MODEL_IDS("2.1.0")
270 { "coreduo" "-" TYPE_X86_CPU, "vmx", "on" },
271 { "core2duo" "-" TYPE_X86_CPU, "vmx", "on" },
272 };
273 const size_t pc_compat_2_1_len = G_N_ELEMENTS(pc_compat_2_1);
274
275 GlobalProperty pc_compat_2_0[] = {
276 PC_CPU_MODEL_IDS("2.0.0")
277 { "virtio-scsi-pci", "any_layout", "off" },
278 { "PIIX4_PM", "memory-hotplug-support", "off" },
279 { "apic", "version", "0x11" },
280 { "nec-usb-xhci", "superspeed-ports-first", "off" },
281 { "nec-usb-xhci", "force-pcie-endcap", "on" },
282 { "pci-serial", "prog_if", "0" },
283 { "pci-serial-2x", "prog_if", "0" },
284 { "pci-serial-4x", "prog_if", "0" },
285 { "virtio-net-pci", "guest_announce", "off" },
286 { "ICH9-LPC", "memory-hotplug-support", "off" },
287 { "xio3130-downstream", COMPAT_PROP_PCP, "off" },
288 { "ioh3420", COMPAT_PROP_PCP, "off" },
289 };
290 const size_t pc_compat_2_0_len = G_N_ELEMENTS(pc_compat_2_0);
291
292 GlobalProperty pc_compat_1_7[] = {
293 PC_CPU_MODEL_IDS("1.7.0")
294 { TYPE_USB_DEVICE, "msos-desc", "no" },
295 { "PIIX4_PM", "acpi-pci-hotplug-with-bridge-support", "off" },
296 { "hpet", HPET_INTCAP, "4" },
297 };
298 const size_t pc_compat_1_7_len = G_N_ELEMENTS(pc_compat_1_7);
299
300 GlobalProperty pc_compat_1_6[] = {
301 PC_CPU_MODEL_IDS("1.6.0")
302 { "e1000", "mitigation", "off" },
303 { "qemu64-" TYPE_X86_CPU, "model", "2" },
304 { "qemu32-" TYPE_X86_CPU, "model", "3" },
305 { "i440FX-pcihost", "short_root_bus", "1" },
306 { "q35-pcihost", "short_root_bus", "1" },
307 };
308 const size_t pc_compat_1_6_len = G_N_ELEMENTS(pc_compat_1_6);
309
310 GlobalProperty pc_compat_1_5[] = {
311 PC_CPU_MODEL_IDS("1.5.0")
312 { "Conroe-" TYPE_X86_CPU, "model", "2" },
313 { "Conroe-" TYPE_X86_CPU, "min-level", "2" },
314 { "Penryn-" TYPE_X86_CPU, "model", "2" },
315 { "Penryn-" TYPE_X86_CPU, "min-level", "2" },
316 { "Nehalem-" TYPE_X86_CPU, "model", "2" },
317 { "Nehalem-" TYPE_X86_CPU, "min-level", "2" },
318 { "virtio-net-pci", "any_layout", "off" },
319 { TYPE_X86_CPU, "pmu", "on" },
320 { "i440FX-pcihost", "short_root_bus", "0" },
321 { "q35-pcihost", "short_root_bus", "0" },
322 };
323 const size_t pc_compat_1_5_len = G_N_ELEMENTS(pc_compat_1_5);
324
325 GlobalProperty pc_compat_1_4[] = {
326 PC_CPU_MODEL_IDS("1.4.0")
327 { "scsi-hd", "discard_granularity", "0" },
328 { "scsi-cd", "discard_granularity", "0" },
329 { "scsi-disk", "discard_granularity", "0" },
330 { "ide-hd", "discard_granularity", "0" },
331 { "ide-cd", "discard_granularity", "0" },
332 { "ide-drive", "discard_granularity", "0" },
333 { "virtio-blk-pci", "discard_granularity", "0" },
334 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string: */
335 { "virtio-serial-pci", "vectors", "0xFFFFFFFF" },
336 { "virtio-net-pci", "ctrl_guest_offloads", "off" },
337 { "e1000", "romfile", "pxe-e1000.rom" },
338 { "ne2k_pci", "romfile", "pxe-ne2k_pci.rom" },
339 { "pcnet", "romfile", "pxe-pcnet.rom" },
340 { "rtl8139", "romfile", "pxe-rtl8139.rom" },
341 { "virtio-net-pci", "romfile", "pxe-virtio.rom" },
342 { "486-" TYPE_X86_CPU, "model", "0" },
343 { "n270" "-" TYPE_X86_CPU, "movbe", "off" },
344 { "Westmere" "-" TYPE_X86_CPU, "pclmulqdq", "off" },
345 };
346 const size_t pc_compat_1_4_len = G_N_ELEMENTS(pc_compat_1_4);
347
348 GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled)
349 {
350 GSIState *s;
351
352 s = g_new0(GSIState, 1);
353 if (kvm_ioapic_in_kernel()) {
354 kvm_pc_setup_irq_routing(pci_enabled);
355 }
356 *irqs = qemu_allocate_irqs(gsi_handler, s, GSI_NUM_PINS);
357
358 return s;
359 }
360
361 static void ioport80_write(void *opaque, hwaddr addr, uint64_t data,
362 unsigned size)
363 {
364 }
365
366 static uint64_t ioport80_read(void *opaque, hwaddr addr, unsigned size)
367 {
368 return 0xffffffffffffffffULL;
369 }
370
371 /* MSDOS compatibility mode FPU exception support */
372 static void ioportF0_write(void *opaque, hwaddr addr, uint64_t data,
373 unsigned size)
374 {
375 if (tcg_enabled()) {
376 cpu_set_ignne();
377 }
378 }
379
380 static uint64_t ioportF0_read(void *opaque, hwaddr addr, unsigned size)
381 {
382 return 0xffffffffffffffffULL;
383 }
384
385 /* PC cmos mappings */
386
387 #define REG_EQUIPMENT_BYTE 0x14
388
389 static void cmos_init_hd(ISADevice *s, int type_ofs, int info_ofs,
390 int16_t cylinders, int8_t heads, int8_t sectors)
391 {
392 rtc_set_memory(s, type_ofs, 47);
393 rtc_set_memory(s, info_ofs, cylinders);
394 rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
395 rtc_set_memory(s, info_ofs + 2, heads);
396 rtc_set_memory(s, info_ofs + 3, 0xff);
397 rtc_set_memory(s, info_ofs + 4, 0xff);
398 rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
399 rtc_set_memory(s, info_ofs + 6, cylinders);
400 rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
401 rtc_set_memory(s, info_ofs + 8, sectors);
402 }
403
404 /* convert boot_device letter to something recognizable by the bios */
405 static int boot_device2nibble(char boot_device)
406 {
407 switch(boot_device) {
408 case 'a':
409 case 'b':
410 return 0x01; /* floppy boot */
411 case 'c':
412 return 0x02; /* hard drive boot */
413 case 'd':
414 return 0x03; /* CD-ROM boot */
415 case 'n':
416 return 0x04; /* Network boot */
417 }
418 return 0;
419 }
420
421 static void set_boot_dev(ISADevice *s, const char *boot_device, Error **errp)
422 {
423 #define PC_MAX_BOOT_DEVICES 3
424 int nbds, bds[3] = { 0, };
425 int i;
426
427 nbds = strlen(boot_device);
428 if (nbds > PC_MAX_BOOT_DEVICES) {
429 error_setg(errp, "Too many boot devices for PC");
430 return;
431 }
432 for (i = 0; i < nbds; i++) {
433 bds[i] = boot_device2nibble(boot_device[i]);
434 if (bds[i] == 0) {
435 error_setg(errp, "Invalid boot device for PC: '%c'",
436 boot_device[i]);
437 return;
438 }
439 }
440 rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
441 rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ? 0x0 : 0x1));
442 }
443
444 static void pc_boot_set(void *opaque, const char *boot_device, Error **errp)
445 {
446 set_boot_dev(opaque, boot_device, errp);
447 }
448
449 static void pc_cmos_init_floppy(ISADevice *rtc_state, ISADevice *floppy)
450 {
451 int val, nb, i;
452 FloppyDriveType fd_type[2] = { FLOPPY_DRIVE_TYPE_NONE,
453 FLOPPY_DRIVE_TYPE_NONE };
454
455 /* floppy type */
456 if (floppy) {
457 for (i = 0; i < 2; i++) {
458 fd_type[i] = isa_fdc_get_drive_type(floppy, i);
459 }
460 }
461 val = (cmos_get_fd_drive_type(fd_type[0]) << 4) |
462 cmos_get_fd_drive_type(fd_type[1]);
463 rtc_set_memory(rtc_state, 0x10, val);
464
465 val = rtc_get_memory(rtc_state, REG_EQUIPMENT_BYTE);
466 nb = 0;
467 if (fd_type[0] != FLOPPY_DRIVE_TYPE_NONE) {
468 nb++;
469 }
470 if (fd_type[1] != FLOPPY_DRIVE_TYPE_NONE) {
471 nb++;
472 }
473 switch (nb) {
474 case 0:
475 break;
476 case 1:
477 val |= 0x01; /* 1 drive, ready for boot */
478 break;
479 case 2:
480 val |= 0x41; /* 2 drives, ready for boot */
481 break;
482 }
483 rtc_set_memory(rtc_state, REG_EQUIPMENT_BYTE, val);
484 }
485
486 typedef struct pc_cmos_init_late_arg {
487 ISADevice *rtc_state;
488 BusState *idebus[2];
489 } pc_cmos_init_late_arg;
490
491 typedef struct check_fdc_state {
492 ISADevice *floppy;
493 bool multiple;
494 } CheckFdcState;
495
496 static int check_fdc(Object *obj, void *opaque)
497 {
498 CheckFdcState *state = opaque;
499 Object *fdc;
500 uint32_t iobase;
501 Error *local_err = NULL;
502
503 fdc = object_dynamic_cast(obj, TYPE_ISA_FDC);
504 if (!fdc) {
505 return 0;
506 }
507
508 iobase = object_property_get_uint(obj, "iobase", &local_err);
509 if (local_err || iobase != 0x3f0) {
510 error_free(local_err);
511 return 0;
512 }
513
514 if (state->floppy) {
515 state->multiple = true;
516 } else {
517 state->floppy = ISA_DEVICE(obj);
518 }
519 return 0;
520 }
521
522 static const char * const fdc_container_path[] = {
523 "/unattached", "/peripheral", "/peripheral-anon"
524 };
525
526 /*
527 * Locate the FDC at IO address 0x3f0, in order to configure the CMOS registers
528 * and ACPI objects.
529 */
530 ISADevice *pc_find_fdc0(void)
531 {
532 int i;
533 Object *container;
534 CheckFdcState state = { 0 };
535
536 for (i = 0; i < ARRAY_SIZE(fdc_container_path); i++) {
537 container = container_get(qdev_get_machine(), fdc_container_path[i]);
538 object_child_foreach(container, check_fdc, &state);
539 }
540
541 if (state.multiple) {
542 warn_report("multiple floppy disk controllers with "
543 "iobase=0x3f0 have been found");
544 error_printf("the one being picked for CMOS setup might not reflect "
545 "your intent");
546 }
547
548 return state.floppy;
549 }
550
551 static void pc_cmos_init_late(void *opaque)
552 {
553 pc_cmos_init_late_arg *arg = opaque;
554 ISADevice *s = arg->rtc_state;
555 int16_t cylinders;
556 int8_t heads, sectors;
557 int val;
558 int i, trans;
559
560 val = 0;
561 if (arg->idebus[0] && ide_get_geometry(arg->idebus[0], 0,
562 &cylinders, &heads, &sectors) >= 0) {
563 cmos_init_hd(s, 0x19, 0x1b, cylinders, heads, sectors);
564 val |= 0xf0;
565 }
566 if (arg->idebus[0] && ide_get_geometry(arg->idebus[0], 1,
567 &cylinders, &heads, &sectors) >= 0) {
568 cmos_init_hd(s, 0x1a, 0x24, cylinders, heads, sectors);
569 val |= 0x0f;
570 }
571 rtc_set_memory(s, 0x12, val);
572
573 val = 0;
574 for (i = 0; i < 4; i++) {
575 /* NOTE: ide_get_geometry() returns the physical
576 geometry. It is always such that: 1 <= sects <= 63, 1
577 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
578 geometry can be different if a translation is done. */
579 if (arg->idebus[i / 2] &&
580 ide_get_geometry(arg->idebus[i / 2], i % 2,
581 &cylinders, &heads, &sectors) >= 0) {
582 trans = ide_get_bios_chs_trans(arg->idebus[i / 2], i % 2) - 1;
583 assert((trans & ~3) == 0);
584 val |= trans << (i * 2);
585 }
586 }
587 rtc_set_memory(s, 0x39, val);
588
589 pc_cmos_init_floppy(s, pc_find_fdc0());
590
591 qemu_unregister_reset(pc_cmos_init_late, opaque);
592 }
593
594 void pc_cmos_init(PCMachineState *pcms,
595 BusState *idebus0, BusState *idebus1,
596 ISADevice *s)
597 {
598 int val;
599 static pc_cmos_init_late_arg arg;
600 X86MachineState *x86ms = X86_MACHINE(pcms);
601
602 /* various important CMOS locations needed by PC/Bochs bios */
603
604 /* memory size */
605 /* base memory (first MiB) */
606 val = MIN(x86ms->below_4g_mem_size / KiB, 640);
607 rtc_set_memory(s, 0x15, val);
608 rtc_set_memory(s, 0x16, val >> 8);
609 /* extended memory (next 64MiB) */
610 if (x86ms->below_4g_mem_size > 1 * MiB) {
611 val = (x86ms->below_4g_mem_size - 1 * MiB) / KiB;
612 } else {
613 val = 0;
614 }
615 if (val > 65535)
616 val = 65535;
617 rtc_set_memory(s, 0x17, val);
618 rtc_set_memory(s, 0x18, val >> 8);
619 rtc_set_memory(s, 0x30, val);
620 rtc_set_memory(s, 0x31, val >> 8);
621 /* memory between 16MiB and 4GiB */
622 if (x86ms->below_4g_mem_size > 16 * MiB) {
623 val = (x86ms->below_4g_mem_size - 16 * MiB) / (64 * KiB);
624 } else {
625 val = 0;
626 }
627 if (val > 65535)
628 val = 65535;
629 rtc_set_memory(s, 0x34, val);
630 rtc_set_memory(s, 0x35, val >> 8);
631 /* memory above 4GiB */
632 val = x86ms->above_4g_mem_size / 65536;
633 rtc_set_memory(s, 0x5b, val);
634 rtc_set_memory(s, 0x5c, val >> 8);
635 rtc_set_memory(s, 0x5d, val >> 16);
636
637 object_property_add_link(OBJECT(pcms), "rtc_state",
638 TYPE_ISA_DEVICE,
639 (Object **)&x86ms->rtc,
640 object_property_allow_set_link,
641 OBJ_PROP_LINK_STRONG);
642 object_property_set_link(OBJECT(pcms), OBJECT(s),
643 "rtc_state", &error_abort);
644
645 set_boot_dev(s, MACHINE(pcms)->boot_order, &error_fatal);
646
647 val = 0;
648 val |= 0x02; /* FPU is there */
649 val |= 0x04; /* PS/2 mouse installed */
650 rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
651
652 /* hard drives and FDC */
653 arg.rtc_state = s;
654 arg.idebus[0] = idebus0;
655 arg.idebus[1] = idebus1;
656 qemu_register_reset(pc_cmos_init_late, &arg);
657 }
658
659 static void handle_a20_line_change(void *opaque, int irq, int level)
660 {
661 X86CPU *cpu = opaque;
662
663 /* XXX: send to all CPUs ? */
664 /* XXX: add logic to handle multiple A20 line sources */
665 x86_cpu_set_a20(cpu, level);
666 }
667
668 #define NE2000_NB_MAX 6
669
670 static const int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360,
671 0x280, 0x380 };
672 static const int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
673
674 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd)
675 {
676 static int nb_ne2k = 0;
677
678 if (nb_ne2k == NE2000_NB_MAX)
679 return;
680 isa_ne2000_init(bus, ne2000_io[nb_ne2k],
681 ne2000_irq[nb_ne2k], nd);
682 nb_ne2k++;
683 }
684
685 void pc_acpi_smi_interrupt(void *opaque, int irq, int level)
686 {
687 X86CPU *cpu = opaque;
688
689 if (level) {
690 cpu_interrupt(CPU(cpu), CPU_INTERRUPT_SMI);
691 }
692 }
693
694 /*
695 * This function is very similar to smp_parse()
696 * in hw/core/machine.c but includes CPU die support.
697 */
698 void pc_smp_parse(MachineState *ms, QemuOpts *opts)
699 {
700 X86MachineState *x86ms = X86_MACHINE(ms);
701
702 if (opts) {
703 unsigned cpus = qemu_opt_get_number(opts, "cpus", 0);
704 unsigned sockets = qemu_opt_get_number(opts, "sockets", 0);
705 unsigned dies = qemu_opt_get_number(opts, "dies", 1);
706 unsigned cores = qemu_opt_get_number(opts, "cores", 0);
707 unsigned threads = qemu_opt_get_number(opts, "threads", 0);
708
709 /* compute missing values, prefer sockets over cores over threads */
710 if (cpus == 0 || sockets == 0) {
711 cores = cores > 0 ? cores : 1;
712 threads = threads > 0 ? threads : 1;
713 if (cpus == 0) {
714 sockets = sockets > 0 ? sockets : 1;
715 cpus = cores * threads * dies * sockets;
716 } else {
717 ms->smp.max_cpus =
718 qemu_opt_get_number(opts, "maxcpus", cpus);
719 sockets = ms->smp.max_cpus / (cores * threads * dies);
720 }
721 } else if (cores == 0) {
722 threads = threads > 0 ? threads : 1;
723 cores = cpus / (sockets * dies * threads);
724 cores = cores > 0 ? cores : 1;
725 } else if (threads == 0) {
726 threads = cpus / (cores * dies * sockets);
727 threads = threads > 0 ? threads : 1;
728 } else if (sockets * dies * cores * threads < cpus) {
729 error_report("cpu topology: "
730 "sockets (%u) * dies (%u) * cores (%u) * threads (%u) < "
731 "smp_cpus (%u)",
732 sockets, dies, cores, threads, cpus);
733 exit(1);
734 }
735
736 ms->smp.max_cpus =
737 qemu_opt_get_number(opts, "maxcpus", cpus);
738
739 if (ms->smp.max_cpus < cpus) {
740 error_report("maxcpus must be equal to or greater than smp");
741 exit(1);
742 }
743
744 if (sockets * dies * cores * threads > ms->smp.max_cpus) {
745 error_report("cpu topology: "
746 "sockets (%u) * dies (%u) * cores (%u) * threads (%u) > "
747 "maxcpus (%u)",
748 sockets, dies, cores, threads,
749 ms->smp.max_cpus);
750 exit(1);
751 }
752
753 if (sockets * dies * cores * threads != ms->smp.max_cpus) {
754 warn_report("Invalid CPU topology deprecated: "
755 "sockets (%u) * dies (%u) * cores (%u) * threads (%u) "
756 "!= maxcpus (%u)",
757 sockets, dies, cores, threads,
758 ms->smp.max_cpus);
759 }
760
761 ms->smp.cpus = cpus;
762 ms->smp.cores = cores;
763 ms->smp.threads = threads;
764 ms->smp.sockets = sockets;
765 x86ms->smp_dies = dies;
766 }
767
768 if (ms->smp.cpus > 1) {
769 Error *blocker = NULL;
770 error_setg(&blocker, QERR_REPLAY_NOT_SUPPORTED, "smp");
771 replay_add_blocker(blocker);
772 }
773 }
774
775 void pc_hot_add_cpu(MachineState *ms, const int64_t id, Error **errp)
776 {
777 X86MachineState *x86ms = X86_MACHINE(ms);
778 int64_t apic_id = x86_cpu_apic_id_from_index(x86ms, id);
779 Error *local_err = NULL;
780
781 if (id < 0) {
782 error_setg(errp, "Invalid CPU id: %" PRIi64, id);
783 return;
784 }
785
786 if (apic_id >= ACPI_CPU_HOTPLUG_ID_LIMIT) {
787 error_setg(errp, "Unable to add CPU: %" PRIi64
788 ", resulting APIC ID (%" PRIi64 ") is too large",
789 id, apic_id);
790 return;
791 }
792
793
794 x86_cpu_new(X86_MACHINE(ms), apic_id, &local_err);
795 if (local_err) {
796 error_propagate(errp, local_err);
797 return;
798 }
799 }
800
801 static void rtc_set_cpus_count(ISADevice *rtc, uint16_t cpus_count)
802 {
803 if (cpus_count > 0xff) {
804 /* If the number of CPUs can't be represented in 8 bits, the
805 * BIOS must use "FW_CFG_NB_CPUS". Set RTC field to 0 just
806 * to make old BIOSes fail more predictably.
807 */
808 rtc_set_memory(rtc, 0x5f, 0);
809 } else {
810 rtc_set_memory(rtc, 0x5f, cpus_count - 1);
811 }
812 }
813
814 static
815 void pc_machine_done(Notifier *notifier, void *data)
816 {
817 PCMachineState *pcms = container_of(notifier,
818 PCMachineState, machine_done);
819 X86MachineState *x86ms = X86_MACHINE(pcms);
820 PCIBus *bus = pcms->bus;
821
822 /* set the number of CPUs */
823 rtc_set_cpus_count(x86ms->rtc, x86ms->boot_cpus);
824
825 if (bus) {
826 int extra_hosts = 0;
827
828 QLIST_FOREACH(bus, &bus->child, sibling) {
829 /* look for expander root buses */
830 if (pci_bus_is_root(bus)) {
831 extra_hosts++;
832 }
833 }
834 if (extra_hosts && x86ms->fw_cfg) {
835 uint64_t *val = g_malloc(sizeof(*val));
836 *val = cpu_to_le64(extra_hosts);
837 fw_cfg_add_file(x86ms->fw_cfg,
838 "etc/extra-pci-roots", val, sizeof(*val));
839 }
840 }
841
842 acpi_setup();
843 if (x86ms->fw_cfg) {
844 fw_cfg_build_smbios(MACHINE(pcms), x86ms->fw_cfg);
845 fw_cfg_build_feature_control(MACHINE(pcms), x86ms->fw_cfg);
846 /* update FW_CFG_NB_CPUS to account for -device added CPUs */
847 fw_cfg_modify_i16(x86ms->fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus);
848 }
849
850 if (x86ms->apic_id_limit > 255 && !xen_enabled()) {
851 IntelIOMMUState *iommu = INTEL_IOMMU_DEVICE(x86_iommu_get_default());
852
853 if (!iommu || !x86_iommu_ir_supported(X86_IOMMU_DEVICE(iommu)) ||
854 iommu->intr_eim != ON_OFF_AUTO_ON) {
855 error_report("current -smp configuration requires "
856 "Extended Interrupt Mode enabled. "
857 "You can add an IOMMU using: "
858 "-device intel-iommu,intremap=on,eim=on");
859 exit(EXIT_FAILURE);
860 }
861 }
862 }
863
864 void pc_guest_info_init(PCMachineState *pcms)
865 {
866 int i;
867 MachineState *ms = MACHINE(pcms);
868 X86MachineState *x86ms = X86_MACHINE(pcms);
869
870 x86ms->apic_xrupt_override = kvm_allows_irq0_override();
871 pcms->numa_nodes = ms->numa_state->num_nodes;
872 pcms->node_mem = g_malloc0(pcms->numa_nodes *
873 sizeof *pcms->node_mem);
874 for (i = 0; i < ms->numa_state->num_nodes; i++) {
875 pcms->node_mem[i] = ms->numa_state->nodes[i].node_mem;
876 }
877
878 pcms->machine_done.notify = pc_machine_done;
879 qemu_add_machine_init_done_notifier(&pcms->machine_done);
880 }
881
882 /* setup pci memory address space mapping into system address space */
883 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory,
884 MemoryRegion *pci_address_space)
885 {
886 /* Set to lower priority than RAM */
887 memory_region_add_subregion_overlap(system_memory, 0x0,
888 pci_address_space, -1);
889 }
890
891 void xen_load_linux(PCMachineState *pcms)
892 {
893 int i;
894 FWCfgState *fw_cfg;
895 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
896 X86MachineState *x86ms = X86_MACHINE(pcms);
897
898 assert(MACHINE(pcms)->kernel_filename != NULL);
899
900 fw_cfg = fw_cfg_init_io(FW_CFG_IO_BASE);
901 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus);
902 rom_set_fw(fw_cfg);
903
904 x86_load_linux(x86ms, fw_cfg, pcmc->acpi_data_size,
905 pcmc->pvh_enabled, pcmc->linuxboot_dma_enabled);
906 for (i = 0; i < nb_option_roms; i++) {
907 assert(!strcmp(option_rom[i].name, "linuxboot.bin") ||
908 !strcmp(option_rom[i].name, "linuxboot_dma.bin") ||
909 !strcmp(option_rom[i].name, "pvh.bin") ||
910 !strcmp(option_rom[i].name, "multiboot.bin"));
911 rom_add_option(option_rom[i].name, option_rom[i].bootindex);
912 }
913 x86ms->fw_cfg = fw_cfg;
914 }
915
916 void pc_memory_init(PCMachineState *pcms,
917 MemoryRegion *system_memory,
918 MemoryRegion *rom_memory,
919 MemoryRegion **ram_memory)
920 {
921 int linux_boot, i;
922 MemoryRegion *option_rom_mr;
923 MemoryRegion *ram_below_4g, *ram_above_4g;
924 FWCfgState *fw_cfg;
925 MachineState *machine = MACHINE(pcms);
926 MachineClass *mc = MACHINE_GET_CLASS(machine);
927 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
928 X86MachineState *x86ms = X86_MACHINE(pcms);
929
930 assert(machine->ram_size == x86ms->below_4g_mem_size +
931 x86ms->above_4g_mem_size);
932
933 linux_boot = (machine->kernel_filename != NULL);
934
935 /*
936 * Split single memory region and use aliases to address portions of it,
937 * done for backwards compatibility with older qemus.
938 */
939 *ram_memory = machine->ram;
940 ram_below_4g = g_malloc(sizeof(*ram_below_4g));
941 memory_region_init_alias(ram_below_4g, NULL, "ram-below-4g", machine->ram,
942 0, x86ms->below_4g_mem_size);
943 memory_region_add_subregion(system_memory, 0, ram_below_4g);
944 e820_add_entry(0, x86ms->below_4g_mem_size, E820_RAM);
945 if (x86ms->above_4g_mem_size > 0) {
946 ram_above_4g = g_malloc(sizeof(*ram_above_4g));
947 memory_region_init_alias(ram_above_4g, NULL, "ram-above-4g",
948 machine->ram,
949 x86ms->below_4g_mem_size,
950 x86ms->above_4g_mem_size);
951 memory_region_add_subregion(system_memory, 0x100000000ULL,
952 ram_above_4g);
953 e820_add_entry(0x100000000ULL, x86ms->above_4g_mem_size, E820_RAM);
954 }
955
956 if (!pcmc->has_reserved_memory &&
957 (machine->ram_slots ||
958 (machine->maxram_size > machine->ram_size))) {
959
960 error_report("\"-memory 'slots|maxmem'\" is not supported by: %s",
961 mc->name);
962 exit(EXIT_FAILURE);
963 }
964
965 /* always allocate the device memory information */
966 machine->device_memory = g_malloc0(sizeof(*machine->device_memory));
967
968 /* initialize device memory address space */
969 if (pcmc->has_reserved_memory &&
970 (machine->ram_size < machine->maxram_size)) {
971 ram_addr_t device_mem_size = machine->maxram_size - machine->ram_size;
972
973 if (machine->ram_slots > ACPI_MAX_RAM_SLOTS) {
974 error_report("unsupported amount of memory slots: %"PRIu64,
975 machine->ram_slots);
976 exit(EXIT_FAILURE);
977 }
978
979 if (QEMU_ALIGN_UP(machine->maxram_size,
980 TARGET_PAGE_SIZE) != machine->maxram_size) {
981 error_report("maximum memory size must by aligned to multiple of "
982 "%d bytes", TARGET_PAGE_SIZE);
983 exit(EXIT_FAILURE);
984 }
985
986 machine->device_memory->base =
987 ROUND_UP(0x100000000ULL + x86ms->above_4g_mem_size, 1 * GiB);
988
989 if (pcmc->enforce_aligned_dimm) {
990 /* size device region assuming 1G page max alignment per slot */
991 device_mem_size += (1 * GiB) * machine->ram_slots;
992 }
993
994 if ((machine->device_memory->base + device_mem_size) <
995 device_mem_size) {
996 error_report("unsupported amount of maximum memory: " RAM_ADDR_FMT,
997 machine->maxram_size);
998 exit(EXIT_FAILURE);
999 }
1000
1001 memory_region_init(&machine->device_memory->mr, OBJECT(pcms),
1002 "device-memory", device_mem_size);
1003 memory_region_add_subregion(system_memory, machine->device_memory->base,
1004 &machine->device_memory->mr);
1005 }
1006
1007 /* Initialize PC system firmware */
1008 pc_system_firmware_init(pcms, rom_memory);
1009
1010 option_rom_mr = g_malloc(sizeof(*option_rom_mr));
1011 memory_region_init_ram(option_rom_mr, NULL, "pc.rom", PC_ROM_SIZE,
1012 &error_fatal);
1013 if (pcmc->pci_enabled) {
1014 memory_region_set_readonly(option_rom_mr, true);
1015 }
1016 memory_region_add_subregion_overlap(rom_memory,
1017 PC_ROM_MIN_VGA,
1018 option_rom_mr,
1019 1);
1020
1021 fw_cfg = fw_cfg_arch_create(machine,
1022 x86ms->boot_cpus, x86ms->apic_id_limit);
1023
1024 rom_set_fw(fw_cfg);
1025
1026 if (pcmc->has_reserved_memory && machine->device_memory->base) {
1027 uint64_t *val = g_malloc(sizeof(*val));
1028 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
1029 uint64_t res_mem_end = machine->device_memory->base;
1030
1031 if (!pcmc->broken_reserved_end) {
1032 res_mem_end += memory_region_size(&machine->device_memory->mr);
1033 }
1034 *val = cpu_to_le64(ROUND_UP(res_mem_end, 1 * GiB));
1035 fw_cfg_add_file(fw_cfg, "etc/reserved-memory-end", val, sizeof(*val));
1036 }
1037
1038 if (linux_boot) {
1039 x86_load_linux(x86ms, fw_cfg, pcmc->acpi_data_size,
1040 pcmc->pvh_enabled, pcmc->linuxboot_dma_enabled);
1041 }
1042
1043 for (i = 0; i < nb_option_roms; i++) {
1044 rom_add_option(option_rom[i].name, option_rom[i].bootindex);
1045 }
1046 x86ms->fw_cfg = fw_cfg;
1047
1048 /* Init default IOAPIC address space */
1049 x86ms->ioapic_as = &address_space_memory;
1050
1051 /* Init ACPI memory hotplug IO base address */
1052 pcms->memhp_io_base = ACPI_MEMORY_HOTPLUG_BASE;
1053 }
1054
1055 /*
1056 * The 64bit pci hole starts after "above 4G RAM" and
1057 * potentially the space reserved for memory hotplug.
1058 */
1059 uint64_t pc_pci_hole64_start(void)
1060 {
1061 PCMachineState *pcms = PC_MACHINE(qdev_get_machine());
1062 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
1063 MachineState *ms = MACHINE(pcms);
1064 X86MachineState *x86ms = X86_MACHINE(pcms);
1065 uint64_t hole64_start = 0;
1066
1067 if (pcmc->has_reserved_memory && ms->device_memory->base) {
1068 hole64_start = ms->device_memory->base;
1069 if (!pcmc->broken_reserved_end) {
1070 hole64_start += memory_region_size(&ms->device_memory->mr);
1071 }
1072 } else {
1073 hole64_start = 0x100000000ULL + x86ms->above_4g_mem_size;
1074 }
1075
1076 return ROUND_UP(hole64_start, 1 * GiB);
1077 }
1078
1079 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus)
1080 {
1081 DeviceState *dev = NULL;
1082
1083 rom_set_order_override(FW_CFG_ORDER_OVERRIDE_VGA);
1084 if (pci_bus) {
1085 PCIDevice *pcidev = pci_vga_init(pci_bus);
1086 dev = pcidev ? &pcidev->qdev : NULL;
1087 } else if (isa_bus) {
1088 ISADevice *isadev = isa_vga_init(isa_bus);
1089 dev = isadev ? DEVICE(isadev) : NULL;
1090 }
1091 rom_reset_order_override();
1092 return dev;
1093 }
1094
1095 static const MemoryRegionOps ioport80_io_ops = {
1096 .write = ioport80_write,
1097 .read = ioport80_read,
1098 .endianness = DEVICE_NATIVE_ENDIAN,
1099 .impl = {
1100 .min_access_size = 1,
1101 .max_access_size = 1,
1102 },
1103 };
1104
1105 static const MemoryRegionOps ioportF0_io_ops = {
1106 .write = ioportF0_write,
1107 .read = ioportF0_read,
1108 .endianness = DEVICE_NATIVE_ENDIAN,
1109 .impl = {
1110 .min_access_size = 1,
1111 .max_access_size = 1,
1112 },
1113 };
1114
1115 static void pc_superio_init(ISABus *isa_bus, bool create_fdctrl, bool no_vmport)
1116 {
1117 int i;
1118 DriveInfo *fd[MAX_FD];
1119 qemu_irq *a20_line;
1120 ISADevice *fdc, *i8042, *port92, *vmmouse;
1121
1122 serial_hds_isa_init(isa_bus, 0, MAX_ISA_SERIAL_PORTS);
1123 parallel_hds_isa_init(isa_bus, MAX_PARALLEL_PORTS);
1124
1125 for (i = 0; i < MAX_FD; i++) {
1126 fd[i] = drive_get(IF_FLOPPY, 0, i);
1127 create_fdctrl |= !!fd[i];
1128 }
1129 if (create_fdctrl) {
1130 fdc = isa_new(TYPE_ISA_FDC);
1131 if (fdc) {
1132 isa_realize_and_unref(fdc, isa_bus, &error_fatal);
1133 isa_fdc_init_drives(fdc, fd);
1134 }
1135 }
1136
1137 i8042 = isa_create_simple(isa_bus, "i8042");
1138 if (!no_vmport) {
1139 isa_create_simple(isa_bus, TYPE_VMPORT);
1140 vmmouse = isa_try_new("vmmouse");
1141 } else {
1142 vmmouse = NULL;
1143 }
1144 if (vmmouse) {
1145 object_property_set_link(OBJECT(vmmouse), OBJECT(i8042),
1146 "i8042", &error_abort);
1147 isa_realize_and_unref(vmmouse, isa_bus, &error_fatal);
1148 }
1149 port92 = isa_create_simple(isa_bus, TYPE_PORT92);
1150
1151 a20_line = qemu_allocate_irqs(handle_a20_line_change, first_cpu, 2);
1152 i8042_setup_a20_line(i8042, a20_line[0]);
1153 qdev_connect_gpio_out_named(DEVICE(port92),
1154 PORT92_A20_LINE, 0, a20_line[1]);
1155 g_free(a20_line);
1156 }
1157
1158 void pc_basic_device_init(struct PCMachineState *pcms,
1159 ISABus *isa_bus, qemu_irq *gsi,
1160 ISADevice **rtc_state,
1161 bool create_fdctrl,
1162 uint32_t hpet_irqs)
1163 {
1164 int i;
1165 DeviceState *hpet = NULL;
1166 int pit_isa_irq = 0;
1167 qemu_irq pit_alt_irq = NULL;
1168 qemu_irq rtc_irq = NULL;
1169 ISADevice *pit = NULL;
1170 MemoryRegion *ioport80_io = g_new(MemoryRegion, 1);
1171 MemoryRegion *ioportF0_io = g_new(MemoryRegion, 1);
1172
1173 memory_region_init_io(ioport80_io, NULL, &ioport80_io_ops, NULL, "ioport80", 1);
1174 memory_region_add_subregion(isa_bus->address_space_io, 0x80, ioport80_io);
1175
1176 memory_region_init_io(ioportF0_io, NULL, &ioportF0_io_ops, NULL, "ioportF0", 1);
1177 memory_region_add_subregion(isa_bus->address_space_io, 0xf0, ioportF0_io);
1178
1179 /*
1180 * Check if an HPET shall be created.
1181 *
1182 * Without KVM_CAP_PIT_STATE2, we cannot switch off the in-kernel PIT
1183 * when the HPET wants to take over. Thus we have to disable the latter.
1184 */
1185 if (!no_hpet && (!kvm_irqchip_in_kernel() || kvm_has_pit_state2())) {
1186 hpet = qdev_try_new(TYPE_HPET);
1187 if (hpet) {
1188 /* For pc-piix-*, hpet's intcap is always IRQ2. For pc-q35-1.7
1189 * and earlier, use IRQ2 for compat. Otherwise, use IRQ16~23,
1190 * IRQ8 and IRQ2.
1191 */
1192 uint8_t compat = object_property_get_uint(OBJECT(hpet),
1193 HPET_INTCAP, NULL);
1194 if (!compat) {
1195 qdev_prop_set_uint32(hpet, HPET_INTCAP, hpet_irqs);
1196 }
1197 sysbus_realize_and_unref(SYS_BUS_DEVICE(hpet), &error_fatal);
1198 sysbus_mmio_map(SYS_BUS_DEVICE(hpet), 0, HPET_BASE);
1199
1200 for (i = 0; i < GSI_NUM_PINS; i++) {
1201 sysbus_connect_irq(SYS_BUS_DEVICE(hpet), i, gsi[i]);
1202 }
1203 pit_isa_irq = -1;
1204 pit_alt_irq = qdev_get_gpio_in(hpet, HPET_LEGACY_PIT_INT);
1205 rtc_irq = qdev_get_gpio_in(hpet, HPET_LEGACY_RTC_INT);
1206 }
1207 }
1208 *rtc_state = mc146818_rtc_init(isa_bus, 2000, rtc_irq);
1209
1210 qemu_register_boot_set(pc_boot_set, *rtc_state);
1211
1212 if (!xen_enabled() && pcms->pit_enabled) {
1213 if (kvm_pit_in_kernel()) {
1214 pit = kvm_pit_init(isa_bus, 0x40);
1215 } else {
1216 pit = i8254_pit_init(isa_bus, 0x40, pit_isa_irq, pit_alt_irq);
1217 }
1218 if (hpet) {
1219 /* connect PIT to output control line of the HPET */
1220 qdev_connect_gpio_out(hpet, 0, qdev_get_gpio_in(DEVICE(pit), 0));
1221 }
1222 pcspk_init(isa_new(TYPE_PC_SPEAKER), isa_bus, pit);
1223 }
1224
1225 i8257_dma_init(isa_bus, 0);
1226
1227 /* Super I/O */
1228 pc_superio_init(isa_bus, create_fdctrl, pcms->vmport != ON_OFF_AUTO_ON);
1229 }
1230
1231 void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus)
1232 {
1233 int i;
1234
1235 rom_set_order_override(FW_CFG_ORDER_OVERRIDE_NIC);
1236 for (i = 0; i < nb_nics; i++) {
1237 NICInfo *nd = &nd_table[i];
1238 const char *model = nd->model ? nd->model : pcmc->default_nic_model;
1239
1240 if (g_str_equal(model, "ne2k_isa")) {
1241 pc_init_ne2k_isa(isa_bus, nd);
1242 } else {
1243 pci_nic_init_nofail(nd, pci_bus, model, NULL);
1244 }
1245 }
1246 rom_reset_order_override();
1247 }
1248
1249 void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs)
1250 {
1251 qemu_irq *i8259;
1252
1253 if (kvm_pic_in_kernel()) {
1254 i8259 = kvm_i8259_init(isa_bus);
1255 } else if (xen_enabled()) {
1256 i8259 = xen_interrupt_controller_init();
1257 } else {
1258 i8259 = i8259_init(isa_bus, x86_allocate_cpu_irq());
1259 }
1260
1261 for (size_t i = 0; i < ISA_NUM_IRQS; i++) {
1262 i8259_irqs[i] = i8259[i];
1263 }
1264
1265 g_free(i8259);
1266 }
1267
1268 static void pc_memory_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
1269 Error **errp)
1270 {
1271 const PCMachineState *pcms = PC_MACHINE(hotplug_dev);
1272 const PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
1273 const MachineState *ms = MACHINE(hotplug_dev);
1274 const bool is_nvdimm = object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM);
1275 const uint64_t legacy_align = TARGET_PAGE_SIZE;
1276 Error *local_err = NULL;
1277
1278 /*
1279 * When -no-acpi is used with Q35 machine type, no ACPI is built,
1280 * but pcms->acpi_dev is still created. Check !acpi_enabled in
1281 * addition to cover this case.
1282 */
1283 if (!pcms->acpi_dev || !x86_machine_is_acpi_enabled(X86_MACHINE(pcms))) {
1284 error_setg(errp,
1285 "memory hotplug is not enabled: missing acpi device or acpi disabled");
1286 return;
1287 }
1288
1289 if (is_nvdimm && !ms->nvdimms_state->is_enabled) {
1290 error_setg(errp, "nvdimm is not enabled: missing 'nvdimm' in '-M'");
1291 return;
1292 }
1293
1294 hotplug_handler_pre_plug(pcms->acpi_dev, dev, &local_err);
1295 if (local_err) {
1296 error_propagate(errp, local_err);
1297 return;
1298 }
1299
1300 pc_dimm_pre_plug(PC_DIMM(dev), MACHINE(hotplug_dev),
1301 pcmc->enforce_aligned_dimm ? NULL : &legacy_align, errp);
1302 }
1303
1304 static void pc_memory_plug(HotplugHandler *hotplug_dev,
1305 DeviceState *dev, Error **errp)
1306 {
1307 Error *local_err = NULL;
1308 PCMachineState *pcms = PC_MACHINE(hotplug_dev);
1309 MachineState *ms = MACHINE(hotplug_dev);
1310 bool is_nvdimm = object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM);
1311
1312 pc_dimm_plug(PC_DIMM(dev), MACHINE(pcms), &local_err);
1313 if (local_err) {
1314 goto out;
1315 }
1316
1317 if (is_nvdimm) {
1318 nvdimm_plug(ms->nvdimms_state);
1319 }
1320
1321 hotplug_handler_plug(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &error_abort);
1322 out:
1323 error_propagate(errp, local_err);
1324 }
1325
1326 static void pc_memory_unplug_request(HotplugHandler *hotplug_dev,
1327 DeviceState *dev, Error **errp)
1328 {
1329 Error *local_err = NULL;
1330 PCMachineState *pcms = PC_MACHINE(hotplug_dev);
1331
1332 /*
1333 * When -no-acpi is used with Q35 machine type, no ACPI is built,
1334 * but pcms->acpi_dev is still created. Check !acpi_enabled in
1335 * addition to cover this case.
1336 */
1337 if (!pcms->acpi_dev || !x86_machine_is_acpi_enabled(X86_MACHINE(pcms))) {
1338 error_setg(&local_err,
1339 "memory hotplug is not enabled: missing acpi device or acpi disabled");
1340 goto out;
1341 }
1342
1343 if (object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM)) {
1344 error_setg(&local_err,
1345 "nvdimm device hot unplug is not supported yet.");
1346 goto out;
1347 }
1348
1349 hotplug_handler_unplug_request(HOTPLUG_HANDLER(pcms->acpi_dev), dev,
1350 &local_err);
1351 out:
1352 error_propagate(errp, local_err);
1353 }
1354
1355 static void pc_memory_unplug(HotplugHandler *hotplug_dev,
1356 DeviceState *dev, Error **errp)
1357 {
1358 PCMachineState *pcms = PC_MACHINE(hotplug_dev);
1359 Error *local_err = NULL;
1360
1361 hotplug_handler_unplug(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &local_err);
1362 if (local_err) {
1363 goto out;
1364 }
1365
1366 pc_dimm_unplug(PC_DIMM(dev), MACHINE(pcms));
1367 qdev_unrealize(dev);
1368 out:
1369 error_propagate(errp, local_err);
1370 }
1371
1372 static int pc_apic_cmp(const void *a, const void *b)
1373 {
1374 CPUArchId *apic_a = (CPUArchId *)a;
1375 CPUArchId *apic_b = (CPUArchId *)b;
1376
1377 return apic_a->arch_id - apic_b->arch_id;
1378 }
1379
1380 /* returns pointer to CPUArchId descriptor that matches CPU's apic_id
1381 * in ms->possible_cpus->cpus, if ms->possible_cpus->cpus has no
1382 * entry corresponding to CPU's apic_id returns NULL.
1383 */
1384 static CPUArchId *pc_find_cpu_slot(MachineState *ms, uint32_t id, int *idx)
1385 {
1386 CPUArchId apic_id, *found_cpu;
1387
1388 apic_id.arch_id = id;
1389 found_cpu = bsearch(&apic_id, ms->possible_cpus->cpus,
1390 ms->possible_cpus->len, sizeof(*ms->possible_cpus->cpus),
1391 pc_apic_cmp);
1392 if (found_cpu && idx) {
1393 *idx = found_cpu - ms->possible_cpus->cpus;
1394 }
1395 return found_cpu;
1396 }
1397
1398 static void pc_cpu_plug(HotplugHandler *hotplug_dev,
1399 DeviceState *dev, Error **errp)
1400 {
1401 CPUArchId *found_cpu;
1402 Error *local_err = NULL;
1403 X86CPU *cpu = X86_CPU(dev);
1404 PCMachineState *pcms = PC_MACHINE(hotplug_dev);
1405 X86MachineState *x86ms = X86_MACHINE(pcms);
1406
1407 if (pcms->acpi_dev) {
1408 hotplug_handler_plug(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &local_err);
1409 if (local_err) {
1410 goto out;
1411 }
1412 }
1413
1414 /* increment the number of CPUs */
1415 x86ms->boot_cpus++;
1416 if (x86ms->rtc) {
1417 rtc_set_cpus_count(x86ms->rtc, x86ms->boot_cpus);
1418 }
1419 if (x86ms->fw_cfg) {
1420 fw_cfg_modify_i16(x86ms->fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus);
1421 }
1422
1423 found_cpu = pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, NULL);
1424 found_cpu->cpu = OBJECT(dev);
1425 out:
1426 error_propagate(errp, local_err);
1427 }
1428 static void pc_cpu_unplug_request_cb(HotplugHandler *hotplug_dev,
1429 DeviceState *dev, Error **errp)
1430 {
1431 int idx = -1;
1432 Error *local_err = NULL;
1433 X86CPU *cpu = X86_CPU(dev);
1434 PCMachineState *pcms = PC_MACHINE(hotplug_dev);
1435
1436 if (!pcms->acpi_dev) {
1437 error_setg(&local_err, "CPU hot unplug not supported without ACPI");
1438 goto out;
1439 }
1440
1441 pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, &idx);
1442 assert(idx != -1);
1443 if (idx == 0) {
1444 error_setg(&local_err, "Boot CPU is unpluggable");
1445 goto out;
1446 }
1447
1448 hotplug_handler_unplug_request(HOTPLUG_HANDLER(pcms->acpi_dev), dev,
1449 &local_err);
1450 if (local_err) {
1451 goto out;
1452 }
1453
1454 out:
1455 error_propagate(errp, local_err);
1456
1457 }
1458
1459 static void pc_cpu_unplug_cb(HotplugHandler *hotplug_dev,
1460 DeviceState *dev, Error **errp)
1461 {
1462 CPUArchId *found_cpu;
1463 Error *local_err = NULL;
1464 X86CPU *cpu = X86_CPU(dev);
1465 PCMachineState *pcms = PC_MACHINE(hotplug_dev);
1466 X86MachineState *x86ms = X86_MACHINE(pcms);
1467
1468 hotplug_handler_unplug(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &local_err);
1469 if (local_err) {
1470 goto out;
1471 }
1472
1473 found_cpu = pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, NULL);
1474 found_cpu->cpu = NULL;
1475 qdev_unrealize(dev);
1476
1477 /* decrement the number of CPUs */
1478 x86ms->boot_cpus--;
1479 /* Update the number of CPUs in CMOS */
1480 rtc_set_cpus_count(x86ms->rtc, x86ms->boot_cpus);
1481 fw_cfg_modify_i16(x86ms->fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus);
1482 out:
1483 error_propagate(errp, local_err);
1484 }
1485
1486 static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
1487 DeviceState *dev, Error **errp)
1488 {
1489 int idx;
1490 CPUState *cs;
1491 CPUArchId *cpu_slot;
1492 X86CPUTopoIDs topo_ids;
1493 X86CPU *cpu = X86_CPU(dev);
1494 CPUX86State *env = &cpu->env;
1495 MachineState *ms = MACHINE(hotplug_dev);
1496 PCMachineState *pcms = PC_MACHINE(hotplug_dev);
1497 X86MachineState *x86ms = X86_MACHINE(pcms);
1498 unsigned int smp_cores = ms->smp.cores;
1499 unsigned int smp_threads = ms->smp.threads;
1500 X86CPUTopoInfo topo_info;
1501
1502 if(!object_dynamic_cast(OBJECT(cpu), ms->cpu_type)) {
1503 error_setg(errp, "Invalid CPU type, expected cpu type: '%s'",
1504 ms->cpu_type);
1505 return;
1506 }
1507
1508 init_topo_info(&topo_info, x86ms);
1509
1510 env->nr_dies = x86ms->smp_dies;
1511 env->nr_nodes = topo_info.nodes_per_pkg;
1512 env->pkg_offset = x86ms->apicid_pkg_offset(&topo_info);
1513
1514 /*
1515 * If APIC ID is not set,
1516 * set it based on socket/die/core/thread properties.
1517 */
1518 if (cpu->apic_id == UNASSIGNED_APIC_ID) {
1519 int max_socket = (ms->smp.max_cpus - 1) /
1520 smp_threads / smp_cores / x86ms->smp_dies;
1521
1522 /*
1523 * die-id was optional in QEMU 4.0 and older, so keep it optional
1524 * if there's only one die per socket.
1525 */
1526 if (cpu->die_id < 0 && x86ms->smp_dies == 1) {
1527 cpu->die_id = 0;
1528 }
1529
1530 if (cpu->socket_id < 0) {
1531 error_setg(errp, "CPU socket-id is not set");
1532 return;
1533 } else if (cpu->socket_id > max_socket) {
1534 error_setg(errp, "Invalid CPU socket-id: %u must be in range 0:%u",
1535 cpu->socket_id, max_socket);
1536 return;
1537 }
1538 if (cpu->die_id < 0) {
1539 error_setg(errp, "CPU die-id is not set");
1540 return;
1541 } else if (cpu->die_id > x86ms->smp_dies - 1) {
1542 error_setg(errp, "Invalid CPU die-id: %u must be in range 0:%u",
1543 cpu->die_id, x86ms->smp_dies - 1);
1544 return;
1545 }
1546 if (cpu->core_id < 0) {
1547 error_setg(errp, "CPU core-id is not set");
1548 return;
1549 } else if (cpu->core_id > (smp_cores - 1)) {
1550 error_setg(errp, "Invalid CPU core-id: %u must be in range 0:%u",
1551 cpu->core_id, smp_cores - 1);
1552 return;
1553 }
1554 if (cpu->thread_id < 0) {
1555 error_setg(errp, "CPU thread-id is not set");
1556 return;
1557 } else if (cpu->thread_id > (smp_threads - 1)) {
1558 error_setg(errp, "Invalid CPU thread-id: %u must be in range 0:%u",
1559 cpu->thread_id, smp_threads - 1);
1560 return;
1561 }
1562
1563 topo_ids.pkg_id = cpu->socket_id;
1564 topo_ids.die_id = cpu->die_id;
1565 topo_ids.core_id = cpu->core_id;
1566 topo_ids.smt_id = cpu->thread_id;
1567 cpu->apic_id = x86ms->apicid_from_topo_ids(&topo_info, &topo_ids);
1568 }
1569
1570 cpu_slot = pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, &idx);
1571 if (!cpu_slot) {
1572 MachineState *ms = MACHINE(pcms);
1573
1574 x86ms->topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids);
1575 error_setg(errp,
1576 "Invalid CPU [socket: %u, die: %u, core: %u, thread: %u] with"
1577 " APIC ID %" PRIu32 ", valid index range 0:%d",
1578 topo_ids.pkg_id, topo_ids.die_id, topo_ids.core_id, topo_ids.smt_id,
1579 cpu->apic_id, ms->possible_cpus->len - 1);
1580 return;
1581 }
1582
1583 if (cpu_slot->cpu) {
1584 error_setg(errp, "CPU[%d] with APIC ID %" PRIu32 " exists",
1585 idx, cpu->apic_id);
1586 return;
1587 }
1588
1589 /* if 'address' properties socket-id/core-id/thread-id are not set, set them
1590 * so that machine_query_hotpluggable_cpus would show correct values
1591 */
1592 /* TODO: move socket_id/core_id/thread_id checks into x86_cpu_realizefn()
1593 * once -smp refactoring is complete and there will be CPU private
1594 * CPUState::nr_cores and CPUState::nr_threads fields instead of globals */
1595 x86ms->topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids);
1596 if (cpu->socket_id != -1 && cpu->socket_id != topo_ids.pkg_id) {
1597 error_setg(errp, "property socket-id: %u doesn't match set apic-id:"
1598 " 0x%x (socket-id: %u)", cpu->socket_id, cpu->apic_id,
1599 topo_ids.pkg_id);
1600 return;
1601 }
1602 cpu->socket_id = topo_ids.pkg_id;
1603
1604 if (cpu->die_id != -1 && cpu->die_id != topo_ids.die_id) {
1605 error_setg(errp, "property die-id: %u doesn't match set apic-id:"
1606 " 0x%x (die-id: %u)", cpu->die_id, cpu->apic_id, topo_ids.die_id);
1607 return;
1608 }
1609 cpu->die_id = topo_ids.die_id;
1610
1611 if (cpu->core_id != -1 && cpu->core_id != topo_ids.core_id) {
1612 error_setg(errp, "property core-id: %u doesn't match set apic-id:"
1613 " 0x%x (core-id: %u)", cpu->core_id, cpu->apic_id,
1614 topo_ids.core_id);
1615 return;
1616 }
1617 cpu->core_id = topo_ids.core_id;
1618
1619 if (cpu->thread_id != -1 && cpu->thread_id != topo_ids.smt_id) {
1620 error_setg(errp, "property thread-id: %u doesn't match set apic-id:"
1621 " 0x%x (thread-id: %u)", cpu->thread_id, cpu->apic_id,
1622 topo_ids.smt_id);
1623 return;
1624 }
1625 cpu->thread_id = topo_ids.smt_id;
1626
1627 if (hyperv_feat_enabled(cpu, HYPERV_FEAT_VPINDEX) &&
1628 !kvm_hv_vpindex_settable()) {
1629 error_setg(errp, "kernel doesn't allow setting HyperV VP_INDEX");
1630 return;
1631 }
1632
1633 cs = CPU(cpu);
1634 cs->cpu_index = idx;
1635
1636 numa_cpu_pre_plug(cpu_slot, dev, errp);
1637 }
1638
1639 static void pc_virtio_pmem_pci_pre_plug(HotplugHandler *hotplug_dev,
1640 DeviceState *dev, Error **errp)
1641 {
1642 HotplugHandler *hotplug_dev2 = qdev_get_bus_hotplug_handler(dev);
1643 Error *local_err = NULL;
1644
1645 if (!hotplug_dev2) {
1646 /*
1647 * Without a bus hotplug handler, we cannot control the plug/unplug
1648 * order. This should never be the case on x86, however better add
1649 * a safety net.
1650 */
1651 error_setg(errp, "virtio-pmem-pci not supported on this bus.");
1652 return;
1653 }
1654 /*
1655 * First, see if we can plug this memory device at all. If that
1656 * succeeds, branch of to the actual hotplug handler.
1657 */
1658 memory_device_pre_plug(MEMORY_DEVICE(dev), MACHINE(hotplug_dev), NULL,
1659 &local_err);
1660 if (!local_err) {
1661 hotplug_handler_pre_plug(hotplug_dev2, dev, &local_err);
1662 }
1663 error_propagate(errp, local_err);
1664 }
1665
1666 static void pc_virtio_pmem_pci_plug(HotplugHandler *hotplug_dev,
1667 DeviceState *dev, Error **errp)
1668 {
1669 HotplugHandler *hotplug_dev2 = qdev_get_bus_hotplug_handler(dev);
1670 Error *local_err = NULL;
1671
1672 /*
1673 * Plug the memory device first and then branch off to the actual
1674 * hotplug handler. If that one fails, we can easily undo the memory
1675 * device bits.
1676 */
1677 memory_device_plug(MEMORY_DEVICE(dev), MACHINE(hotplug_dev));
1678 hotplug_handler_plug(hotplug_dev2, dev, &local_err);
1679 if (local_err) {
1680 memory_device_unplug(MEMORY_DEVICE(dev), MACHINE(hotplug_dev));
1681 }
1682 error_propagate(errp, local_err);
1683 }
1684
1685 static void pc_virtio_pmem_pci_unplug_request(HotplugHandler *hotplug_dev,
1686 DeviceState *dev, Error **errp)
1687 {
1688 /* We don't support virtio pmem hot unplug */
1689 error_setg(errp, "virtio pmem device unplug not supported.");
1690 }
1691
1692 static void pc_virtio_pmem_pci_unplug(HotplugHandler *hotplug_dev,
1693 DeviceState *dev, Error **errp)
1694 {
1695 /* We don't support virtio pmem hot unplug */
1696 }
1697
1698 static void pc_machine_device_pre_plug_cb(HotplugHandler *hotplug_dev,
1699 DeviceState *dev, Error **errp)
1700 {
1701 if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
1702 pc_memory_pre_plug(hotplug_dev, dev, errp);
1703 } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
1704 pc_cpu_pre_plug(hotplug_dev, dev, errp);
1705 } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_PMEM_PCI)) {
1706 pc_virtio_pmem_pci_pre_plug(hotplug_dev, dev, errp);
1707 }
1708 }
1709
1710 static void pc_machine_device_plug_cb(HotplugHandler *hotplug_dev,
1711 DeviceState *dev, Error **errp)
1712 {
1713 if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
1714 pc_memory_plug(hotplug_dev, dev, errp);
1715 } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
1716 pc_cpu_plug(hotplug_dev, dev, errp);
1717 } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_PMEM_PCI)) {
1718 pc_virtio_pmem_pci_plug(hotplug_dev, dev, errp);
1719 }
1720 }
1721
1722 static void pc_machine_device_unplug_request_cb(HotplugHandler *hotplug_dev,
1723 DeviceState *dev, Error **errp)
1724 {
1725 if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
1726 pc_memory_unplug_request(hotplug_dev, dev, errp);
1727 } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
1728 pc_cpu_unplug_request_cb(hotplug_dev, dev, errp);
1729 } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_PMEM_PCI)) {
1730 pc_virtio_pmem_pci_unplug_request(hotplug_dev, dev, errp);
1731 } else {
1732 error_setg(errp, "acpi: device unplug request for not supported device"
1733 " type: %s", object_get_typename(OBJECT(dev)));
1734 }
1735 }
1736
1737 static void pc_machine_device_unplug_cb(HotplugHandler *hotplug_dev,
1738 DeviceState *dev, Error **errp)
1739 {
1740 if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
1741 pc_memory_unplug(hotplug_dev, dev, errp);
1742 } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
1743 pc_cpu_unplug_cb(hotplug_dev, dev, errp);
1744 } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_PMEM_PCI)) {
1745 pc_virtio_pmem_pci_unplug(hotplug_dev, dev, errp);
1746 } else {
1747 error_setg(errp, "acpi: device unplug for not supported device"
1748 " type: %s", object_get_typename(OBJECT(dev)));
1749 }
1750 }
1751
1752 static HotplugHandler *pc_get_hotplug_handler(MachineState *machine,
1753 DeviceState *dev)
1754 {
1755 if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) ||
1756 object_dynamic_cast(OBJECT(dev), TYPE_CPU) ||
1757 object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_PMEM_PCI)) {
1758 return HOTPLUG_HANDLER(machine);
1759 }
1760
1761 return NULL;
1762 }
1763
1764 static void
1765 pc_machine_get_device_memory_region_size(Object *obj, Visitor *v,
1766 const char *name, void *opaque,
1767 Error **errp)
1768 {
1769 MachineState *ms = MACHINE(obj);
1770 int64_t value = 0;
1771
1772 if (ms->device_memory) {
1773 value = memory_region_size(&ms->device_memory->mr);
1774 }
1775
1776 visit_type_int(v, name, &value, errp);
1777 }
1778
1779 static void pc_machine_get_vmport(Object *obj, Visitor *v, const char *name,
1780 void *opaque, Error **errp)
1781 {
1782 PCMachineState *pcms = PC_MACHINE(obj);
1783 OnOffAuto vmport = pcms->vmport;
1784
1785 visit_type_OnOffAuto(v, name, &vmport, errp);
1786 }
1787
1788 static void pc_machine_set_vmport(Object *obj, Visitor *v, const char *name,
1789 void *opaque, Error **errp)
1790 {
1791 PCMachineState *pcms = PC_MACHINE(obj);
1792
1793 visit_type_OnOffAuto(v, name, &pcms->vmport, errp);
1794 }
1795
1796 static bool pc_machine_get_smbus(Object *obj, Error **errp)
1797 {
1798 PCMachineState *pcms = PC_MACHINE(obj);
1799
1800 return pcms->smbus_enabled;
1801 }
1802
1803 static void pc_machine_set_smbus(Object *obj, bool value, Error **errp)
1804 {
1805 PCMachineState *pcms = PC_MACHINE(obj);
1806
1807 pcms->smbus_enabled = value;
1808 }
1809
1810 static bool pc_machine_get_sata(Object *obj, Error **errp)
1811 {
1812 PCMachineState *pcms = PC_MACHINE(obj);
1813
1814 return pcms->sata_enabled;
1815 }
1816
1817 static void pc_machine_set_sata(Object *obj, bool value, Error **errp)
1818 {
1819 PCMachineState *pcms = PC_MACHINE(obj);
1820
1821 pcms->sata_enabled = value;
1822 }
1823
1824 static bool pc_machine_get_pit(Object *obj, Error **errp)
1825 {
1826 PCMachineState *pcms = PC_MACHINE(obj);
1827
1828 return pcms->pit_enabled;
1829 }
1830
1831 static void pc_machine_set_pit(Object *obj, bool value, Error **errp)
1832 {
1833 PCMachineState *pcms = PC_MACHINE(obj);
1834
1835 pcms->pit_enabled = value;
1836 }
1837
1838 static void pc_machine_get_max_ram_below_4g(Object *obj, Visitor *v,
1839 const char *name, void *opaque,
1840 Error **errp)
1841 {
1842 PCMachineState *pcms = PC_MACHINE(obj);
1843 uint64_t value = pcms->max_ram_below_4g;
1844
1845 visit_type_size(v, name, &value, errp);
1846 }
1847
1848 static void pc_machine_set_max_ram_below_4g(Object *obj, Visitor *v,
1849 const char *name, void *opaque,
1850 Error **errp)
1851 {
1852 PCMachineState *pcms = PC_MACHINE(obj);
1853 Error *error = NULL;
1854 uint64_t value;
1855
1856 visit_type_size(v, name, &value, &error);
1857 if (error) {
1858 error_propagate(errp, error);
1859 return;
1860 }
1861 if (value > 4 * GiB) {
1862 error_setg(&error,
1863 "Machine option 'max-ram-below-4g=%"PRIu64
1864 "' expects size less than or equal to 4G", value);
1865 error_propagate(errp, error);
1866 return;
1867 }
1868
1869 if (value < 1 * MiB) {
1870 warn_report("Only %" PRIu64 " bytes of RAM below the 4GiB boundary,"
1871 "BIOS may not work with less than 1MiB", value);
1872 }
1873
1874 pcms->max_ram_below_4g = value;
1875 }
1876
1877 static void pc_machine_initfn(Object *obj)
1878 {
1879 PCMachineState *pcms = PC_MACHINE(obj);
1880
1881 #ifdef CONFIG_VMPORT
1882 pcms->vmport = ON_OFF_AUTO_AUTO;
1883 #else
1884 pcms->vmport = ON_OFF_AUTO_OFF;
1885 #endif /* CONFIG_VMPORT */
1886 pcms->max_ram_below_4g = 0; /* use default */
1887 /* acpi build is enabled by default if machine supports it */
1888 pcms->acpi_build_enabled = PC_MACHINE_GET_CLASS(pcms)->has_acpi_build;
1889 pcms->smbus_enabled = true;
1890 pcms->sata_enabled = true;
1891 pcms->pit_enabled = true;
1892
1893 pc_system_flash_create(pcms);
1894 }
1895
1896 static void pc_machine_reset(MachineState *machine)
1897 {
1898 CPUState *cs;
1899 X86CPU *cpu;
1900
1901 qemu_devices_reset();
1902
1903 /* Reset APIC after devices have been reset to cancel
1904 * any changes that qemu_devices_reset() might have done.
1905 */
1906 CPU_FOREACH(cs) {
1907 cpu = X86_CPU(cs);
1908
1909 if (cpu->apic_state) {
1910 device_legacy_reset(cpu->apic_state);
1911 }
1912 }
1913 }
1914
1915 static void pc_machine_wakeup(MachineState *machine)
1916 {
1917 cpu_synchronize_all_states();
1918 pc_machine_reset(machine);
1919 cpu_synchronize_all_post_reset();
1920 }
1921
1922 static bool pc_hotplug_allowed(MachineState *ms, DeviceState *dev, Error **errp)
1923 {
1924 X86IOMMUState *iommu = x86_iommu_get_default();
1925 IntelIOMMUState *intel_iommu;
1926
1927 if (iommu &&
1928 object_dynamic_cast((Object *)iommu, TYPE_INTEL_IOMMU_DEVICE) &&
1929 object_dynamic_cast((Object *)dev, "vfio-pci")) {
1930 intel_iommu = INTEL_IOMMU_DEVICE(iommu);
1931 if (!intel_iommu->caching_mode) {
1932 error_setg(errp, "Device assignment is not allowed without "
1933 "enabling caching-mode=on for Intel IOMMU.");
1934 return false;
1935 }
1936 }
1937
1938 return true;
1939 }
1940
1941 static void pc_machine_class_init(ObjectClass *oc, void *data)
1942 {
1943 MachineClass *mc = MACHINE_CLASS(oc);
1944 PCMachineClass *pcmc = PC_MACHINE_CLASS(oc);
1945 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
1946
1947 pcmc->pci_enabled = true;
1948 pcmc->has_acpi_build = true;
1949 pcmc->rsdp_in_ram = true;
1950 pcmc->smbios_defaults = true;
1951 pcmc->smbios_uuid_encoded = true;
1952 pcmc->gigabyte_align = true;
1953 pcmc->has_reserved_memory = true;
1954 pcmc->kvmclock_enabled = true;
1955 pcmc->enforce_aligned_dimm = true;
1956 /* BIOS ACPI tables: 128K. Other BIOS datastructures: less than 4K reported
1957 * to be used at the moment, 32K should be enough for a while. */
1958 pcmc->acpi_data_size = 0x20000 + 0x8000;
1959 pcmc->linuxboot_dma_enabled = true;
1960 pcmc->pvh_enabled = true;
1961 assert(!mc->get_hotplug_handler);
1962 mc->get_hotplug_handler = pc_get_hotplug_handler;
1963 mc->hotplug_allowed = pc_hotplug_allowed;
1964 mc->cpu_index_to_instance_props = x86_cpu_index_to_props;
1965 mc->get_default_cpu_node_id = x86_get_default_cpu_node_id;
1966 mc->possible_cpu_arch_ids = x86_possible_cpu_arch_ids;
1967 mc->auto_enable_numa_with_memhp = true;
1968 mc->has_hotpluggable_cpus = true;
1969 mc->default_boot_order = "cad";
1970 mc->hot_add_cpu = pc_hot_add_cpu;
1971 mc->smp_parse = pc_smp_parse;
1972 mc->block_default_type = IF_IDE;
1973 mc->max_cpus = 255;
1974 mc->reset = pc_machine_reset;
1975 mc->wakeup = pc_machine_wakeup;
1976 hc->pre_plug = pc_machine_device_pre_plug_cb;
1977 hc->plug = pc_machine_device_plug_cb;
1978 hc->unplug_request = pc_machine_device_unplug_request_cb;
1979 hc->unplug = pc_machine_device_unplug_cb;
1980 mc->default_cpu_type = TARGET_DEFAULT_CPU_TYPE;
1981 mc->nvdimm_supported = true;
1982 mc->default_ram_id = "pc.ram";
1983
1984 object_class_property_add(oc, PC_MACHINE_MAX_RAM_BELOW_4G, "size",
1985 pc_machine_get_max_ram_below_4g, pc_machine_set_max_ram_below_4g,
1986 NULL, NULL);
1987 object_class_property_set_description(oc, PC_MACHINE_MAX_RAM_BELOW_4G,
1988 "Maximum ram below the 4G boundary (32bit boundary)");
1989
1990 object_class_property_add(oc, PC_MACHINE_DEVMEM_REGION_SIZE, "int",
1991 pc_machine_get_device_memory_region_size, NULL,
1992 NULL, NULL);
1993
1994 object_class_property_add(oc, PC_MACHINE_VMPORT, "OnOffAuto",
1995 pc_machine_get_vmport, pc_machine_set_vmport,
1996 NULL, NULL);
1997 object_class_property_set_description(oc, PC_MACHINE_VMPORT,
1998 "Enable vmport (pc & q35)");
1999
2000 object_class_property_add_bool(oc, PC_MACHINE_SMBUS,
2001 pc_machine_get_smbus, pc_machine_set_smbus);
2002
2003 object_class_property_add_bool(oc, PC_MACHINE_SATA,
2004 pc_machine_get_sata, pc_machine_set_sata);
2005
2006 object_class_property_add_bool(oc, PC_MACHINE_PIT,
2007 pc_machine_get_pit, pc_machine_set_pit);
2008 }
2009
2010 static const TypeInfo pc_machine_info = {
2011 .name = TYPE_PC_MACHINE,
2012 .parent = TYPE_X86_MACHINE,
2013 .abstract = true,
2014 .instance_size = sizeof(PCMachineState),
2015 .instance_init = pc_machine_initfn,
2016 .class_size = sizeof(PCMachineClass),
2017 .class_init = pc_machine_class_init,
2018 .interfaces = (InterfaceInfo[]) {
2019 { TYPE_HOTPLUG_HANDLER },
2020 { }
2021 },
2022 };
2023
2024 static void pc_machine_register_types(void)
2025 {
2026 type_register_static(&pc_machine_info);
2027 }
2028
2029 type_init(pc_machine_register_types)
AR7 emulation for QEMU