hw/input/pl050.c

   1 /*
   2  * Arm PrimeCell PL050 Keyboard / Mouse Interface
   3  *
   4  * Copyright (c) 2006-2007 CodeSourcery.
   5  * Written by Paul Brook
   6  *
   7  * This code is licensed under the GPL.
   8  */
   9
  10 #include "hw/sysbus.h"
  11 #include "hw/input/ps2.h"
  12
  13 #define TYPE_PL050 "pl050"
  14 #define PL050(obj) OBJECT_CHECK(PL050State, (obj), TYPE_PL050)
  15
  16 typedef struct PL050State {
  17     SysBusDevice parent_obj;
  18
  19     MemoryRegion iomem;
  20     void *dev;
  21     uint32_t cr;
  22     uint32_t clk;
  23     uint32_t last;
  24     int pending;
  25     qemu_irq irq;
  26     bool is_mouse;
  27 } PL050State;
  28
  29 static const VMStateDescription vmstate_pl050 = {
  30     .name = "pl050",
  31     .version_id = 2,
  32     .minimum_version_id = 2,
  33     .fields = (VMStateField[]) {
  34         VMSTATE_UINT32(cr, PL050State),
  35         VMSTATE_UINT32(clk, PL050State),
  36         VMSTATE_UINT32(last, PL050State),
  37         VMSTATE_INT32(pending, PL050State),
  38         VMSTATE_END_OF_LIST()
  39     }
  40 };
  41
  42 #define PL050_TXEMPTY         (1 << 6)
  43 #define PL050_TXBUSY          (1 << 5)
  44 #define PL050_RXFULL          (1 << 4)
  45 #define PL050_RXBUSY          (1 << 3)
  46 #define PL050_RXPARITY        (1 << 2)
  47 #define PL050_KMIC            (1 << 1)
  48 #define PL050_KMID            (1 << 0)
  49
  50 static const unsigned char pl050_id[] =
  51 { 0x50, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
  52
  53 static void pl050_update(void *opaque, int level)
  54 {
  55     PL050State *s = (PL050State *)opaque;
  56     int raise;
  57
  58     s->pending = level;
  59     raise = (s->pending && (s->cr & 0x10) != 0)
  60             || (s->cr & 0x08) != 0;
  61     qemu_set_irq(s->irq, raise);
  62 }
  63
  64 static uint64_t pl050_read(void *opaque, hwaddr offset,
  65                            unsigned size)
  66 {
  67     PL050State *s = (PL050State *)opaque;
  68     if (offset >= 0xfe0 && offset < 0x1000)
  69         return pl050_id[(offset - 0xfe0) >> 2];
  70
  71     switch (offset >> 2) {
  72     case 0: /* KMICR */
  73         return s->cr;
  74     case 1: /* KMISTAT */
  75         {
  76             uint8_t val;
  77             uint32_t stat;
  78
  79             val = s->last;
  80             val = val ^ (val >> 4);
  81             val = val ^ (val >> 2);
  82             val = (val ^ (val >> 1)) & 1;
  83
  84             stat = PL050_TXEMPTY;
  85             if (val)
  86                 stat |= PL050_RXPARITY;
  87             if (s->pending)
  88                 stat |= PL050_RXFULL;
  89
  90             return stat;
  91         }
  92     case 2: /* KMIDATA */
  93         if (s->pending)
  94             s->last = ps2_read_data(s->dev);
  95         return s->last;
  96     case 3: /* KMICLKDIV */
  97         return s->clk;
  98     case 4: /* KMIIR */
  99         return s->pending | 2;
 100     default:
 101         qemu_log_mask(LOG_GUEST_ERROR,
 102                       "pl050_read: Bad offset %x\n", (int)offset);
 103         return 0;
 104     }
 105 }
 106
 107 static void pl050_write(void *opaque, hwaddr offset,
 108                         uint64_t value, unsigned size)
 109 {
 110     PL050State *s = (PL050State *)opaque;
 111     switch (offset >> 2) {
 112     case 0: /* KMICR */
 113         s->cr = value;
 114         pl050_update(s, s->pending);
 115         /* ??? Need to implement the enable/disable bit.  */
 116         break;
 117     case 2: /* KMIDATA */
 118         /* ??? This should toggle the TX interrupt line.  */
 119         /* ??? This means kbd/mouse can block each other.  */
 120         if (s->is_mouse) {
 121             ps2_write_mouse(s->dev, value);
 122         } else {
 123             ps2_write_keyboard(s->dev, value);
 124         }
 125         break;
 126     case 3: /* KMICLKDIV */
 127         s->clk = value;
 128         return;
 129     default:
 130         qemu_log_mask(LOG_GUEST_ERROR,
 131                       "pl050_write: Bad offset %x\n", (int)offset);
 132     }
 133 }
 134 static const MemoryRegionOps pl050_ops = {
 135     .read = pl050_read,
 136     .write = pl050_write,
 137     .endianness = DEVICE_NATIVE_ENDIAN,
 138 };
 139
 140 static int pl050_initfn(SysBusDevice *dev)
 141 {
 142     PL050State *s = PL050(dev);
 143
 144     memory_region_init_io(&s->iomem, OBJECT(s), &pl050_ops, s, "pl050", 0x1000);
 145     sysbus_init_mmio(dev, &s->iomem);
 146     sysbus_init_irq(dev, &s->irq);
 147     if (s->is_mouse) {
 148         s->dev = ps2_mouse_init(pl050_update, s);
 149     } else {
 150         s->dev = ps2_kbd_init(pl050_update, s);
 151     }
 152     return 0;
 153 }
 154
 155 static void pl050_keyboard_init(Object *obj)
 156 {
 157     PL050State *s = PL050(obj);
 158
 159     s->is_mouse = false;
 160 }
 161
 162 static void pl050_mouse_init(Object *obj)
 163 {
 164     PL050State *s = PL050(obj);
 165
 166     s->is_mouse = true;
 167 }
 168
 169 static const TypeInfo pl050_kbd_info = {
 170     .name          = "pl050_keyboard",
 171     .parent        = TYPE_PL050,
 172     .instance_init = pl050_keyboard_init,
 173 };
 174
 175 static const TypeInfo pl050_mouse_info = {
 176     .name          = "pl050_mouse",
 177     .parent        = TYPE_PL050,
 178     .instance_init = pl050_mouse_init,
 179 };
 180
 181 static void pl050_class_init(ObjectClass *oc, void *data)
 182 {
 183     DeviceClass *dc = DEVICE_CLASS(oc);
 184     SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(oc);
 185
 186     sdc->init = pl050_initfn;
 187     dc->vmsd = &vmstate_pl050;
 188 }
 189
 190 static const TypeInfo pl050_type_info = {
 191     .name          = TYPE_PL050,
 192     .parent        = TYPE_SYS_BUS_DEVICE,
 193     .instance_size = sizeof(PL050State),
 194     .abstract      = true,
 195     .class_init    = pl050_class_init,
 196 };
 197
 198 static void pl050_register_types(void)
 199 {
 200     type_register_static(&pl050_type_info);
 201     type_register_static(&pl050_kbd_info);
 202     type_register_static(&pl050_mouse_info);
 203 }
 204
 205 type_init(pl050_register_types)