hw/xen_platform.c

   1 /*
   2  * XEN platform pci device, formerly known as the event channel device
   3  *
   4  * Copyright (c) 2003-2004 Intel Corp.
   5  * Copyright (c) 2006 XenSource
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy
   8  * of this software and associated documentation files (the "Software"), to deal
   9  * in the Software without restriction, including without limitation the rights
  10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11  * copies of the Software, and to permit persons to whom the Software is
  12  * furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included in
  15  * all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23  * THE SOFTWARE.
  24  */
  25
  26 #include <assert.h>
  27
  28 #include "hw.h"
  29 #include "pc.h"
  30 #include "pci.h"
  31 #include "irq.h"
  32 #include "xen_common.h"
  33 #include "net.h"
  34 #include "xen_backend.h"
  35 #include "trace.h"
  36 #include "exec-memory.h"
  37
  38 #include <xenguest.h>
  39
  40 //#define DEBUG_PLATFORM
  41
  42 #ifdef DEBUG_PLATFORM
  43 #define DPRINTF(fmt, ...) do { \
  44     fprintf(stderr, "xen_platform: " fmt, ## __VA_ARGS__); \
  45 } while (0)
  46 #else
  47 #define DPRINTF(fmt, ...) do { } while (0)
  48 #endif
  49
  50 #define PFFLAG_ROM_LOCK 1 /* Sets whether ROM memory area is RW or RO */
  51
  52 typedef struct PCIXenPlatformState {
  53     PCIDevice  pci_dev;
  54     MemoryRegion fixed_io;
  55     MemoryRegion bar;
  56     MemoryRegion mmio_bar;
  57     uint8_t flags; /* used only for version_id == 2 */
  58     int drivers_blacklisted;
  59     uint16_t driver_product_version;
  60
  61     /* Log from guest drivers */
  62     char log_buffer[4096];
  63     int log_buffer_off;
  64 } PCIXenPlatformState;
  65
  66 #define XEN_PLATFORM_IOPORT 0x10
  67
  68 /* Send bytes to syslog */
  69 static void log_writeb(PCIXenPlatformState *s, char val)
  70 {
  71     if (val == '\n' || s->log_buffer_off == sizeof(s->log_buffer) - 1) {
  72         /* Flush buffer */
  73         s->log_buffer[s->log_buffer_off] = 0;
  74         trace_xen_platform_log(s->log_buffer);
  75         s->log_buffer_off = 0;
  76     } else {
  77         s->log_buffer[s->log_buffer_off++] = val;
  78     }
  79 }
  80
  81 /* Xen Platform, Fixed IOPort */
  82 #define UNPLUG_ALL_IDE_DISKS 1
  83 #define UNPLUG_ALL_NICS 2
  84 #define UNPLUG_AUX_IDE_DISKS 4
  85
  86 static void unplug_nic(PCIBus *b, PCIDevice *d)
  87 {
  88     if (pci_get_word(d->config + PCI_CLASS_DEVICE) ==
  89             PCI_CLASS_NETWORK_ETHERNET) {
  90         qdev_unplug(&(d->qdev));
  91     }
  92 }
  93
  94 static void pci_unplug_nics(PCIBus *bus)
  95 {
  96     pci_for_each_device(bus, 0, unplug_nic);
  97 }
  98
  99 static void unplug_disks(PCIBus *b, PCIDevice *d)
 100 {
 101     if (pci_get_word(d->config + PCI_CLASS_DEVICE) ==
 102             PCI_CLASS_STORAGE_IDE) {
 103         qdev_unplug(&(d->qdev));
 104     }
 105 }
 106
 107 static void pci_unplug_disks(PCIBus *bus)
 108 {
 109     pci_for_each_device(bus, 0, unplug_disks);
 110 }
 111
 112 static void platform_fixed_ioport_writew(void *opaque, uint32_t addr, uint32_t val)
 113 {
 114     PCIXenPlatformState *s = opaque;
 115
 116     switch (addr) {
 117     case 0:
 118         /* Unplug devices.  Value is a bitmask of which devices to
 119            unplug, with bit 0 the IDE devices, bit 1 the network
 120            devices, and bit 2 the non-primary-master IDE devices. */
 121         if (val & UNPLUG_ALL_IDE_DISKS) {
 122             DPRINTF("unplug disks\n");
 123             bdrv_drain_all();
 124             bdrv_flush_all();
 125             pci_unplug_disks(s->pci_dev.bus);
 126         }
 127         if (val & UNPLUG_ALL_NICS) {
 128             DPRINTF("unplug nics\n");
 129             pci_unplug_nics(s->pci_dev.bus);
 130         }
 131         if (val & UNPLUG_AUX_IDE_DISKS) {
 132             DPRINTF("unplug auxiliary disks not supported\n");
 133         }
 134         break;
 135     case 2:
 136         switch (val) {
 137         case 1:
 138             DPRINTF("Citrix Windows PV drivers loaded in guest\n");
 139             break;
 140         case 0:
 141             DPRINTF("Guest claimed to be running PV product 0?\n");
 142             break;
 143         default:
 144             DPRINTF("Unknown PV product %d loaded in guest\n", val);
 145             break;
 146         }
 147         s->driver_product_version = val;
 148         break;
 149     }
 150 }
 151
 152 static void platform_fixed_ioport_writel(void *opaque, uint32_t addr,
 153                                          uint32_t val)
 154 {
 155     switch (addr) {
 156     case 0:
 157         /* PV driver version */
 158         break;
 159     }
 160 }
 161
 162 static void platform_fixed_ioport_writeb(void *opaque, uint32_t addr, uint32_t val)
 163 {
 164     PCIXenPlatformState *s = opaque;
 165
 166     switch (addr) {
 167     case 0: /* Platform flags */ {
 168         hvmmem_type_t mem_type = (val & PFFLAG_ROM_LOCK) ?
 169             HVMMEM_ram_ro : HVMMEM_ram_rw;
 170         if (xc_hvm_set_mem_type(xen_xc, xen_domid, mem_type, 0xc0, 0x40)) {
 171             DPRINTF("unable to change ro/rw state of ROM memory area!\n");
 172         } else {
 173             s->flags = val & PFFLAG_ROM_LOCK;
 174             DPRINTF("changed ro/rw state of ROM memory area. now is %s state.\n",
 175                     (mem_type == HVMMEM_ram_ro ? "ro":"rw"));
 176         }
 177         break;
 178     }
 179     case 2:
 180         log_writeb(s, val);
 181         break;
 182     }
 183 }
 184
 185 static uint32_t platform_fixed_ioport_readw(void *opaque, uint32_t addr)
 186 {
 187     PCIXenPlatformState *s = opaque;
 188
 189     switch (addr) {
 190     case 0:
 191         if (s->drivers_blacklisted) {
 192             /* The drivers will recognise this magic number and refuse
 193              * to do anything. */
 194             return 0xd249;
 195         } else {
 196             /* Magic value so that you can identify the interface. */
 197             return 0x49d2;
 198         }
 199     default:
 200         return 0xffff;
 201     }
 202 }
 203
 204 static uint32_t platform_fixed_ioport_readb(void *opaque, uint32_t addr)
 205 {
 206     PCIXenPlatformState *s = opaque;
 207
 208     switch (addr) {
 209     case 0:
 210         /* Platform flags */
 211         return s->flags;
 212     case 2:
 213         /* Version number */
 214         return 1;
 215     default:
 216         return 0xff;
 217     }
 218 }
 219
 220 static void platform_fixed_ioport_reset(void *opaque)
 221 {
 222     PCIXenPlatformState *s = opaque;
 223
 224     platform_fixed_ioport_writeb(s, 0, 0);
 225 }
 226
 227 const MemoryRegionPortio xen_platform_ioport[] = {
 228     { 0, 16, 4, .write = platform_fixed_ioport_writel, },
 229     { 0, 16, 2, .write = platform_fixed_ioport_writew, },
 230     { 0, 16, 1, .write = platform_fixed_ioport_writeb, },
 231     { 0, 16, 2, .read = platform_fixed_ioport_readw, },
 232     { 0, 16, 1, .read = platform_fixed_ioport_readb, },
 233     PORTIO_END_OF_LIST()
 234 };
 235
 236 static const MemoryRegionOps platform_fixed_io_ops = {
 237     .old_portio = xen_platform_ioport,
 238     .endianness = DEVICE_NATIVE_ENDIAN,
 239 };
 240
 241 static void platform_fixed_ioport_init(PCIXenPlatformState* s)
 242 {
 243     memory_region_init_io(&s->fixed_io, &platform_fixed_io_ops, s,
 244                           "xen-fixed", 16);
 245     memory_region_add_subregion(get_system_io(), XEN_PLATFORM_IOPORT,
 246                                 &s->fixed_io);
 247 }
 248
 249 /* Xen Platform PCI Device */
 250
 251 static uint32_t xen_platform_ioport_readb(void *opaque, uint32_t addr)
 252 {
 253     if (addr == 0) {
 254         return platform_fixed_ioport_readb(opaque, 0);
 255     } else {
 256         return ~0u;
 257     }
 258 }
 259
 260 static void xen_platform_ioport_writeb(void *opaque, uint32_t addr, uint32_t val)
 261 {
 262     PCIXenPlatformState *s = opaque;
 263
 264     switch (addr) {
 265     case 0: /* Platform flags */
 266         platform_fixed_ioport_writeb(opaque, 0, val);
 267         break;
 268     case 8:
 269         log_writeb(s, val);
 270         break;
 271     default:
 272         break;
 273     }
 274 }
 275
 276 static MemoryRegionPortio xen_pci_portio[] = {
 277     { 0, 0x100, 1, .read = xen_platform_ioport_readb, },
 278     { 0, 0x100, 1, .write = xen_platform_ioport_writeb, },
 279     PORTIO_END_OF_LIST()
 280 };
 281
 282 static const MemoryRegionOps xen_pci_io_ops = {
 283     .old_portio = xen_pci_portio,
 284 };
 285
 286 static void platform_ioport_bar_setup(PCIXenPlatformState *d)
 287 {
 288     memory_region_init_io(&d->bar, &xen_pci_io_ops, d, "xen-pci", 0x100);
 289 }
 290
 291 static uint64_t platform_mmio_read(void *opaque, target_phys_addr_t addr,
 292                                    unsigned size)
 293 {
 294     DPRINTF("Warning: attempted read from physical address "
 295             "0x" TARGET_FMT_plx " in xen platform mmio space\n", addr);
 296
 297     return 0;
 298 }
 299
 300 static void platform_mmio_write(void *opaque, target_phys_addr_t addr,
 301                                 uint64_t val, unsigned size)
 302 {
 303     DPRINTF("Warning: attempted write of 0x%"PRIx64" to physical "
 304             "address 0x" TARGET_FMT_plx " in xen platform mmio space\n",
 305             val, addr);
 306 }
 307
 308 static const MemoryRegionOps platform_mmio_handler = {
 309     .read = &platform_mmio_read,
 310     .write = &platform_mmio_write,
 311     .endianness = DEVICE_NATIVE_ENDIAN,
 312 };
 313
 314 static void platform_mmio_setup(PCIXenPlatformState *d)
 315 {
 316     memory_region_init_io(&d->mmio_bar, &platform_mmio_handler, d,
 317                           "xen-mmio", 0x1000000);
 318 }
 319
 320 static int xen_platform_post_load(void *opaque, int version_id)
 321 {
 322     PCIXenPlatformState *s = opaque;
 323
 324     platform_fixed_ioport_writeb(s, 0, s->flags);
 325
 326     return 0;
 327 }
 328
 329 static const VMStateDescription vmstate_xen_platform = {
 330     .name = "platform",
 331     .version_id = 4,
 332     .minimum_version_id = 4,
 333     .minimum_version_id_old = 4,
 334     .post_load = xen_platform_post_load,
 335     .fields = (VMStateField []) {
 336         VMSTATE_PCI_DEVICE(pci_dev, PCIXenPlatformState),
 337         VMSTATE_UINT8(flags, PCIXenPlatformState),
 338         VMSTATE_END_OF_LIST()
 339     }
 340 };
 341
 342 static int xen_platform_initfn(PCIDevice *dev)
 343 {
 344     PCIXenPlatformState *d = DO_UPCAST(PCIXenPlatformState, pci_dev, dev);
 345     uint8_t *pci_conf;
 346
 347     pci_conf = d->pci_dev.config;
 348
 349     pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
 350
 351     pci_config_set_prog_interface(pci_conf, 0);
 352
 353     pci_conf[PCI_INTERRUPT_PIN] = 1;
 354
 355     platform_ioport_bar_setup(d);
 356     pci_register_bar(&d->pci_dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &d->bar);
 357
 358     /* reserve 16MB mmio address for share memory*/
 359     platform_mmio_setup(d);
 360     pci_register_bar(&d->pci_dev, 1, PCI_BASE_ADDRESS_MEM_PREFETCH,
 361                      &d->mmio_bar);
 362
 363     platform_fixed_ioport_init(d);
 364
 365     return 0;
 366 }
 367
 368 static void platform_reset(DeviceState *dev)
 369 {
 370     PCIXenPlatformState *s = DO_UPCAST(PCIXenPlatformState, pci_dev.qdev, dev);
 371
 372     platform_fixed_ioport_reset(s);
 373 }
 374
 375 static void xen_platform_class_init(ObjectClass *klass, void *data)
 376 {
 377     DeviceClass *dc = DEVICE_CLASS(klass);
 378     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
 379
 380     k->init = xen_platform_initfn;
 381     k->vendor_id = PCI_VENDOR_ID_XEN;
 382     k->device_id = PCI_DEVICE_ID_XEN_PLATFORM;
 383     k->class_id = PCI_CLASS_OTHERS << 8 | 0x80;
 384     k->subsystem_vendor_id = PCI_VENDOR_ID_XEN;
 385     k->subsystem_id = PCI_DEVICE_ID_XEN_PLATFORM;
 386     k->revision = 1;
 387     dc->desc = "XEN platform pci device";
 388     dc->reset = platform_reset;
 389     dc->vmsd = &vmstate_xen_platform;
 390 }
 391
 392 static TypeInfo xen_platform_info = {
 393     .name          = "xen-platform",
 394     .parent        = TYPE_PCI_DEVICE,
 395     .instance_size = sizeof(PCIXenPlatformState),
 396     .class_init    = xen_platform_class_init,
 397 };
 398
 399 static void xen_platform_register_types(void)
 400 {
 401     type_register_static(&xen_platform_info);
 402 }
 403
 404 type_init(xen_platform_register_types)