xics: Implement xics_ics_free()
[qemu/ar7.git] / target-i386 / mem_helper.c
blob1aec8a5f1914955ce096fde3ae09f4d46d74107d
1 /*
2 * x86 memory access helpers
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "cpu.h"
21 #include "exec/helper-proto.h"
22 #include "exec/cpu_ldst.h"
24 /* broken thread support */
26 static spinlock_t global_cpu_lock = SPIN_LOCK_UNLOCKED;
28 void helper_lock(void)
30 spin_lock(&global_cpu_lock);
33 void helper_unlock(void)
35 spin_unlock(&global_cpu_lock);
38 void helper_cmpxchg8b(CPUX86State *env, target_ulong a0)
40 uint64_t d;
41 int eflags;
43 eflags = cpu_cc_compute_all(env, CC_OP);
44 d = cpu_ldq_data(env, a0);
45 if (d == (((uint64_t)env->regs[R_EDX] << 32) | (uint32_t)env->regs[R_EAX])) {
46 cpu_stq_data(env, a0, ((uint64_t)env->regs[R_ECX] << 32) | (uint32_t)env->regs[R_EBX]);
47 eflags |= CC_Z;
48 } else {
49 /* always do the store */
50 cpu_stq_data(env, a0, d);
51 env->regs[R_EDX] = (uint32_t)(d >> 32);
52 env->regs[R_EAX] = (uint32_t)d;
53 eflags &= ~CC_Z;
55 CC_SRC = eflags;
58 #ifdef TARGET_X86_64
59 void helper_cmpxchg16b(CPUX86State *env, target_ulong a0)
61 uint64_t d0, d1;
62 int eflags;
64 if ((a0 & 0xf) != 0) {
65 raise_exception(env, EXCP0D_GPF);
67 eflags = cpu_cc_compute_all(env, CC_OP);
68 d0 = cpu_ldq_data(env, a0);
69 d1 = cpu_ldq_data(env, a0 + 8);
70 if (d0 == env->regs[R_EAX] && d1 == env->regs[R_EDX]) {
71 cpu_stq_data(env, a0, env->regs[R_EBX]);
72 cpu_stq_data(env, a0 + 8, env->regs[R_ECX]);
73 eflags |= CC_Z;
74 } else {
75 /* always do the store */
76 cpu_stq_data(env, a0, d0);
77 cpu_stq_data(env, a0 + 8, d1);
78 env->regs[R_EDX] = d1;
79 env->regs[R_EAX] = d0;
80 eflags &= ~CC_Z;
82 CC_SRC = eflags;
84 #endif
86 void helper_boundw(CPUX86State *env, target_ulong a0, int v)
88 int low, high;
90 low = cpu_ldsw_data(env, a0);
91 high = cpu_ldsw_data(env, a0 + 2);
92 v = (int16_t)v;
93 if (v < low || v > high) {
94 raise_exception(env, EXCP05_BOUND);
98 void helper_boundl(CPUX86State *env, target_ulong a0, int v)
100 int low, high;
102 low = cpu_ldl_data(env, a0);
103 high = cpu_ldl_data(env, a0 + 4);
104 if (v < low || v > high) {
105 raise_exception(env, EXCP05_BOUND);
109 #if !defined(CONFIG_USER_ONLY)
110 /* try to fill the TLB and return an exception if error. If retaddr is
111 * NULL, it means that the function was called in C code (i.e. not
112 * from generated code or from helper.c)
114 /* XXX: fix it to restore all registers */
115 void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
116 uintptr_t retaddr)
118 int ret;
120 ret = x86_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
121 if (ret) {
122 X86CPU *cpu = X86_CPU(cs);
123 CPUX86State *env = &cpu->env;
125 if (retaddr) {
126 /* now we have a real cpu fault */
127 cpu_restore_state(cs, retaddr);
129 raise_exception_err(env, cs->exception_index, env->error_code);
132 #endif