include/hw/acpi/acpi-defs.h

   1 /*
   2  * This program is free software; you can redistribute it and/or modify
   3  * it under the terms of the GNU General Public License as published by
   4  * the Free Software Foundation; either version 2 of the License, or
   5  * (at your option) any later version.
   6
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11
  12  * You should have received a copy of the GNU General Public License along
  13  * with this program; if not, see <http://www.gnu.org/licenses/>.
  14  */
  15 #ifndef QEMU_ACPI_DEFS_H
  16 #define QEMU_ACPI_DEFS_H
  17
  18 enum {
  19     ACPI_FADT_F_WBINVD,
  20     ACPI_FADT_F_WBINVD_FLUSH,
  21     ACPI_FADT_F_PROC_C1,
  22     ACPI_FADT_F_P_LVL2_UP,
  23     ACPI_FADT_F_PWR_BUTTON,
  24     ACPI_FADT_F_SLP_BUTTON,
  25     ACPI_FADT_F_FIX_RTC,
  26     ACPI_FADT_F_RTC_S4,
  27     ACPI_FADT_F_TMR_VAL_EXT,
  28     ACPI_FADT_F_DCK_CAP,
  29     ACPI_FADT_F_RESET_REG_SUP,
  30     ACPI_FADT_F_SEALED_CASE,
  31     ACPI_FADT_F_HEADLESS,
  32     ACPI_FADT_F_CPU_SW_SLP,
  33     ACPI_FADT_F_PCI_EXP_WAK,
  34     ACPI_FADT_F_USE_PLATFORM_CLOCK,
  35     ACPI_FADT_F_S4_RTC_STS_VALID,
  36     ACPI_FADT_F_REMOTE_POWER_ON_CAPABLE,
  37     ACPI_FADT_F_FORCE_APIC_CLUSTER_MODEL,
  38     ACPI_FADT_F_FORCE_APIC_PHYSICAL_DESTINATION_MODE,
  39     ACPI_FADT_F_HW_REDUCED_ACPI,
  40     ACPI_FADT_F_LOW_POWER_S0_IDLE_CAPABLE,
  41 };
  42
  43 /*
  44  * ACPI 2.0 Generic Address Space definition.
  45  */
  46 struct Acpi20GenericAddress {
  47     uint8_t  address_space_id;
  48     uint8_t  register_bit_width;
  49     uint8_t  register_bit_offset;
  50     uint8_t  reserved;
  51     uint64_t address;
  52 } QEMU_PACKED;
  53 typedef struct Acpi20GenericAddress Acpi20GenericAddress;
  54
  55 struct AcpiRsdpDescriptor {        /* Root System Descriptor Pointer */
  56     uint64_t signature;              /* ACPI signature, contains "RSD PTR " */
  57     uint8_t  checksum;               /* To make sum of struct == 0 */
  58     uint8_t  oem_id [6];             /* OEM identification */
  59     uint8_t  revision;               /* Must be 0 for 1.0, 2 for 2.0 */
  60     uint32_t rsdt_physical_address;  /* 32-bit physical address of RSDT */
  61     uint32_t length;                 /* XSDT Length in bytes including hdr */
  62     uint64_t xsdt_physical_address;  /* 64-bit physical address of XSDT */
  63     uint8_t  extended_checksum;      /* Checksum of entire table */
  64     uint8_t  reserved [3];           /* Reserved field must be 0 */
  65 } QEMU_PACKED;
  66 typedef struct AcpiRsdpDescriptor AcpiRsdpDescriptor;
  67
  68 /* Table structure from Linux kernel (the ACPI tables are under the
  69    BSD license) */
  70
  71
  72 #define ACPI_TABLE_HEADER_DEF   /* ACPI common table header */ \
  73     uint32_t signature;          /* ACPI signature (4 ASCII characters) */ \
  74     uint32_t length;                 /* Length of table, in bytes, including header */ \
  75     uint8_t  revision;               /* ACPI Specification minor version # */ \
  76     uint8_t  checksum;               /* To make sum of entire table == 0 */ \
  77     uint8_t  oem_id [6];             /* OEM identification */ \
  78     uint8_t  oem_table_id [8];       /* OEM table identification */ \
  79     uint32_t oem_revision;           /* OEM revision number */ \
  80     uint8_t  asl_compiler_id [4];    /* ASL compiler vendor ID */ \
  81     uint32_t asl_compiler_revision;  /* ASL compiler revision number */
  82
  83
  84 /* ACPI common table header */
  85 struct AcpiTableHeader {
  86     ACPI_TABLE_HEADER_DEF
  87 } QEMU_PACKED;
  88 typedef struct AcpiTableHeader AcpiTableHeader;
  89
  90 /*
  91  * ACPI Fixed ACPI Description Table (FADT)
  92  */
  93 #define ACPI_FADT_COMMON_DEF /* FADT common definition */ \
  94     ACPI_TABLE_HEADER_DEF    /* ACPI common table header */ \
  95     uint32_t firmware_ctrl;  /* Physical address of FACS */ \
  96     uint32_t dsdt;         /* Physical address of DSDT */ \
  97     uint8_t  model;        /* System Interrupt Model */ \
  98     uint8_t  reserved1;    /* Reserved */ \
  99     uint16_t sci_int;      /* System vector of SCI interrupt */ \
 100     uint32_t smi_cmd;      /* Port address of SMI command port */ \
 101     uint8_t  acpi_enable;  /* Value to write to smi_cmd to enable ACPI */ \
 102     uint8_t  acpi_disable; /* Value to write to smi_cmd to disable ACPI */ \
 103     /* Value to write to SMI CMD to enter S4BIOS state */ \
 104     uint8_t  S4bios_req; \
 105     uint8_t  reserved2;    /* Reserved - must be zero */ \
 106     /* Port address of Power Mgt 1a acpi_event Reg Blk */ \
 107     uint32_t pm1a_evt_blk; \
 108     /* Port address of Power Mgt 1b acpi_event Reg Blk */ \
 109     uint32_t pm1b_evt_blk; \
 110     uint32_t pm1a_cnt_blk; /* Port address of Power Mgt 1a Control Reg Blk */ \
 111     uint32_t pm1b_cnt_blk; /* Port address of Power Mgt 1b Control Reg Blk */ \
 112     uint32_t pm2_cnt_blk;  /* Port address of Power Mgt 2 Control Reg Blk */ \
 113     uint32_t pm_tmr_blk;   /* Port address of Power Mgt Timer Ctrl Reg Blk */ \
 114     /* Port addr of General Purpose acpi_event 0 Reg Blk */ \
 115     uint32_t gpe0_blk; \
 116     /* Port addr of General Purpose acpi_event 1 Reg Blk */ \
 117     uint32_t gpe1_blk; \
 118     uint8_t  pm1_evt_len;  /* Byte length of ports at pm1_x_evt_blk */ \
 119     uint8_t  pm1_cnt_len;  /* Byte length of ports at pm1_x_cnt_blk */ \
 120     uint8_t  pm2_cnt_len;  /* Byte Length of ports at pm2_cnt_blk */ \
 121     uint8_t  pm_tmr_len;   /* Byte Length of ports at pm_tm_blk */ \
 122     uint8_t  gpe0_blk_len; /* Byte Length of ports at gpe0_blk */ \
 123     uint8_t  gpe1_blk_len; /* Byte Length of ports at gpe1_blk */ \
 124     uint8_t  gpe1_base;    /* Offset in gpe model where gpe1 events start */ \
 125     uint8_t  reserved3;    /* Reserved */ \
 126     uint16_t plvl2_lat;    /* Worst case HW latency to enter/exit C2 state */ \
 127     uint16_t plvl3_lat;    /* Worst case HW latency to enter/exit C3 state */ \
 128     uint16_t flush_size;   /* Size of area read to flush caches */ \
 129     uint16_t flush_stride; /* Stride used in flushing caches */ \
 130     uint8_t  duty_offset;  /* Bit location of duty cycle field in p_cnt reg */ \
 131     uint8_t  duty_width;   /* Bit width of duty cycle field in p_cnt reg */ \
 132     uint8_t  day_alrm;     /* Index to day-of-month alarm in RTC CMOS RAM */ \
 133     uint8_t  mon_alrm;     /* Index to month-of-year alarm in RTC CMOS RAM */ \
 134     uint8_t  century;      /* Index to century in RTC CMOS RAM */ \
 135     /* IA-PC Boot Architecture Flags (see below for individual flags) */ \
 136     uint16_t boot_flags; \
 137     uint8_t reserved;    /* Reserved, must be zero */ \
 138     /* Miscellaneous flag bits (see below for individual flags) */ \
 139     uint32_t flags; \
 140     /* 64-bit address of the Reset register */ \
 141     struct AcpiGenericAddress reset_register; \
 142     /* Value to write to the reset_register port to reset the system */ \
 143     uint8_t reset_value; \
 144     /* ARM-Specific Boot Flags (see below for individual flags) (ACPI 5.1) */ \
 145     uint16_t arm_boot_flags; \
 146     uint8_t minor_revision;  /* FADT Minor Revision (ACPI 5.1) */ \
 147     uint64_t x_facs;          /* 64-bit physical address of FACS */ \
 148     uint64_t x_dsdt;          /* 64-bit physical address of DSDT */ \
 149     /* 64-bit Extended Power Mgt 1a Event Reg Blk address */ \
 150     struct AcpiGenericAddress xpm1a_event_block; \
 151     /* 64-bit Extended Power Mgt 1b Event Reg Blk address */ \
 152     struct AcpiGenericAddress xpm1b_event_block; \
 153     /* 64-bit Extended Power Mgt 1a Control Reg Blk address */ \
 154     struct AcpiGenericAddress xpm1a_control_block; \
 155     /* 64-bit Extended Power Mgt 1b Control Reg Blk address */ \
 156     struct AcpiGenericAddress xpm1b_control_block; \
 157     /* 64-bit Extended Power Mgt 2 Control Reg Blk address */ \
 158     struct AcpiGenericAddress xpm2_control_block; \
 159     /* 64-bit Extended Power Mgt Timer Ctrl Reg Blk address */ \
 160     struct AcpiGenericAddress xpm_timer_block; \
 161     /* 64-bit Extended General Purpose Event 0 Reg Blk address */ \
 162     struct AcpiGenericAddress xgpe0_block; \
 163     /* 64-bit Extended General Purpose Event 1 Reg Blk address */ \
 164     struct AcpiGenericAddress xgpe1_block; \
 165
 166 struct AcpiGenericAddress {
 167     uint8_t space_id;        /* Address space where struct or register exists */
 168     uint8_t bit_width;       /* Size in bits of given register */
 169     uint8_t bit_offset;      /* Bit offset within the register */
 170     uint8_t access_width;    /* Minimum Access size (ACPI 3.0) */
 171     uint64_t address;        /* 64-bit address of struct or register */
 172 } QEMU_PACKED;
 173
 174 struct AcpiFadtDescriptorRev3 {
 175     ACPI_FADT_COMMON_DEF
 176 } QEMU_PACKED;
 177 typedef struct AcpiFadtDescriptorRev3 AcpiFadtDescriptorRev3;
 178
 179 struct AcpiFadtDescriptorRev5_1 {
 180     ACPI_FADT_COMMON_DEF
 181     /* 64-bit Sleep Control register (ACPI 5.0) */
 182     struct AcpiGenericAddress sleep_control;
 183     /* 64-bit Sleep Status register (ACPI 5.0) */
 184     struct AcpiGenericAddress sleep_status;
 185 } QEMU_PACKED;
 186
 187 typedef struct AcpiFadtDescriptorRev5_1 AcpiFadtDescriptorRev5_1;
 188
 189 #define ACPI_FADT_ARM_PSCI_COMPLIANT  (1 << 0)
 190 #define ACPI_FADT_ARM_PSCI_USE_HVC    (1 << 1)
 191
 192 /*
 193  * Serial Port Console Redirection Table (SPCR), Rev. 1.02
 194  *
 195  * For .interface_type see Debug Port Table 2 (DBG2) serial port
 196  * subtypes in Table 3, Rev. May 22, 2012
 197  */
 198 struct AcpiSerialPortConsoleRedirection {
 199     ACPI_TABLE_HEADER_DEF
 200     uint8_t  interface_type;
 201     uint8_t  reserved1[3];
 202     struct AcpiGenericAddress base_address;
 203     uint8_t  interrupt_types;
 204     uint8_t  irq;
 205     uint32_t gsi;
 206     uint8_t  baud;
 207     uint8_t  parity;
 208     uint8_t  stopbits;
 209     uint8_t  flowctrl;
 210     uint8_t  term_type;
 211     uint8_t  reserved2;
 212     uint16_t pci_device_id;
 213     uint16_t pci_vendor_id;
 214     uint8_t  pci_bus;
 215     uint8_t  pci_slot;
 216     uint8_t  pci_func;
 217     uint32_t pci_flags;
 218     uint8_t  pci_seg;
 219     uint32_t reserved3;
 220 } QEMU_PACKED;
 221 typedef struct AcpiSerialPortConsoleRedirection
 222                AcpiSerialPortConsoleRedirection;
 223
 224 /*
 225  * ACPI 1.0 Root System Description Table (RSDT)
 226  */
 227 struct AcpiRsdtDescriptorRev1 {
 228     ACPI_TABLE_HEADER_DEF       /* ACPI common table header */
 229     uint32_t table_offset_entry[0];  /* Array of pointers to other */
 230     /* ACPI tables */
 231 } QEMU_PACKED;
 232 typedef struct AcpiRsdtDescriptorRev1 AcpiRsdtDescriptorRev1;
 233
 234 /*
 235  * ACPI 2.0 eXtended System Description Table (XSDT)
 236  */
 237 struct AcpiXsdtDescriptorRev2 {
 238     ACPI_TABLE_HEADER_DEF       /* ACPI common table header */
 239     uint64_t table_offset_entry[0];  /* Array of pointers to other */
 240     /* ACPI tables */
 241 } QEMU_PACKED;
 242 typedef struct AcpiXsdtDescriptorRev2 AcpiXsdtDescriptorRev2;
 243
 244 /*
 245  * ACPI 1.0 Firmware ACPI Control Structure (FACS)
 246  */
 247 struct AcpiFacsDescriptorRev1 {
 248     uint32_t signature;           /* ACPI Signature */
 249     uint32_t length;                 /* Length of structure, in bytes */
 250     uint32_t hardware_signature;     /* Hardware configuration signature */
 251     uint32_t firmware_waking_vector; /* ACPI OS waking vector */
 252     uint32_t global_lock;            /* Global Lock */
 253     uint32_t flags;
 254     uint8_t  resverved3 [40];        /* Reserved - must be zero */
 255 } QEMU_PACKED;
 256 typedef struct AcpiFacsDescriptorRev1 AcpiFacsDescriptorRev1;
 257
 258 /*
 259  * Differentiated System Description Table (DSDT)
 260  */
 261
 262 /*
 263  * MADT values and structures
 264  */
 265
 266 /* Values for MADT PCATCompat */
 267
 268 #define ACPI_DUAL_PIC                0
 269 #define ACPI_MULTIPLE_APIC           1
 270
 271 /* Master MADT */
 272
 273 struct AcpiMultipleApicTable {
 274     ACPI_TABLE_HEADER_DEF     /* ACPI common table header */
 275     uint32_t local_apic_address;     /* Physical address of local APIC */
 276     uint32_t flags;
 277 } QEMU_PACKED;
 278 typedef struct AcpiMultipleApicTable AcpiMultipleApicTable;
 279
 280 /* Values for Type in APIC sub-headers */
 281
 282 #define ACPI_APIC_PROCESSOR          0
 283 #define ACPI_APIC_IO                 1
 284 #define ACPI_APIC_XRUPT_OVERRIDE     2
 285 #define ACPI_APIC_NMI                3
 286 #define ACPI_APIC_LOCAL_NMI          4
 287 #define ACPI_APIC_ADDRESS_OVERRIDE   5
 288 #define ACPI_APIC_IO_SAPIC           6
 289 #define ACPI_APIC_LOCAL_SAPIC        7
 290 #define ACPI_APIC_XRUPT_SOURCE       8
 291 #define ACPI_APIC_LOCAL_X2APIC       9
 292 #define ACPI_APIC_LOCAL_X2APIC_NMI      10
 293 #define ACPI_APIC_GENERIC_CPU_INTERFACE 11
 294 #define ACPI_APIC_GENERIC_DISTRIBUTOR   12
 295 #define ACPI_APIC_GENERIC_MSI_FRAME     13
 296 #define ACPI_APIC_GENERIC_REDISTRIBUTOR 14
 297 #define ACPI_APIC_GENERIC_TRANSLATOR    15
 298 #define ACPI_APIC_RESERVED              16   /* 16 and greater are reserved */
 299
 300 /*
 301  * MADT sub-structures (Follow MULTIPLE_APIC_DESCRIPTION_TABLE)
 302  */
 303 #define ACPI_SUB_HEADER_DEF   /* Common ACPI sub-structure header */\
 304     uint8_t  type;                               \
 305     uint8_t  length;
 306
 307 /* Sub-structures for MADT */
 308
 309 struct AcpiMadtProcessorApic {
 310     ACPI_SUB_HEADER_DEF
 311     uint8_t  processor_id;           /* ACPI processor id */
 312     uint8_t  local_apic_id;          /* Processor's local APIC id */
 313     uint32_t flags;
 314 } QEMU_PACKED;
 315 typedef struct AcpiMadtProcessorApic AcpiMadtProcessorApic;
 316
 317 struct AcpiMadtIoApic {
 318     ACPI_SUB_HEADER_DEF
 319     uint8_t  io_apic_id;             /* I/O APIC ID */
 320     uint8_t  reserved;               /* Reserved - must be zero */
 321     uint32_t address;                /* APIC physical address */
 322     uint32_t interrupt;              /* Global system interrupt where INTI
 323                                  * lines start */
 324 } QEMU_PACKED;
 325 typedef struct AcpiMadtIoApic AcpiMadtIoApic;
 326
 327 struct AcpiMadtIntsrcovr {
 328     ACPI_SUB_HEADER_DEF
 329     uint8_t  bus;
 330     uint8_t  source;
 331     uint32_t gsi;
 332     uint16_t flags;
 333 } QEMU_PACKED;
 334 typedef struct AcpiMadtIntsrcovr AcpiMadtIntsrcovr;
 335
 336 struct AcpiMadtLocalNmi {
 337     ACPI_SUB_HEADER_DEF
 338     uint8_t  processor_id;           /* ACPI processor id */
 339     uint16_t flags;                  /* MPS INTI flags */
 340     uint8_t  lint;                   /* Local APIC LINT# */
 341 } QEMU_PACKED;
 342 typedef struct AcpiMadtLocalNmi AcpiMadtLocalNmi;
 343
 344 struct AcpiMadtProcessorX2Apic {
 345     ACPI_SUB_HEADER_DEF
 346     uint16_t reserved;
 347     uint32_t x2apic_id;              /* Processor's local x2APIC ID */
 348     uint32_t flags;
 349     uint32_t uid;                    /* Processor object _UID */
 350 } QEMU_PACKED;
 351 typedef struct AcpiMadtProcessorX2Apic AcpiMadtProcessorX2Apic;
 352
 353 struct AcpiMadtLocalX2ApicNmi {
 354     ACPI_SUB_HEADER_DEF
 355     uint16_t flags;                  /* MPS INTI flags */
 356     uint32_t uid;                    /* Processor object _UID */
 357     uint8_t  lint;                   /* Local APIC LINT# */
 358     uint8_t  reserved[3];            /* Local APIC LINT# */
 359 } QEMU_PACKED;
 360 typedef struct AcpiMadtLocalX2ApicNmi AcpiMadtLocalX2ApicNmi;
 361
 362 struct AcpiMadtGenericCpuInterface {
 363     ACPI_SUB_HEADER_DEF
 364     uint16_t reserved;
 365     uint32_t cpu_interface_number;
 366     uint32_t uid;
 367     uint32_t flags;
 368     uint32_t parking_version;
 369     uint32_t performance_interrupt;
 370     uint64_t parked_address;
 371     uint64_t base_address;
 372     uint64_t gicv_base_address;
 373     uint64_t gich_base_address;
 374     uint32_t vgic_interrupt;
 375     uint64_t gicr_base_address;
 376     uint64_t arm_mpidr;
 377 } QEMU_PACKED;
 378
 379 typedef struct AcpiMadtGenericCpuInterface AcpiMadtGenericCpuInterface;
 380
 381 /* GICC CPU Interface Flags */
 382 #define ACPI_MADT_GICC_ENABLED 1
 383
 384 struct AcpiMadtGenericDistributor {
 385     ACPI_SUB_HEADER_DEF
 386     uint16_t reserved;
 387     uint32_t gic_id;
 388     uint64_t base_address;
 389     uint32_t global_irq_base;
 390     /* ACPI 5.1 Errata 1228 Present GIC version in MADT table */
 391     uint8_t version;
 392     uint8_t reserved2[3];
 393 } QEMU_PACKED;
 394
 395 typedef struct AcpiMadtGenericDistributor AcpiMadtGenericDistributor;
 396
 397 struct AcpiMadtGenericMsiFrame {
 398     ACPI_SUB_HEADER_DEF
 399     uint16_t reserved;
 400     uint32_t gic_msi_frame_id;
 401     uint64_t base_address;
 402     uint32_t flags;
 403     uint16_t spi_count;
 404     uint16_t spi_base;
 405 } QEMU_PACKED;
 406
 407 typedef struct AcpiMadtGenericMsiFrame AcpiMadtGenericMsiFrame;
 408
 409 struct AcpiMadtGenericRedistributor {
 410     ACPI_SUB_HEADER_DEF
 411     uint16_t reserved;
 412     uint64_t base_address;
 413     uint32_t range_length;
 414 } QEMU_PACKED;
 415
 416 typedef struct AcpiMadtGenericRedistributor AcpiMadtGenericRedistributor;
 417
 418 struct AcpiMadtGenericTranslator {
 419     ACPI_SUB_HEADER_DEF
 420     uint16_t reserved;
 421     uint32_t translation_id;
 422     uint64_t base_address;
 423     uint32_t reserved2;
 424 } QEMU_PACKED;
 425
 426 typedef struct AcpiMadtGenericTranslator AcpiMadtGenericTranslator;
 427
 428 /*
 429  * Generic Timer Description Table (GTDT)
 430  */
 431 #define ACPI_GTDT_INTERRUPT_MODE_LEVEL    (0 << 0)
 432 #define ACPI_GTDT_INTERRUPT_MODE_EDGE     (1 << 0)
 433 #define ACPI_GTDT_CAP_ALWAYS_ON           (1 << 2)
 434
 435 struct AcpiGenericTimerTable {
 436     ACPI_TABLE_HEADER_DEF
 437     uint64_t counter_block_addresss;
 438     uint32_t reserved;
 439     uint32_t secure_el1_interrupt;
 440     uint32_t secure_el1_flags;
 441     uint32_t non_secure_el1_interrupt;
 442     uint32_t non_secure_el1_flags;
 443     uint32_t virtual_timer_interrupt;
 444     uint32_t virtual_timer_flags;
 445     uint32_t non_secure_el2_interrupt;
 446     uint32_t non_secure_el2_flags;
 447     uint64_t counter_read_block_address;
 448     uint32_t platform_timer_count;
 449     uint32_t platform_timer_offset;
 450 } QEMU_PACKED;
 451 typedef struct AcpiGenericTimerTable AcpiGenericTimerTable;
 452
 453 /*
 454  * HPET Description Table
 455  */
 456 struct Acpi20Hpet {
 457     ACPI_TABLE_HEADER_DEF                    /* ACPI common table header */
 458     uint32_t           timer_block_id;
 459     Acpi20GenericAddress addr;
 460     uint8_t            hpet_number;
 461     uint16_t           min_tick;
 462     uint8_t            page_protect;
 463 } QEMU_PACKED;
 464 typedef struct Acpi20Hpet Acpi20Hpet;
 465
 466 /*
 467  * SRAT (NUMA topology description) table
 468  */
 469
 470 struct AcpiSystemResourceAffinityTable {
 471     ACPI_TABLE_HEADER_DEF
 472     uint32_t    reserved1;
 473     uint32_t    reserved2[2];
 474 } QEMU_PACKED;
 475 typedef struct AcpiSystemResourceAffinityTable AcpiSystemResourceAffinityTable;
 476
 477 #define ACPI_SRAT_PROCESSOR_APIC     0
 478 #define ACPI_SRAT_MEMORY             1
 479 #define ACPI_SRAT_PROCESSOR_x2APIC   2
 480 #define ACPI_SRAT_PROCESSOR_GICC     3
 481
 482 struct AcpiSratProcessorAffinity {
 483     ACPI_SUB_HEADER_DEF
 484     uint8_t     proximity_lo;
 485     uint8_t     local_apic_id;
 486     uint32_t    flags;
 487     uint8_t     local_sapic_eid;
 488     uint8_t     proximity_hi[3];
 489     uint32_t    reserved;
 490 } QEMU_PACKED;
 491 typedef struct AcpiSratProcessorAffinity AcpiSratProcessorAffinity;
 492
 493 struct AcpiSratProcessorX2ApicAffinity {
 494     ACPI_SUB_HEADER_DEF
 495     uint16_t    reserved;
 496     uint32_t    proximity_domain;
 497     uint32_t    x2apic_id;
 498     uint32_t    flags;
 499     uint32_t    clk_domain;
 500     uint32_t    reserved2;
 501 } QEMU_PACKED;
 502 typedef struct AcpiSratProcessorX2ApicAffinity AcpiSratProcessorX2ApicAffinity;
 503
 504 struct AcpiSratMemoryAffinity {
 505     ACPI_SUB_HEADER_DEF
 506     uint32_t    proximity;
 507     uint16_t    reserved1;
 508     uint64_t    base_addr;
 509     uint64_t    range_length;
 510     uint32_t    reserved2;
 511     uint32_t    flags;
 512     uint32_t    reserved3[2];
 513 } QEMU_PACKED;
 514 typedef struct AcpiSratMemoryAffinity AcpiSratMemoryAffinity;
 515
 516 struct AcpiSratProcessorGiccAffinity {
 517     ACPI_SUB_HEADER_DEF
 518     uint32_t    proximity;
 519     uint32_t    acpi_processor_uid;
 520     uint32_t    flags;
 521     uint32_t    clock_domain;
 522 } QEMU_PACKED;
 523
 524 typedef struct AcpiSratProcessorGiccAffinity AcpiSratProcessorGiccAffinity;
 525
 526 /* PCI fw r3.0 MCFG table. */
 527 /* Subtable */
 528 struct AcpiMcfgAllocation {
 529     uint64_t address;                /* Base address, processor-relative */
 530     uint16_t pci_segment;            /* PCI segment group number */
 531     uint8_t start_bus_number;       /* Starting PCI Bus number */
 532     uint8_t end_bus_number;         /* Final PCI Bus number */
 533     uint32_t reserved;
 534 } QEMU_PACKED;
 535 typedef struct AcpiMcfgAllocation AcpiMcfgAllocation;
 536
 537 struct AcpiTableMcfg {
 538     ACPI_TABLE_HEADER_DEF;
 539     uint8_t reserved[8];
 540     AcpiMcfgAllocation allocation[0];
 541 } QEMU_PACKED;
 542 typedef struct AcpiTableMcfg AcpiTableMcfg;
 543
 544 /*
 545  * TCPA Description Table
 546  *
 547  * Following Level 00, Rev 00.37 of specs:
 548  * http://www.trustedcomputinggroup.org/resources/tcg_acpi_specification
 549  */
 550 struct Acpi20Tcpa {
 551     ACPI_TABLE_HEADER_DEF                    /* ACPI common table header */
 552     uint16_t platform_class;
 553     uint32_t log_area_minimum_length;
 554     uint64_t log_area_start_address;
 555 } QEMU_PACKED;
 556 typedef struct Acpi20Tcpa Acpi20Tcpa;
 557
 558 /*
 559  * TPM2
 560  *
 561  * Following Level 00, Rev 00.37 of specs:
 562  * http://www.trustedcomputinggroup.org/resources/tcg_acpi_specification
 563  */
 564 struct Acpi20TPM2 {
 565     ACPI_TABLE_HEADER_DEF
 566     uint16_t platform_class;
 567     uint16_t reserved;
 568     uint64_t control_area_address;
 569     uint32_t start_method;
 570 } QEMU_PACKED;
 571 typedef struct Acpi20TPM2 Acpi20TPM2;
 572
 573 /* DMAR - DMA Remapping table r2.2 */
 574 struct AcpiTableDmar {
 575     ACPI_TABLE_HEADER_DEF
 576     uint8_t host_address_width; /* Maximum DMA physical addressability */
 577     uint8_t flags;
 578     uint8_t reserved[10];
 579 } QEMU_PACKED;
 580 typedef struct AcpiTableDmar AcpiTableDmar;
 581
 582 /* Masks for Flags field above */
 583 #define ACPI_DMAR_INTR_REMAP        1
 584 #define ACPI_DMAR_X2APIC_OPT_OUT    (1 << 1)
 585
 586 /* Values for sub-structure type for DMAR */
 587 enum {
 588     ACPI_DMAR_TYPE_HARDWARE_UNIT = 0,       /* DRHD */
 589     ACPI_DMAR_TYPE_RESERVED_MEMORY = 1,     /* RMRR */
 590     ACPI_DMAR_TYPE_ATSR = 2,                /* ATSR */
 591     ACPI_DMAR_TYPE_HARDWARE_AFFINITY = 3,   /* RHSR */
 592     ACPI_DMAR_TYPE_ANDD = 4,                /* ANDD */
 593     ACPI_DMAR_TYPE_RESERVED = 5             /* Reserved for furture use */
 594 };
 595
 596 /*
 597  * Sub-structures for DMAR
 598  */
 599
 600 /* Device scope structure for DRHD. */
 601 struct AcpiDmarDeviceScope {
 602     uint8_t entry_type;
 603     uint8_t length;
 604     uint16_t reserved;
 605     uint8_t enumeration_id;
 606     uint8_t bus;
 607     struct {
 608         uint8_t device;
 609         uint8_t function;
 610     } path[0];
 611 } QEMU_PACKED;
 612 typedef struct AcpiDmarDeviceScope AcpiDmarDeviceScope;
 613
 614 /* Type 0: Hardware Unit Definition */
 615 struct AcpiDmarHardwareUnit {
 616     uint16_t type;
 617     uint16_t length;
 618     uint8_t flags;
 619     uint8_t reserved;
 620     uint16_t pci_segment;   /* The PCI Segment associated with this unit */
 621     uint64_t address;   /* Base address of remapping hardware register-set */
 622     AcpiDmarDeviceScope scope[0];
 623 } QEMU_PACKED;
 624 typedef struct AcpiDmarHardwareUnit AcpiDmarHardwareUnit;
 625
 626 /* Type 2: Root Port ATS Capability Reporting Structure */
 627 struct AcpiDmarRootPortATS {
 628     uint16_t type;
 629     uint16_t length;
 630     uint8_t flags;
 631     uint8_t reserved;
 632     uint16_t pci_segment;
 633     AcpiDmarDeviceScope scope[0];
 634 } QEMU_PACKED;
 635 typedef struct AcpiDmarRootPortATS AcpiDmarRootPortATS;
 636
 637 /* Masks for Flags field above */
 638 #define ACPI_DMAR_INCLUDE_PCI_ALL   1
 639 #define ACPI_DMAR_ATSR_ALL_PORTS    1
 640
 641 /*
 642  * Input Output Remapping Table (IORT)
 643  * Conforms to "IO Remapping Table System Software on ARM Platforms",
 644  * Document number: ARM DEN 0049B, October 2015
 645  */
 646
 647 struct AcpiIortTable {
 648     ACPI_TABLE_HEADER_DEF     /* ACPI common table header */
 649     uint32_t node_count;
 650     uint32_t node_offset;
 651     uint32_t reserved;
 652 } QEMU_PACKED;
 653 typedef struct AcpiIortTable AcpiIortTable;
 654
 655 /*
 656  * IORT node types
 657  */
 658
 659 #define ACPI_IORT_NODE_HEADER_DEF   /* Node format common fields */ \
 660     uint8_t  type;          \
 661     uint16_t length;        \
 662     uint8_t  revision;      \
 663     uint32_t reserved;      \
 664     uint32_t mapping_count; \
 665     uint32_t mapping_offset;
 666
 667 /* Values for node Type above */
 668 enum {
 669         ACPI_IORT_NODE_ITS_GROUP = 0x00,
 670         ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
 671         ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
 672         ACPI_IORT_NODE_SMMU = 0x03,
 673         ACPI_IORT_NODE_SMMU_V3 = 0x04
 674 };
 675
 676 struct AcpiIortIdMapping {
 677     uint32_t input_base;
 678     uint32_t id_count;
 679     uint32_t output_base;
 680     uint32_t output_reference;
 681     uint32_t flags;
 682 } QEMU_PACKED;
 683 typedef struct AcpiIortIdMapping AcpiIortIdMapping;
 684
 685 struct AcpiIortMemoryAccess {
 686     uint32_t cache_coherency;
 687     uint8_t  hints;
 688     uint16_t reserved;
 689     uint8_t  memory_flags;
 690 } QEMU_PACKED;
 691 typedef struct AcpiIortMemoryAccess AcpiIortMemoryAccess;
 692
 693 struct AcpiIortItsGroup {
 694     ACPI_IORT_NODE_HEADER_DEF
 695     uint32_t its_count;
 696     uint32_t identifiers[0];
 697 } QEMU_PACKED;
 698 typedef struct AcpiIortItsGroup AcpiIortItsGroup;
 699
 700 struct AcpiIortRC {
 701     ACPI_IORT_NODE_HEADER_DEF
 702     AcpiIortMemoryAccess memory_properties;
 703     uint32_t ats_attribute;
 704     uint32_t pci_segment_number;
 705     AcpiIortIdMapping id_mapping_array[0];
 706 } QEMU_PACKED;
 707 typedef struct AcpiIortRC AcpiIortRC;
 708
 709 #endif