2 * Copyright (C) 2010-2012 Guan Xuetao
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
8 * Contributions from 2012-04-01 on are considered under GPL version 2,
9 * or (at your option) any later version.
13 #include "exec/gdbstub.h"
15 #include "qemu/host-utils.h"
16 #ifndef CONFIG_USER_ONLY
17 #include "ui/console.h"
23 #define DPRINTF(fmt, ...) printf("%s: " fmt , __func__, ## __VA_ARGS__)
25 #define DPRINTF(fmt, ...) do {} while (0)
28 CPUUniCore32State
*uc32_cpu_init(const char *cpu_model
)
31 CPUUniCore32State
*env
;
33 static int inited
= 1;
35 oc
= cpu_class_by_name(TYPE_UNICORE32_CPU
, cpu_model
);
39 cpu
= UNICORE32_CPU(object_new(object_class_get_name(oc
)));
41 env
->cpu_model_str
= cpu_model
;
45 uc32_translate_init();
52 uint32_t HELPER(clo
)(uint32_t x
)
57 uint32_t HELPER(clz
)(uint32_t x
)
62 #ifndef CONFIG_USER_ONLY
63 void helper_cp0_set(CPUUniCore32State
*env
, uint32_t val
, uint32_t creg
,
67 * movc pp.nn, rn, #imm9
71 * 2: page table base reg.
72 * 3: data fault status reg.
73 * 4: insn fault status reg.
76 * imm9: split UCOP_IMM10 with bit5 is 0
83 env
->cp0
.c1_sys
= val
;
89 env
->cp0
.c2_base
= val
;
95 env
->cp0
.c3_faultstatus
= val
;
101 env
->cp0
.c4_faultaddr
= val
;
106 DPRINTF("Invalidate Entire I&D cache\n");
109 DPRINTF("Invalidate Entire Icache\n");
112 DPRINTF("Invalidate Entire Dcache\n");
115 DPRINTF("Clean Entire Dcache\n");
118 DPRINTF("Flush Entire Dcache\n");
121 DPRINTF("Invalidate Dcache line\n");
124 DPRINTF("Clean Dcache line\n");
127 DPRINTF("Flush Dcache line\n");
132 if ((cop
<= 6) && (cop
>= 2)) {
133 /* invalid all tlb */
143 DPRINTF("Wrong register (%d) or wrong operation (%d) in cp0_set!\n",
147 uint32_t helper_cp0_get(CPUUniCore32State
*env
, uint32_t creg
, uint32_t cop
)
150 * movc rd, pp.nn, #imm9
153 * 0: cpuid and cachetype
154 * 1: sys control reg.
155 * 2: page table base reg.
156 * 3: data fault status reg.
157 * 4: insn fault status reg.
158 * imm9: split UCOP_IMM10 with bit5 is 0
164 return env
->cp0
.c0_cpuid
;
166 return env
->cp0
.c0_cachetype
;
171 return env
->cp0
.c1_sys
;
176 return env
->cp0
.c2_base
;
181 return env
->cp0
.c3_faultstatus
;
186 return env
->cp0
.c4_faultaddr
;
190 DPRINTF("Wrong register (%d) or wrong operation (%d) in cp0_set!\n",
198 * 1. curses windows will be blank when switching back
199 * 2. backspace is not handled yet
201 static void putc_on_screen(unsigned char ch
)
203 static WINDOW
*localwin
;
207 /* Assume 80 * 30 screen to minimize the implementation */
208 localwin
= newwin(30, 80, 0, 0);
209 scrollok(localwin
, TRUE
);
214 wprintw(localwin
, "%c", ch
);
218 wprintw(localwin
, "%c", ch
);
221 /* If '\r' is put before '\n', the curses window will destroy the
222 * last print line. And meanwhile, '\n' implifies '\r' inside. */
224 default: /* Not handled, so just print it hex code */
225 wprintw(localwin
, "-- 0x%x --", ch
);
232 #define putc_on_screen(c) do { } while (0)
235 void helper_cp1_putc(target_ulong x
)
237 putc_on_screen((unsigned char)x
); /* Output to screen */
238 DPRINTF("%c", x
); /* Output to stdout */
242 #ifdef CONFIG_USER_ONLY
243 void switch_mode(CPUUniCore32State
*env
, int mode
)
245 if (mode
!= ASR_MODE_USER
) {
246 cpu_abort(env
, "Tried to switch out of user mode\n");
250 void do_interrupt(CPUUniCore32State
*env
)
252 cpu_abort(env
, "NO interrupt in user mode\n");
255 int uc32_cpu_handle_mmu_fault(CPUUniCore32State
*env
, target_ulong address
,
256 int access_type
, int mmu_idx
)
258 cpu_abort(env
, "NO mmu fault in user mode\n");