target/loongarch/internals.h

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2 /*
   3  * QEMU LoongArch CPU -- internal functions and types
   4  *
   5  * Copyright (c) 2021 Loongson Technology Corporation Limited
   6  */
   7
   8 #ifndef LOONGARCH_INTERNALS_H
   9 #define LOONGARCH_INTERNALS_H
  10
  11 #define FCMP_LT   0b0001  /* fp0 < fp1 */
  12 #define FCMP_EQ   0b0010  /* fp0 = fp1 */
  13 #define FCMP_UN   0b0100  /* unordered */
  14 #define FCMP_GT   0b1000  /* fp0 > fp1 */
  15
  16 #define TARGET_PHYS_MASK MAKE_64BIT_MASK(0, TARGET_PHYS_ADDR_SPACE_BITS)
  17 #define TARGET_VIRT_MASK MAKE_64BIT_MASK(0, TARGET_VIRT_ADDR_SPACE_BITS)
  18
  19 /* Global bit used for lddir/ldpte */
  20 #define LOONGARCH_PAGE_HUGE_SHIFT   6
  21 /* Global bit for huge page */
  22 #define LOONGARCH_HGLOBAL_SHIFT     12
  23
  24 void loongarch_translate_init(void);
  25
  26 void loongarch_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
  27
  28 void G_NORETURN do_raise_exception(CPULoongArchState *env,
  29                                    uint32_t exception,
  30                                    uintptr_t pc);
  31
  32 const char *loongarch_exception_name(int32_t exception);
  33
  34 #ifdef CONFIG_TCG
  35 int ieee_ex_to_loongarch(int xcpt);
  36 void restore_fp_status(CPULoongArchState *env);
  37 #endif
  38
  39 #ifndef CONFIG_USER_ONLY
  40 enum {
  41     TLBRET_MATCH = 0,
  42     TLBRET_BADADDR = 1,
  43     TLBRET_NOMATCH = 2,
  44     TLBRET_INVALID = 3,
  45     TLBRET_DIRTY = 4,
  46     TLBRET_RI = 5,
  47     TLBRET_XI = 6,
  48     TLBRET_PE = 7,
  49 };
  50
  51 extern const VMStateDescription vmstate_loongarch_cpu;
  52
  53 void loongarch_cpu_set_irq(void *opaque, int irq, int level);
  54
  55 void loongarch_constant_timer_cb(void *opaque);
  56 uint64_t cpu_loongarch_get_constant_timer_counter(LoongArchCPU *cpu);
  57 uint64_t cpu_loongarch_get_constant_timer_ticks(LoongArchCPU *cpu);
  58 void cpu_loongarch_store_constant_timer_config(LoongArchCPU *cpu,
  59                                                uint64_t value);
  60 bool loongarch_tlb_search(CPULoongArchState *env, target_ulong vaddr,
  61                           int *index);
  62 int get_physical_address(CPULoongArchState *env, hwaddr *physical,
  63                          int *prot, target_ulong address,
  64                          MMUAccessType access_type, int mmu_idx);
  65 hwaddr loongarch_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
  66
  67 #ifdef CONFIG_TCG
  68 bool loongarch_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
  69                             MMUAccessType access_type, int mmu_idx,
  70                             bool probe, uintptr_t retaddr);
  71 #endif
  72 #endif /* !CONFIG_USER_ONLY */
  73
  74 uint64_t read_fcc(CPULoongArchState *env);
  75 void write_fcc(CPULoongArchState *env, uint64_t val);
  76
  77 int loongarch_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n);
  78 int loongarch_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n);
  79 void loongarch_cpu_register_gdb_regs_for_features(CPUState *cs);
  80
  81 #endif