x86: move acpi_dev from pc/microvm
[qemu/ar7.git] / include / hw / i386 / x86.h
blobf540e801a837df969ebc2076791109a226fcc6fb
1 /*
2 * Copyright (c) 2019 Red Hat, Inc.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2 or later, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
13 * You should have received a copy of the GNU General Public License along with
14 * this program. If not, see <http://www.gnu.org/licenses/>.
17 #ifndef HW_I386_X86_H
18 #define HW_I386_X86_H
20 #include "qemu-common.h"
21 #include "exec/hwaddr.h"
22 #include "qemu/notify.h"
24 #include "hw/i386/topology.h"
25 #include "hw/boards.h"
26 #include "hw/nmi.h"
27 #include "hw/isa/isa.h"
28 #include "hw/i386/ioapic.h"
29 #include "qom/object.h"
31 struct X86MachineClass {
32 /*< private >*/
33 MachineClass parent;
35 /*< public >*/
37 /* TSC rate migration: */
38 bool save_tsc_khz;
39 /* Enables contiguous-apic-ID mode */
40 bool compat_apic_id_mode;
42 typedef struct X86MachineClass X86MachineClass;
44 struct X86MachineState {
45 /*< private >*/
46 MachineState parent;
48 /*< public >*/
50 /* Pointers to devices and objects: */
51 ISADevice *rtc;
52 FWCfgState *fw_cfg;
53 qemu_irq *gsi;
54 GMappedFile *initrd_mapped_file;
55 HotplugHandler *acpi_dev;
57 /* RAM information (sizes, addresses, configuration): */
58 ram_addr_t below_4g_mem_size, above_4g_mem_size;
60 /* CPU and apic information: */
61 bool apic_xrupt_override;
62 unsigned apic_id_limit;
63 uint16_t boot_cpus;
64 unsigned smp_dies;
66 OnOffAuto smm;
67 OnOffAuto acpi;
70 * Address space used by IOAPIC device. All IOAPIC interrupts
71 * will be translated to MSI messages in the address space.
73 AddressSpace *ioapic_as;
75 typedef struct X86MachineState X86MachineState;
77 #define X86_MACHINE_SMM "smm"
78 #define X86_MACHINE_ACPI "acpi"
80 #define TYPE_X86_MACHINE MACHINE_TYPE_NAME("x86")
81 DECLARE_OBJ_CHECKERS(X86MachineState, X86MachineClass,
82 X86_MACHINE, TYPE_X86_MACHINE)
84 void init_topo_info(X86CPUTopoInfo *topo_info, const X86MachineState *x86ms);
86 uint32_t x86_cpu_apic_id_from_index(X86MachineState *pcms,
87 unsigned int cpu_index);
89 void x86_cpu_new(X86MachineState *pcms, int64_t apic_id, Error **errp);
90 void x86_cpus_init(X86MachineState *pcms, int default_cpu_version);
91 CpuInstanceProperties x86_cpu_index_to_props(MachineState *ms,
92 unsigned cpu_index);
93 int64_t x86_get_default_cpu_node_id(const MachineState *ms, int idx);
94 const CPUArchIdList *x86_possible_cpu_arch_ids(MachineState *ms);
96 void x86_bios_rom_init(MemoryRegion *rom_memory, bool isapc_ram_fw);
98 void x86_load_linux(X86MachineState *x86ms,
99 FWCfgState *fw_cfg,
100 int acpi_data_size,
101 bool pvh_enabled,
102 bool linuxboot_dma_enabled);
104 bool x86_machine_is_smm_enabled(const X86MachineState *x86ms);
105 bool x86_machine_is_acpi_enabled(const X86MachineState *x86ms);
107 /* Global System Interrupts */
109 #define GSI_NUM_PINS IOAPIC_NUM_PINS
111 typedef struct GSIState {
112 qemu_irq i8259_irq[ISA_NUM_IRQS];
113 qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
114 } GSIState;
116 qemu_irq x86_allocate_cpu_irq(void);
117 void gsi_handler(void *opaque, int n, int level);
118 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name);
120 /* hpet.c */
121 extern int no_hpet;
123 #endif