2 * QEMU PC System Emulator
4 * Copyright (c) 2003-2004 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 #include "qemu/osdep.h"
26 #include "qemu/units.h"
27 #include "hw/i386/x86.h"
28 #include "hw/i386/pc.h"
29 #include "hw/char/serial.h"
30 #include "hw/char/parallel.h"
31 #include "hw/i386/apic.h"
32 #include "hw/i386/topology.h"
33 #include "hw/i386/fw_cfg.h"
34 #include "hw/i386/vmport.h"
35 #include "sysemu/cpus.h"
36 #include "hw/block/fdc.h"
38 #include "hw/pci/pci.h"
39 #include "hw/pci/pci_bus.h"
40 #include "hw/nvram/fw_cfg.h"
41 #include "hw/timer/hpet.h"
42 #include "hw/firmware/smbios.h"
43 #include "hw/loader.h"
45 #include "migration/vmstate.h"
46 #include "multiboot.h"
47 #include "hw/rtc/mc146818rtc.h"
48 #include "hw/intc/i8259.h"
49 #include "hw/dma/i8257.h"
50 #include "hw/timer/i8254.h"
51 #include "hw/input/i8042.h"
53 #include "hw/audio/pcspk.h"
54 #include "hw/pci/msi.h"
55 #include "hw/sysbus.h"
56 #include "sysemu/sysemu.h"
57 #include "sysemu/tcg.h"
58 #include "sysemu/numa.h"
59 #include "sysemu/kvm.h"
60 #include "sysemu/xen.h"
61 #include "sysemu/qtest.h"
62 #include "sysemu/reset.h"
63 #include "sysemu/runstate.h"
65 #include "hw/xen/xen.h"
66 #include "hw/xen/start_info.h"
67 #include "ui/qemu-spice.h"
68 #include "exec/memory.h"
69 #include "exec/address-spaces.h"
70 #include "sysemu/arch_init.h"
71 #include "qemu/bitmap.h"
72 #include "qemu/config-file.h"
73 #include "qemu/error-report.h"
74 #include "qemu/option.h"
75 #include "qemu/cutils.h"
76 #include "hw/acpi/acpi.h"
77 #include "hw/acpi/cpu_hotplug.h"
78 #include "hw/boards.h"
79 #include "acpi-build.h"
80 #include "hw/mem/pc-dimm.h"
81 #include "hw/mem/nvdimm.h"
82 #include "qapi/error.h"
83 #include "qapi/qapi-visit-common.h"
84 #include "qapi/visitor.h"
85 #include "hw/core/cpu.h"
87 #include "hw/i386/intel_iommu.h"
88 #include "hw/net/ne2000-isa.h"
89 #include "standard-headers/asm-x86/bootparam.h"
90 #include "hw/virtio/virtio-pmem-pci.h"
91 #include "hw/virtio/virtio-mem-pci.h"
92 #include "hw/mem/memory-device.h"
93 #include "sysemu/replay.h"
94 #include "qapi/qmp/qerror.h"
95 #include "e820_memory_layout.h"
98 #include CONFIG_DEVICES
100 GlobalProperty pc_compat_5_1
[] = {};
101 const size_t pc_compat_5_1_len
= G_N_ELEMENTS(pc_compat_5_1
);
103 GlobalProperty pc_compat_5_0
[] = {
105 const size_t pc_compat_5_0_len
= G_N_ELEMENTS(pc_compat_5_0
);
107 GlobalProperty pc_compat_4_2
[] = {
108 { "mch", "smbase-smram", "off" },
110 const size_t pc_compat_4_2_len
= G_N_ELEMENTS(pc_compat_4_2
);
112 GlobalProperty pc_compat_4_1
[] = {};
113 const size_t pc_compat_4_1_len
= G_N_ELEMENTS(pc_compat_4_1
);
115 GlobalProperty pc_compat_4_0
[] = {};
116 const size_t pc_compat_4_0_len
= G_N_ELEMENTS(pc_compat_4_0
);
118 GlobalProperty pc_compat_3_1
[] = {
119 { "intel-iommu", "dma-drain", "off" },
120 { "Opteron_G3" "-" TYPE_X86_CPU
, "rdtscp", "off" },
121 { "Opteron_G4" "-" TYPE_X86_CPU
, "rdtscp", "off" },
122 { "Opteron_G4" "-" TYPE_X86_CPU
, "npt", "off" },
123 { "Opteron_G4" "-" TYPE_X86_CPU
, "nrip-save", "off" },
124 { "Opteron_G5" "-" TYPE_X86_CPU
, "rdtscp", "off" },
125 { "Opteron_G5" "-" TYPE_X86_CPU
, "npt", "off" },
126 { "Opteron_G5" "-" TYPE_X86_CPU
, "nrip-save", "off" },
127 { "EPYC" "-" TYPE_X86_CPU
, "npt", "off" },
128 { "EPYC" "-" TYPE_X86_CPU
, "nrip-save", "off" },
129 { "EPYC-IBPB" "-" TYPE_X86_CPU
, "npt", "off" },
130 { "EPYC-IBPB" "-" TYPE_X86_CPU
, "nrip-save", "off" },
131 { "Skylake-Client" "-" TYPE_X86_CPU
, "mpx", "on" },
132 { "Skylake-Client-IBRS" "-" TYPE_X86_CPU
, "mpx", "on" },
133 { "Skylake-Server" "-" TYPE_X86_CPU
, "mpx", "on" },
134 { "Skylake-Server-IBRS" "-" TYPE_X86_CPU
, "mpx", "on" },
135 { "Cascadelake-Server" "-" TYPE_X86_CPU
, "mpx", "on" },
136 { "Icelake-Client" "-" TYPE_X86_CPU
, "mpx", "on" },
137 { "Icelake-Server" "-" TYPE_X86_CPU
, "mpx", "on" },
138 { "Cascadelake-Server" "-" TYPE_X86_CPU
, "stepping", "5" },
139 { TYPE_X86_CPU
, "x-intel-pt-auto-level", "off" },
141 const size_t pc_compat_3_1_len
= G_N_ELEMENTS(pc_compat_3_1
);
143 GlobalProperty pc_compat_3_0
[] = {
144 { TYPE_X86_CPU
, "x-hv-synic-kvm-only", "on" },
145 { "Skylake-Server" "-" TYPE_X86_CPU
, "pku", "off" },
146 { "Skylake-Server-IBRS" "-" TYPE_X86_CPU
, "pku", "off" },
148 const size_t pc_compat_3_0_len
= G_N_ELEMENTS(pc_compat_3_0
);
150 GlobalProperty pc_compat_2_12
[] = {
151 { TYPE_X86_CPU
, "legacy-cache", "on" },
152 { TYPE_X86_CPU
, "topoext", "off" },
153 { "EPYC-" TYPE_X86_CPU
, "xlevel", "0x8000000a" },
154 { "EPYC-IBPB-" TYPE_X86_CPU
, "xlevel", "0x8000000a" },
156 const size_t pc_compat_2_12_len
= G_N_ELEMENTS(pc_compat_2_12
);
158 GlobalProperty pc_compat_2_11
[] = {
159 { TYPE_X86_CPU
, "x-migrate-smi-count", "off" },
160 { "Skylake-Server" "-" TYPE_X86_CPU
, "clflushopt", "off" },
162 const size_t pc_compat_2_11_len
= G_N_ELEMENTS(pc_compat_2_11
);
164 GlobalProperty pc_compat_2_10
[] = {
165 { TYPE_X86_CPU
, "x-hv-max-vps", "0x40" },
166 { "i440FX-pcihost", "x-pci-hole64-fix", "off" },
167 { "q35-pcihost", "x-pci-hole64-fix", "off" },
169 const size_t pc_compat_2_10_len
= G_N_ELEMENTS(pc_compat_2_10
);
171 GlobalProperty pc_compat_2_9
[] = {
172 { "mch", "extended-tseg-mbytes", "0" },
174 const size_t pc_compat_2_9_len
= G_N_ELEMENTS(pc_compat_2_9
);
176 GlobalProperty pc_compat_2_8
[] = {
177 { TYPE_X86_CPU
, "tcg-cpuid", "off" },
178 { "kvmclock", "x-mach-use-reliable-get-clock", "off" },
179 { "ICH9-LPC", "x-smi-broadcast", "off" },
180 { TYPE_X86_CPU
, "vmware-cpuid-freq", "off" },
181 { "Haswell-" TYPE_X86_CPU
, "stepping", "1" },
183 const size_t pc_compat_2_8_len
= G_N_ELEMENTS(pc_compat_2_8
);
185 GlobalProperty pc_compat_2_7
[] = {
186 { TYPE_X86_CPU
, "l3-cache", "off" },
187 { TYPE_X86_CPU
, "full-cpuid-auto-level", "off" },
188 { "Opteron_G3" "-" TYPE_X86_CPU
, "family", "15" },
189 { "Opteron_G3" "-" TYPE_X86_CPU
, "model", "6" },
190 { "Opteron_G3" "-" TYPE_X86_CPU
, "stepping", "1" },
191 { "isa-pcspk", "migrate", "off" },
193 const size_t pc_compat_2_7_len
= G_N_ELEMENTS(pc_compat_2_7
);
195 GlobalProperty pc_compat_2_6
[] = {
196 { TYPE_X86_CPU
, "cpuid-0xb", "off" },
197 { "vmxnet3", "romfile", "" },
198 { TYPE_X86_CPU
, "fill-mtrr-mask", "off" },
199 { "apic-common", "legacy-instance-id", "on", }
201 const size_t pc_compat_2_6_len
= G_N_ELEMENTS(pc_compat_2_6
);
203 GlobalProperty pc_compat_2_5
[] = {};
204 const size_t pc_compat_2_5_len
= G_N_ELEMENTS(pc_compat_2_5
);
206 GlobalProperty pc_compat_2_4
[] = {
207 PC_CPU_MODEL_IDS("2.4.0")
208 { "Haswell-" TYPE_X86_CPU
, "abm", "off" },
209 { "Haswell-noTSX-" TYPE_X86_CPU
, "abm", "off" },
210 { "Broadwell-" TYPE_X86_CPU
, "abm", "off" },
211 { "Broadwell-noTSX-" TYPE_X86_CPU
, "abm", "off" },
212 { "host" "-" TYPE_X86_CPU
, "host-cache-info", "on" },
213 { TYPE_X86_CPU
, "check", "off" },
214 { "qemu64" "-" TYPE_X86_CPU
, "sse4a", "on" },
215 { "qemu64" "-" TYPE_X86_CPU
, "abm", "on" },
216 { "qemu64" "-" TYPE_X86_CPU
, "popcnt", "on" },
217 { "qemu32" "-" TYPE_X86_CPU
, "popcnt", "on" },
218 { "Opteron_G2" "-" TYPE_X86_CPU
, "rdtscp", "on" },
219 { "Opteron_G3" "-" TYPE_X86_CPU
, "rdtscp", "on" },
220 { "Opteron_G4" "-" TYPE_X86_CPU
, "rdtscp", "on" },
221 { "Opteron_G5" "-" TYPE_X86_CPU
, "rdtscp", "on", }
223 const size_t pc_compat_2_4_len
= G_N_ELEMENTS(pc_compat_2_4
);
225 GlobalProperty pc_compat_2_3
[] = {
226 PC_CPU_MODEL_IDS("2.3.0")
227 { TYPE_X86_CPU
, "arat", "off" },
228 { "qemu64" "-" TYPE_X86_CPU
, "min-level", "4" },
229 { "kvm64" "-" TYPE_X86_CPU
, "min-level", "5" },
230 { "pentium3" "-" TYPE_X86_CPU
, "min-level", "2" },
231 { "n270" "-" TYPE_X86_CPU
, "min-level", "5" },
232 { "Conroe" "-" TYPE_X86_CPU
, "min-level", "4" },
233 { "Penryn" "-" TYPE_X86_CPU
, "min-level", "4" },
234 { "Nehalem" "-" TYPE_X86_CPU
, "min-level", "4" },
235 { "n270" "-" TYPE_X86_CPU
, "min-xlevel", "0x8000000a" },
236 { "Penryn" "-" TYPE_X86_CPU
, "min-xlevel", "0x8000000a" },
237 { "Conroe" "-" TYPE_X86_CPU
, "min-xlevel", "0x8000000a" },
238 { "Nehalem" "-" TYPE_X86_CPU
, "min-xlevel", "0x8000000a" },
239 { "Westmere" "-" TYPE_X86_CPU
, "min-xlevel", "0x8000000a" },
240 { "SandyBridge" "-" TYPE_X86_CPU
, "min-xlevel", "0x8000000a" },
241 { "IvyBridge" "-" TYPE_X86_CPU
, "min-xlevel", "0x8000000a" },
242 { "Haswell" "-" TYPE_X86_CPU
, "min-xlevel", "0x8000000a" },
243 { "Haswell-noTSX" "-" TYPE_X86_CPU
, "min-xlevel", "0x8000000a" },
244 { "Broadwell" "-" TYPE_X86_CPU
, "min-xlevel", "0x8000000a" },
245 { "Broadwell-noTSX" "-" TYPE_X86_CPU
, "min-xlevel", "0x8000000a" },
246 { TYPE_X86_CPU
, "kvm-no-smi-migration", "on" },
248 const size_t pc_compat_2_3_len
= G_N_ELEMENTS(pc_compat_2_3
);
250 GlobalProperty pc_compat_2_2
[] = {
251 PC_CPU_MODEL_IDS("2.2.0")
252 { "kvm64" "-" TYPE_X86_CPU
, "vme", "off" },
253 { "kvm32" "-" TYPE_X86_CPU
, "vme", "off" },
254 { "Conroe" "-" TYPE_X86_CPU
, "vme", "off" },
255 { "Penryn" "-" TYPE_X86_CPU
, "vme", "off" },
256 { "Nehalem" "-" TYPE_X86_CPU
, "vme", "off" },
257 { "Westmere" "-" TYPE_X86_CPU
, "vme", "off" },
258 { "SandyBridge" "-" TYPE_X86_CPU
, "vme", "off" },
259 { "Haswell" "-" TYPE_X86_CPU
, "vme", "off" },
260 { "Broadwell" "-" TYPE_X86_CPU
, "vme", "off" },
261 { "Opteron_G1" "-" TYPE_X86_CPU
, "vme", "off" },
262 { "Opteron_G2" "-" TYPE_X86_CPU
, "vme", "off" },
263 { "Opteron_G3" "-" TYPE_X86_CPU
, "vme", "off" },
264 { "Opteron_G4" "-" TYPE_X86_CPU
, "vme", "off" },
265 { "Opteron_G5" "-" TYPE_X86_CPU
, "vme", "off" },
266 { "Haswell" "-" TYPE_X86_CPU
, "f16c", "off" },
267 { "Haswell" "-" TYPE_X86_CPU
, "rdrand", "off" },
268 { "Broadwell" "-" TYPE_X86_CPU
, "f16c", "off" },
269 { "Broadwell" "-" TYPE_X86_CPU
, "rdrand", "off" },
271 const size_t pc_compat_2_2_len
= G_N_ELEMENTS(pc_compat_2_2
);
273 GlobalProperty pc_compat_2_1
[] = {
274 PC_CPU_MODEL_IDS("2.1.0")
275 { "coreduo" "-" TYPE_X86_CPU
, "vmx", "on" },
276 { "core2duo" "-" TYPE_X86_CPU
, "vmx", "on" },
278 const size_t pc_compat_2_1_len
= G_N_ELEMENTS(pc_compat_2_1
);
280 GlobalProperty pc_compat_2_0
[] = {
281 PC_CPU_MODEL_IDS("2.0.0")
282 { "virtio-scsi-pci", "any_layout", "off" },
283 { "PIIX4_PM", "memory-hotplug-support", "off" },
284 { "apic", "version", "0x11" },
285 { "nec-usb-xhci", "superspeed-ports-first", "off" },
286 { "nec-usb-xhci", "force-pcie-endcap", "on" },
287 { "pci-serial", "prog_if", "0" },
288 { "pci-serial-2x", "prog_if", "0" },
289 { "pci-serial-4x", "prog_if", "0" },
290 { "virtio-net-pci", "guest_announce", "off" },
291 { "ICH9-LPC", "memory-hotplug-support", "off" },
292 { "xio3130-downstream", COMPAT_PROP_PCP
, "off" },
293 { "ioh3420", COMPAT_PROP_PCP
, "off" },
295 const size_t pc_compat_2_0_len
= G_N_ELEMENTS(pc_compat_2_0
);
297 GlobalProperty pc_compat_1_7
[] = {
298 PC_CPU_MODEL_IDS("1.7.0")
299 { TYPE_USB_DEVICE
, "msos-desc", "no" },
300 { "PIIX4_PM", "acpi-pci-hotplug-with-bridge-support", "off" },
301 { "hpet", HPET_INTCAP
, "4" },
303 const size_t pc_compat_1_7_len
= G_N_ELEMENTS(pc_compat_1_7
);
305 GlobalProperty pc_compat_1_6
[] = {
306 PC_CPU_MODEL_IDS("1.6.0")
307 { "e1000", "mitigation", "off" },
308 { "qemu64-" TYPE_X86_CPU
, "model", "2" },
309 { "qemu32-" TYPE_X86_CPU
, "model", "3" },
310 { "i440FX-pcihost", "short_root_bus", "1" },
311 { "q35-pcihost", "short_root_bus", "1" },
313 const size_t pc_compat_1_6_len
= G_N_ELEMENTS(pc_compat_1_6
);
315 GlobalProperty pc_compat_1_5
[] = {
316 PC_CPU_MODEL_IDS("1.5.0")
317 { "Conroe-" TYPE_X86_CPU
, "model", "2" },
318 { "Conroe-" TYPE_X86_CPU
, "min-level", "2" },
319 { "Penryn-" TYPE_X86_CPU
, "model", "2" },
320 { "Penryn-" TYPE_X86_CPU
, "min-level", "2" },
321 { "Nehalem-" TYPE_X86_CPU
, "model", "2" },
322 { "Nehalem-" TYPE_X86_CPU
, "min-level", "2" },
323 { "virtio-net-pci", "any_layout", "off" },
324 { TYPE_X86_CPU
, "pmu", "on" },
325 { "i440FX-pcihost", "short_root_bus", "0" },
326 { "q35-pcihost", "short_root_bus", "0" },
328 const size_t pc_compat_1_5_len
= G_N_ELEMENTS(pc_compat_1_5
);
330 GlobalProperty pc_compat_1_4
[] = {
331 PC_CPU_MODEL_IDS("1.4.0")
332 { "scsi-hd", "discard_granularity", "0" },
333 { "scsi-cd", "discard_granularity", "0" },
334 { "scsi-disk", "discard_granularity", "0" },
335 { "ide-hd", "discard_granularity", "0" },
336 { "ide-cd", "discard_granularity", "0" },
337 { "ide-drive", "discard_granularity", "0" },
338 { "virtio-blk-pci", "discard_granularity", "0" },
339 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string: */
340 { "virtio-serial-pci", "vectors", "0xFFFFFFFF" },
341 { "virtio-net-pci", "ctrl_guest_offloads", "off" },
342 { "e1000", "romfile", "pxe-e1000.rom" },
343 { "ne2k_pci", "romfile", "pxe-ne2k_pci.rom" },
344 { "pcnet", "romfile", "pxe-pcnet.rom" },
345 { "rtl8139", "romfile", "pxe-rtl8139.rom" },
346 { "virtio-net-pci", "romfile", "pxe-virtio.rom" },
347 { "486-" TYPE_X86_CPU
, "model", "0" },
348 { "n270" "-" TYPE_X86_CPU
, "movbe", "off" },
349 { "Westmere" "-" TYPE_X86_CPU
, "pclmulqdq", "off" },
351 const size_t pc_compat_1_4_len
= G_N_ELEMENTS(pc_compat_1_4
);
353 GSIState
*pc_gsi_create(qemu_irq
**irqs
, bool pci_enabled
)
357 s
= g_new0(GSIState
, 1);
358 if (kvm_ioapic_in_kernel()) {
359 kvm_pc_setup_irq_routing(pci_enabled
);
361 *irqs
= qemu_allocate_irqs(gsi_handler
, s
, GSI_NUM_PINS
);
366 static void ioport80_write(void *opaque
, hwaddr addr
, uint64_t data
,
371 static uint64_t ioport80_read(void *opaque
, hwaddr addr
, unsigned size
)
373 return 0xffffffffffffffffULL
;
376 /* MSDOS compatibility mode FPU exception support */
377 static void ioportF0_write(void *opaque
, hwaddr addr
, uint64_t data
,
385 static uint64_t ioportF0_read(void *opaque
, hwaddr addr
, unsigned size
)
387 return 0xffffffffffffffffULL
;
390 /* PC cmos mappings */
392 #define REG_EQUIPMENT_BYTE 0x14
394 static void cmos_init_hd(ISADevice
*s
, int type_ofs
, int info_ofs
,
395 int16_t cylinders
, int8_t heads
, int8_t sectors
)
397 rtc_set_memory(s
, type_ofs
, 47);
398 rtc_set_memory(s
, info_ofs
, cylinders
);
399 rtc_set_memory(s
, info_ofs
+ 1, cylinders
>> 8);
400 rtc_set_memory(s
, info_ofs
+ 2, heads
);
401 rtc_set_memory(s
, info_ofs
+ 3, 0xff);
402 rtc_set_memory(s
, info_ofs
+ 4, 0xff);
403 rtc_set_memory(s
, info_ofs
+ 5, 0xc0 | ((heads
> 8) << 3));
404 rtc_set_memory(s
, info_ofs
+ 6, cylinders
);
405 rtc_set_memory(s
, info_ofs
+ 7, cylinders
>> 8);
406 rtc_set_memory(s
, info_ofs
+ 8, sectors
);
409 /* convert boot_device letter to something recognizable by the bios */
410 static int boot_device2nibble(char boot_device
)
412 switch(boot_device
) {
415 return 0x01; /* floppy boot */
417 return 0x02; /* hard drive boot */
419 return 0x03; /* CD-ROM boot */
421 return 0x04; /* Network boot */
426 static void set_boot_dev(ISADevice
*s
, const char *boot_device
, Error
**errp
)
428 #define PC_MAX_BOOT_DEVICES 3
429 int nbds
, bds
[3] = { 0, };
432 nbds
= strlen(boot_device
);
433 if (nbds
> PC_MAX_BOOT_DEVICES
) {
434 error_setg(errp
, "Too many boot devices for PC");
437 for (i
= 0; i
< nbds
; i
++) {
438 bds
[i
] = boot_device2nibble(boot_device
[i
]);
440 error_setg(errp
, "Invalid boot device for PC: '%c'",
445 rtc_set_memory(s
, 0x3d, (bds
[1] << 4) | bds
[0]);
446 rtc_set_memory(s
, 0x38, (bds
[2] << 4) | (fd_bootchk
? 0x0 : 0x1));
449 static void pc_boot_set(void *opaque
, const char *boot_device
, Error
**errp
)
451 set_boot_dev(opaque
, boot_device
, errp
);
454 static void pc_cmos_init_floppy(ISADevice
*rtc_state
, ISADevice
*floppy
)
457 FloppyDriveType fd_type
[2] = { FLOPPY_DRIVE_TYPE_NONE
,
458 FLOPPY_DRIVE_TYPE_NONE
};
462 for (i
= 0; i
< 2; i
++) {
463 fd_type
[i
] = isa_fdc_get_drive_type(floppy
, i
);
466 val
= (cmos_get_fd_drive_type(fd_type
[0]) << 4) |
467 cmos_get_fd_drive_type(fd_type
[1]);
468 rtc_set_memory(rtc_state
, 0x10, val
);
470 val
= rtc_get_memory(rtc_state
, REG_EQUIPMENT_BYTE
);
472 if (fd_type
[0] != FLOPPY_DRIVE_TYPE_NONE
) {
475 if (fd_type
[1] != FLOPPY_DRIVE_TYPE_NONE
) {
482 val
|= 0x01; /* 1 drive, ready for boot */
485 val
|= 0x41; /* 2 drives, ready for boot */
488 rtc_set_memory(rtc_state
, REG_EQUIPMENT_BYTE
, val
);
491 typedef struct pc_cmos_init_late_arg
{
492 ISADevice
*rtc_state
;
494 } pc_cmos_init_late_arg
;
496 typedef struct check_fdc_state
{
501 static int check_fdc(Object
*obj
, void *opaque
)
503 CheckFdcState
*state
= opaque
;
506 Error
*local_err
= NULL
;
508 fdc
= object_dynamic_cast(obj
, TYPE_ISA_FDC
);
513 iobase
= object_property_get_uint(obj
, "iobase", &local_err
);
514 if (local_err
|| iobase
!= 0x3f0) {
515 error_free(local_err
);
520 state
->multiple
= true;
522 state
->floppy
= ISA_DEVICE(obj
);
527 static const char * const fdc_container_path
[] = {
528 "/unattached", "/peripheral", "/peripheral-anon"
532 * Locate the FDC at IO address 0x3f0, in order to configure the CMOS registers
535 ISADevice
*pc_find_fdc0(void)
539 CheckFdcState state
= { 0 };
541 for (i
= 0; i
< ARRAY_SIZE(fdc_container_path
); i
++) {
542 container
= container_get(qdev_get_machine(), fdc_container_path
[i
]);
543 object_child_foreach(container
, check_fdc
, &state
);
546 if (state
.multiple
) {
547 warn_report("multiple floppy disk controllers with "
548 "iobase=0x3f0 have been found");
549 error_printf("the one being picked for CMOS setup might not reflect "
556 static void pc_cmos_init_late(void *opaque
)
558 pc_cmos_init_late_arg
*arg
= opaque
;
559 ISADevice
*s
= arg
->rtc_state
;
561 int8_t heads
, sectors
;
566 if (arg
->idebus
[0] && ide_get_geometry(arg
->idebus
[0], 0,
567 &cylinders
, &heads
, §ors
) >= 0) {
568 cmos_init_hd(s
, 0x19, 0x1b, cylinders
, heads
, sectors
);
571 if (arg
->idebus
[0] && ide_get_geometry(arg
->idebus
[0], 1,
572 &cylinders
, &heads
, §ors
) >= 0) {
573 cmos_init_hd(s
, 0x1a, 0x24, cylinders
, heads
, sectors
);
576 rtc_set_memory(s
, 0x12, val
);
579 for (i
= 0; i
< 4; i
++) {
580 /* NOTE: ide_get_geometry() returns the physical
581 geometry. It is always such that: 1 <= sects <= 63, 1
582 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
583 geometry can be different if a translation is done. */
584 if (arg
->idebus
[i
/ 2] &&
585 ide_get_geometry(arg
->idebus
[i
/ 2], i
% 2,
586 &cylinders
, &heads
, §ors
) >= 0) {
587 trans
= ide_get_bios_chs_trans(arg
->idebus
[i
/ 2], i
% 2) - 1;
588 assert((trans
& ~3) == 0);
589 val
|= trans
<< (i
* 2);
592 rtc_set_memory(s
, 0x39, val
);
594 pc_cmos_init_floppy(s
, pc_find_fdc0());
596 qemu_unregister_reset(pc_cmos_init_late
, opaque
);
599 void pc_cmos_init(PCMachineState
*pcms
,
600 BusState
*idebus0
, BusState
*idebus1
,
604 static pc_cmos_init_late_arg arg
;
605 X86MachineState
*x86ms
= X86_MACHINE(pcms
);
607 /* various important CMOS locations needed by PC/Bochs bios */
610 /* base memory (first MiB) */
611 val
= MIN(x86ms
->below_4g_mem_size
/ KiB
, 640);
612 rtc_set_memory(s
, 0x15, val
);
613 rtc_set_memory(s
, 0x16, val
>> 8);
614 /* extended memory (next 64MiB) */
615 if (x86ms
->below_4g_mem_size
> 1 * MiB
) {
616 val
= (x86ms
->below_4g_mem_size
- 1 * MiB
) / KiB
;
622 rtc_set_memory(s
, 0x17, val
);
623 rtc_set_memory(s
, 0x18, val
>> 8);
624 rtc_set_memory(s
, 0x30, val
);
625 rtc_set_memory(s
, 0x31, val
>> 8);
626 /* memory between 16MiB and 4GiB */
627 if (x86ms
->below_4g_mem_size
> 16 * MiB
) {
628 val
= (x86ms
->below_4g_mem_size
- 16 * MiB
) / (64 * KiB
);
634 rtc_set_memory(s
, 0x34, val
);
635 rtc_set_memory(s
, 0x35, val
>> 8);
636 /* memory above 4GiB */
637 val
= x86ms
->above_4g_mem_size
/ 65536;
638 rtc_set_memory(s
, 0x5b, val
);
639 rtc_set_memory(s
, 0x5c, val
>> 8);
640 rtc_set_memory(s
, 0x5d, val
>> 16);
642 object_property_add_link(OBJECT(pcms
), "rtc_state",
644 (Object
**)&x86ms
->rtc
,
645 object_property_allow_set_link
,
646 OBJ_PROP_LINK_STRONG
);
647 object_property_set_link(OBJECT(pcms
), "rtc_state", OBJECT(s
),
650 set_boot_dev(s
, MACHINE(pcms
)->boot_order
, &error_fatal
);
653 val
|= 0x02; /* FPU is there */
654 val
|= 0x04; /* PS/2 mouse installed */
655 rtc_set_memory(s
, REG_EQUIPMENT_BYTE
, val
);
657 /* hard drives and FDC */
659 arg
.idebus
[0] = idebus0
;
660 arg
.idebus
[1] = idebus1
;
661 qemu_register_reset(pc_cmos_init_late
, &arg
);
664 static void handle_a20_line_change(void *opaque
, int irq
, int level
)
666 X86CPU
*cpu
= opaque
;
668 /* XXX: send to all CPUs ? */
669 /* XXX: add logic to handle multiple A20 line sources */
670 x86_cpu_set_a20(cpu
, level
);
673 #define NE2000_NB_MAX 6
675 static const int ne2000_io
[NE2000_NB_MAX
] = { 0x300, 0x320, 0x340, 0x360,
677 static const int ne2000_irq
[NE2000_NB_MAX
] = { 9, 10, 11, 3, 4, 5 };
679 void pc_init_ne2k_isa(ISABus
*bus
, NICInfo
*nd
)
681 static int nb_ne2k
= 0;
683 if (nb_ne2k
== NE2000_NB_MAX
)
685 isa_ne2000_init(bus
, ne2000_io
[nb_ne2k
],
686 ne2000_irq
[nb_ne2k
], nd
);
690 void pc_acpi_smi_interrupt(void *opaque
, int irq
, int level
)
692 X86CPU
*cpu
= opaque
;
695 cpu_interrupt(CPU(cpu
), CPU_INTERRUPT_SMI
);
700 * This function is very similar to smp_parse()
701 * in hw/core/machine.c but includes CPU die support.
703 void pc_smp_parse(MachineState
*ms
, QemuOpts
*opts
)
705 X86MachineState
*x86ms
= X86_MACHINE(ms
);
708 unsigned cpus
= qemu_opt_get_number(opts
, "cpus", 0);
709 unsigned sockets
= qemu_opt_get_number(opts
, "sockets", 0);
710 unsigned dies
= qemu_opt_get_number(opts
, "dies", 1);
711 unsigned cores
= qemu_opt_get_number(opts
, "cores", 0);
712 unsigned threads
= qemu_opt_get_number(opts
, "threads", 0);
714 /* compute missing values, prefer sockets over cores over threads */
715 if (cpus
== 0 || sockets
== 0) {
716 cores
= cores
> 0 ? cores
: 1;
717 threads
= threads
> 0 ? threads
: 1;
719 sockets
= sockets
> 0 ? sockets
: 1;
720 cpus
= cores
* threads
* dies
* sockets
;
723 qemu_opt_get_number(opts
, "maxcpus", cpus
);
724 sockets
= ms
->smp
.max_cpus
/ (cores
* threads
* dies
);
726 } else if (cores
== 0) {
727 threads
= threads
> 0 ? threads
: 1;
728 cores
= cpus
/ (sockets
* dies
* threads
);
729 cores
= cores
> 0 ? cores
: 1;
730 } else if (threads
== 0) {
731 threads
= cpus
/ (cores
* dies
* sockets
);
732 threads
= threads
> 0 ? threads
: 1;
733 } else if (sockets
* dies
* cores
* threads
< cpus
) {
734 error_report("cpu topology: "
735 "sockets (%u) * dies (%u) * cores (%u) * threads (%u) < "
737 sockets
, dies
, cores
, threads
, cpus
);
742 qemu_opt_get_number(opts
, "maxcpus", cpus
);
744 if (ms
->smp
.max_cpus
< cpus
) {
745 error_report("maxcpus must be equal to or greater than smp");
749 if (sockets
* dies
* cores
* threads
> ms
->smp
.max_cpus
) {
750 error_report("cpu topology: "
751 "sockets (%u) * dies (%u) * cores (%u) * threads (%u) > "
753 sockets
, dies
, cores
, threads
,
758 if (sockets
* dies
* cores
* threads
!= ms
->smp
.max_cpus
) {
759 warn_report("Invalid CPU topology deprecated: "
760 "sockets (%u) * dies (%u) * cores (%u) * threads (%u) "
762 sockets
, dies
, cores
, threads
,
767 ms
->smp
.cores
= cores
;
768 ms
->smp
.threads
= threads
;
769 ms
->smp
.sockets
= sockets
;
770 x86ms
->smp_dies
= dies
;
773 if (ms
->smp
.cpus
> 1) {
774 Error
*blocker
= NULL
;
775 error_setg(&blocker
, QERR_REPLAY_NOT_SUPPORTED
, "smp");
776 replay_add_blocker(blocker
);
780 void pc_hot_add_cpu(MachineState
*ms
, const int64_t id
, Error
**errp
)
782 X86MachineState
*x86ms
= X86_MACHINE(ms
);
783 int64_t apic_id
= x86_cpu_apic_id_from_index(x86ms
, id
);
784 Error
*local_err
= NULL
;
787 error_setg(errp
, "Invalid CPU id: %" PRIi64
, id
);
791 if (apic_id
>= ACPI_CPU_HOTPLUG_ID_LIMIT
) {
792 error_setg(errp
, "Unable to add CPU: %" PRIi64
793 ", resulting APIC ID (%" PRIi64
") is too large",
799 x86_cpu_new(X86_MACHINE(ms
), apic_id
, &local_err
);
801 error_propagate(errp
, local_err
);
806 static void rtc_set_cpus_count(ISADevice
*rtc
, uint16_t cpus_count
)
808 if (cpus_count
> 0xff) {
809 /* If the number of CPUs can't be represented in 8 bits, the
810 * BIOS must use "FW_CFG_NB_CPUS". Set RTC field to 0 just
811 * to make old BIOSes fail more predictably.
813 rtc_set_memory(rtc
, 0x5f, 0);
815 rtc_set_memory(rtc
, 0x5f, cpus_count
- 1);
820 void pc_machine_done(Notifier
*notifier
, void *data
)
822 PCMachineState
*pcms
= container_of(notifier
,
823 PCMachineState
, machine_done
);
824 X86MachineState
*x86ms
= X86_MACHINE(pcms
);
825 PCIBus
*bus
= pcms
->bus
;
827 /* set the number of CPUs */
828 rtc_set_cpus_count(x86ms
->rtc
, x86ms
->boot_cpus
);
833 QLIST_FOREACH(bus
, &bus
->child
, sibling
) {
834 /* look for expander root buses */
835 if (pci_bus_is_root(bus
)) {
839 if (extra_hosts
&& x86ms
->fw_cfg
) {
840 uint64_t *val
= g_malloc(sizeof(*val
));
841 *val
= cpu_to_le64(extra_hosts
);
842 fw_cfg_add_file(x86ms
->fw_cfg
,
843 "etc/extra-pci-roots", val
, sizeof(*val
));
849 fw_cfg_build_smbios(MACHINE(pcms
), x86ms
->fw_cfg
);
850 fw_cfg_build_feature_control(MACHINE(pcms
), x86ms
->fw_cfg
);
851 /* update FW_CFG_NB_CPUS to account for -device added CPUs */
852 fw_cfg_modify_i16(x86ms
->fw_cfg
, FW_CFG_NB_CPUS
, x86ms
->boot_cpus
);
855 if (x86ms
->apic_id_limit
> 255 && !xen_enabled()) {
856 IntelIOMMUState
*iommu
= INTEL_IOMMU_DEVICE(x86_iommu_get_default());
858 if (!iommu
|| !x86_iommu_ir_supported(X86_IOMMU_DEVICE(iommu
)) ||
859 iommu
->intr_eim
!= ON_OFF_AUTO_ON
) {
860 error_report("current -smp configuration requires "
861 "Extended Interrupt Mode enabled. "
862 "You can add an IOMMU using: "
863 "-device intel-iommu,intremap=on,eim=on");
869 void pc_guest_info_init(PCMachineState
*pcms
)
872 MachineState
*ms
= MACHINE(pcms
);
873 X86MachineState
*x86ms
= X86_MACHINE(pcms
);
875 x86ms
->apic_xrupt_override
= kvm_allows_irq0_override();
876 pcms
->numa_nodes
= ms
->numa_state
->num_nodes
;
877 pcms
->node_mem
= g_malloc0(pcms
->numa_nodes
*
878 sizeof *pcms
->node_mem
);
879 for (i
= 0; i
< ms
->numa_state
->num_nodes
; i
++) {
880 pcms
->node_mem
[i
] = ms
->numa_state
->nodes
[i
].node_mem
;
883 pcms
->machine_done
.notify
= pc_machine_done
;
884 qemu_add_machine_init_done_notifier(&pcms
->machine_done
);
887 /* setup pci memory address space mapping into system address space */
888 void pc_pci_as_mapping_init(Object
*owner
, MemoryRegion
*system_memory
,
889 MemoryRegion
*pci_address_space
)
891 /* Set to lower priority than RAM */
892 memory_region_add_subregion_overlap(system_memory
, 0x0,
893 pci_address_space
, -1);
896 void xen_load_linux(PCMachineState
*pcms
)
900 PCMachineClass
*pcmc
= PC_MACHINE_GET_CLASS(pcms
);
901 X86MachineState
*x86ms
= X86_MACHINE(pcms
);
903 assert(MACHINE(pcms
)->kernel_filename
!= NULL
);
905 fw_cfg
= fw_cfg_init_io(FW_CFG_IO_BASE
);
906 fw_cfg_add_i16(fw_cfg
, FW_CFG_NB_CPUS
, x86ms
->boot_cpus
);
909 x86_load_linux(x86ms
, fw_cfg
, pcmc
->acpi_data_size
,
910 pcmc
->pvh_enabled
, pcmc
->linuxboot_dma_enabled
);
911 for (i
= 0; i
< nb_option_roms
; i
++) {
912 assert(!strcmp(option_rom
[i
].name
, "linuxboot.bin") ||
913 !strcmp(option_rom
[i
].name
, "linuxboot_dma.bin") ||
914 !strcmp(option_rom
[i
].name
, "pvh.bin") ||
915 !strcmp(option_rom
[i
].name
, "multiboot.bin"));
916 rom_add_option(option_rom
[i
].name
, option_rom
[i
].bootindex
);
918 x86ms
->fw_cfg
= fw_cfg
;
921 void pc_memory_init(PCMachineState
*pcms
,
922 MemoryRegion
*system_memory
,
923 MemoryRegion
*rom_memory
,
924 MemoryRegion
**ram_memory
)
927 MemoryRegion
*option_rom_mr
;
928 MemoryRegion
*ram_below_4g
, *ram_above_4g
;
930 MachineState
*machine
= MACHINE(pcms
);
931 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
932 PCMachineClass
*pcmc
= PC_MACHINE_GET_CLASS(pcms
);
933 X86MachineState
*x86ms
= X86_MACHINE(pcms
);
935 assert(machine
->ram_size
== x86ms
->below_4g_mem_size
+
936 x86ms
->above_4g_mem_size
);
938 linux_boot
= (machine
->kernel_filename
!= NULL
);
941 * Split single memory region and use aliases to address portions of it,
942 * done for backwards compatibility with older qemus.
944 *ram_memory
= machine
->ram
;
945 ram_below_4g
= g_malloc(sizeof(*ram_below_4g
));
946 memory_region_init_alias(ram_below_4g
, NULL
, "ram-below-4g", machine
->ram
,
947 0, x86ms
->below_4g_mem_size
);
948 memory_region_add_subregion(system_memory
, 0, ram_below_4g
);
949 e820_add_entry(0, x86ms
->below_4g_mem_size
, E820_RAM
);
950 if (x86ms
->above_4g_mem_size
> 0) {
951 ram_above_4g
= g_malloc(sizeof(*ram_above_4g
));
952 memory_region_init_alias(ram_above_4g
, NULL
, "ram-above-4g",
954 x86ms
->below_4g_mem_size
,
955 x86ms
->above_4g_mem_size
);
956 memory_region_add_subregion(system_memory
, 0x100000000ULL
,
958 e820_add_entry(0x100000000ULL
, x86ms
->above_4g_mem_size
, E820_RAM
);
961 if (!pcmc
->has_reserved_memory
&&
962 (machine
->ram_slots
||
963 (machine
->maxram_size
> machine
->ram_size
))) {
965 error_report("\"-memory 'slots|maxmem'\" is not supported by: %s",
970 /* always allocate the device memory information */
971 machine
->device_memory
= g_malloc0(sizeof(*machine
->device_memory
));
973 /* initialize device memory address space */
974 if (pcmc
->has_reserved_memory
&&
975 (machine
->ram_size
< machine
->maxram_size
)) {
976 ram_addr_t device_mem_size
= machine
->maxram_size
- machine
->ram_size
;
978 if (machine
->ram_slots
> ACPI_MAX_RAM_SLOTS
) {
979 error_report("unsupported amount of memory slots: %"PRIu64
,
984 if (QEMU_ALIGN_UP(machine
->maxram_size
,
985 TARGET_PAGE_SIZE
) != machine
->maxram_size
) {
986 error_report("maximum memory size must by aligned to multiple of "
987 "%d bytes", TARGET_PAGE_SIZE
);
991 machine
->device_memory
->base
=
992 ROUND_UP(0x100000000ULL
+ x86ms
->above_4g_mem_size
, 1 * GiB
);
994 if (pcmc
->enforce_aligned_dimm
) {
995 /* size device region assuming 1G page max alignment per slot */
996 device_mem_size
+= (1 * GiB
) * machine
->ram_slots
;
999 if ((machine
->device_memory
->base
+ device_mem_size
) <
1001 error_report("unsupported amount of maximum memory: " RAM_ADDR_FMT
,
1002 machine
->maxram_size
);
1006 memory_region_init(&machine
->device_memory
->mr
, OBJECT(pcms
),
1007 "device-memory", device_mem_size
);
1008 memory_region_add_subregion(system_memory
, machine
->device_memory
->base
,
1009 &machine
->device_memory
->mr
);
1012 /* Initialize PC system firmware */
1013 pc_system_firmware_init(pcms
, rom_memory
);
1015 option_rom_mr
= g_malloc(sizeof(*option_rom_mr
));
1016 memory_region_init_ram(option_rom_mr
, NULL
, "pc.rom", PC_ROM_SIZE
,
1018 if (pcmc
->pci_enabled
) {
1019 memory_region_set_readonly(option_rom_mr
, true);
1021 memory_region_add_subregion_overlap(rom_memory
,
1026 fw_cfg
= fw_cfg_arch_create(machine
,
1027 x86ms
->boot_cpus
, x86ms
->apic_id_limit
);
1031 if (pcmc
->has_reserved_memory
&& machine
->device_memory
->base
) {
1032 uint64_t *val
= g_malloc(sizeof(*val
));
1033 PCMachineClass
*pcmc
= PC_MACHINE_GET_CLASS(pcms
);
1034 uint64_t res_mem_end
= machine
->device_memory
->base
;
1036 if (!pcmc
->broken_reserved_end
) {
1037 res_mem_end
+= memory_region_size(&machine
->device_memory
->mr
);
1039 *val
= cpu_to_le64(ROUND_UP(res_mem_end
, 1 * GiB
));
1040 fw_cfg_add_file(fw_cfg
, "etc/reserved-memory-end", val
, sizeof(*val
));
1044 x86_load_linux(x86ms
, fw_cfg
, pcmc
->acpi_data_size
,
1045 pcmc
->pvh_enabled
, pcmc
->linuxboot_dma_enabled
);
1048 for (i
= 0; i
< nb_option_roms
; i
++) {
1049 rom_add_option(option_rom
[i
].name
, option_rom
[i
].bootindex
);
1051 x86ms
->fw_cfg
= fw_cfg
;
1053 /* Init default IOAPIC address space */
1054 x86ms
->ioapic_as
= &address_space_memory
;
1056 /* Init ACPI memory hotplug IO base address */
1057 pcms
->memhp_io_base
= ACPI_MEMORY_HOTPLUG_BASE
;
1061 * The 64bit pci hole starts after "above 4G RAM" and
1062 * potentially the space reserved for memory hotplug.
1064 uint64_t pc_pci_hole64_start(void)
1066 PCMachineState
*pcms
= PC_MACHINE(qdev_get_machine());
1067 PCMachineClass
*pcmc
= PC_MACHINE_GET_CLASS(pcms
);
1068 MachineState
*ms
= MACHINE(pcms
);
1069 X86MachineState
*x86ms
= X86_MACHINE(pcms
);
1070 uint64_t hole64_start
= 0;
1072 if (pcmc
->has_reserved_memory
&& ms
->device_memory
->base
) {
1073 hole64_start
= ms
->device_memory
->base
;
1074 if (!pcmc
->broken_reserved_end
) {
1075 hole64_start
+= memory_region_size(&ms
->device_memory
->mr
);
1078 hole64_start
= 0x100000000ULL
+ x86ms
->above_4g_mem_size
;
1081 return ROUND_UP(hole64_start
, 1 * GiB
);
1084 DeviceState
*pc_vga_init(ISABus
*isa_bus
, PCIBus
*pci_bus
)
1086 DeviceState
*dev
= NULL
;
1088 rom_set_order_override(FW_CFG_ORDER_OVERRIDE_VGA
);
1090 PCIDevice
*pcidev
= pci_vga_init(pci_bus
);
1091 dev
= pcidev
? &pcidev
->qdev
: NULL
;
1092 } else if (isa_bus
) {
1093 ISADevice
*isadev
= isa_vga_init(isa_bus
);
1094 dev
= isadev
? DEVICE(isadev
) : NULL
;
1096 rom_reset_order_override();
1100 static const MemoryRegionOps ioport80_io_ops
= {
1101 .write
= ioport80_write
,
1102 .read
= ioport80_read
,
1103 .endianness
= DEVICE_NATIVE_ENDIAN
,
1105 .min_access_size
= 1,
1106 .max_access_size
= 1,
1110 static const MemoryRegionOps ioportF0_io_ops
= {
1111 .write
= ioportF0_write
,
1112 .read
= ioportF0_read
,
1113 .endianness
= DEVICE_NATIVE_ENDIAN
,
1115 .min_access_size
= 1,
1116 .max_access_size
= 1,
1120 static void pc_superio_init(ISABus
*isa_bus
, bool create_fdctrl
, bool no_vmport
)
1123 DriveInfo
*fd
[MAX_FD
];
1125 ISADevice
*fdc
, *i8042
, *port92
, *vmmouse
;
1127 serial_hds_isa_init(isa_bus
, 0, MAX_ISA_SERIAL_PORTS
);
1128 parallel_hds_isa_init(isa_bus
, MAX_PARALLEL_PORTS
);
1130 for (i
= 0; i
< MAX_FD
; i
++) {
1131 fd
[i
] = drive_get(IF_FLOPPY
, 0, i
);
1132 create_fdctrl
|= !!fd
[i
];
1134 if (create_fdctrl
) {
1135 fdc
= isa_new(TYPE_ISA_FDC
);
1137 isa_realize_and_unref(fdc
, isa_bus
, &error_fatal
);
1138 isa_fdc_init_drives(fdc
, fd
);
1142 i8042
= isa_create_simple(isa_bus
, "i8042");
1144 isa_create_simple(isa_bus
, TYPE_VMPORT
);
1145 vmmouse
= isa_try_new("vmmouse");
1150 object_property_set_link(OBJECT(vmmouse
), "i8042", OBJECT(i8042
),
1152 isa_realize_and_unref(vmmouse
, isa_bus
, &error_fatal
);
1154 port92
= isa_create_simple(isa_bus
, TYPE_PORT92
);
1156 a20_line
= qemu_allocate_irqs(handle_a20_line_change
, first_cpu
, 2);
1157 i8042_setup_a20_line(i8042
, a20_line
[0]);
1158 qdev_connect_gpio_out_named(DEVICE(port92
),
1159 PORT92_A20_LINE
, 0, a20_line
[1]);
1163 void pc_basic_device_init(struct PCMachineState
*pcms
,
1164 ISABus
*isa_bus
, qemu_irq
*gsi
,
1165 ISADevice
**rtc_state
,
1170 DeviceState
*hpet
= NULL
;
1171 int pit_isa_irq
= 0;
1172 qemu_irq pit_alt_irq
= NULL
;
1173 qemu_irq rtc_irq
= NULL
;
1174 ISADevice
*pit
= NULL
;
1175 MemoryRegion
*ioport80_io
= g_new(MemoryRegion
, 1);
1176 MemoryRegion
*ioportF0_io
= g_new(MemoryRegion
, 1);
1178 memory_region_init_io(ioport80_io
, NULL
, &ioport80_io_ops
, NULL
, "ioport80", 1);
1179 memory_region_add_subregion(isa_bus
->address_space_io
, 0x80, ioport80_io
);
1181 memory_region_init_io(ioportF0_io
, NULL
, &ioportF0_io_ops
, NULL
, "ioportF0", 1);
1182 memory_region_add_subregion(isa_bus
->address_space_io
, 0xf0, ioportF0_io
);
1185 * Check if an HPET shall be created.
1187 * Without KVM_CAP_PIT_STATE2, we cannot switch off the in-kernel PIT
1188 * when the HPET wants to take over. Thus we have to disable the latter.
1190 if (!no_hpet
&& (!kvm_irqchip_in_kernel() || kvm_has_pit_state2())) {
1191 hpet
= qdev_try_new(TYPE_HPET
);
1193 /* For pc-piix-*, hpet's intcap is always IRQ2. For pc-q35-1.7
1194 * and earlier, use IRQ2 for compat. Otherwise, use IRQ16~23,
1197 uint8_t compat
= object_property_get_uint(OBJECT(hpet
),
1200 qdev_prop_set_uint32(hpet
, HPET_INTCAP
, hpet_irqs
);
1202 sysbus_realize_and_unref(SYS_BUS_DEVICE(hpet
), &error_fatal
);
1203 sysbus_mmio_map(SYS_BUS_DEVICE(hpet
), 0, HPET_BASE
);
1205 for (i
= 0; i
< GSI_NUM_PINS
; i
++) {
1206 sysbus_connect_irq(SYS_BUS_DEVICE(hpet
), i
, gsi
[i
]);
1209 pit_alt_irq
= qdev_get_gpio_in(hpet
, HPET_LEGACY_PIT_INT
);
1210 rtc_irq
= qdev_get_gpio_in(hpet
, HPET_LEGACY_RTC_INT
);
1213 *rtc_state
= mc146818_rtc_init(isa_bus
, 2000, rtc_irq
);
1215 qemu_register_boot_set(pc_boot_set
, *rtc_state
);
1217 if (!xen_enabled() && pcms
->pit_enabled
) {
1218 if (kvm_pit_in_kernel()) {
1219 pit
= kvm_pit_init(isa_bus
, 0x40);
1221 pit
= i8254_pit_init(isa_bus
, 0x40, pit_isa_irq
, pit_alt_irq
);
1224 /* connect PIT to output control line of the HPET */
1225 qdev_connect_gpio_out(hpet
, 0, qdev_get_gpio_in(DEVICE(pit
), 0));
1227 pcspk_init(pcms
->pcspk
, isa_bus
, pit
);
1230 i8257_dma_init(isa_bus
, 0);
1233 pc_superio_init(isa_bus
, create_fdctrl
, pcms
->vmport
!= ON_OFF_AUTO_ON
);
1236 void pc_nic_init(PCMachineClass
*pcmc
, ISABus
*isa_bus
, PCIBus
*pci_bus
)
1240 rom_set_order_override(FW_CFG_ORDER_OVERRIDE_NIC
);
1241 for (i
= 0; i
< nb_nics
; i
++) {
1242 NICInfo
*nd
= &nd_table
[i
];
1243 const char *model
= nd
->model
? nd
->model
: pcmc
->default_nic_model
;
1245 if (g_str_equal(model
, "ne2k_isa")) {
1246 pc_init_ne2k_isa(isa_bus
, nd
);
1248 pci_nic_init_nofail(nd
, pci_bus
, model
, NULL
);
1251 rom_reset_order_override();
1254 void pc_i8259_create(ISABus
*isa_bus
, qemu_irq
*i8259_irqs
)
1258 if (kvm_pic_in_kernel()) {
1259 i8259
= kvm_i8259_init(isa_bus
);
1260 } else if (xen_enabled()) {
1261 i8259
= xen_interrupt_controller_init();
1263 i8259
= i8259_init(isa_bus
, x86_allocate_cpu_irq());
1266 for (size_t i
= 0; i
< ISA_NUM_IRQS
; i
++) {
1267 i8259_irqs
[i
] = i8259
[i
];
1273 static void pc_memory_pre_plug(HotplugHandler
*hotplug_dev
, DeviceState
*dev
,
1276 const PCMachineState
*pcms
= PC_MACHINE(hotplug_dev
);
1277 const X86MachineState
*x86ms
= X86_MACHINE(hotplug_dev
);
1278 const PCMachineClass
*pcmc
= PC_MACHINE_GET_CLASS(pcms
);
1279 const MachineState
*ms
= MACHINE(hotplug_dev
);
1280 const bool is_nvdimm
= object_dynamic_cast(OBJECT(dev
), TYPE_NVDIMM
);
1281 const uint64_t legacy_align
= TARGET_PAGE_SIZE
;
1282 Error
*local_err
= NULL
;
1285 * When -no-acpi is used with Q35 machine type, no ACPI is built,
1286 * but pcms->acpi_dev is still created. Check !acpi_enabled in
1287 * addition to cover this case.
1289 if (!x86ms
->acpi_dev
|| !x86_machine_is_acpi_enabled(x86ms
)) {
1291 "memory hotplug is not enabled: missing acpi device or acpi disabled");
1295 if (is_nvdimm
&& !ms
->nvdimms_state
->is_enabled
) {
1296 error_setg(errp
, "nvdimm is not enabled: missing 'nvdimm' in '-M'");
1300 hotplug_handler_pre_plug(x86ms
->acpi_dev
, dev
, &local_err
);
1302 error_propagate(errp
, local_err
);
1306 pc_dimm_pre_plug(PC_DIMM(dev
), MACHINE(hotplug_dev
),
1307 pcmc
->enforce_aligned_dimm
? NULL
: &legacy_align
, errp
);
1310 static void pc_memory_plug(HotplugHandler
*hotplug_dev
,
1311 DeviceState
*dev
, Error
**errp
)
1313 Error
*local_err
= NULL
;
1314 PCMachineState
*pcms
= PC_MACHINE(hotplug_dev
);
1315 X86MachineState
*x86ms
= X86_MACHINE(hotplug_dev
);
1316 MachineState
*ms
= MACHINE(hotplug_dev
);
1317 bool is_nvdimm
= object_dynamic_cast(OBJECT(dev
), TYPE_NVDIMM
);
1319 pc_dimm_plug(PC_DIMM(dev
), MACHINE(pcms
), &local_err
);
1325 nvdimm_plug(ms
->nvdimms_state
);
1328 hotplug_handler_plug(x86ms
->acpi_dev
, dev
, &error_abort
);
1330 error_propagate(errp
, local_err
);
1333 static void pc_memory_unplug_request(HotplugHandler
*hotplug_dev
,
1334 DeviceState
*dev
, Error
**errp
)
1336 X86MachineState
*x86ms
= X86_MACHINE(hotplug_dev
);
1339 * When -no-acpi is used with Q35 machine type, no ACPI is built,
1340 * but pcms->acpi_dev is still created. Check !acpi_enabled in
1341 * addition to cover this case.
1343 if (!x86ms
->acpi_dev
|| !x86_machine_is_acpi_enabled(x86ms
)) {
1345 "memory hotplug is not enabled: missing acpi device or acpi disabled");
1349 if (object_dynamic_cast(OBJECT(dev
), TYPE_NVDIMM
)) {
1350 error_setg(errp
, "nvdimm device hot unplug is not supported yet.");
1354 hotplug_handler_unplug_request(x86ms
->acpi_dev
, dev
,
1358 static void pc_memory_unplug(HotplugHandler
*hotplug_dev
,
1359 DeviceState
*dev
, Error
**errp
)
1361 PCMachineState
*pcms
= PC_MACHINE(hotplug_dev
);
1362 X86MachineState
*x86ms
= X86_MACHINE(hotplug_dev
);
1363 Error
*local_err
= NULL
;
1365 hotplug_handler_unplug(x86ms
->acpi_dev
, dev
, &local_err
);
1370 pc_dimm_unplug(PC_DIMM(dev
), MACHINE(pcms
));
1371 qdev_unrealize(dev
);
1373 error_propagate(errp
, local_err
);
1376 static int pc_apic_cmp(const void *a
, const void *b
)
1378 CPUArchId
*apic_a
= (CPUArchId
*)a
;
1379 CPUArchId
*apic_b
= (CPUArchId
*)b
;
1381 return apic_a
->arch_id
- apic_b
->arch_id
;
1384 /* returns pointer to CPUArchId descriptor that matches CPU's apic_id
1385 * in ms->possible_cpus->cpus, if ms->possible_cpus->cpus has no
1386 * entry corresponding to CPU's apic_id returns NULL.
1388 static CPUArchId
*pc_find_cpu_slot(MachineState
*ms
, uint32_t id
, int *idx
)
1390 CPUArchId apic_id
, *found_cpu
;
1392 apic_id
.arch_id
= id
;
1393 found_cpu
= bsearch(&apic_id
, ms
->possible_cpus
->cpus
,
1394 ms
->possible_cpus
->len
, sizeof(*ms
->possible_cpus
->cpus
),
1396 if (found_cpu
&& idx
) {
1397 *idx
= found_cpu
- ms
->possible_cpus
->cpus
;
1402 static void pc_cpu_plug(HotplugHandler
*hotplug_dev
,
1403 DeviceState
*dev
, Error
**errp
)
1405 CPUArchId
*found_cpu
;
1406 Error
*local_err
= NULL
;
1407 X86CPU
*cpu
= X86_CPU(dev
);
1408 PCMachineState
*pcms
= PC_MACHINE(hotplug_dev
);
1409 X86MachineState
*x86ms
= X86_MACHINE(hotplug_dev
);
1411 if (x86ms
->acpi_dev
) {
1412 hotplug_handler_plug(x86ms
->acpi_dev
, dev
, &local_err
);
1418 /* increment the number of CPUs */
1421 rtc_set_cpus_count(x86ms
->rtc
, x86ms
->boot_cpus
);
1423 if (x86ms
->fw_cfg
) {
1424 fw_cfg_modify_i16(x86ms
->fw_cfg
, FW_CFG_NB_CPUS
, x86ms
->boot_cpus
);
1427 found_cpu
= pc_find_cpu_slot(MACHINE(pcms
), cpu
->apic_id
, NULL
);
1428 found_cpu
->cpu
= OBJECT(dev
);
1430 error_propagate(errp
, local_err
);
1432 static void pc_cpu_unplug_request_cb(HotplugHandler
*hotplug_dev
,
1433 DeviceState
*dev
, Error
**errp
)
1436 X86CPU
*cpu
= X86_CPU(dev
);
1437 PCMachineState
*pcms
= PC_MACHINE(hotplug_dev
);
1438 X86MachineState
*x86ms
= X86_MACHINE(hotplug_dev
);
1440 if (!x86ms
->acpi_dev
) {
1441 error_setg(errp
, "CPU hot unplug not supported without ACPI");
1445 pc_find_cpu_slot(MACHINE(pcms
), cpu
->apic_id
, &idx
);
1448 error_setg(errp
, "Boot CPU is unpluggable");
1452 hotplug_handler_unplug_request(x86ms
->acpi_dev
, dev
,
1456 static void pc_cpu_unplug_cb(HotplugHandler
*hotplug_dev
,
1457 DeviceState
*dev
, Error
**errp
)
1459 CPUArchId
*found_cpu
;
1460 Error
*local_err
= NULL
;
1461 X86CPU
*cpu
= X86_CPU(dev
);
1462 PCMachineState
*pcms
= PC_MACHINE(hotplug_dev
);
1463 X86MachineState
*x86ms
= X86_MACHINE(hotplug_dev
);
1465 hotplug_handler_unplug(x86ms
->acpi_dev
, dev
, &local_err
);
1470 found_cpu
= pc_find_cpu_slot(MACHINE(pcms
), cpu
->apic_id
, NULL
);
1471 found_cpu
->cpu
= NULL
;
1472 qdev_unrealize(dev
);
1474 /* decrement the number of CPUs */
1476 /* Update the number of CPUs in CMOS */
1477 rtc_set_cpus_count(x86ms
->rtc
, x86ms
->boot_cpus
);
1478 fw_cfg_modify_i16(x86ms
->fw_cfg
, FW_CFG_NB_CPUS
, x86ms
->boot_cpus
);
1480 error_propagate(errp
, local_err
);
1483 static void pc_cpu_pre_plug(HotplugHandler
*hotplug_dev
,
1484 DeviceState
*dev
, Error
**errp
)
1488 CPUArchId
*cpu_slot
;
1489 X86CPUTopoIDs topo_ids
;
1490 X86CPU
*cpu
= X86_CPU(dev
);
1491 CPUX86State
*env
= &cpu
->env
;
1492 MachineState
*ms
= MACHINE(hotplug_dev
);
1493 PCMachineState
*pcms
= PC_MACHINE(hotplug_dev
);
1494 X86MachineState
*x86ms
= X86_MACHINE(hotplug_dev
);
1495 unsigned int smp_cores
= ms
->smp
.cores
;
1496 unsigned int smp_threads
= ms
->smp
.threads
;
1497 X86CPUTopoInfo topo_info
;
1499 if(!object_dynamic_cast(OBJECT(cpu
), ms
->cpu_type
)) {
1500 error_setg(errp
, "Invalid CPU type, expected cpu type: '%s'",
1505 init_topo_info(&topo_info
, x86ms
);
1507 env
->nr_dies
= x86ms
->smp_dies
;
1510 * If APIC ID is not set,
1511 * set it based on socket/die/core/thread properties.
1513 if (cpu
->apic_id
== UNASSIGNED_APIC_ID
) {
1514 int max_socket
= (ms
->smp
.max_cpus
- 1) /
1515 smp_threads
/ smp_cores
/ x86ms
->smp_dies
;
1518 * die-id was optional in QEMU 4.0 and older, so keep it optional
1519 * if there's only one die per socket.
1521 if (cpu
->die_id
< 0 && x86ms
->smp_dies
== 1) {
1525 if (cpu
->socket_id
< 0) {
1526 error_setg(errp
, "CPU socket-id is not set");
1528 } else if (cpu
->socket_id
> max_socket
) {
1529 error_setg(errp
, "Invalid CPU socket-id: %u must be in range 0:%u",
1530 cpu
->socket_id
, max_socket
);
1533 if (cpu
->die_id
< 0) {
1534 error_setg(errp
, "CPU die-id is not set");
1536 } else if (cpu
->die_id
> x86ms
->smp_dies
- 1) {
1537 error_setg(errp
, "Invalid CPU die-id: %u must be in range 0:%u",
1538 cpu
->die_id
, x86ms
->smp_dies
- 1);
1541 if (cpu
->core_id
< 0) {
1542 error_setg(errp
, "CPU core-id is not set");
1544 } else if (cpu
->core_id
> (smp_cores
- 1)) {
1545 error_setg(errp
, "Invalid CPU core-id: %u must be in range 0:%u",
1546 cpu
->core_id
, smp_cores
- 1);
1549 if (cpu
->thread_id
< 0) {
1550 error_setg(errp
, "CPU thread-id is not set");
1552 } else if (cpu
->thread_id
> (smp_threads
- 1)) {
1553 error_setg(errp
, "Invalid CPU thread-id: %u must be in range 0:%u",
1554 cpu
->thread_id
, smp_threads
- 1);
1558 topo_ids
.pkg_id
= cpu
->socket_id
;
1559 topo_ids
.die_id
= cpu
->die_id
;
1560 topo_ids
.core_id
= cpu
->core_id
;
1561 topo_ids
.smt_id
= cpu
->thread_id
;
1562 cpu
->apic_id
= x86_apicid_from_topo_ids(&topo_info
, &topo_ids
);
1565 cpu_slot
= pc_find_cpu_slot(MACHINE(pcms
), cpu
->apic_id
, &idx
);
1567 MachineState
*ms
= MACHINE(pcms
);
1569 x86_topo_ids_from_apicid(cpu
->apic_id
, &topo_info
, &topo_ids
);
1571 "Invalid CPU [socket: %u, die: %u, core: %u, thread: %u] with"
1572 " APIC ID %" PRIu32
", valid index range 0:%d",
1573 topo_ids
.pkg_id
, topo_ids
.die_id
, topo_ids
.core_id
, topo_ids
.smt_id
,
1574 cpu
->apic_id
, ms
->possible_cpus
->len
- 1);
1578 if (cpu_slot
->cpu
) {
1579 error_setg(errp
, "CPU[%d] with APIC ID %" PRIu32
" exists",
1584 /* if 'address' properties socket-id/core-id/thread-id are not set, set them
1585 * so that machine_query_hotpluggable_cpus would show correct values
1587 /* TODO: move socket_id/core_id/thread_id checks into x86_cpu_realizefn()
1588 * once -smp refactoring is complete and there will be CPU private
1589 * CPUState::nr_cores and CPUState::nr_threads fields instead of globals */
1590 x86_topo_ids_from_apicid(cpu
->apic_id
, &topo_info
, &topo_ids
);
1591 if (cpu
->socket_id
!= -1 && cpu
->socket_id
!= topo_ids
.pkg_id
) {
1592 error_setg(errp
, "property socket-id: %u doesn't match set apic-id:"
1593 " 0x%x (socket-id: %u)", cpu
->socket_id
, cpu
->apic_id
,
1597 cpu
->socket_id
= topo_ids
.pkg_id
;
1599 if (cpu
->die_id
!= -1 && cpu
->die_id
!= topo_ids
.die_id
) {
1600 error_setg(errp
, "property die-id: %u doesn't match set apic-id:"
1601 " 0x%x (die-id: %u)", cpu
->die_id
, cpu
->apic_id
, topo_ids
.die_id
);
1604 cpu
->die_id
= topo_ids
.die_id
;
1606 if (cpu
->core_id
!= -1 && cpu
->core_id
!= topo_ids
.core_id
) {
1607 error_setg(errp
, "property core-id: %u doesn't match set apic-id:"
1608 " 0x%x (core-id: %u)", cpu
->core_id
, cpu
->apic_id
,
1612 cpu
->core_id
= topo_ids
.core_id
;
1614 if (cpu
->thread_id
!= -1 && cpu
->thread_id
!= topo_ids
.smt_id
) {
1615 error_setg(errp
, "property thread-id: %u doesn't match set apic-id:"
1616 " 0x%x (thread-id: %u)", cpu
->thread_id
, cpu
->apic_id
,
1620 cpu
->thread_id
= topo_ids
.smt_id
;
1622 if (hyperv_feat_enabled(cpu
, HYPERV_FEAT_VPINDEX
) &&
1623 !kvm_hv_vpindex_settable()) {
1624 error_setg(errp
, "kernel doesn't allow setting HyperV VP_INDEX");
1629 cs
->cpu_index
= idx
;
1631 numa_cpu_pre_plug(cpu_slot
, dev
, errp
);
1634 static void pc_virtio_md_pci_pre_plug(HotplugHandler
*hotplug_dev
,
1635 DeviceState
*dev
, Error
**errp
)
1637 HotplugHandler
*hotplug_dev2
= qdev_get_bus_hotplug_handler(dev
);
1638 Error
*local_err
= NULL
;
1640 if (!hotplug_dev2
&& dev
->hotplugged
) {
1642 * Without a bus hotplug handler, we cannot control the plug/unplug
1643 * order. We should never reach this point when hotplugging on x86,
1644 * however, better add a safety net.
1646 error_setg(errp
, "hotplug of virtio based memory devices not supported"
1651 * First, see if we can plug this memory device at all. If that
1652 * succeeds, branch of to the actual hotplug handler.
1654 memory_device_pre_plug(MEMORY_DEVICE(dev
), MACHINE(hotplug_dev
), NULL
,
1656 if (!local_err
&& hotplug_dev2
) {
1657 hotplug_handler_pre_plug(hotplug_dev2
, dev
, &local_err
);
1659 error_propagate(errp
, local_err
);
1662 static void pc_virtio_md_pci_plug(HotplugHandler
*hotplug_dev
,
1663 DeviceState
*dev
, Error
**errp
)
1665 HotplugHandler
*hotplug_dev2
= qdev_get_bus_hotplug_handler(dev
);
1666 Error
*local_err
= NULL
;
1669 * Plug the memory device first and then branch off to the actual
1670 * hotplug handler. If that one fails, we can easily undo the memory
1673 memory_device_plug(MEMORY_DEVICE(dev
), MACHINE(hotplug_dev
));
1675 hotplug_handler_plug(hotplug_dev2
, dev
, &local_err
);
1677 memory_device_unplug(MEMORY_DEVICE(dev
), MACHINE(hotplug_dev
));
1680 error_propagate(errp
, local_err
);
1683 static void pc_virtio_md_pci_unplug_request(HotplugHandler
*hotplug_dev
,
1684 DeviceState
*dev
, Error
**errp
)
1686 /* We don't support hot unplug of virtio based memory devices */
1687 error_setg(errp
, "virtio based memory devices cannot be unplugged.");
1690 static void pc_virtio_md_pci_unplug(HotplugHandler
*hotplug_dev
,
1691 DeviceState
*dev
, Error
**errp
)
1693 /* We don't support hot unplug of virtio based memory devices */
1696 static void pc_machine_device_pre_plug_cb(HotplugHandler
*hotplug_dev
,
1697 DeviceState
*dev
, Error
**errp
)
1699 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
1700 pc_memory_pre_plug(hotplug_dev
, dev
, errp
);
1701 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_CPU
)) {
1702 pc_cpu_pre_plug(hotplug_dev
, dev
, errp
);
1703 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_VIRTIO_PMEM_PCI
) ||
1704 object_dynamic_cast(OBJECT(dev
), TYPE_VIRTIO_MEM_PCI
)) {
1705 pc_virtio_md_pci_pre_plug(hotplug_dev
, dev
, errp
);
1709 static void pc_machine_device_plug_cb(HotplugHandler
*hotplug_dev
,
1710 DeviceState
*dev
, Error
**errp
)
1712 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
1713 pc_memory_plug(hotplug_dev
, dev
, errp
);
1714 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_CPU
)) {
1715 pc_cpu_plug(hotplug_dev
, dev
, errp
);
1716 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_VIRTIO_PMEM_PCI
) ||
1717 object_dynamic_cast(OBJECT(dev
), TYPE_VIRTIO_MEM_PCI
)) {
1718 pc_virtio_md_pci_plug(hotplug_dev
, dev
, errp
);
1722 static void pc_machine_device_unplug_request_cb(HotplugHandler
*hotplug_dev
,
1723 DeviceState
*dev
, Error
**errp
)
1725 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
1726 pc_memory_unplug_request(hotplug_dev
, dev
, errp
);
1727 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_CPU
)) {
1728 pc_cpu_unplug_request_cb(hotplug_dev
, dev
, errp
);
1729 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_VIRTIO_PMEM_PCI
) ||
1730 object_dynamic_cast(OBJECT(dev
), TYPE_VIRTIO_MEM_PCI
)) {
1731 pc_virtio_md_pci_unplug_request(hotplug_dev
, dev
, errp
);
1733 error_setg(errp
, "acpi: device unplug request for not supported device"
1734 " type: %s", object_get_typename(OBJECT(dev
)));
1738 static void pc_machine_device_unplug_cb(HotplugHandler
*hotplug_dev
,
1739 DeviceState
*dev
, Error
**errp
)
1741 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
1742 pc_memory_unplug(hotplug_dev
, dev
, errp
);
1743 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_CPU
)) {
1744 pc_cpu_unplug_cb(hotplug_dev
, dev
, errp
);
1745 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_VIRTIO_PMEM_PCI
) ||
1746 object_dynamic_cast(OBJECT(dev
), TYPE_VIRTIO_MEM_PCI
)) {
1747 pc_virtio_md_pci_unplug(hotplug_dev
, dev
, errp
);
1749 error_setg(errp
, "acpi: device unplug for not supported device"
1750 " type: %s", object_get_typename(OBJECT(dev
)));
1754 static HotplugHandler
*pc_get_hotplug_handler(MachineState
*machine
,
1757 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
) ||
1758 object_dynamic_cast(OBJECT(dev
), TYPE_CPU
) ||
1759 object_dynamic_cast(OBJECT(dev
), TYPE_VIRTIO_PMEM_PCI
) ||
1760 object_dynamic_cast(OBJECT(dev
), TYPE_VIRTIO_MEM_PCI
)) {
1761 return HOTPLUG_HANDLER(machine
);
1768 pc_machine_get_device_memory_region_size(Object
*obj
, Visitor
*v
,
1769 const char *name
, void *opaque
,
1772 MachineState
*ms
= MACHINE(obj
);
1775 if (ms
->device_memory
) {
1776 value
= memory_region_size(&ms
->device_memory
->mr
);
1779 visit_type_int(v
, name
, &value
, errp
);
1782 static void pc_machine_get_vmport(Object
*obj
, Visitor
*v
, const char *name
,
1783 void *opaque
, Error
**errp
)
1785 PCMachineState
*pcms
= PC_MACHINE(obj
);
1786 OnOffAuto vmport
= pcms
->vmport
;
1788 visit_type_OnOffAuto(v
, name
, &vmport
, errp
);
1791 static void pc_machine_set_vmport(Object
*obj
, Visitor
*v
, const char *name
,
1792 void *opaque
, Error
**errp
)
1794 PCMachineState
*pcms
= PC_MACHINE(obj
);
1796 visit_type_OnOffAuto(v
, name
, &pcms
->vmport
, errp
);
1799 static bool pc_machine_get_smbus(Object
*obj
, Error
**errp
)
1801 PCMachineState
*pcms
= PC_MACHINE(obj
);
1803 return pcms
->smbus_enabled
;
1806 static void pc_machine_set_smbus(Object
*obj
, bool value
, Error
**errp
)
1808 PCMachineState
*pcms
= PC_MACHINE(obj
);
1810 pcms
->smbus_enabled
= value
;
1813 static bool pc_machine_get_sata(Object
*obj
, Error
**errp
)
1815 PCMachineState
*pcms
= PC_MACHINE(obj
);
1817 return pcms
->sata_enabled
;
1820 static void pc_machine_set_sata(Object
*obj
, bool value
, Error
**errp
)
1822 PCMachineState
*pcms
= PC_MACHINE(obj
);
1824 pcms
->sata_enabled
= value
;
1827 static bool pc_machine_get_pit(Object
*obj
, Error
**errp
)
1829 PCMachineState
*pcms
= PC_MACHINE(obj
);
1831 return pcms
->pit_enabled
;
1834 static void pc_machine_set_pit(Object
*obj
, bool value
, Error
**errp
)
1836 PCMachineState
*pcms
= PC_MACHINE(obj
);
1838 pcms
->pit_enabled
= value
;
1841 static void pc_machine_get_max_ram_below_4g(Object
*obj
, Visitor
*v
,
1842 const char *name
, void *opaque
,
1845 PCMachineState
*pcms
= PC_MACHINE(obj
);
1846 uint64_t value
= pcms
->max_ram_below_4g
;
1848 visit_type_size(v
, name
, &value
, errp
);
1851 static void pc_machine_set_max_ram_below_4g(Object
*obj
, Visitor
*v
,
1852 const char *name
, void *opaque
,
1855 PCMachineState
*pcms
= PC_MACHINE(obj
);
1858 if (!visit_type_size(v
, name
, &value
, errp
)) {
1861 if (value
> 4 * GiB
) {
1863 "Machine option 'max-ram-below-4g=%"PRIu64
1864 "' expects size less than or equal to 4G", value
);
1868 if (value
< 1 * MiB
) {
1869 warn_report("Only %" PRIu64
" bytes of RAM below the 4GiB boundary,"
1870 "BIOS may not work with less than 1MiB", value
);
1873 pcms
->max_ram_below_4g
= value
;
1876 static void pc_machine_initfn(Object
*obj
)
1878 PCMachineState
*pcms
= PC_MACHINE(obj
);
1880 #ifdef CONFIG_VMPORT
1881 pcms
->vmport
= ON_OFF_AUTO_AUTO
;
1883 pcms
->vmport
= ON_OFF_AUTO_OFF
;
1884 #endif /* CONFIG_VMPORT */
1885 pcms
->max_ram_below_4g
= 0; /* use default */
1886 /* acpi build is enabled by default if machine supports it */
1887 pcms
->acpi_build_enabled
= PC_MACHINE_GET_CLASS(pcms
)->has_acpi_build
;
1888 pcms
->smbus_enabled
= true;
1889 pcms
->sata_enabled
= true;
1890 pcms
->pit_enabled
= true;
1892 pc_system_flash_create(pcms
);
1893 pcms
->pcspk
= isa_new(TYPE_PC_SPEAKER
);
1894 object_property_add_alias(OBJECT(pcms
), "pcspk-audiodev",
1895 OBJECT(pcms
->pcspk
), "audiodev");
1898 static void pc_machine_reset(MachineState
*machine
)
1903 qemu_devices_reset();
1905 /* Reset APIC after devices have been reset to cancel
1906 * any changes that qemu_devices_reset() might have done.
1911 if (cpu
->apic_state
) {
1912 device_legacy_reset(cpu
->apic_state
);
1917 static void pc_machine_wakeup(MachineState
*machine
)
1919 cpu_synchronize_all_states();
1920 pc_machine_reset(machine
);
1921 cpu_synchronize_all_post_reset();
1924 static bool pc_hotplug_allowed(MachineState
*ms
, DeviceState
*dev
, Error
**errp
)
1926 X86IOMMUState
*iommu
= x86_iommu_get_default();
1927 IntelIOMMUState
*intel_iommu
;
1930 object_dynamic_cast((Object
*)iommu
, TYPE_INTEL_IOMMU_DEVICE
) &&
1931 object_dynamic_cast((Object
*)dev
, "vfio-pci")) {
1932 intel_iommu
= INTEL_IOMMU_DEVICE(iommu
);
1933 if (!intel_iommu
->caching_mode
) {
1934 error_setg(errp
, "Device assignment is not allowed without "
1935 "enabling caching-mode=on for Intel IOMMU.");
1943 static void pc_machine_class_init(ObjectClass
*oc
, void *data
)
1945 MachineClass
*mc
= MACHINE_CLASS(oc
);
1946 PCMachineClass
*pcmc
= PC_MACHINE_CLASS(oc
);
1947 HotplugHandlerClass
*hc
= HOTPLUG_HANDLER_CLASS(oc
);
1949 pcmc
->pci_enabled
= true;
1950 pcmc
->has_acpi_build
= true;
1951 pcmc
->rsdp_in_ram
= true;
1952 pcmc
->smbios_defaults
= true;
1953 pcmc
->smbios_uuid_encoded
= true;
1954 pcmc
->gigabyte_align
= true;
1955 pcmc
->has_reserved_memory
= true;
1956 pcmc
->kvmclock_enabled
= true;
1957 pcmc
->enforce_aligned_dimm
= true;
1958 /* BIOS ACPI tables: 128K. Other BIOS datastructures: less than 4K reported
1959 * to be used at the moment, 32K should be enough for a while. */
1960 pcmc
->acpi_data_size
= 0x20000 + 0x8000;
1961 pcmc
->linuxboot_dma_enabled
= true;
1962 pcmc
->pvh_enabled
= true;
1963 assert(!mc
->get_hotplug_handler
);
1964 mc
->get_hotplug_handler
= pc_get_hotplug_handler
;
1965 mc
->hotplug_allowed
= pc_hotplug_allowed
;
1966 mc
->cpu_index_to_instance_props
= x86_cpu_index_to_props
;
1967 mc
->get_default_cpu_node_id
= x86_get_default_cpu_node_id
;
1968 mc
->possible_cpu_arch_ids
= x86_possible_cpu_arch_ids
;
1969 mc
->auto_enable_numa_with_memhp
= true;
1970 mc
->auto_enable_numa_with_memdev
= true;
1971 mc
->has_hotpluggable_cpus
= true;
1972 mc
->default_boot_order
= "cad";
1973 mc
->hot_add_cpu
= pc_hot_add_cpu
;
1974 mc
->smp_parse
= pc_smp_parse
;
1975 mc
->block_default_type
= IF_IDE
;
1977 mc
->reset
= pc_machine_reset
;
1978 mc
->wakeup
= pc_machine_wakeup
;
1979 hc
->pre_plug
= pc_machine_device_pre_plug_cb
;
1980 hc
->plug
= pc_machine_device_plug_cb
;
1981 hc
->unplug_request
= pc_machine_device_unplug_request_cb
;
1982 hc
->unplug
= pc_machine_device_unplug_cb
;
1983 mc
->default_cpu_type
= TARGET_DEFAULT_CPU_TYPE
;
1984 mc
->nvdimm_supported
= true;
1985 mc
->default_ram_id
= "pc.ram";
1987 object_class_property_add(oc
, PC_MACHINE_MAX_RAM_BELOW_4G
, "size",
1988 pc_machine_get_max_ram_below_4g
, pc_machine_set_max_ram_below_4g
,
1990 object_class_property_set_description(oc
, PC_MACHINE_MAX_RAM_BELOW_4G
,
1991 "Maximum ram below the 4G boundary (32bit boundary)");
1993 object_class_property_add(oc
, PC_MACHINE_DEVMEM_REGION_SIZE
, "int",
1994 pc_machine_get_device_memory_region_size
, NULL
,
1997 object_class_property_add(oc
, PC_MACHINE_VMPORT
, "OnOffAuto",
1998 pc_machine_get_vmport
, pc_machine_set_vmport
,
2000 object_class_property_set_description(oc
, PC_MACHINE_VMPORT
,
2001 "Enable vmport (pc & q35)");
2003 object_class_property_add_bool(oc
, PC_MACHINE_SMBUS
,
2004 pc_machine_get_smbus
, pc_machine_set_smbus
);
2006 object_class_property_add_bool(oc
, PC_MACHINE_SATA
,
2007 pc_machine_get_sata
, pc_machine_set_sata
);
2009 object_class_property_add_bool(oc
, PC_MACHINE_PIT
,
2010 pc_machine_get_pit
, pc_machine_set_pit
);
2013 static const TypeInfo pc_machine_info
= {
2014 .name
= TYPE_PC_MACHINE
,
2015 .parent
= TYPE_X86_MACHINE
,
2017 .instance_size
= sizeof(PCMachineState
),
2018 .instance_init
= pc_machine_initfn
,
2019 .class_size
= sizeof(PCMachineClass
),
2020 .class_init
= pc_machine_class_init
,
2021 .interfaces
= (InterfaceInfo
[]) {
2022 { TYPE_HOTPLUG_HANDLER
},
2027 static void pc_machine_register_types(void)
2029 type_register_static(&pc_machine_info
);
2032 type_init(pc_machine_register_types
)